./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe006_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe006_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b2136a9c10453b968eccf837dc70324a87bc3dbd .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 07:24:56,615 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 07:24:56,615 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 07:24:56,621 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 07:24:56,621 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 07:24:56,622 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 07:24:56,623 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 07:24:56,623 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 07:24:56,624 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 07:24:56,625 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 07:24:56,625 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 07:24:56,625 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 07:24:56,626 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 07:24:56,626 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 07:24:56,627 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 07:24:56,627 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 07:24:56,628 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 07:24:56,628 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 07:24:56,629 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 07:24:56,630 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 07:24:56,630 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 07:24:56,631 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 07:24:56,632 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 07:24:56,632 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 07:24:56,632 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 07:24:56,633 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 07:24:56,633 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 07:24:56,634 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 07:24:56,634 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 07:24:56,635 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 07:24:56,635 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 07:24:56,635 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 07:24:56,635 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 07:24:56,635 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 07:24:56,636 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 07:24:56,636 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 07:24:56,636 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-03 07:24:56,643 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 07:24:56,643 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 07:24:56,644 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 07:24:56,644 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 07:24:56,644 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 07:24:56,644 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 07:24:56,644 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 07:24:56,644 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 07:24:56,645 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 07:24:56,645 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 07:24:56,645 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 07:24:56,645 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 07:24:56,645 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 07:24:56,645 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 07:24:56,646 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 07:24:56,647 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 07:24:56,647 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 07:24:56,647 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-03 07:24:56,648 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b2136a9c10453b968eccf837dc70324a87bc3dbd [2018-12-03 07:24:56,665 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 07:24:56,672 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 07:24:56,674 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 07:24:56,674 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 07:24:56,675 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 07:24:56,675 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/safe006_power.opt_false-unreach-call.i [2018-12-03 07:24:56,709 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/data/8ab22ec98/8e3285d734d346e891b7bc9d3afb36d1/FLAG513fb5943 [2018-12-03 07:24:57,028 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 07:24:57,028 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/sv-benchmarks/c/pthread-wmm/safe006_power.opt_false-unreach-call.i [2018-12-03 07:24:57,035 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/data/8ab22ec98/8e3285d734d346e891b7bc9d3afb36d1/FLAG513fb5943 [2018-12-03 07:24:57,450 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/data/8ab22ec98/8e3285d734d346e891b7bc9d3afb36d1 [2018-12-03 07:24:57,453 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 07:24:57,454 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 07:24:57,455 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 07:24:57,455 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 07:24:57,457 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 07:24:57,457 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,459 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56412a8f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57, skipping insertion in model container [2018-12-03 07:24:57,459 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,463 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 07:24:57,484 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 07:24:57,664 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 07:24:57,672 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 07:24:57,758 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 07:24:57,799 INFO L195 MainTranslator]: Completed translation [2018-12-03 07:24:57,799 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57 WrapperNode [2018-12-03 07:24:57,800 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 07:24:57,800 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 07:24:57,800 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 07:24:57,800 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 07:24:57,806 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,816 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,832 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 07:24:57,832 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 07:24:57,832 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 07:24:57,832 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 07:24:57,838 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,838 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,841 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,841 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,848 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,850 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,852 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... [2018-12-03 07:24:57,854 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 07:24:57,855 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 07:24:57,855 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 07:24:57,855 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 07:24:57,855 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-03 07:24:57,888 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-03 07:24:57,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-03 07:24:57,889 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-03 07:24:57,889 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-03 07:24:57,889 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-03 07:24:57,889 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-03 07:24:57,889 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 07:24:57,889 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 07:24:57,890 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-03 07:24:58,274 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 07:24:58,274 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-03 07:24:58,274 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:24:58 BoogieIcfgContainer [2018-12-03 07:24:58,274 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 07:24:58,275 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 07:24:58,275 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 07:24:58,277 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 07:24:58,278 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 07:24:57" (1/3) ... [2018-12-03 07:24:58,279 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3aa4457d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 07:24:58, skipping insertion in model container [2018-12-03 07:24:58,279 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 07:24:57" (2/3) ... [2018-12-03 07:24:58,279 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3aa4457d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 07:24:58, skipping insertion in model container [2018-12-03 07:24:58,279 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:24:58" (3/3) ... [2018-12-03 07:24:58,280 INFO L112 eAbstractionObserver]: Analyzing ICFG safe006_power.opt_false-unreach-call.i [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,311 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,311 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,311 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,311 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,312 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,313 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,314 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,315 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,316 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,317 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,318 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,319 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,320 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,321 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,322 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,323 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,324 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,325 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,326 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,327 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,328 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,329 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,330 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,330 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,330 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,330 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,331 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,332 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,333 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,334 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,335 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,336 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,337 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,338 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,338 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 07:24:58,343 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-03 07:24:58,343 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 07:24:58,349 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-03 07:24:58,360 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-03 07:24:58,377 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 07:24:58,377 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 07:24:58,377 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 07:24:58,377 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 07:24:58,377 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 07:24:58,377 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 07:24:58,377 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 07:24:58,377 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 07:24:58,386 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 200places, 259 transitions [2018-12-03 07:25:01,433 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 65314 states. [2018-12-03 07:25:01,434 INFO L276 IsEmpty]: Start isEmpty. Operand 65314 states. [2018-12-03 07:25:01,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-03 07:25:01,439 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:01,439 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:01,441 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:01,444 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:01,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1016272846, now seen corresponding path program 1 times [2018-12-03 07:25:01,445 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:01,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:01,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:01,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:01,481 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:01,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:01,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:01,590 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:01,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:01,590 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:01,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:01,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:01,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:01,603 INFO L87 Difference]: Start difference. First operand 65314 states. Second operand 4 states. [2018-12-03 07:25:02,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:02,357 INFO L93 Difference]: Finished difference Result 113402 states and 445073 transitions. [2018-12-03 07:25:02,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:25:02,358 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2018-12-03 07:25:02,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:02,645 INFO L225 Difference]: With dead ends: 113402 [2018-12-03 07:25:02,645 INFO L226 Difference]: Without dead ends: 86242 [2018-12-03 07:25:02,646 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:03,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86242 states. [2018-12-03 07:25:03,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86242 to 53058. [2018-12-03 07:25:03,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53058 states. [2018-12-03 07:25:04,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53058 states to 53058 states and 208767 transitions. [2018-12-03 07:25:04,010 INFO L78 Accepts]: Start accepts. Automaton has 53058 states and 208767 transitions. Word has length 49 [2018-12-03 07:25:04,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:04,010 INFO L480 AbstractCegarLoop]: Abstraction has 53058 states and 208767 transitions. [2018-12-03 07:25:04,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:04,010 INFO L276 IsEmpty]: Start isEmpty. Operand 53058 states and 208767 transitions. [2018-12-03 07:25:04,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-03 07:25:04,016 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:04,016 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:04,017 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:04,017 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:04,017 INFO L82 PathProgramCache]: Analyzing trace with hash -267205330, now seen corresponding path program 1 times [2018-12-03 07:25:04,017 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:04,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:04,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:04,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:04,020 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:04,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:04,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:04,062 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:04,062 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:25:04,062 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:04,063 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:25:04,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:25:04,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:04,063 INFO L87 Difference]: Start difference. First operand 53058 states and 208767 transitions. Second operand 3 states. [2018-12-03 07:25:04,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:04,470 INFO L93 Difference]: Finished difference Result 53058 states and 208358 transitions. [2018-12-03 07:25:04,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:25:04,470 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2018-12-03 07:25:04,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:04,591 INFO L225 Difference]: With dead ends: 53058 [2018-12-03 07:25:04,591 INFO L226 Difference]: Without dead ends: 53058 [2018-12-03 07:25:04,591 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:04,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53058 states. [2018-12-03 07:25:05,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53058 to 53058. [2018-12-03 07:25:05,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53058 states. [2018-12-03 07:25:05,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53058 states to 53058 states and 208358 transitions. [2018-12-03 07:25:05,635 INFO L78 Accepts]: Start accepts. Automaton has 53058 states and 208358 transitions. Word has length 61 [2018-12-03 07:25:05,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:05,635 INFO L480 AbstractCegarLoop]: Abstraction has 53058 states and 208358 transitions. [2018-12-03 07:25:05,635 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:25:05,636 INFO L276 IsEmpty]: Start isEmpty. Operand 53058 states and 208358 transitions. [2018-12-03 07:25:05,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-03 07:25:05,640 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:05,640 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:05,640 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:05,640 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:05,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1475605005, now seen corresponding path program 1 times [2018-12-03 07:25:05,641 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:05,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:05,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:05,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:05,644 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:05,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:05,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:05,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:05,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:05,710 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:05,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:05,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:05,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:05,711 INFO L87 Difference]: Start difference. First operand 53058 states and 208358 transitions. Second operand 4 states. [2018-12-03 07:25:05,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:05,765 INFO L93 Difference]: Finished difference Result 14752 states and 50098 transitions. [2018-12-03 07:25:05,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:05,766 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 61 [2018-12-03 07:25:05,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:05,783 INFO L225 Difference]: With dead ends: 14752 [2018-12-03 07:25:05,783 INFO L226 Difference]: Without dead ends: 13006 [2018-12-03 07:25:05,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:05,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13006 states. [2018-12-03 07:25:05,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13006 to 13006. [2018-12-03 07:25:05,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13006 states. [2018-12-03 07:25:05,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13006 states to 13006 states and 43944 transitions. [2018-12-03 07:25:05,924 INFO L78 Accepts]: Start accepts. Automaton has 13006 states and 43944 transitions. Word has length 61 [2018-12-03 07:25:05,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:05,924 INFO L480 AbstractCegarLoop]: Abstraction has 13006 states and 43944 transitions. [2018-12-03 07:25:05,925 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:05,925 INFO L276 IsEmpty]: Start isEmpty. Operand 13006 states and 43944 transitions. [2018-12-03 07:25:05,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-03 07:25:05,925 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:05,926 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:05,926 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:05,926 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:05,926 INFO L82 PathProgramCache]: Analyzing trace with hash 1874201971, now seen corresponding path program 1 times [2018-12-03 07:25:05,926 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:05,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:05,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:05,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:05,928 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:05,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:06,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:06,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:06,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:06,009 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:06,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:06,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:06,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:06,009 INFO L87 Difference]: Start difference. First operand 13006 states and 43944 transitions. Second operand 6 states. [2018-12-03 07:25:06,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:06,380 INFO L93 Difference]: Finished difference Result 27890 states and 91756 transitions. [2018-12-03 07:25:06,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 07:25:06,381 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2018-12-03 07:25:06,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:06,418 INFO L225 Difference]: With dead ends: 27890 [2018-12-03 07:25:06,418 INFO L226 Difference]: Without dead ends: 27790 [2018-12-03 07:25:06,418 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-03 07:25:06,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27790 states. [2018-12-03 07:25:06,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27790 to 16773. [2018-12-03 07:25:06,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16773 states. [2018-12-03 07:25:06,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16773 states to 16773 states and 55428 transitions. [2018-12-03 07:25:06,658 INFO L78 Accepts]: Start accepts. Automaton has 16773 states and 55428 transitions. Word has length 62 [2018-12-03 07:25:06,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:06,659 INFO L480 AbstractCegarLoop]: Abstraction has 16773 states and 55428 transitions. [2018-12-03 07:25:06,659 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:06,659 INFO L276 IsEmpty]: Start isEmpty. Operand 16773 states and 55428 transitions. [2018-12-03 07:25:06,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-03 07:25:06,661 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:06,661 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:06,661 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:06,661 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:06,661 INFO L82 PathProgramCache]: Analyzing trace with hash -1781281892, now seen corresponding path program 1 times [2018-12-03 07:25:06,661 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:06,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:06,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:06,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:06,663 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:06,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:06,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:06,685 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:06,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:25:06,685 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:06,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:25:06,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:25:06,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:06,685 INFO L87 Difference]: Start difference. First operand 16773 states and 55428 transitions. Second operand 3 states. [2018-12-03 07:25:06,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:06,757 INFO L93 Difference]: Finished difference Result 23727 states and 77133 transitions. [2018-12-03 07:25:06,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:25:06,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2018-12-03 07:25:06,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:06,787 INFO L225 Difference]: With dead ends: 23727 [2018-12-03 07:25:06,787 INFO L226 Difference]: Without dead ends: 23727 [2018-12-03 07:25:06,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:06,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23727 states. [2018-12-03 07:25:06,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23727 to 18701. [2018-12-03 07:25:06,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18701 states. [2018-12-03 07:25:07,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18701 states to 18701 states and 60885 transitions. [2018-12-03 07:25:07,086 INFO L78 Accepts]: Start accepts. Automaton has 18701 states and 60885 transitions. Word has length 64 [2018-12-03 07:25:07,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:07,086 INFO L480 AbstractCegarLoop]: Abstraction has 18701 states and 60885 transitions. [2018-12-03 07:25:07,086 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:25:07,086 INFO L276 IsEmpty]: Start isEmpty. Operand 18701 states and 60885 transitions. [2018-12-03 07:25:07,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-03 07:25:07,089 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:07,089 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:07,089 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:07,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:07,089 INFO L82 PathProgramCache]: Analyzing trace with hash -571649263, now seen corresponding path program 1 times [2018-12-03 07:25:07,089 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:07,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:07,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:07,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:07,091 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:07,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:07,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:07,211 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:07,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-03 07:25:07,212 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:07,212 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 07:25:07,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 07:25:07,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-12-03 07:25:07,212 INFO L87 Difference]: Start difference. First operand 18701 states and 60885 transitions. Second operand 10 states. [2018-12-03 07:25:08,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:08,187 INFO L93 Difference]: Finished difference Result 26205 states and 83034 transitions. [2018-12-03 07:25:08,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-03 07:25:08,187 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 68 [2018-12-03 07:25:08,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:08,220 INFO L225 Difference]: With dead ends: 26205 [2018-12-03 07:25:08,220 INFO L226 Difference]: Without dead ends: 26086 [2018-12-03 07:25:08,221 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=556, Unknown=0, NotChecked=0, Total=756 [2018-12-03 07:25:08,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26086 states. [2018-12-03 07:25:08,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26086 to 20328. [2018-12-03 07:25:08,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20328 states. [2018-12-03 07:25:08,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20328 states to 20328 states and 65644 transitions. [2018-12-03 07:25:08,472 INFO L78 Accepts]: Start accepts. Automaton has 20328 states and 65644 transitions. Word has length 68 [2018-12-03 07:25:08,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:08,473 INFO L480 AbstractCegarLoop]: Abstraction has 20328 states and 65644 transitions. [2018-12-03 07:25:08,473 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 07:25:08,473 INFO L276 IsEmpty]: Start isEmpty. Operand 20328 states and 65644 transitions. [2018-12-03 07:25:08,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-03 07:25:08,479 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:08,479 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:08,479 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:08,479 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:08,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1407972401, now seen corresponding path program 1 times [2018-12-03 07:25:08,480 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:08,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:08,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:08,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:08,482 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:08,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:08,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:08,520 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:08,520 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:08,520 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:08,520 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:08,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:08,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:08,520 INFO L87 Difference]: Start difference. First operand 20328 states and 65644 transitions. Second operand 4 states. [2018-12-03 07:25:08,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:08,668 INFO L93 Difference]: Finished difference Result 22000 states and 70954 transitions. [2018-12-03 07:25:08,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:08,669 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-12-03 07:25:08,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:08,704 INFO L225 Difference]: With dead ends: 22000 [2018-12-03 07:25:08,704 INFO L226 Difference]: Without dead ends: 22000 [2018-12-03 07:25:08,705 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:08,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22000 states. [2018-12-03 07:25:08,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22000 to 21472. [2018-12-03 07:25:08,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21472 states. [2018-12-03 07:25:08,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21472 states to 21472 states and 69230 transitions. [2018-12-03 07:25:08,951 INFO L78 Accepts]: Start accepts. Automaton has 21472 states and 69230 transitions. Word has length 76 [2018-12-03 07:25:08,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:08,951 INFO L480 AbstractCegarLoop]: Abstraction has 21472 states and 69230 transitions. [2018-12-03 07:25:08,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:08,952 INFO L276 IsEmpty]: Start isEmpty. Operand 21472 states and 69230 transitions. [2018-12-03 07:25:08,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-03 07:25:08,956 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:08,956 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:08,956 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:08,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:08,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1144184560, now seen corresponding path program 1 times [2018-12-03 07:25:08,956 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:08,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:08,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:08,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:08,958 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:08,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:09,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:09,030 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:09,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-03 07:25:09,030 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:09,030 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:25:09,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:25:09,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:09,031 INFO L87 Difference]: Start difference. First operand 21472 states and 69230 transitions. Second operand 7 states. [2018-12-03 07:25:09,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:09,543 INFO L93 Difference]: Finished difference Result 37517 states and 120136 transitions. [2018-12-03 07:25:09,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-03 07:25:09,543 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2018-12-03 07:25:09,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:09,589 INFO L225 Difference]: With dead ends: 37517 [2018-12-03 07:25:09,589 INFO L226 Difference]: Without dead ends: 37446 [2018-12-03 07:25:09,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:25:09,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37446 states. [2018-12-03 07:25:09,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37446 to 24138. [2018-12-03 07:25:09,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24138 states. [2018-12-03 07:25:09,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24138 states to 24138 states and 77250 transitions. [2018-12-03 07:25:09,915 INFO L78 Accepts]: Start accepts. Automaton has 24138 states and 77250 transitions. Word has length 76 [2018-12-03 07:25:09,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:09,916 INFO L480 AbstractCegarLoop]: Abstraction has 24138 states and 77250 transitions. [2018-12-03 07:25:09,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:25:09,916 INFO L276 IsEmpty]: Start isEmpty. Operand 24138 states and 77250 transitions. [2018-12-03 07:25:09,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-03 07:25:09,924 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:09,924 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:09,924 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:09,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:09,924 INFO L82 PathProgramCache]: Analyzing trace with hash -457594562, now seen corresponding path program 1 times [2018-12-03 07:25:09,924 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:09,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:09,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:09,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:09,926 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:09,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:09,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:09,958 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:09,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:25:09,958 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:09,958 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:25:09,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:25:09,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:09,958 INFO L87 Difference]: Start difference. First operand 24138 states and 77250 transitions. Second operand 3 states. [2018-12-03 07:25:10,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:10,167 INFO L93 Difference]: Finished difference Result 25009 states and 79558 transitions. [2018-12-03 07:25:10,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:25:10,167 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2018-12-03 07:25:10,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:10,199 INFO L225 Difference]: With dead ends: 25009 [2018-12-03 07:25:10,200 INFO L226 Difference]: Without dead ends: 25009 [2018-12-03 07:25:10,200 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:10,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25009 states. [2018-12-03 07:25:10,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25009 to 24700. [2018-12-03 07:25:10,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24700 states. [2018-12-03 07:25:10,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24700 states to 24700 states and 78706 transitions. [2018-12-03 07:25:10,476 INFO L78 Accepts]: Start accepts. Automaton has 24700 states and 78706 transitions. Word has length 82 [2018-12-03 07:25:10,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:10,476 INFO L480 AbstractCegarLoop]: Abstraction has 24700 states and 78706 transitions. [2018-12-03 07:25:10,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:25:10,476 INFO L276 IsEmpty]: Start isEmpty. Operand 24700 states and 78706 transitions. [2018-12-03 07:25:10,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-03 07:25:10,485 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:10,485 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:10,485 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:10,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:10,485 INFO L82 PathProgramCache]: Analyzing trace with hash -1806342675, now seen corresponding path program 1 times [2018-12-03 07:25:10,486 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:10,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:10,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:10,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:10,487 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:10,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:10,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:10,517 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:10,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:10,517 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:10,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:10,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:10,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:10,517 INFO L87 Difference]: Start difference. First operand 24700 states and 78706 transitions. Second operand 4 states. [2018-12-03 07:25:10,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:10,787 INFO L93 Difference]: Finished difference Result 32283 states and 100846 transitions. [2018-12-03 07:25:10,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:25:10,788 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2018-12-03 07:25:10,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:10,828 INFO L225 Difference]: With dead ends: 32283 [2018-12-03 07:25:10,828 INFO L226 Difference]: Without dead ends: 32283 [2018-12-03 07:25:10,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:10,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32283 states. [2018-12-03 07:25:11,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32283 to 28601. [2018-12-03 07:25:11,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28601 states. [2018-12-03 07:25:11,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28601 states to 28601 states and 90017 transitions. [2018-12-03 07:25:11,182 INFO L78 Accepts]: Start accepts. Automaton has 28601 states and 90017 transitions. Word has length 82 [2018-12-03 07:25:11,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:11,182 INFO L480 AbstractCegarLoop]: Abstraction has 28601 states and 90017 transitions. [2018-12-03 07:25:11,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:11,182 INFO L276 IsEmpty]: Start isEmpty. Operand 28601 states and 90017 transitions. [2018-12-03 07:25:11,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:11,195 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:11,196 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:11,196 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:11,196 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:11,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1307367553, now seen corresponding path program 1 times [2018-12-03 07:25:11,196 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:11,197 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:11,197 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:11,197 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:11,197 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:11,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:11,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:11,240 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:11,240 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:11,240 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:11,240 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:11,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:11,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:11,241 INFO L87 Difference]: Start difference. First operand 28601 states and 90017 transitions. Second operand 6 states. [2018-12-03 07:25:12,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:12,263 INFO L93 Difference]: Finished difference Result 37655 states and 116057 transitions. [2018-12-03 07:25:12,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:12,263 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-03 07:25:12,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:12,303 INFO L225 Difference]: With dead ends: 37655 [2018-12-03 07:25:12,304 INFO L226 Difference]: Without dead ends: 37600 [2018-12-03 07:25:12,304 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:12,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37600 states. [2018-12-03 07:25:12,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37600 to 31640. [2018-12-03 07:25:12,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31640 states. [2018-12-03 07:25:12,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31640 states to 31640 states and 98637 transitions. [2018-12-03 07:25:12,665 INFO L78 Accepts]: Start accepts. Automaton has 31640 states and 98637 transitions. Word has length 84 [2018-12-03 07:25:12,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:12,666 INFO L480 AbstractCegarLoop]: Abstraction has 31640 states and 98637 transitions. [2018-12-03 07:25:12,666 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:12,666 INFO L276 IsEmpty]: Start isEmpty. Operand 31640 states and 98637 transitions. [2018-12-03 07:25:12,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:12,679 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:12,679 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:12,679 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:12,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:12,679 INFO L82 PathProgramCache]: Analyzing trace with hash -2025985726, now seen corresponding path program 1 times [2018-12-03 07:25:12,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:12,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:12,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:12,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:12,681 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:12,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:12,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:12,743 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:12,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:12,743 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:12,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:12,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:12,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:12,743 INFO L87 Difference]: Start difference. First operand 31640 states and 98637 transitions. Second operand 6 states. [2018-12-03 07:25:13,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:13,119 INFO L93 Difference]: Finished difference Result 35112 states and 106384 transitions. [2018-12-03 07:25:13,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:25:13,119 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-03 07:25:13,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:13,157 INFO L225 Difference]: With dead ends: 35112 [2018-12-03 07:25:13,157 INFO L226 Difference]: Without dead ends: 35112 [2018-12-03 07:25:13,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:25:13,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35112 states. [2018-12-03 07:25:13,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35112 to 32373. [2018-12-03 07:25:13,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32373 states. [2018-12-03 07:25:13,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32373 states to 32373 states and 99374 transitions. [2018-12-03 07:25:13,515 INFO L78 Accepts]: Start accepts. Automaton has 32373 states and 99374 transitions. Word has length 84 [2018-12-03 07:25:13,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:13,515 INFO L480 AbstractCegarLoop]: Abstraction has 32373 states and 99374 transitions. [2018-12-03 07:25:13,515 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:13,515 INFO L276 IsEmpty]: Start isEmpty. Operand 32373 states and 99374 transitions. [2018-12-03 07:25:13,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:13,529 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:13,529 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:13,529 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:13,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:13,530 INFO L82 PathProgramCache]: Analyzing trace with hash -781221245, now seen corresponding path program 1 times [2018-12-03 07:25:13,530 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:13,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:13,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:13,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:13,531 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:13,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:13,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:13,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:13,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:13,593 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:13,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:13,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:13,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:13,594 INFO L87 Difference]: Start difference. First operand 32373 states and 99374 transitions. Second operand 5 states. [2018-12-03 07:25:13,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:13,907 INFO L93 Difference]: Finished difference Result 39225 states and 118481 transitions. [2018-12-03 07:25:13,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:13,908 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-03 07:25:13,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:13,954 INFO L225 Difference]: With dead ends: 39225 [2018-12-03 07:25:13,954 INFO L226 Difference]: Without dead ends: 39225 [2018-12-03 07:25:13,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:14,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39225 states. [2018-12-03 07:25:14,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39225 to 35801. [2018-12-03 07:25:14,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35801 states. [2018-12-03 07:25:14,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35801 states to 35801 states and 108276 transitions. [2018-12-03 07:25:14,451 INFO L78 Accepts]: Start accepts. Automaton has 35801 states and 108276 transitions. Word has length 84 [2018-12-03 07:25:14,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:14,452 INFO L480 AbstractCegarLoop]: Abstraction has 35801 states and 108276 transitions. [2018-12-03 07:25:14,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:14,452 INFO L276 IsEmpty]: Start isEmpty. Operand 35801 states and 108276 transitions. [2018-12-03 07:25:14,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:14,462 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:14,462 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:14,462 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:14,462 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:14,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1778293598, now seen corresponding path program 1 times [2018-12-03 07:25:14,462 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:14,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:14,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:14,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:14,463 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:14,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:14,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:14,497 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:14,497 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:14,497 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:14,498 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:14,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:14,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:14,498 INFO L87 Difference]: Start difference. First operand 35801 states and 108276 transitions. Second operand 5 states. [2018-12-03 07:25:14,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:14,984 INFO L93 Difference]: Finished difference Result 53698 states and 161639 transitions. [2018-12-03 07:25:14,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 07:25:14,985 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-03 07:25:14,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:15,059 INFO L225 Difference]: With dead ends: 53698 [2018-12-03 07:25:15,059 INFO L226 Difference]: Without dead ends: 53698 [2018-12-03 07:25:15,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:25:15,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53698 states. [2018-12-03 07:25:15,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53698 to 45753. [2018-12-03 07:25:15,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45753 states. [2018-12-03 07:25:15,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45753 states to 45753 states and 137727 transitions. [2018-12-03 07:25:15,586 INFO L78 Accepts]: Start accepts. Automaton has 45753 states and 137727 transitions. Word has length 84 [2018-12-03 07:25:15,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:15,586 INFO L480 AbstractCegarLoop]: Abstraction has 45753 states and 137727 transitions. [2018-12-03 07:25:15,586 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:15,586 INFO L276 IsEmpty]: Start isEmpty. Operand 45753 states and 137727 transitions. [2018-12-03 07:25:15,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:15,600 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:15,600 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:15,600 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:15,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:15,601 INFO L82 PathProgramCache]: Analyzing trace with hash 719722339, now seen corresponding path program 1 times [2018-12-03 07:25:15,601 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:15,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:15,602 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:15,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:15,602 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:15,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:15,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:15,634 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:15,634 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:15,634 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:15,634 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:15,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:15,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:15,635 INFO L87 Difference]: Start difference. First operand 45753 states and 137727 transitions. Second operand 4 states. [2018-12-03 07:25:16,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:16,190 INFO L93 Difference]: Finished difference Result 60113 states and 180825 transitions. [2018-12-03 07:25:16,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:16,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2018-12-03 07:25:16,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:16,268 INFO L225 Difference]: With dead ends: 60113 [2018-12-03 07:25:16,268 INFO L226 Difference]: Without dead ends: 59685 [2018-12-03 07:25:16,268 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:16,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59685 states. [2018-12-03 07:25:16,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59685 to 55877. [2018-12-03 07:25:16,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55877 states. [2018-12-03 07:25:16,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55877 states to 55877 states and 168476 transitions. [2018-12-03 07:25:16,927 INFO L78 Accepts]: Start accepts. Automaton has 55877 states and 168476 transitions. Word has length 84 [2018-12-03 07:25:16,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:16,928 INFO L480 AbstractCegarLoop]: Abstraction has 55877 states and 168476 transitions. [2018-12-03 07:25:16,928 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:16,928 INFO L276 IsEmpty]: Start isEmpty. Operand 55877 states and 168476 transitions. [2018-12-03 07:25:16,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 07:25:16,943 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:16,943 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:16,944 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:16,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:16,944 INFO L82 PathProgramCache]: Analyzing trace with hash 426319332, now seen corresponding path program 1 times [2018-12-03 07:25:16,944 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:16,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:16,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:16,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:16,945 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:16,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:16,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:16,993 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:16,993 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:16,993 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:16,993 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:16,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:16,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:16,993 INFO L87 Difference]: Start difference. First operand 55877 states and 168476 transitions. Second operand 5 states. [2018-12-03 07:25:17,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:17,035 INFO L93 Difference]: Finished difference Result 12621 states and 29962 transitions. [2018-12-03 07:25:17,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 07:25:17,035 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-03 07:25:17,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:17,042 INFO L225 Difference]: With dead ends: 12621 [2018-12-03 07:25:17,042 INFO L226 Difference]: Without dead ends: 10165 [2018-12-03 07:25:17,042 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:17,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10165 states. [2018-12-03 07:25:17,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10165 to 8860. [2018-12-03 07:25:17,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8860 states. [2018-12-03 07:25:17,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8860 states to 8860 states and 20404 transitions. [2018-12-03 07:25:17,116 INFO L78 Accepts]: Start accepts. Automaton has 8860 states and 20404 transitions. Word has length 84 [2018-12-03 07:25:17,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:17,116 INFO L480 AbstractCegarLoop]: Abstraction has 8860 states and 20404 transitions. [2018-12-03 07:25:17,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:17,116 INFO L276 IsEmpty]: Start isEmpty. Operand 8860 states and 20404 transitions. [2018-12-03 07:25:17,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-03 07:25:17,121 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:17,121 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:17,121 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:17,121 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:17,121 INFO L82 PathProgramCache]: Analyzing trace with hash -371203702, now seen corresponding path program 1 times [2018-12-03 07:25:17,121 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:17,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:17,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,122 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:17,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:17,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:17,167 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:17,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:17,168 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:17,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:17,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:17,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:17,168 INFO L87 Difference]: Start difference. First operand 8860 states and 20404 transitions. Second operand 5 states. [2018-12-03 07:25:17,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:17,277 INFO L93 Difference]: Finished difference Result 10299 states and 23671 transitions. [2018-12-03 07:25:17,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:25:17,277 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2018-12-03 07:25:17,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:17,285 INFO L225 Difference]: With dead ends: 10299 [2018-12-03 07:25:17,285 INFO L226 Difference]: Without dead ends: 10299 [2018-12-03 07:25:17,285 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:25:17,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10299 states. [2018-12-03 07:25:17,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10299 to 9297. [2018-12-03 07:25:17,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9297 states. [2018-12-03 07:25:17,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9297 states to 9297 states and 21406 transitions. [2018-12-03 07:25:17,376 INFO L78 Accepts]: Start accepts. Automaton has 9297 states and 21406 transitions. Word has length 88 [2018-12-03 07:25:17,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:17,376 INFO L480 AbstractCegarLoop]: Abstraction has 9297 states and 21406 transitions. [2018-12-03 07:25:17,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:17,376 INFO L276 IsEmpty]: Start isEmpty. Operand 9297 states and 21406 transitions. [2018-12-03 07:25:17,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-03 07:25:17,383 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:17,383 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:17,383 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:17,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:17,383 INFO L82 PathProgramCache]: Analyzing trace with hash 1371606633, now seen corresponding path program 1 times [2018-12-03 07:25:17,383 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:17,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:17,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,384 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:17,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:17,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:17,454 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:17,454 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:17,454 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:17,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:17,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:17,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:17,455 INFO L87 Difference]: Start difference. First operand 9297 states and 21406 transitions. Second operand 5 states. [2018-12-03 07:25:17,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:17,493 INFO L93 Difference]: Finished difference Result 12160 states and 27850 transitions. [2018-12-03 07:25:17,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:17,493 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2018-12-03 07:25:17,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:17,501 INFO L225 Difference]: With dead ends: 12160 [2018-12-03 07:25:17,501 INFO L226 Difference]: Without dead ends: 12079 [2018-12-03 07:25:17,501 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:17,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12079 states. [2018-12-03 07:25:17,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12079 to 8791. [2018-12-03 07:25:17,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8791 states. [2018-12-03 07:25:17,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8791 states to 8791 states and 19961 transitions. [2018-12-03 07:25:17,584 INFO L78 Accepts]: Start accepts. Automaton has 8791 states and 19961 transitions. Word has length 88 [2018-12-03 07:25:17,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:17,584 INFO L480 AbstractCegarLoop]: Abstraction has 8791 states and 19961 transitions. [2018-12-03 07:25:17,584 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:17,584 INFO L276 IsEmpty]: Start isEmpty. Operand 8791 states and 19961 transitions. [2018-12-03 07:25:17,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-03 07:25:17,590 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:17,590 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:17,591 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:17,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:17,591 INFO L82 PathProgramCache]: Analyzing trace with hash -425344726, now seen corresponding path program 1 times [2018-12-03 07:25:17,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:17,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:17,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:17,593 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:17,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:17,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:17,670 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:17,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-03 07:25:17,670 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:17,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:25:17,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:25:17,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:17,671 INFO L87 Difference]: Start difference. First operand 8791 states and 19961 transitions. Second operand 7 states. [2018-12-03 07:25:18,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:18,236 INFO L93 Difference]: Finished difference Result 13227 states and 30329 transitions. [2018-12-03 07:25:18,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-03 07:25:18,236 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 88 [2018-12-03 07:25:18,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:18,250 INFO L225 Difference]: With dead ends: 13227 [2018-12-03 07:25:18,251 INFO L226 Difference]: Without dead ends: 13108 [2018-12-03 07:25:18,251 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=236, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:25:18,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13108 states. [2018-12-03 07:25:18,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13108 to 8754. [2018-12-03 07:25:18,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8754 states. [2018-12-03 07:25:18,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8754 states to 8754 states and 19814 transitions. [2018-12-03 07:25:18,340 INFO L78 Accepts]: Start accepts. Automaton has 8754 states and 19814 transitions. Word has length 88 [2018-12-03 07:25:18,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:18,340 INFO L480 AbstractCegarLoop]: Abstraction has 8754 states and 19814 transitions. [2018-12-03 07:25:18,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:25:18,340 INFO L276 IsEmpty]: Start isEmpty. Operand 8754 states and 19814 transitions. [2018-12-03 07:25:18,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-03 07:25:18,346 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:18,347 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:18,347 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:18,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:18,347 INFO L82 PathProgramCache]: Analyzing trace with hash -2047011829, now seen corresponding path program 1 times [2018-12-03 07:25:18,347 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:18,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:18,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,348 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:18,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:18,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:18,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:18,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:18,381 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:18,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:18,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:18,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:18,382 INFO L87 Difference]: Start difference. First operand 8754 states and 19814 transitions. Second operand 4 states. [2018-12-03 07:25:18,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:18,564 INFO L93 Difference]: Finished difference Result 12754 states and 28548 transitions. [2018-12-03 07:25:18,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:25:18,565 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-03 07:25:18,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:18,573 INFO L225 Difference]: With dead ends: 12754 [2018-12-03 07:25:18,574 INFO L226 Difference]: Without dead ends: 12754 [2018-12-03 07:25:18,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:18,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12754 states. [2018-12-03 07:25:18,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12754 to 10443. [2018-12-03 07:25:18,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10443 states. [2018-12-03 07:25:18,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10443 states to 10443 states and 23241 transitions. [2018-12-03 07:25:18,668 INFO L78 Accepts]: Start accepts. Automaton has 10443 states and 23241 transitions. Word has length 109 [2018-12-03 07:25:18,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:18,669 INFO L480 AbstractCegarLoop]: Abstraction has 10443 states and 23241 transitions. [2018-12-03 07:25:18,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:18,669 INFO L276 IsEmpty]: Start isEmpty. Operand 10443 states and 23241 transitions. [2018-12-03 07:25:18,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-03 07:25:18,676 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:18,676 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:18,676 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:18,676 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:18,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1962908132, now seen corresponding path program 1 times [2018-12-03 07:25:18,676 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:18,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:18,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,677 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:18,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:18,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:18,706 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:18,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:18,706 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:18,706 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:18,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:18,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:18,706 INFO L87 Difference]: Start difference. First operand 10443 states and 23241 transitions. Second operand 4 states. [2018-12-03 07:25:18,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:18,783 INFO L93 Difference]: Finished difference Result 10839 states and 24007 transitions. [2018-12-03 07:25:18,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-03 07:25:18,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-03 07:25:18,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:18,790 INFO L225 Difference]: With dead ends: 10839 [2018-12-03 07:25:18,790 INFO L226 Difference]: Without dead ends: 10839 [2018-12-03 07:25:18,790 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:18,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10839 states. [2018-12-03 07:25:18,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10839 to 10267. [2018-12-03 07:25:18,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10267 states. [2018-12-03 07:25:18,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10267 states to 10267 states and 22812 transitions. [2018-12-03 07:25:18,866 INFO L78 Accepts]: Start accepts. Automaton has 10267 states and 22812 transitions. Word has length 109 [2018-12-03 07:25:18,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:18,866 INFO L480 AbstractCegarLoop]: Abstraction has 10267 states and 22812 transitions. [2018-12-03 07:25:18,866 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:18,866 INFO L276 IsEmpty]: Start isEmpty. Operand 10267 states and 22812 transitions. [2018-12-03 07:25:18,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:18,873 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:18,873 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:18,873 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:18,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:18,874 INFO L82 PathProgramCache]: Analyzing trace with hash -1563716653, now seen corresponding path program 1 times [2018-12-03 07:25:18,874 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:18,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:18,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:18,875 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:18,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:18,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:18,912 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:18,912 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:18,912 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:18,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:18,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:18,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:18,913 INFO L87 Difference]: Start difference. First operand 10267 states and 22812 transitions. Second operand 5 states. [2018-12-03 07:25:19,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:19,111 INFO L93 Difference]: Finished difference Result 13596 states and 30029 transitions. [2018-12-03 07:25:19,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 07:25:19,111 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-03 07:25:19,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:19,121 INFO L225 Difference]: With dead ends: 13596 [2018-12-03 07:25:19,121 INFO L226 Difference]: Without dead ends: 13596 [2018-12-03 07:25:19,121 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:25:19,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13596 states. [2018-12-03 07:25:19,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13596 to 10703. [2018-12-03 07:25:19,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10703 states. [2018-12-03 07:25:19,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10703 states to 10703 states and 23735 transitions. [2018-12-03 07:25:19,211 INFO L78 Accepts]: Start accepts. Automaton has 10703 states and 23735 transitions. Word has length 111 [2018-12-03 07:25:19,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:19,211 INFO L480 AbstractCegarLoop]: Abstraction has 10703 states and 23735 transitions. [2018-12-03 07:25:19,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:19,211 INFO L276 IsEmpty]: Start isEmpty. Operand 10703 states and 23735 transitions. [2018-12-03 07:25:19,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:19,217 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:19,217 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:19,217 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:19,217 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:19,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1552400526, now seen corresponding path program 1 times [2018-12-03 07:25:19,218 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:19,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:19,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:19,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:19,218 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:19,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:19,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:19,258 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:19,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:19,258 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:19,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:19,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:19,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:19,259 INFO L87 Difference]: Start difference. First operand 10703 states and 23735 transitions. Second operand 5 states. [2018-12-03 07:25:19,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:19,626 INFO L93 Difference]: Finished difference Result 18447 states and 41332 transitions. [2018-12-03 07:25:19,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:19,627 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-03 07:25:19,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:19,638 INFO L225 Difference]: With dead ends: 18447 [2018-12-03 07:25:19,639 INFO L226 Difference]: Without dead ends: 18447 [2018-12-03 07:25:19,639 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:19,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18447 states. [2018-12-03 07:25:19,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18447 to 11580. [2018-12-03 07:25:19,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11580 states. [2018-12-03 07:25:19,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11580 states to 11580 states and 25588 transitions. [2018-12-03 07:25:19,755 INFO L78 Accepts]: Start accepts. Automaton has 11580 states and 25588 transitions. Word has length 111 [2018-12-03 07:25:19,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:19,755 INFO L480 AbstractCegarLoop]: Abstraction has 11580 states and 25588 transitions. [2018-12-03 07:25:19,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:19,755 INFO L276 IsEmpty]: Start isEmpty. Operand 11580 states and 25588 transitions. [2018-12-03 07:25:19,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:19,763 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:19,763 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:19,763 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:19,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:19,764 INFO L82 PathProgramCache]: Analyzing trace with hash 665357427, now seen corresponding path program 1 times [2018-12-03 07:25:19,764 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:19,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:19,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:19,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:19,765 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:19,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:19,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:19,849 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:19,849 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 07:25:19,849 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:19,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 07:25:19,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 07:25:19,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:25:19,850 INFO L87 Difference]: Start difference. First operand 11580 states and 25588 transitions. Second operand 8 states. [2018-12-03 07:25:20,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:20,196 INFO L93 Difference]: Finished difference Result 15058 states and 33182 transitions. [2018-12-03 07:25:20,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 07:25:20,197 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-03 07:25:20,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:20,206 INFO L225 Difference]: With dead ends: 15058 [2018-12-03 07:25:20,206 INFO L226 Difference]: Without dead ends: 15026 [2018-12-03 07:25:20,206 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:25:20,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15026 states. [2018-12-03 07:25:20,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15026 to 13154. [2018-12-03 07:25:20,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13154 states. [2018-12-03 07:25:20,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13154 states to 13154 states and 29004 transitions. [2018-12-03 07:25:20,314 INFO L78 Accepts]: Start accepts. Automaton has 13154 states and 29004 transitions. Word has length 111 [2018-12-03 07:25:20,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:20,314 INFO L480 AbstractCegarLoop]: Abstraction has 13154 states and 29004 transitions. [2018-12-03 07:25:20,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 07:25:20,314 INFO L276 IsEmpty]: Start isEmpty. Operand 13154 states and 29004 transitions. [2018-12-03 07:25:20,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:20,323 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:20,323 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:20,323 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:20,323 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:20,323 INFO L82 PathProgramCache]: Analyzing trace with hash 371954420, now seen corresponding path program 1 times [2018-12-03 07:25:20,324 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:20,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:20,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:20,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:20,325 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:20,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:20,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:20,395 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:20,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 07:25:20,396 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:20,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 07:25:20,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 07:25:20,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:25:20,396 INFO L87 Difference]: Start difference. First operand 13154 states and 29004 transitions. Second operand 8 states. [2018-12-03 07:25:20,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:20,790 INFO L93 Difference]: Finished difference Result 20925 states and 47168 transitions. [2018-12-03 07:25:20,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-03 07:25:20,791 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-03 07:25:20,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:20,807 INFO L225 Difference]: With dead ends: 20925 [2018-12-03 07:25:20,807 INFO L226 Difference]: Without dead ends: 20925 [2018-12-03 07:25:20,807 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:25:20,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20925 states. [2018-12-03 07:25:20,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20925 to 14592. [2018-12-03 07:25:20,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14592 states. [2018-12-03 07:25:20,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14592 states to 14592 states and 32454 transitions. [2018-12-03 07:25:20,951 INFO L78 Accepts]: Start accepts. Automaton has 14592 states and 32454 transitions. Word has length 111 [2018-12-03 07:25:20,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:20,951 INFO L480 AbstractCegarLoop]: Abstraction has 14592 states and 32454 transitions. [2018-12-03 07:25:20,951 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 07:25:20,952 INFO L276 IsEmpty]: Start isEmpty. Operand 14592 states and 32454 transitions. [2018-12-03 07:25:20,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:20,962 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:20,962 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:20,962 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:20,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:20,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1435500043, now seen corresponding path program 1 times [2018-12-03 07:25:20,962 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:20,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:20,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:20,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:20,963 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:20,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:21,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:21,009 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:21,009 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:21,009 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:21,010 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:21,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:21,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:21,010 INFO L87 Difference]: Start difference. First operand 14592 states and 32454 transitions. Second operand 6 states. [2018-12-03 07:25:21,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:21,075 INFO L93 Difference]: Finished difference Result 17742 states and 39492 transitions. [2018-12-03 07:25:21,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 07:25:21,075 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 111 [2018-12-03 07:25:21,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:21,088 INFO L225 Difference]: With dead ends: 17742 [2018-12-03 07:25:21,088 INFO L226 Difference]: Without dead ends: 17742 [2018-12-03 07:25:21,088 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:21,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17742 states. [2018-12-03 07:25:21,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17742 to 14780. [2018-12-03 07:25:21,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14780 states. [2018-12-03 07:25:21,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14780 states to 14780 states and 32665 transitions. [2018-12-03 07:25:21,213 INFO L78 Accepts]: Start accepts. Automaton has 14780 states and 32665 transitions. Word has length 111 [2018-12-03 07:25:21,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:21,213 INFO L480 AbstractCegarLoop]: Abstraction has 14780 states and 32665 transitions. [2018-12-03 07:25:21,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:21,213 INFO L276 IsEmpty]: Start isEmpty. Operand 14780 states and 32665 transitions. [2018-12-03 07:25:21,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:21,223 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:21,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:21,224 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:21,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:21,224 INFO L82 PathProgramCache]: Analyzing trace with hash 26079956, now seen corresponding path program 1 times [2018-12-03 07:25:21,224 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:21,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:21,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:21,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:21,225 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:21,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:21,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:21,300 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:21,300 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-03 07:25:21,300 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:21,300 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 07:25:21,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 07:25:21,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:25:21,300 INFO L87 Difference]: Start difference. First operand 14780 states and 32665 transitions. Second operand 9 states. [2018-12-03 07:25:21,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:21,758 INFO L93 Difference]: Finished difference Result 19158 states and 42700 transitions. [2018-12-03 07:25:21,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-03 07:25:21,758 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 111 [2018-12-03 07:25:21,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:21,771 INFO L225 Difference]: With dead ends: 19158 [2018-12-03 07:25:21,771 INFO L226 Difference]: Without dead ends: 19158 [2018-12-03 07:25:21,771 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-12-03 07:25:21,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19158 states. [2018-12-03 07:25:21,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19158 to 15775. [2018-12-03 07:25:21,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15775 states. [2018-12-03 07:25:21,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15775 states to 15775 states and 34847 transitions. [2018-12-03 07:25:21,908 INFO L78 Accepts]: Start accepts. Automaton has 15775 states and 34847 transitions. Word has length 111 [2018-12-03 07:25:21,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:21,908 INFO L480 AbstractCegarLoop]: Abstraction has 15775 states and 34847 transitions. [2018-12-03 07:25:21,908 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 07:25:21,908 INFO L276 IsEmpty]: Start isEmpty. Operand 15775 states and 34847 transitions. [2018-12-03 07:25:21,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-03 07:25:21,919 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:21,920 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:21,920 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:21,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:21,920 INFO L82 PathProgramCache]: Analyzing trace with hash 2044885332, now seen corresponding path program 1 times [2018-12-03 07:25:21,920 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:21,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:21,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:21,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:21,921 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:21,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:22,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:22,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:22,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:22,007 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:22,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:22,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:22,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:22,008 INFO L87 Difference]: Start difference. First operand 15775 states and 34847 transitions. Second operand 6 states. [2018-12-03 07:25:22,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:22,123 INFO L93 Difference]: Finished difference Result 15749 states and 34232 transitions. [2018-12-03 07:25:22,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:22,123 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 111 [2018-12-03 07:25:22,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:22,133 INFO L225 Difference]: With dead ends: 15749 [2018-12-03 07:25:22,133 INFO L226 Difference]: Without dead ends: 15749 [2018-12-03 07:25:22,133 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-12-03 07:25:22,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15749 states. [2018-12-03 07:25:22,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15749 to 11082. [2018-12-03 07:25:22,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11082 states. [2018-12-03 07:25:22,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11082 states to 11082 states and 24041 transitions. [2018-12-03 07:25:22,242 INFO L78 Accepts]: Start accepts. Automaton has 11082 states and 24041 transitions. Word has length 111 [2018-12-03 07:25:22,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:22,242 INFO L480 AbstractCegarLoop]: Abstraction has 11082 states and 24041 transitions. [2018-12-03 07:25:22,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:22,242 INFO L276 IsEmpty]: Start isEmpty. Operand 11082 states and 24041 transitions. [2018-12-03 07:25:22,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:25:22,249 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:22,249 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:22,249 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:22,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:22,249 INFO L82 PathProgramCache]: Analyzing trace with hash -1401074152, now seen corresponding path program 1 times [2018-12-03 07:25:22,249 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:22,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:22,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,250 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:22,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:22,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:22,296 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:22,296 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:22,296 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:22,296 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:22,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:22,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:22,296 INFO L87 Difference]: Start difference. First operand 11082 states and 24041 transitions. Second operand 6 states. [2018-12-03 07:25:22,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:22,544 INFO L93 Difference]: Finished difference Result 12712 states and 27446 transitions. [2018-12-03 07:25:22,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 07:25:22,545 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2018-12-03 07:25:22,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:22,553 INFO L225 Difference]: With dead ends: 12712 [2018-12-03 07:25:22,553 INFO L226 Difference]: Without dead ends: 12712 [2018-12-03 07:25:22,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-12-03 07:25:22,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12712 states. [2018-12-03 07:25:22,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12712 to 11153. [2018-12-03 07:25:22,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11153 states. [2018-12-03 07:25:22,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11153 states to 11153 states and 24176 transitions. [2018-12-03 07:25:22,642 INFO L78 Accepts]: Start accepts. Automaton has 11153 states and 24176 transitions. Word has length 113 [2018-12-03 07:25:22,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:22,643 INFO L480 AbstractCegarLoop]: Abstraction has 11153 states and 24176 transitions. [2018-12-03 07:25:22,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:22,643 INFO L276 IsEmpty]: Start isEmpty. Operand 11153 states and 24176 transitions. [2018-12-03 07:25:22,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:25:22,651 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:22,651 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:22,651 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:22,652 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:22,652 INFO L82 PathProgramCache]: Analyzing trace with hash 883789303, now seen corresponding path program 1 times [2018-12-03 07:25:22,652 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:22,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:22,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,653 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:22,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:22,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:22,681 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:22,681 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 07:25:22,681 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:22,681 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 07:25:22,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 07:25:22,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 07:25:22,682 INFO L87 Difference]: Start difference. First operand 11153 states and 24176 transitions. Second operand 4 states. [2018-12-03 07:25:22,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:22,852 INFO L93 Difference]: Finished difference Result 13401 states and 29068 transitions. [2018-12-03 07:25:22,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:22,852 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-03 07:25:22,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:22,861 INFO L225 Difference]: With dead ends: 13401 [2018-12-03 07:25:22,861 INFO L226 Difference]: Without dead ends: 13306 [2018-12-03 07:25:22,861 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:22,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13306 states. [2018-12-03 07:25:22,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13306 to 11739. [2018-12-03 07:25:22,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11739 states. [2018-12-03 07:25:22,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11739 states to 11739 states and 25493 transitions. [2018-12-03 07:25:22,952 INFO L78 Accepts]: Start accepts. Automaton has 11739 states and 25493 transitions. Word has length 113 [2018-12-03 07:25:22,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:22,952 INFO L480 AbstractCegarLoop]: Abstraction has 11739 states and 25493 transitions. [2018-12-03 07:25:22,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 07:25:22,952 INFO L276 IsEmpty]: Start isEmpty. Operand 11739 states and 25493 transitions. [2018-12-03 07:25:22,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:25:22,959 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:22,960 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:22,960 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:22,960 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:22,960 INFO L82 PathProgramCache]: Analyzing trace with hash 1845403320, now seen corresponding path program 1 times [2018-12-03 07:25:22,960 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:22,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,961 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:22,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:22,961 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:22,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:23,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:23,021 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:23,021 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-03 07:25:23,021 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:23,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-03 07:25:23,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-03 07:25:23,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:23,021 INFO L87 Difference]: Start difference. First operand 11739 states and 25493 transitions. Second operand 7 states. [2018-12-03 07:25:23,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:23,140 INFO L93 Difference]: Finished difference Result 13402 states and 29199 transitions. [2018-12-03 07:25:23,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:23,140 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2018-12-03 07:25:23,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:23,149 INFO L225 Difference]: With dead ends: 13402 [2018-12-03 07:25:23,149 INFO L226 Difference]: Without dead ends: 13402 [2018-12-03 07:25:23,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-03 07:25:23,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13402 states. [2018-12-03 07:25:23,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13402 to 10290. [2018-12-03 07:25:23,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10290 states. [2018-12-03 07:25:23,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10290 states to 10290 states and 22261 transitions. [2018-12-03 07:25:23,231 INFO L78 Accepts]: Start accepts. Automaton has 10290 states and 22261 transitions. Word has length 113 [2018-12-03 07:25:23,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:23,231 INFO L480 AbstractCegarLoop]: Abstraction has 10290 states and 22261 transitions. [2018-12-03 07:25:23,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-03 07:25:23,231 INFO L276 IsEmpty]: Start isEmpty. Operand 10290 states and 22261 transitions. [2018-12-03 07:25:23,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:25:23,238 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:23,238 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:23,239 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:23,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:23,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1204799495, now seen corresponding path program 1 times [2018-12-03 07:25:23,239 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:23,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,240 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:23,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,240 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:23,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:23,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:23,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:23,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 07:25:23,298 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:23,298 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 07:25:23,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 07:25:23,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-03 07:25:23,298 INFO L87 Difference]: Start difference. First operand 10290 states and 22261 transitions. Second operand 5 states. [2018-12-03 07:25:23,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:23,333 INFO L93 Difference]: Finished difference Result 10290 states and 22245 transitions. [2018-12-03 07:25:23,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 07:25:23,333 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 113 [2018-12-03 07:25:23,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:23,339 INFO L225 Difference]: With dead ends: 10290 [2018-12-03 07:25:23,339 INFO L226 Difference]: Without dead ends: 10290 [2018-12-03 07:25:23,339 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:23,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10290 states. [2018-12-03 07:25:23,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10290 to 10290. [2018-12-03 07:25:23,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10290 states. [2018-12-03 07:25:23,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10290 states to 10290 states and 22245 transitions. [2018-12-03 07:25:23,408 INFO L78 Accepts]: Start accepts. Automaton has 10290 states and 22245 transitions. Word has length 113 [2018-12-03 07:25:23,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:23,408 INFO L480 AbstractCegarLoop]: Abstraction has 10290 states and 22245 transitions. [2018-12-03 07:25:23,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 07:25:23,408 INFO L276 IsEmpty]: Start isEmpty. Operand 10290 states and 22245 transitions. [2018-12-03 07:25:23,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-03 07:25:23,414 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:23,415 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:23,415 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:23,415 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:23,415 INFO L82 PathProgramCache]: Analyzing trace with hash 1282713338, now seen corresponding path program 1 times [2018-12-03 07:25:23,415 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:23,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,416 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:23,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,416 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:23,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:23,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:23,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:23,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 07:25:23,435 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:23,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 07:25:23,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 07:25:23,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:23,436 INFO L87 Difference]: Start difference. First operand 10290 states and 22245 transitions. Second operand 3 states. [2018-12-03 07:25:23,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:23,452 INFO L93 Difference]: Finished difference Result 10290 states and 22229 transitions. [2018-12-03 07:25:23,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 07:25:23,452 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2018-12-03 07:25:23,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:23,459 INFO L225 Difference]: With dead ends: 10290 [2018-12-03 07:25:23,459 INFO L226 Difference]: Without dead ends: 10290 [2018-12-03 07:25:23,459 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 07:25:23,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10290 states. [2018-12-03 07:25:23,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10290 to 10290. [2018-12-03 07:25:23,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10290 states. [2018-12-03 07:25:23,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10290 states to 10290 states and 22229 transitions. [2018-12-03 07:25:23,535 INFO L78 Accepts]: Start accepts. Automaton has 10290 states and 22229 transitions. Word has length 113 [2018-12-03 07:25:23,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:23,535 INFO L480 AbstractCegarLoop]: Abstraction has 10290 states and 22229 transitions. [2018-12-03 07:25:23,535 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 07:25:23,535 INFO L276 IsEmpty]: Start isEmpty. Operand 10290 states and 22229 transitions. [2018-12-03 07:25:23,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:23,543 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:23,543 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:23,543 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:23,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:23,543 INFO L82 PathProgramCache]: Analyzing trace with hash 1031376510, now seen corresponding path program 1 times [2018-12-03 07:25:23,543 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:23,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:23,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,545 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:23,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:23,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:23,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:23,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-03 07:25:23,618 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:23,618 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 07:25:23,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 07:25:23,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-03 07:25:23,618 INFO L87 Difference]: Start difference. First operand 10290 states and 22229 transitions. Second operand 9 states. [2018-12-03 07:25:23,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:23,894 INFO L93 Difference]: Finished difference Result 12562 states and 27279 transitions. [2018-12-03 07:25:23,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 07:25:23,894 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 115 [2018-12-03 07:25:23,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:23,896 INFO L225 Difference]: With dead ends: 12562 [2018-12-03 07:25:23,896 INFO L226 Difference]: Without dead ends: 2404 [2018-12-03 07:25:23,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-03 07:25:23,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2404 states. [2018-12-03 07:25:23,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2404 to 2404. [2018-12-03 07:25:23,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2404 states. [2018-12-03 07:25:23,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2404 states to 2404 states and 5331 transitions. [2018-12-03 07:25:23,909 INFO L78 Accepts]: Start accepts. Automaton has 2404 states and 5331 transitions. Word has length 115 [2018-12-03 07:25:23,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:23,909 INFO L480 AbstractCegarLoop]: Abstraction has 2404 states and 5331 transitions. [2018-12-03 07:25:23,909 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 07:25:23,909 INFO L276 IsEmpty]: Start isEmpty. Operand 2404 states and 5331 transitions. [2018-12-03 07:25:23,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:23,911 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:23,911 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:23,911 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:23,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:23,911 INFO L82 PathProgramCache]: Analyzing trace with hash 2056556443, now seen corresponding path program 1 times [2018-12-03 07:25:23,911 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:23,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:23,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:23,912 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:23,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:23,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:23,960 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:23,960 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:23,960 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:23,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:23,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:23,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:23,961 INFO L87 Difference]: Start difference. First operand 2404 states and 5331 transitions. Second operand 6 states. [2018-12-03 07:25:24,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:24,070 INFO L93 Difference]: Finished difference Result 2352 states and 5122 transitions. [2018-12-03 07:25:24,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 07:25:24,070 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-03 07:25:24,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:24,072 INFO L225 Difference]: With dead ends: 2352 [2018-12-03 07:25:24,072 INFO L226 Difference]: Without dead ends: 2352 [2018-12-03 07:25:24,072 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:24,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2352 states. [2018-12-03 07:25:24,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2352 to 1937. [2018-12-03 07:25:24,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2018-12-03 07:25:24,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 4208 transitions. [2018-12-03 07:25:24,084 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 4208 transitions. Word has length 115 [2018-12-03 07:25:24,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:24,084 INFO L480 AbstractCegarLoop]: Abstraction has 1937 states and 4208 transitions. [2018-12-03 07:25:24,084 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:24,084 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 4208 transitions. [2018-12-03 07:25:24,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:24,085 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:24,085 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:24,085 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:24,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:24,085 INFO L82 PathProgramCache]: Analyzing trace with hash 1865893307, now seen corresponding path program 1 times [2018-12-03 07:25:24,085 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:24,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:24,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,086 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:24,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:24,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:24,161 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:24,161 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 07:25:24,161 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:24,161 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 07:25:24,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 07:25:24,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-03 07:25:24,162 INFO L87 Difference]: Start difference. First operand 1937 states and 4208 transitions. Second operand 6 states. [2018-12-03 07:25:24,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:24,232 INFO L93 Difference]: Finished difference Result 2169 states and 4671 transitions. [2018-12-03 07:25:24,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 07:25:24,233 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-03 07:25:24,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:24,234 INFO L225 Difference]: With dead ends: 2169 [2018-12-03 07:25:24,234 INFO L226 Difference]: Without dead ends: 2138 [2018-12-03 07:25:24,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-03 07:25:24,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2138 states. [2018-12-03 07:25:24,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2138 to 1835. [2018-12-03 07:25:24,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1835 states. [2018-12-03 07:25:24,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1835 states to 1835 states and 3985 transitions. [2018-12-03 07:25:24,246 INFO L78 Accepts]: Start accepts. Automaton has 1835 states and 3985 transitions. Word has length 115 [2018-12-03 07:25:24,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:24,246 INFO L480 AbstractCegarLoop]: Abstraction has 1835 states and 3985 transitions. [2018-12-03 07:25:24,246 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 07:25:24,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1835 states and 3985 transitions. [2018-12-03 07:25:24,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:24,247 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:24,247 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:24,247 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:24,247 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:24,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1735972292, now seen corresponding path program 2 times [2018-12-03 07:25:24,247 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:24,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,248 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:24,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,248 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:24,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:24,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:24,442 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:24,442 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-03 07:25:24,442 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:24,442 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-03 07:25:24,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-03 07:25:24,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-12-03 07:25:24,442 INFO L87 Difference]: Start difference. First operand 1835 states and 3985 transitions. Second operand 17 states. [2018-12-03 07:25:24,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:24,783 INFO L93 Difference]: Finished difference Result 1991 states and 4323 transitions. [2018-12-03 07:25:24,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 07:25:24,784 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 115 [2018-12-03 07:25:24,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:24,785 INFO L225 Difference]: With dead ends: 1991 [2018-12-03 07:25:24,785 INFO L226 Difference]: Without dead ends: 1895 [2018-12-03 07:25:24,785 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2018-12-03 07:25:24,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1895 states. [2018-12-03 07:25:24,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1895 to 1835. [2018-12-03 07:25:24,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1835 states. [2018-12-03 07:25:24,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1835 states to 1835 states and 3969 transitions. [2018-12-03 07:25:24,795 INFO L78 Accepts]: Start accepts. Automaton has 1835 states and 3969 transitions. Word has length 115 [2018-12-03 07:25:24,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:24,795 INFO L480 AbstractCegarLoop]: Abstraction has 1835 states and 3969 transitions. [2018-12-03 07:25:24,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-03 07:25:24,796 INFO L276 IsEmpty]: Start isEmpty. Operand 1835 states and 3969 transitions. [2018-12-03 07:25:24,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:24,797 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:24,797 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:24,797 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:24,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:24,797 INFO L82 PathProgramCache]: Analyzing trace with hash 816184669, now seen corresponding path program 1 times [2018-12-03 07:25:24,797 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:24,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,798 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 07:25:24,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:24,798 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:24,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 07:25:25,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 07:25:25,142 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 07:25:25,142 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-12-03 07:25:25,143 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 07:25:25,143 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-03 07:25:25,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-03 07:25:25,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=539, Unknown=0, NotChecked=0, Total=600 [2018-12-03 07:25:25,143 INFO L87 Difference]: Start difference. First operand 1835 states and 3969 transitions. Second operand 25 states. [2018-12-03 07:25:25,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 07:25:25,927 INFO L93 Difference]: Finished difference Result 2619 states and 5695 transitions. [2018-12-03 07:25:25,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-03 07:25:25,927 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 115 [2018-12-03 07:25:25,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 07:25:25,929 INFO L225 Difference]: With dead ends: 2619 [2018-12-03 07:25:25,929 INFO L226 Difference]: Without dead ends: 2022 [2018-12-03 07:25:25,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=351, Invalid=1811, Unknown=0, NotChecked=0, Total=2162 [2018-12-03 07:25:25,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2022 states. [2018-12-03 07:25:25,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2022 to 1856. [2018-12-03 07:25:25,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1856 states. [2018-12-03 07:25:25,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1856 states and 4008 transitions. [2018-12-03 07:25:25,940 INFO L78 Accepts]: Start accepts. Automaton has 1856 states and 4008 transitions. Word has length 115 [2018-12-03 07:25:25,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 07:25:25,940 INFO L480 AbstractCegarLoop]: Abstraction has 1856 states and 4008 transitions. [2018-12-03 07:25:25,940 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-03 07:25:25,940 INFO L276 IsEmpty]: Start isEmpty. Operand 1856 states and 4008 transitions. [2018-12-03 07:25:25,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-03 07:25:25,941 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 07:25:25,941 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 07:25:25,941 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 07:25:25,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 07:25:25,941 INFO L82 PathProgramCache]: Analyzing trace with hash 1119572719, now seen corresponding path program 2 times [2018-12-03 07:25:25,941 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 07:25:25,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:25,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 07:25:25,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 07:25:25,942 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 07:25:25,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 07:25:25,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 07:25:25,987 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-03 07:25:26,077 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-03 07:25:26,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 07:25:26 BasicIcfg [2018-12-03 07:25:26,078 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 07:25:26,079 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 07:25:26,079 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 07:25:26,079 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 07:25:26,079 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 07:24:58" (3/4) ... [2018-12-03 07:25:26,081 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-03 07:25:26,194 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_910ca0c4-f030-413e-9a95-892ec2062cc4/bin-2019/utaipan/witness.graphml [2018-12-03 07:25:26,195 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 07:25:26,195 INFO L168 Benchmark]: Toolchain (without parser) took 28742.02 ms. Allocated memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: 2.9 GB). Free memory was 947.0 MB in the beginning and 1.2 GB in the end (delta: -282.0 MB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,196 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 07:25:26,196 INFO L168 Benchmark]: CACSL2BoogieTranslator took 345.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.7 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -141.5 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,197 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,197 INFO L168 Benchmark]: Boogie Preprocessor took 22.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,197 INFO L168 Benchmark]: RCFGBuilder took 419.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.2 MB). Peak memory consumption was 60.2 MB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,197 INFO L168 Benchmark]: TraceAbstraction took 27803.63 ms. Allocated memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: 2.8 GB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -262.5 MB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,198 INFO L168 Benchmark]: Witness Printer took 115.93 ms. Allocated memory is still 4.0 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 56.5 MB). Peak memory consumption was 56.5 MB. Max. memory is 11.5 GB. [2018-12-03 07:25:26,199 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 345.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.7 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -141.5 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 32.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 22.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 419.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.2 MB). Peak memory consumption was 60.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 27803.63 ms. Allocated memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: 2.8 GB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -262.5 MB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. * Witness Printer took 115.93 ms. Allocated memory is still 4.0 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 56.5 MB). Peak memory consumption was 56.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L676] -1 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L682] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L683] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L684] -1 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L685] -1 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L686] -1 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L687] -1 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L688] -1 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L689] -1 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L690] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L691] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L693] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}] [L694] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0] [L695] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0] [L696] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L697] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L698] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L699] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L700] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L701] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L702] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L703] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L704] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L705] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L706] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L707] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L709] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L710] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L711] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L712] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L788] -1 pthread_t t1925; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK -1 pthread_create(&t1925, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L790] -1 pthread_t t1926; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L791] FCALL, FORK -1 pthread_create(&t1926, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L745] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L746] 0 x$flush_delayed = weak$$choice2 [L747] EXPR 0 \read(x) [L747] 0 x$mem_tmp = x [L748] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L749] EXPR 0 \read(x) [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L750] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L750] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L751] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L751] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L752] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L753] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L753] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L754] EXPR 0 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L754] 0 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L755] EXPR 0 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L755] 0 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L756] 0 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L757] 0 __unbuffered_p1_EAX$read_delayed_var = &x [L758] EXPR 0 \read(x) [L758] 0 __unbuffered_p1_EAX = x [L759] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L759] 0 x = x$flush_delayed ? x$mem_tmp : x [L760] 0 x$flush_delayed = (_Bool)0 [L763] 0 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L716] 1 __unbuffered_p0_EAX = y [L719] 1 x$w_buff1 = x$w_buff0 [L720] 1 x$w_buff0 = 1 [L721] 1 x$w_buff1_used = x$w_buff0_used [L722] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L766] EXPR 0 \read(x) [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L724] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L725] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L726] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L727] 1 x$r_buff0_thd1 = (_Bool)1 VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L768] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L769] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L770] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L734] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L737] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L797] EXPR -1 \read(x) [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L805] EXPR -1 \read(*__unbuffered_p1_EAX$read_delayed_var) [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] -1 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L806] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={6:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 318 locations, 3 error locations. UNSAFE Result, 27.7s OverallTime, 39 OverallIterations, 1 TraceHistogramMax, 12.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12969 SDtfs, 16299 SDslu, 32374 SDs, 0 SdLazy, 12168 SolverSat, 815 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 442 GetRequests, 101 SyntacticMatches, 34 SemanticMatches, 307 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 824 ImplicationChecksByTransitivity, 2.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65314occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 8.7s AutomataMinimizationTime, 38 MinimizatonAttempts, 145679 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 3699 NumberOfCodeBlocks, 3699 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 3546 ConstructedInterpolants, 0 QuantifiedInterpolants, 1003705 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...