./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 567c779f4de19a2058420c225a74f6c179939efc .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 21:57:01,089 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 21:57:01,090 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 21:57:01,096 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 21:57:01,096 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 21:57:01,097 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 21:57:01,097 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 21:57:01,098 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 21:57:01,099 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 21:57:01,099 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 21:57:01,100 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 21:57:01,100 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 21:57:01,101 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 21:57:01,101 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 21:57:01,102 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 21:57:01,102 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 21:57:01,103 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 21:57:01,103 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 21:57:01,104 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 21:57:01,105 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 21:57:01,106 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 21:57:01,106 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 21:57:01,108 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 21:57:01,108 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 21:57:01,108 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 21:57:01,108 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 21:57:01,109 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 21:57:01,109 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 21:57:01,110 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 21:57:01,110 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 21:57:01,110 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 21:57:01,111 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 21:57:01,111 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 21:57:01,111 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 21:57:01,112 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 21:57:01,112 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 21:57:01,112 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-02 21:57:01,119 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 21:57:01,120 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 21:57:01,120 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 21:57:01,120 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 21:57:01,120 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 21:57:01,120 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-02 21:57:01,121 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 21:57:01,122 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 21:57:01,122 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 21:57:01,122 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 21:57:01,122 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 21:57:01,122 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 21:57:01,122 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 21:57:01,123 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 21:57:01,123 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 21:57:01,124 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-02 21:57:01,124 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 21:57:01,125 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 21:57:01,125 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-02 21:57:01,125 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 567c779f4de19a2058420c225a74f6c179939efc [2018-12-02 21:57:01,142 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 21:57:01,149 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 21:57:01,151 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 21:57:01,152 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 21:57:01,152 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 21:57:01,152 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-02 21:57:01,186 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/data/70a544828/5aeada9ca9dc492da73b437e18da0422/FLAGe1ff2b748 [2018-12-02 21:57:01,645 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 21:57:01,645 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-02 21:57:01,653 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/data/70a544828/5aeada9ca9dc492da73b437e18da0422/FLAGe1ff2b748 [2018-12-02 21:57:01,662 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/data/70a544828/5aeada9ca9dc492da73b437e18da0422 [2018-12-02 21:57:01,664 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 21:57:01,665 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 21:57:01,665 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 21:57:01,666 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 21:57:01,668 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 21:57:01,669 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:01,671 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ca176b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01, skipping insertion in model container [2018-12-02 21:57:01,671 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:01,677 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 21:57:01,705 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 21:57:01,892 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 21:57:01,899 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 21:57:01,966 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 21:57:01,996 INFO L195 MainTranslator]: Completed translation [2018-12-02 21:57:01,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01 WrapperNode [2018-12-02 21:57:01,996 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 21:57:01,997 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 21:57:01,997 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 21:57:01,997 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 21:57:02,002 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,012 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,027 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 21:57:02,027 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 21:57:02,027 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 21:57:02,027 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 21:57:02,033 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,033 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,036 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,036 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,044 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,046 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,048 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... [2018-12-02 21:57:02,050 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 21:57:02,051 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 21:57:02,051 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 21:57:02,051 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 21:57:02,052 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 21:57:02,095 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 21:57:02,095 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 21:57:02,095 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 21:57:02,095 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-02 21:57:02,095 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 21:57:02,096 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-02 21:57:02,096 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-02 21:57:02,096 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-02 21:57:02,096 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-02 21:57:02,096 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-02 21:57:02,096 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-02 21:57:02,096 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-02 21:57:02,096 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-02 21:57:02,097 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 21:57:02,097 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 21:57:02,098 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-02 21:57:02,470 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 21:57:02,470 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-02 21:57:02,470 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 09:57:02 BoogieIcfgContainer [2018-12-02 21:57:02,470 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 21:57:02,470 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 21:57:02,471 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 21:57:02,472 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 21:57:02,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 09:57:01" (1/3) ... [2018-12-02 21:57:02,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@667c2dad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 09:57:02, skipping insertion in model container [2018-12-02 21:57:02,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 09:57:01" (2/3) ... [2018-12-02 21:57:02,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@667c2dad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 09:57:02, skipping insertion in model container [2018-12-02 21:57:02,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 09:57:02" (3/3) ... [2018-12-02 21:57:02,474 INFO L112 eAbstractionObserver]: Analyzing ICFG safe007_power.opt_false-unreach-call.i [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,502 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,503 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,504 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,505 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,506 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,507 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,507 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,507 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,507 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,507 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,508 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,509 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,510 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,511 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,512 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,513 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,514 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,515 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,516 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,517 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,518 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,519 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,520 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,521 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,522 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,523 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,524 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,525 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 21:57:02,533 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-02 21:57:02,533 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 21:57:02,539 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-02 21:57:02,548 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-02 21:57:02,564 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 21:57:02,564 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 21:57:02,564 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 21:57:02,564 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 21:57:02,564 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 21:57:02,564 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 21:57:02,564 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 21:57:02,564 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 21:57:02,571 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-12-02 21:58:25,076 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-12-02 21:58:25,078 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-12-02 21:58:25,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-02 21:58:25,083 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:58:25,083 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:58:25,085 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:58:25,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:58:25,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-12-02 21:58:25,089 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:58:25,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:25,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:58:25,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:25,125 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:58:25,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:58:25,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:58:25,235 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:58:25,236 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:58:25,236 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:58:25,240 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:58:25,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:58:25,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:58:25,254 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-12-02 21:58:30,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:58:30,898 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-12-02 21:58:30,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 21:58:30,900 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-12-02 21:58:30,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:58:32,439 INFO L225 Difference]: With dead ends: 604682 [2018-12-02 21:58:32,439 INFO L226 Difference]: Without dead ends: 434932 [2018-12-02 21:58:32,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:58:40,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-12-02 21:58:45,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-12-02 21:58:45,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-12-02 21:58:46,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-12-02 21:58:46,070 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-12-02 21:58:46,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:58:46,070 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-12-02 21:58:46,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:58:46,070 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-12-02 21:58:46,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-02 21:58:46,082 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:58:46,082 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:58:46,083 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:58:46,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:58:46,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-12-02 21:58:46,083 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:58:46,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:46,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:58:46,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:46,086 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:58:46,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:58:46,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:58:46,143 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:58:46,143 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:58:46,144 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:58:46,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:58:46,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:58:46,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:58:46,146 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-12-02 21:58:47,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:58:47,984 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-12-02 21:58:47,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:58:47,984 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-12-02 21:58:47,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:58:48,613 INFO L225 Difference]: With dead ends: 237806 [2018-12-02 21:58:48,614 INFO L226 Difference]: Without dead ends: 229076 [2018-12-02 21:58:48,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:58:51,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-12-02 21:58:53,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-12-02 21:58:53,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-12-02 21:58:59,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-12-02 21:58:59,855 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-12-02 21:58:59,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:58:59,856 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-12-02 21:58:59,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:58:59,856 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-12-02 21:58:59,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 21:58:59,864 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:58:59,864 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:58:59,864 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:58:59,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:58:59,865 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-12-02 21:58:59,865 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:58:59,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:59,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:58:59,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:58:59,868 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:58:59,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:58:59,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:58:59,923 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:58:59,923 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:58:59,923 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:58:59,923 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:58:59,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:58:59,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:58:59,924 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-12-02 21:59:00,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:00,184 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-12-02 21:59:00,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 21:59:00,185 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-02 21:59:00,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:00,301 INFO L225 Difference]: With dead ends: 62964 [2018-12-02 21:59:00,301 INFO L226 Difference]: Without dead ends: 55536 [2018-12-02 21:59:00,302 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:00,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-12-02 21:59:00,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-12-02 21:59:00,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-12-02 21:59:01,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-12-02 21:59:01,316 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-12-02 21:59:01,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:01,316 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-12-02 21:59:01,316 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:01,316 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-12-02 21:59:01,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 21:59:01,318 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:01,318 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:01,319 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:01,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:01,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-12-02 21:59:01,319 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:01,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:01,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:01,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:01,321 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:01,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:01,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:01,376 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:01,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:01,376 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:01,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:01,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:01,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:01,376 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-12-02 21:59:02,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:02,048 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-12-02 21:59:02,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 21:59:02,048 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-02 21:59:02,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:02,299 INFO L225 Difference]: With dead ends: 117028 [2018-12-02 21:59:02,299 INFO L226 Difference]: Without dead ends: 116528 [2018-12-02 21:59:02,299 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-02 21:59:02,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-12-02 21:59:03,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-12-02 21:59:03,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-12-02 21:59:03,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-12-02 21:59:03,843 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-12-02 21:59:03,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:03,844 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-12-02 21:59:03,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:03,844 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-12-02 21:59:03,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-02 21:59:03,848 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:03,848 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:03,848 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:03,848 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:03,849 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-12-02 21:59:03,849 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:03,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:03,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:03,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:03,850 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:03,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:03,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:03,873 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:03,873 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 21:59:03,873 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:03,873 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 21:59:03,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 21:59:03,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:03,874 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-12-02 21:59:04,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:04,250 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-12-02 21:59:04,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 21:59:04,250 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-12-02 21:59:04,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:04,461 INFO L225 Difference]: With dead ends: 99897 [2018-12-02 21:59:04,461 INFO L226 Difference]: Without dead ends: 99897 [2018-12-02 21:59:04,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:04,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-12-02 21:59:05,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-12-02 21:59:05,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-12-02 21:59:05,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-12-02 21:59:05,933 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-12-02 21:59:05,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:05,933 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-12-02 21:59:05,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 21:59:05,933 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-12-02 21:59:05,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 21:59:05,939 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:05,939 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:05,939 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:05,939 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:05,939 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-12-02 21:59:05,939 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:05,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:05,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:05,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:05,941 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:05,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:06,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:06,027 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:06,027 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 21:59:06,027 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:06,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 21:59:06,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 21:59:06,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:06,028 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-12-02 21:59:06,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:06,856 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-12-02 21:59:06,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 21:59:06,857 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-12-02 21:59:06,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:07,079 INFO L225 Difference]: With dead ends: 104973 [2018-12-02 21:59:07,079 INFO L226 Difference]: Without dead ends: 104443 [2018-12-02 21:59:07,079 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-12-02 21:59:07,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-12-02 21:59:08,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-12-02 21:59:08,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-12-02 21:59:08,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-12-02 21:59:08,594 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-12-02 21:59:08,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:08,595 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-12-02 21:59:08,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 21:59:08,595 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-12-02 21:59:08,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 21:59:08,612 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:08,612 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:08,612 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:08,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:08,612 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-12-02 21:59:08,612 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:08,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:08,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:08,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:08,613 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:08,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:08,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:08,653 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:08,653 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:59:08,653 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:08,653 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:59:08,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:59:08,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:08,654 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-12-02 21:59:09,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:09,011 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-12-02 21:59:09,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:59:09,011 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-12-02 21:59:09,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:09,182 INFO L225 Difference]: With dead ends: 85627 [2018-12-02 21:59:09,182 INFO L226 Difference]: Without dead ends: 85627 [2018-12-02 21:59:09,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:09,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-12-02 21:59:10,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-12-02 21:59:10,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-12-02 21:59:10,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-12-02 21:59:10,495 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-12-02 21:59:10,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:10,495 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-12-02 21:59:10,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:59:10,495 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-12-02 21:59:10,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 21:59:10,513 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:10,513 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:10,513 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:10,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:10,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-12-02 21:59:10,514 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:10,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:10,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:10,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:10,515 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:10,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:10,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:10,713 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:10,714 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 21:59:10,714 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:10,714 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 21:59:10,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 21:59:10,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-02 21:59:10,714 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-12-02 21:59:11,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:11,736 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-12-02 21:59:11,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 21:59:11,737 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-12-02 21:59:11,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:12,153 INFO L225 Difference]: With dead ends: 111736 [2018-12-02 21:59:12,153 INFO L226 Difference]: Without dead ends: 111381 [2018-12-02 21:59:12,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-12-02 21:59:12,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-12-02 21:59:13,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-12-02 21:59:13,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-12-02 21:59:13,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-12-02 21:59:13,525 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-12-02 21:59:13,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:13,526 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-12-02 21:59:13,526 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 21:59:13,526 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-12-02 21:59:13,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 21:59:13,563 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:13,563 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:13,563 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:13,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:13,563 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-12-02 21:59:13,563 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:13,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:13,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:13,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:13,565 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:13,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:13,600 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:13,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 21:59:13,600 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:13,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 21:59:13,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 21:59:13,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:13,600 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-12-02 21:59:14,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:14,119 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-12-02 21:59:14,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 21:59:14,120 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-12-02 21:59:14,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:14,347 INFO L225 Difference]: With dead ends: 110538 [2018-12-02 21:59:14,347 INFO L226 Difference]: Without dead ends: 110538 [2018-12-02 21:59:14,347 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:14,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-12-02 21:59:15,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-12-02 21:59:15,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-12-02 21:59:16,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-12-02 21:59:16,060 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-12-02 21:59:16,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:16,060 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-12-02 21:59:16,060 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 21:59:16,060 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-12-02 21:59:16,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 21:59:16,093 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:16,093 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:16,093 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:16,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:16,093 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-12-02 21:59:16,093 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:16,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:16,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:16,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:16,095 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:16,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:16,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:16,139 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:16,139 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:59:16,139 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:16,139 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:59:16,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:59:16,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:16,140 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-12-02 21:59:16,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:16,731 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-12-02 21:59:16,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 21:59:16,731 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-02 21:59:16,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:16,972 INFO L225 Difference]: With dead ends: 119085 [2018-12-02 21:59:16,972 INFO L226 Difference]: Without dead ends: 119085 [2018-12-02 21:59:16,972 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:17,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-12-02 21:59:18,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-12-02 21:59:18,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-12-02 21:59:18,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-12-02 21:59:18,772 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-12-02 21:59:18,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:18,772 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-12-02 21:59:18,772 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:59:18,772 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-12-02 21:59:18,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 21:59:18,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:18,823 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:18,824 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:18,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:18,824 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-12-02 21:59:18,824 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:18,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:18,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:18,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:18,825 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:18,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:18,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:18,854 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:18,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 21:59:18,854 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:18,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 21:59:18,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 21:59:18,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:18,854 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-12-02 21:59:19,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:19,368 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-12-02 21:59:19,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 21:59:19,368 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-12-02 21:59:19,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:19,573 INFO L225 Difference]: With dead ends: 107236 [2018-12-02 21:59:19,573 INFO L226 Difference]: Without dead ends: 107236 [2018-12-02 21:59:19,573 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 21:59:19,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-12-02 21:59:21,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-12-02 21:59:21,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-12-02 21:59:21,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-12-02 21:59:21,292 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-12-02 21:59:21,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:21,292 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-12-02 21:59:21,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 21:59:21,292 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-12-02 21:59:21,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:21,341 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:21,341 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:21,341 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:21,342 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:21,342 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-12-02 21:59:21,342 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:21,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:21,343 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:21,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:21,343 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:21,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:21,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:21,404 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:21,404 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:21,404 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:21,404 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:21,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:21,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:21,405 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-12-02 21:59:22,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:22,695 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-12-02 21:59:22,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 21:59:22,696 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 21:59:22,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:22,966 INFO L225 Difference]: With dead ends: 138332 [2018-12-02 21:59:22,966 INFO L226 Difference]: Without dead ends: 137832 [2018-12-02 21:59:22,966 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:23,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-12-02 21:59:24,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-12-02 21:59:24,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-12-02 21:59:25,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-12-02 21:59:25,003 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-12-02 21:59:25,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:25,003 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-12-02 21:59:25,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:25,003 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-12-02 21:59:25,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:25,058 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:25,058 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:25,058 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:25,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:25,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-12-02 21:59:25,058 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:25,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:25,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:25,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:25,059 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:25,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:25,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:25,129 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:25,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:25,129 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:25,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:25,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:25,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:25,129 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-12-02 21:59:25,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:25,920 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-12-02 21:59:25,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 21:59:25,920 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 21:59:25,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:26,177 INFO L225 Difference]: With dead ends: 133218 [2018-12-02 21:59:26,177 INFO L226 Difference]: Without dead ends: 133218 [2018-12-02 21:59:26,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-02 21:59:26,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-12-02 21:59:29,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-12-02 21:59:29,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-12-02 21:59:29,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-12-02 21:59:29,887 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-12-02 21:59:29,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:29,887 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-12-02 21:59:29,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:29,887 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-12-02 21:59:29,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:29,940 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:29,941 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:29,941 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:29,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:29,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-12-02 21:59:29,941 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:29,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:29,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:29,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:29,942 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:29,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:30,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:30,171 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:30,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:59:30,171 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:30,171 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:59:30,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:59:30,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:30,172 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-12-02 21:59:30,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:30,897 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-12-02 21:59:30,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 21:59:30,898 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 21:59:30,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:31,198 INFO L225 Difference]: With dead ends: 151316 [2018-12-02 21:59:31,198 INFO L226 Difference]: Without dead ends: 151316 [2018-12-02 21:59:31,198 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:31,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-12-02 21:59:33,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-12-02 21:59:33,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-12-02 21:59:33,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-12-02 21:59:33,398 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-12-02 21:59:33,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:33,398 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-12-02 21:59:33,398 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:33,398 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-12-02 21:59:33,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:33,460 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:33,460 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:33,461 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:33,461 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:33,461 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-12-02 21:59:33,461 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:33,462 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:33,462 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:33,462 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:33,462 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:33,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:33,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:33,508 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:33,508 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:59:33,508 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:33,508 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:59:33,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:59:33,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:33,509 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-12-02 21:59:34,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:34,887 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-12-02 21:59:34,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 21:59:34,888 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 21:59:34,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:35,315 INFO L225 Difference]: With dead ends: 206315 [2018-12-02 21:59:35,315 INFO L226 Difference]: Without dead ends: 206315 [2018-12-02 21:59:35,315 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-02 21:59:35,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-12-02 21:59:37,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-12-02 21:59:37,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-12-02 21:59:38,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-12-02 21:59:38,259 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-12-02 21:59:38,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:38,259 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-12-02 21:59:38,259 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:38,259 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-12-02 21:59:38,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:38,334 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:38,334 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:38,334 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:38,334 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:38,335 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-12-02 21:59:38,335 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:38,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:38,336 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:38,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:38,336 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:38,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:38,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:38,365 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:38,366 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:59:38,366 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:38,366 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:59:38,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:59:38,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:38,366 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 4 states. [2018-12-02 21:59:39,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:39,808 INFO L93 Difference]: Finished difference Result 229302 states and 852725 transitions. [2018-12-02 21:59:39,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:59:39,809 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-02 21:59:39,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:40,303 INFO L225 Difference]: With dead ends: 229302 [2018-12-02 21:59:40,303 INFO L226 Difference]: Without dead ends: 226678 [2018-12-02 21:59:40,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:40,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226678 states. [2018-12-02 21:59:43,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226678 to 213350. [2018-12-02 21:59:43,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213350 states. [2018-12-02 21:59:44,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213350 states to 213350 states and 794333 transitions. [2018-12-02 21:59:44,003 INFO L78 Accepts]: Start accepts. Automaton has 213350 states and 794333 transitions. Word has length 95 [2018-12-02 21:59:44,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:44,003 INFO L480 AbstractCegarLoop]: Abstraction has 213350 states and 794333 transitions. [2018-12-02 21:59:44,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:59:44,003 INFO L276 IsEmpty]: Start isEmpty. Operand 213350 states and 794333 transitions. [2018-12-02 21:59:44,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:44,083 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:44,083 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:44,083 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:44,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:44,084 INFO L82 PathProgramCache]: Analyzing trace with hash -312731950, now seen corresponding path program 1 times [2018-12-02 21:59:44,084 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:44,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:44,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:44,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:44,085 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:44,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:44,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:44,160 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:44,160 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 21:59:44,160 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:44,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 21:59:44,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 21:59:44,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:44,160 INFO L87 Difference]: Start difference. First operand 213350 states and 794333 transitions. Second operand 7 states. [2018-12-02 21:59:45,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:45,579 INFO L93 Difference]: Finished difference Result 189931 states and 685766 transitions. [2018-12-02 21:59:45,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-02 21:59:45,580 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-12-02 21:59:45,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:45,931 INFO L225 Difference]: With dead ends: 189931 [2018-12-02 21:59:45,932 INFO L226 Difference]: Without dead ends: 189931 [2018-12-02 21:59:45,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-12-02 21:59:46,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189931 states. [2018-12-02 21:59:50,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189931 to 162086. [2018-12-02 21:59:50,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162086 states. [2018-12-02 21:59:50,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162086 states to 162086 states and 586268 transitions. [2018-12-02 21:59:50,567 INFO L78 Accepts]: Start accepts. Automaton has 162086 states and 586268 transitions. Word has length 95 [2018-12-02 21:59:50,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:50,567 INFO L480 AbstractCegarLoop]: Abstraction has 162086 states and 586268 transitions. [2018-12-02 21:59:50,567 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 21:59:50,567 INFO L276 IsEmpty]: Start isEmpty. Operand 162086 states and 586268 transitions. [2018-12-02 21:59:50,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 21:59:50,633 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:50,634 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:50,634 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:50,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:50,634 INFO L82 PathProgramCache]: Analyzing trace with hash -2120186413, now seen corresponding path program 1 times [2018-12-02 21:59:50,634 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:50,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:50,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:50,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:50,635 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:50,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:50,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:50,678 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:50,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:50,678 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:50,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:50,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:50,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:50,679 INFO L87 Difference]: Start difference. First operand 162086 states and 586268 transitions. Second operand 6 states. [2018-12-02 21:59:50,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:50,826 INFO L93 Difference]: Finished difference Result 46438 states and 144284 transitions. [2018-12-02 21:59:50,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 21:59:50,826 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 21:59:50,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:50,871 INFO L225 Difference]: With dead ends: 46438 [2018-12-02 21:59:50,871 INFO L226 Difference]: Without dead ends: 39377 [2018-12-02 21:59:50,872 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 21:59:50,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39377 states. [2018-12-02 21:59:51,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39377 to 35862. [2018-12-02 21:59:51,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35862 states. [2018-12-02 21:59:51,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35862 states to 35862 states and 109114 transitions. [2018-12-02 21:59:51,263 INFO L78 Accepts]: Start accepts. Automaton has 35862 states and 109114 transitions. Word has length 95 [2018-12-02 21:59:51,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:51,263 INFO L480 AbstractCegarLoop]: Abstraction has 35862 states and 109114 transitions. [2018-12-02 21:59:51,263 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:51,263 INFO L276 IsEmpty]: Start isEmpty. Operand 35862 states and 109114 transitions. [2018-12-02 21:59:51,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 21:59:51,289 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:51,289 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:51,289 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:51,289 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:51,289 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-12-02 21:59:51,289 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:51,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:51,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:51,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:51,290 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:51,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:51,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:51,323 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:51,323 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:59:51,323 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:51,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:59:51,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:59:51,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:51,324 INFO L87 Difference]: Start difference. First operand 35862 states and 109114 transitions. Second operand 5 states. [2018-12-02 21:59:51,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:51,719 INFO L93 Difference]: Finished difference Result 40412 states and 123284 transitions. [2018-12-02 21:59:51,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 21:59:51,719 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 21:59:51,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:51,764 INFO L225 Difference]: With dead ends: 40412 [2018-12-02 21:59:51,764 INFO L226 Difference]: Without dead ends: 40412 [2018-12-02 21:59:51,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-02 21:59:51,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40412 states. [2018-12-02 21:59:52,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40412 to 35977. [2018-12-02 21:59:52,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35977 states. [2018-12-02 21:59:52,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35977 states to 35977 states and 109436 transitions. [2018-12-02 21:59:52,163 INFO L78 Accepts]: Start accepts. Automaton has 35977 states and 109436 transitions. Word has length 98 [2018-12-02 21:59:52,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:52,163 INFO L480 AbstractCegarLoop]: Abstraction has 35977 states and 109436 transitions. [2018-12-02 21:59:52,164 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:52,164 INFO L276 IsEmpty]: Start isEmpty. Operand 35977 states and 109436 transitions. [2018-12-02 21:59:52,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 21:59:52,190 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:52,190 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:52,190 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:52,191 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:52,191 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-12-02 21:59:52,191 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:52,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:52,192 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:52,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:52,192 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:52,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:52,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:52,264 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:52,264 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:59:52,264 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:52,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:59:52,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:59:52,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:52,265 INFO L87 Difference]: Start difference. First operand 35977 states and 109436 transitions. Second operand 5 states. [2018-12-02 21:59:52,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:52,386 INFO L93 Difference]: Finished difference Result 44527 states and 136285 transitions. [2018-12-02 21:59:52,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 21:59:52,386 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 21:59:52,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:52,435 INFO L225 Difference]: With dead ends: 44527 [2018-12-02 21:59:52,435 INFO L226 Difference]: Without dead ends: 44527 [2018-12-02 21:59:52,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:52,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44527 states. [2018-12-02 21:59:52,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44527 to 36847. [2018-12-02 21:59:52,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36847 states. [2018-12-02 21:59:52,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36847 states to 36847 states and 111882 transitions. [2018-12-02 21:59:52,863 INFO L78 Accepts]: Start accepts. Automaton has 36847 states and 111882 transitions. Word has length 98 [2018-12-02 21:59:52,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:52,863 INFO L480 AbstractCegarLoop]: Abstraction has 36847 states and 111882 transitions. [2018-12-02 21:59:52,863 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:52,863 INFO L276 IsEmpty]: Start isEmpty. Operand 36847 states and 111882 transitions. [2018-12-02 21:59:52,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 21:59:52,891 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:52,891 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:52,891 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:52,891 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:52,892 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-12-02 21:59:52,892 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:52,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:52,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:52,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:52,893 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:52,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:52,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:52,951 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:52,952 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:52,952 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:52,952 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:52,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:52,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:52,952 INFO L87 Difference]: Start difference. First operand 36847 states and 111882 transitions. Second operand 6 states. [2018-12-02 21:59:53,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:53,444 INFO L93 Difference]: Finished difference Result 69663 states and 211622 transitions. [2018-12-02 21:59:53,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 21:59:53,444 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-12-02 21:59:53,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:53,518 INFO L225 Difference]: With dead ends: 69663 [2018-12-02 21:59:53,518 INFO L226 Difference]: Without dead ends: 69153 [2018-12-02 21:59:53,518 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-02 21:59:53,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-12-02 21:59:54,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 40017. [2018-12-02 21:59:54,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40017 states. [2018-12-02 21:59:54,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40017 states to 40017 states and 121143 transitions. [2018-12-02 21:59:54,259 INFO L78 Accepts]: Start accepts. Automaton has 40017 states and 121143 transitions. Word has length 98 [2018-12-02 21:59:54,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:54,259 INFO L480 AbstractCegarLoop]: Abstraction has 40017 states and 121143 transitions. [2018-12-02 21:59:54,259 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:54,259 INFO L276 IsEmpty]: Start isEmpty. Operand 40017 states and 121143 transitions. [2018-12-02 21:59:54,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 21:59:54,290 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:54,291 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:54,291 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:54,291 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:54,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1758069694, now seen corresponding path program 1 times [2018-12-02 21:59:54,291 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:54,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:54,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:54,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:54,292 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:54,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:54,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:54,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:54,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 21:59:54,346 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:54,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 21:59:54,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 21:59:54,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 21:59:54,347 INFO L87 Difference]: Start difference. First operand 40017 states and 121143 transitions. Second operand 6 states. [2018-12-02 21:59:54,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:54,987 INFO L93 Difference]: Finished difference Result 89758 states and 265444 transitions. [2018-12-02 21:59:54,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 21:59:54,987 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-12-02 21:59:54,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:55,086 INFO L225 Difference]: With dead ends: 89758 [2018-12-02 21:59:55,087 INFO L226 Difference]: Without dead ends: 87893 [2018-12-02 21:59:55,087 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 21:59:55,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87893 states. [2018-12-02 21:59:55,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87893 to 62672. [2018-12-02 21:59:55,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62672 states. [2018-12-02 21:59:56,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62672 states to 62672 states and 189977 transitions. [2018-12-02 21:59:56,102 INFO L78 Accepts]: Start accepts. Automaton has 62672 states and 189977 transitions. Word has length 122 [2018-12-02 21:59:56,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:56,102 INFO L480 AbstractCegarLoop]: Abstraction has 62672 states and 189977 transitions. [2018-12-02 21:59:56,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 21:59:56,103 INFO L276 IsEmpty]: Start isEmpty. Operand 62672 states and 189977 transitions. [2018-12-02 21:59:56,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 21:59:56,158 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:56,158 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:56,159 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:56,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:56,159 INFO L82 PathProgramCache]: Analyzing trace with hash 1789089501, now seen corresponding path program 1 times [2018-12-02 21:59:56,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:56,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:56,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:56,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:56,160 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:56,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:56,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:56,215 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:56,215 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:59:56,216 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:56,216 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:59:56,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:59:56,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:56,216 INFO L87 Difference]: Start difference. First operand 62672 states and 189977 transitions. Second operand 4 states. [2018-12-02 21:59:56,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:56,379 INFO L93 Difference]: Finished difference Result 50757 states and 153220 transitions. [2018-12-02 21:59:56,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 21:59:56,380 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 122 [2018-12-02 21:59:56,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:56,437 INFO L225 Difference]: With dead ends: 50757 [2018-12-02 21:59:56,437 INFO L226 Difference]: Without dead ends: 50757 [2018-12-02 21:59:56,437 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:56,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50757 states. [2018-12-02 21:59:56,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50757 to 46992. [2018-12-02 21:59:56,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46992 states. [2018-12-02 21:59:56,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46992 states to 46992 states and 142268 transitions. [2018-12-02 21:59:56,964 INFO L78 Accepts]: Start accepts. Automaton has 46992 states and 142268 transitions. Word has length 122 [2018-12-02 21:59:56,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:56,964 INFO L480 AbstractCegarLoop]: Abstraction has 46992 states and 142268 transitions. [2018-12-02 21:59:56,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:59:56,964 INFO L276 IsEmpty]: Start isEmpty. Operand 46992 states and 142268 transitions. [2018-12-02 21:59:57,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 21:59:57,002 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:57,002 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:57,002 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:57,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:57,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1143872236, now seen corresponding path program 1 times [2018-12-02 21:59:57,003 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:57,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:57,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:57,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:57,004 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:57,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:57,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:57,045 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:57,045 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 21:59:57,045 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:57,045 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 21:59:57,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 21:59:57,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:57,046 INFO L87 Difference]: Start difference. First operand 46992 states and 142268 transitions. Second operand 5 states. [2018-12-02 21:59:57,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:57,246 INFO L93 Difference]: Finished difference Result 55082 states and 166360 transitions. [2018-12-02 21:59:57,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 21:59:57,246 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-02 21:59:57,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:57,310 INFO L225 Difference]: With dead ends: 55082 [2018-12-02 21:59:57,311 INFO L226 Difference]: Without dead ends: 55082 [2018-12-02 21:59:57,311 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 21:59:57,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55082 states. [2018-12-02 21:59:57,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55082 to 47152. [2018-12-02 21:59:57,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47152 states. [2018-12-02 21:59:57,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47152 states to 47152 states and 142546 transitions. [2018-12-02 21:59:57,955 INFO L78 Accepts]: Start accepts. Automaton has 47152 states and 142546 transitions. Word has length 124 [2018-12-02 21:59:57,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:57,956 INFO L480 AbstractCegarLoop]: Abstraction has 47152 states and 142546 transitions. [2018-12-02 21:59:57,956 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 21:59:57,956 INFO L276 IsEmpty]: Start isEmpty. Operand 47152 states and 142546 transitions. [2018-12-02 21:59:57,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 21:59:57,991 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:57,991 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:57,991 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:57,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:57,991 INFO L82 PathProgramCache]: Analyzing trace with hash -866231605, now seen corresponding path program 1 times [2018-12-02 21:59:57,991 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:57,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:57,992 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:57,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:57,992 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:58,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:58,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:58,034 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:58,034 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 21:59:58,034 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:58,034 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 21:59:58,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 21:59:58,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 21:59:58,035 INFO L87 Difference]: Start difference. First operand 47152 states and 142546 transitions. Second operand 4 states. [2018-12-02 21:59:58,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:58,330 INFO L93 Difference]: Finished difference Result 56782 states and 170480 transitions. [2018-12-02 21:59:58,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 21:59:58,330 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 21:59:58,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:58,394 INFO L225 Difference]: With dead ends: 56782 [2018-12-02 21:59:58,394 INFO L226 Difference]: Without dead ends: 56347 [2018-12-02 21:59:58,395 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 21:59:58,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56347 states. [2018-12-02 21:59:58,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56347 to 49052. [2018-12-02 21:59:58,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49052 states. [2018-12-02 21:59:58,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49052 states to 49052 states and 147641 transitions. [2018-12-02 21:59:58,952 INFO L78 Accepts]: Start accepts. Automaton has 49052 states and 147641 transitions. Word has length 124 [2018-12-02 21:59:58,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 21:59:58,952 INFO L480 AbstractCegarLoop]: Abstraction has 49052 states and 147641 transitions. [2018-12-02 21:59:58,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 21:59:58,952 INFO L276 IsEmpty]: Start isEmpty. Operand 49052 states and 147641 transitions. [2018-12-02 21:59:58,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 21:59:58,993 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 21:59:58,993 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 21:59:58,993 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 21:59:58,993 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 21:59:58,993 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-12-02 21:59:58,993 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 21:59:58,994 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:58,994 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 21:59:58,994 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 21:59:58,994 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 21:59:59,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 21:59:59,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 21:59:59,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 21:59:59,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 21:59:59,070 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 21:59:59,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 21:59:59,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 21:59:59,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-02 21:59:59,071 INFO L87 Difference]: Start difference. First operand 49052 states and 147641 transitions. Second operand 10 states. [2018-12-02 21:59:59,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 21:59:59,812 INFO L93 Difference]: Finished difference Result 64419 states and 194144 transitions. [2018-12-02 21:59:59,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 21:59:59,813 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-12-02 21:59:59,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 21:59:59,884 INFO L225 Difference]: With dead ends: 64419 [2018-12-02 21:59:59,884 INFO L226 Difference]: Without dead ends: 64419 [2018-12-02 21:59:59,884 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-12-02 21:59:59,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64419 states. [2018-12-02 22:00:00,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64419 to 54902. [2018-12-02 22:00:00,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54902 states. [2018-12-02 22:00:00,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54902 states to 54902 states and 165516 transitions. [2018-12-02 22:00:00,620 INFO L78 Accepts]: Start accepts. Automaton has 54902 states and 165516 transitions. Word has length 124 [2018-12-02 22:00:00,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:00,621 INFO L480 AbstractCegarLoop]: Abstraction has 54902 states and 165516 transitions. [2018-12-02 22:00:00,621 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 22:00:00,621 INFO L276 IsEmpty]: Start isEmpty. Operand 54902 states and 165516 transitions. [2018-12-02 22:00:00,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 22:00:00,672 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:00,672 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:00,672 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:00,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:00,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-12-02 22:00:00,673 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:00,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:00,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:00,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:00,674 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:00,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:00,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:00,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:00,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 22:00:00,725 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:00,725 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 22:00:00,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 22:00:00,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 22:00:00,725 INFO L87 Difference]: Start difference. First operand 54902 states and 165516 transitions. Second operand 5 states. [2018-12-02 22:00:00,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:00,869 INFO L93 Difference]: Finished difference Result 54902 states and 165452 transitions. [2018-12-02 22:00:00,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 22:00:00,869 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-02 22:00:00,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:00,932 INFO L225 Difference]: With dead ends: 54902 [2018-12-02 22:00:00,932 INFO L226 Difference]: Without dead ends: 54902 [2018-12-02 22:00:00,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-02 22:00:01,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54902 states. [2018-12-02 22:00:01,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54902 to 53109. [2018-12-02 22:00:01,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53109 states. [2018-12-02 22:00:01,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53109 states to 53109 states and 159847 transitions. [2018-12-02 22:00:01,536 INFO L78 Accepts]: Start accepts. Automaton has 53109 states and 159847 transitions. Word has length 124 [2018-12-02 22:00:01,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:01,536 INFO L480 AbstractCegarLoop]: Abstraction has 53109 states and 159847 transitions. [2018-12-02 22:00:01,536 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 22:00:01,536 INFO L276 IsEmpty]: Start isEmpty. Operand 53109 states and 159847 transitions. [2018-12-02 22:00:01,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 22:00:01,587 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:01,587 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:01,587 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:01,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:01,587 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-12-02 22:00:01,588 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:01,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:01,588 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:01,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:01,589 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:01,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:01,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:01,611 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:01,611 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 22:00:01,611 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:01,612 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 22:00:01,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 22:00:01,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 22:00:01,612 INFO L87 Difference]: Start difference. First operand 53109 states and 159847 transitions. Second operand 3 states. [2018-12-02 22:00:01,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:01,730 INFO L93 Difference]: Finished difference Result 53109 states and 159783 transitions. [2018-12-02 22:00:01,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 22:00:01,731 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-12-02 22:00:01,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:01,792 INFO L225 Difference]: With dead ends: 53109 [2018-12-02 22:00:01,792 INFO L226 Difference]: Without dead ends: 53109 [2018-12-02 22:00:01,792 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 22:00:01,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53109 states. [2018-12-02 22:00:02,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53109 to 53109. [2018-12-02 22:00:02,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53109 states. [2018-12-02 22:00:02,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53109 states to 53109 states and 159783 transitions. [2018-12-02 22:00:02,487 INFO L78 Accepts]: Start accepts. Automaton has 53109 states and 159783 transitions. Word has length 124 [2018-12-02 22:00:02,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:02,487 INFO L480 AbstractCegarLoop]: Abstraction has 53109 states and 159783 transitions. [2018-12-02 22:00:02,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 22:00:02,487 INFO L276 IsEmpty]: Start isEmpty. Operand 53109 states and 159783 transitions. [2018-12-02 22:00:02,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:02,533 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:02,534 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:02,534 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:02,534 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:02,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-12-02 22:00:02,534 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:02,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:02,535 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:02,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:02,535 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:02,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:02,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:02,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:02,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 22:00:02,633 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:02,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 22:00:02,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 22:00:02,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-02 22:00:02,634 INFO L87 Difference]: Start difference. First operand 53109 states and 159783 transitions. Second operand 10 states. [2018-12-02 22:00:03,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:03,126 INFO L93 Difference]: Finished difference Result 71542 states and 215224 transitions. [2018-12-02 22:00:03,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 22:00:03,126 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-12-02 22:00:03,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:03,153 INFO L225 Difference]: With dead ends: 71542 [2018-12-02 22:00:03,154 INFO L226 Difference]: Without dead ends: 26526 [2018-12-02 22:00:03,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-12-02 22:00:03,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26526 states. [2018-12-02 22:00:03,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26526 to 25925. [2018-12-02 22:00:03,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25925 states. [2018-12-02 22:00:03,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25925 states to 25925 states and 73599 transitions. [2018-12-02 22:00:03,413 INFO L78 Accepts]: Start accepts. Automaton has 25925 states and 73599 transitions. Word has length 126 [2018-12-02 22:00:03,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:03,413 INFO L480 AbstractCegarLoop]: Abstraction has 25925 states and 73599 transitions. [2018-12-02 22:00:03,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 22:00:03,413 INFO L276 IsEmpty]: Start isEmpty. Operand 25925 states and 73599 transitions. [2018-12-02 22:00:03,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:03,437 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:03,437 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:03,437 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:03,437 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:03,437 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-12-02 22:00:03,437 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:03,438 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:03,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:03,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:03,439 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:03,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:03,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:03,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:03,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 22:00:03,523 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:03,523 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 22:00:03,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 22:00:03,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-02 22:00:03,523 INFO L87 Difference]: Start difference. First operand 25925 states and 73599 transitions. Second operand 9 states. [2018-12-02 22:00:03,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:03,912 INFO L93 Difference]: Finished difference Result 37230 states and 107544 transitions. [2018-12-02 22:00:03,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 22:00:03,913 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-12-02 22:00:03,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:03,922 INFO L225 Difference]: With dead ends: 37230 [2018-12-02 22:00:03,922 INFO L226 Difference]: Without dead ends: 9835 [2018-12-02 22:00:03,923 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-02 22:00:03,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9835 states. [2018-12-02 22:00:03,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9835 to 9835. [2018-12-02 22:00:03,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9835 states. [2018-12-02 22:00:04,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9835 states to 9835 states and 29828 transitions. [2018-12-02 22:00:04,009 INFO L78 Accepts]: Start accepts. Automaton has 9835 states and 29828 transitions. Word has length 126 [2018-12-02 22:00:04,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:04,009 INFO L480 AbstractCegarLoop]: Abstraction has 9835 states and 29828 transitions. [2018-12-02 22:00:04,009 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 22:00:04,009 INFO L276 IsEmpty]: Start isEmpty. Operand 9835 states and 29828 transitions. [2018-12-02 22:00:04,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:04,018 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:04,018 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:04,018 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:04,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:04,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1600370121, now seen corresponding path program 1 times [2018-12-02 22:00:04,019 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:04,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 22:00:04,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,020 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:04,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:04,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:04,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:04,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 22:00:04,094 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:04,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 22:00:04,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 22:00:04,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 22:00:04,094 INFO L87 Difference]: Start difference. First operand 9835 states and 29828 transitions. Second operand 6 states. [2018-12-02 22:00:04,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:04,169 INFO L93 Difference]: Finished difference Result 11059 states and 33166 transitions. [2018-12-02 22:00:04,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 22:00:04,169 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-02 22:00:04,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:04,179 INFO L225 Difference]: With dead ends: 11059 [2018-12-02 22:00:04,179 INFO L226 Difference]: Without dead ends: 10863 [2018-12-02 22:00:04,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-02 22:00:04,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10863 states. [2018-12-02 22:00:04,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10863 to 9287. [2018-12-02 22:00:04,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9287 states. [2018-12-02 22:00:04,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9287 states to 9287 states and 28057 transitions. [2018-12-02 22:00:04,276 INFO L78 Accepts]: Start accepts. Automaton has 9287 states and 28057 transitions. Word has length 126 [2018-12-02 22:00:04,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:04,277 INFO L480 AbstractCegarLoop]: Abstraction has 9287 states and 28057 transitions. [2018-12-02 22:00:04,277 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 22:00:04,277 INFO L276 IsEmpty]: Start isEmpty. Operand 9287 states and 28057 transitions. [2018-12-02 22:00:04,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:04,284 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:04,285 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:04,285 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:04,285 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:04,285 INFO L82 PathProgramCache]: Analyzing trace with hash -583306806, now seen corresponding path program 1 times [2018-12-02 22:00:04,285 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:04,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:04,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,286 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:04,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:04,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:04,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:04,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 22:00:04,343 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:04,343 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 22:00:04,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 22:00:04,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 22:00:04,343 INFO L87 Difference]: Start difference. First operand 9287 states and 28057 transitions. Second operand 5 states. [2018-12-02 22:00:04,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:04,416 INFO L93 Difference]: Finished difference Result 9883 states and 29540 transitions. [2018-12-02 22:00:04,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 22:00:04,416 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-12-02 22:00:04,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:04,425 INFO L225 Difference]: With dead ends: 9883 [2018-12-02 22:00:04,425 INFO L226 Difference]: Without dead ends: 9883 [2018-12-02 22:00:04,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 22:00:04,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9883 states. [2018-12-02 22:00:04,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9883 to 8639. [2018-12-02 22:00:04,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8639 states. [2018-12-02 22:00:04,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8639 states to 8639 states and 25991 transitions. [2018-12-02 22:00:04,506 INFO L78 Accepts]: Start accepts. Automaton has 8639 states and 25991 transitions. Word has length 126 [2018-12-02 22:00:04,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:04,507 INFO L480 AbstractCegarLoop]: Abstraction has 8639 states and 25991 transitions. [2018-12-02 22:00:04,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 22:00:04,507 INFO L276 IsEmpty]: Start isEmpty. Operand 8639 states and 25991 transitions. [2018-12-02 22:00:04,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:04,513 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:04,513 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:04,514 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:04,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:04,514 INFO L82 PathProgramCache]: Analyzing trace with hash 902437230, now seen corresponding path program 1 times [2018-12-02 22:00:04,514 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:04,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:04,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,515 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:04,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 22:00:04,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 22:00:04,574 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 22:00:04,574 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 22:00:04,574 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 22:00:04,574 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 22:00:04,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 22:00:04,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 22:00:04,574 INFO L87 Difference]: Start difference. First operand 8639 states and 25991 transitions. Second operand 7 states. [2018-12-02 22:00:04,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 22:00:04,661 INFO L93 Difference]: Finished difference Result 13172 states and 39824 transitions. [2018-12-02 22:00:04,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 22:00:04,661 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-12-02 22:00:04,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 22:00:04,673 INFO L225 Difference]: With dead ends: 13172 [2018-12-02 22:00:04,673 INFO L226 Difference]: Without dead ends: 13172 [2018-12-02 22:00:04,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-02 22:00:04,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13172 states. [2018-12-02 22:00:04,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13172 to 8139. [2018-12-02 22:00:04,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8139 states. [2018-12-02 22:00:04,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8139 states to 8139 states and 24484 transitions. [2018-12-02 22:00:04,766 INFO L78 Accepts]: Start accepts. Automaton has 8139 states and 24484 transitions. Word has length 126 [2018-12-02 22:00:04,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 22:00:04,766 INFO L480 AbstractCegarLoop]: Abstraction has 8139 states and 24484 transitions. [2018-12-02 22:00:04,766 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 22:00:04,766 INFO L276 IsEmpty]: Start isEmpty. Operand 8139 states and 24484 transitions. [2018-12-02 22:00:04,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 22:00:04,772 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 22:00:04,772 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 22:00:04,772 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 22:00:04,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 22:00:04,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1442229811, now seen corresponding path program 3 times [2018-12-02 22:00:04,772 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 22:00:04,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 22:00:04,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 22:00:04,773 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 22:00:04,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 22:00:04,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 22:00:04,838 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 22:00:04,950 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-02 22:00:04,951 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 10:00:04 BasicIcfg [2018-12-02 22:00:04,951 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 22:00:04,951 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 22:00:04,951 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 22:00:04,951 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 22:00:04,951 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 09:57:02" (3/4) ... [2018-12-02 22:00:04,953 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-02 22:00:05,070 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_3fe870f8-4fdc-4a8a-8857-609401a18b28/bin-2019/utaipan/witness.graphml [2018-12-02 22:00:05,070 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 22:00:05,070 INFO L168 Benchmark]: Toolchain (without parser) took 183406.59 ms. Allocated memory was 1.0 GB in the beginning and 8.4 GB in the end (delta: 7.4 GB). Free memory was 948.1 MB in the beginning and 3.7 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2018-12-02 22:00:05,071 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 22:00:05,071 INFO L168 Benchmark]: CACSL2BoogieTranslator took 331.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 948.1 MB in the beginning and 1.1 GB in the end (delta: -165.0 MB). Peak memory consumption was 37.3 MB. Max. memory is 11.5 GB. [2018-12-02 22:00:05,072 INFO L168 Benchmark]: Boogie Procedure Inliner took 30.33 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 22:00:05,072 INFO L168 Benchmark]: Boogie Preprocessor took 23.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 22:00:05,072 INFO L168 Benchmark]: RCFGBuilder took 419.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 69.0 MB). Peak memory consumption was 69.0 MB. Max. memory is 11.5 GB. [2018-12-02 22:00:05,072 INFO L168 Benchmark]: TraceAbstraction took 182480.30 ms. Allocated memory was 1.2 GB in the beginning and 8.4 GB in the end (delta: 7.2 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2018-12-02 22:00:05,072 INFO L168 Benchmark]: Witness Printer took 119.00 ms. Allocated memory is still 8.4 GB. Free memory was 3.8 GB in the beginning and 3.7 GB in the end (delta: 102.5 MB). Peak memory consumption was 102.5 MB. Max. memory is 11.5 GB. [2018-12-02 22:00:05,073 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 331.09 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 948.1 MB in the beginning and 1.1 GB in the end (delta: -165.0 MB). Peak memory consumption was 37.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 30.33 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 419.20 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 69.0 MB). Peak memory consumption was 69.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 182480.30 ms. Allocated memory was 1.2 GB in the beginning and 8.4 GB in the end (delta: 7.2 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 119.00 ms. Allocated memory is still 8.4 GB. Free memory was 3.8 GB in the beginning and 3.7 GB in the end (delta: 102.5 MB). Peak memory consumption was 102.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t1942; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t1942, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t1943; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t1943, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t1944; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t1944, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 182.3s OverallTime, 34 OverallIterations, 1 TraceHistogramMax, 31.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11861 SDtfs, 17693 SDslu, 24341 SDs, 0 SdLazy, 9540 SolverSat, 702 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 330 GetRequests, 81 SyntacticMatches, 33 SemanticMatches, 216 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 64.8s AutomataMinimizationTime, 33 MinimizatonAttempts, 544747 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 3455 NumberOfCodeBlocks, 3455 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 3296 ConstructedInterpolants, 0 QuantifiedInterpolants, 872319 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...