./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 03:03:38,429 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 03:03:38,430 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 03:03:38,436 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 03:03:38,437 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 03:03:38,437 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 03:03:38,438 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 03:03:38,439 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 03:03:38,439 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 03:03:38,440 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 03:03:38,440 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 03:03:38,440 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 03:03:38,441 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 03:03:38,442 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 03:03:38,442 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 03:03:38,442 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 03:03:38,443 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 03:03:38,444 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 03:03:38,445 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 03:03:38,445 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 03:03:38,446 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 03:03:38,447 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 03:03:38,448 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 03:03:38,448 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 03:03:38,448 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 03:03:38,449 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 03:03:38,449 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 03:03:38,449 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 03:03:38,450 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 03:03:38,450 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 03:03:38,451 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 03:03:38,451 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 03:03:38,451 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 03:03:38,451 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 03:03:38,452 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 03:03:38,452 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 03:03:38,452 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-03 03:03:38,459 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 03:03:38,460 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 03:03:38,460 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 03:03:38,460 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 03:03:38,460 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 03:03:38,461 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 03:03:38,461 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 03:03:38,462 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 03:03:38,462 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 03:03:38,462 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 03:03:38,462 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 03:03:38,462 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 03:03:38,462 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 03:03:38,463 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 03:03:38,463 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 03:03:38,464 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 03:03:38,464 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 03:03:38,465 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-03 03:03:38,465 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-03 03:03:38,483 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 03:03:38,490 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 03:03:38,492 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 03:03:38,493 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 03:03:38,493 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 03:03:38,494 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:03:38,528 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/dbbfca075/4bf8d574619a45a4ad7496012edff604/FLAG02f7ab53c [2018-12-03 03:03:38,979 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 03:03:38,979 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:03:38,984 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/dbbfca075/4bf8d574619a45a4ad7496012edff604/FLAG02f7ab53c [2018-12-03 03:03:38,993 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/dbbfca075/4bf8d574619a45a4ad7496012edff604 [2018-12-03 03:03:38,995 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 03:03:38,995 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 03:03:38,996 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 03:03:38,996 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 03:03:39,000 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 03:03:39,000 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 03:03:38" (1/1) ... [2018-12-03 03:03:39,002 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@26c1f7bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39, skipping insertion in model container [2018-12-03 03:03:39,002 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 03:03:38" (1/1) ... [2018-12-03 03:03:39,008 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 03:03:39,025 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 03:03:39,142 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 03:03:39,144 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 03:03:39,168 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 03:03:39,176 INFO L195 MainTranslator]: Completed translation [2018-12-03 03:03:39,176 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39 WrapperNode [2018-12-03 03:03:39,176 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 03:03:39,177 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 03:03:39,177 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 03:03:39,177 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 03:03:39,182 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,186 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,219 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 03:03:39,219 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 03:03:39,219 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 03:03:39,219 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 03:03:39,225 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,225 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,226 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,226 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,231 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,234 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,235 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... [2018-12-03 03:03:39,236 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 03:03:39,236 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 03:03:39,236 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 03:03:39,236 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 03:03:39,237 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 03:03:39,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-03 03:03:39,268 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-03 03:03:39,268 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-03 03:03:39,268 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-03 03:03:39,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 03:03:39,268 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 03:03:39,268 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-03 03:03:39,269 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-03 03:03:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-03 03:03:39,269 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-03 03:03:39,269 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-03 03:03:39,269 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-03 03:03:39,421 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 03:03:39,421 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-03 03:03:39,421 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:03:39 BoogieIcfgContainer [2018-12-03 03:03:39,421 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 03:03:39,421 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 03:03:39,422 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 03:03:39,423 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 03:03:39,423 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 03:03:38" (1/3) ... [2018-12-03 03:03:39,424 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55c3fd05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 03:03:39, skipping insertion in model container [2018-12-03 03:03:39,424 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:03:39" (2/3) ... [2018-12-03 03:03:39,424 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55c3fd05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 03:03:39, skipping insertion in model container [2018-12-03 03:03:39,424 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:03:39" (3/3) ... [2018-12-03 03:03:39,426 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:03:39,433 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 03:03:39,439 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-03 03:03:39,452 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-03 03:03:39,474 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 03:03:39,474 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 03:03:39,474 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 03:03:39,474 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 03:03:39,474 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 03:03:39,474 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 03:03:39,474 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 03:03:39,474 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 03:03:39,485 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-03 03:03:39,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-03 03:03:39,489 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:39,489 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:39,490 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:39,493 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:39,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-03 03:03:39,495 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:39,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:39,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:39,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:39,523 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:39,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:39,704 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:39,705 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:39,705 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 03:03:39,706 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 35 with the following transitions: [2018-12-03 03:03:39,708 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-03 03:03:39,731 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 03:03:39,731 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 03:03:39,810 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-03 03:03:39,810 INFO L272 AbstractInterpreter]: Visited 21 different actions 29 times. Never merged. Never widened. Performed 79 root evaluator evaluations with a maximum evaluation depth of 3. Performed 79 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 19 variables. [2018-12-03 03:03:39,815 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:39,815 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-03 03:03:39,862 INFO L227 lantSequenceWeakener]: Weakened 16 states. On average, predicates are now at 62.81% of their original sizes. [2018-12-03 03:03:39,862 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-03 03:03:39,921 INFO L418 sIntCurrentIteration]: We unified 33 AI predicates to 33 [2018-12-03 03:03:39,921 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-03 03:03:39,922 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-03 03:03:39,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [9] total 20 [2018-12-03 03:03:39,922 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 03:03:39,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 03:03:39,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 03:03:39,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:03:39,929 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 13 states. [2018-12-03 03:03:40,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:40,295 INFO L93 Difference]: Finished difference Result 146 states and 218 transitions. [2018-12-03 03:03:40,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 03:03:40,296 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-12-03 03:03:40,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:40,303 INFO L225 Difference]: With dead ends: 146 [2018-12-03 03:03:40,303 INFO L226 Difference]: Without dead ends: 85 [2018-12-03 03:03:40,305 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 38 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 [2018-12-03 03:03:40,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-12-03 03:03:40,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 71. [2018-12-03 03:03:40,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-03 03:03:40,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 91 transitions. [2018-12-03 03:03:40,334 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 91 transitions. Word has length 34 [2018-12-03 03:03:40,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:40,334 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 91 transitions. [2018-12-03 03:03:40,335 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 03:03:40,335 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 91 transitions. [2018-12-03 03:03:40,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 03:03:40,336 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:40,336 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:40,336 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:40,336 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:40,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1691151941, now seen corresponding path program 1 times [2018-12-03 03:03:40,337 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:40,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:40,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:40,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:40,338 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:40,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:40,434 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:40,434 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:40,435 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 03:03:40,435 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 39 with the following transitions: [2018-12-03 03:03:40,435 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-03 03:03:40,436 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 03:03:40,436 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 03:03:40,481 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 03:03:40,481 INFO L272 AbstractInterpreter]: Visited 31 different actions 84 times. Merged at 7 different actions 17 times. Never widened. Performed 279 root evaluator evaluations with a maximum evaluation depth of 6. Performed 279 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 19 variables. [2018-12-03 03:03:40,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:40,483 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 03:03:40,484 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:40,484 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:03:40,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:40,491 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 03:03:40,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:40,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:03:40,572 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-03 03:03:40,572 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:03:40,706 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:40,721 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:03:40,721 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 19 [2018-12-03 03:03:40,721 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 03:03:40,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 03:03:40,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 03:03:40,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2018-12-03 03:03:40,723 INFO L87 Difference]: Start difference. First operand 71 states and 91 transitions. Second operand 12 states. [2018-12-03 03:03:40,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:40,956 INFO L93 Difference]: Finished difference Result 144 states and 192 transitions. [2018-12-03 03:03:40,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:03:40,957 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-12-03 03:03:40,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:40,958 INFO L225 Difference]: With dead ends: 144 [2018-12-03 03:03:40,958 INFO L226 Difference]: Without dead ends: 118 [2018-12-03 03:03:40,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2018-12-03 03:03:40,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-03 03:03:40,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 93. [2018-12-03 03:03:40,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-03 03:03:40,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 119 transitions. [2018-12-03 03:03:40,968 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 119 transitions. Word has length 38 [2018-12-03 03:03:40,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:40,968 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 119 transitions. [2018-12-03 03:03:40,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 03:03:40,968 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 119 transitions. [2018-12-03 03:03:40,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 03:03:40,969 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:40,969 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:40,969 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:40,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:40,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1748410243, now seen corresponding path program 1 times [2018-12-03 03:03:40,969 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:40,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:40,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:40,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:40,970 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:40,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:41,075 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:41,075 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:41,075 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 03:03:41,076 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 39 with the following transitions: [2018-12-03 03:03:41,076 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [94], [99], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-03 03:03:41,077 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 03:03:41,078 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 03:03:41,122 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 03:03:41,123 INFO L272 AbstractInterpreter]: Visited 31 different actions 81 times. Merged at 7 different actions 17 times. Never widened. Performed 246 root evaluator evaluations with a maximum evaluation depth of 6. Performed 246 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 19 variables. [2018-12-03 03:03:41,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:41,124 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 03:03:41,125 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:41,125 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:03:41,139 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:41,139 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 03:03:41,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:41,154 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:03:41,213 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-03 03:03:41,213 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:03:41,356 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:41,370 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:03:41,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 20 [2018-12-03 03:03:41,370 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 03:03:41,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 03:03:41,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 03:03:41,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-12-03 03:03:41,371 INFO L87 Difference]: Start difference. First operand 93 states and 119 transitions. Second operand 13 states. [2018-12-03 03:03:41,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:41,579 INFO L93 Difference]: Finished difference Result 150 states and 198 transitions. [2018-12-03 03:03:41,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-03 03:03:41,579 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 38 [2018-12-03 03:03:41,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:41,580 INFO L225 Difference]: With dead ends: 150 [2018-12-03 03:03:41,581 INFO L226 Difference]: Without dead ends: 114 [2018-12-03 03:03:41,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 65 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=693, Unknown=0, NotChecked=0, Total=812 [2018-12-03 03:03:41,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-03 03:03:41,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 85. [2018-12-03 03:03:41,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-03 03:03:41,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 105 transitions. [2018-12-03 03:03:41,588 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 105 transitions. Word has length 38 [2018-12-03 03:03:41,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:41,589 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 105 transitions. [2018-12-03 03:03:41,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 03:03:41,589 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 105 transitions. [2018-12-03 03:03:41,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 03:03:41,589 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:41,590 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:41,590 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:41,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:41,590 INFO L82 PathProgramCache]: Analyzing trace with hash 1790976707, now seen corresponding path program 2 times [2018-12-03 03:03:41,590 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:41,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:41,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:41,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:41,591 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:41,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:41,648 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:41,648 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:41,648 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 03:03:41,648 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-03 03:03:41,648 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-03 03:03:41,648 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:41,649 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:03:41,657 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-03 03:03:41,657 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-03 03:03:41,668 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-03 03:03:41,669 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:03:41,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:03:41,709 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:41,709 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:03:41,803 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:03:41,817 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-03 03:03:41,817 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8, 8] imperfect sequences [8] total 20 [2018-12-03 03:03:41,818 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 03:03:41,818 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 03:03:41,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 03:03:41,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=337, Unknown=0, NotChecked=0, Total=380 [2018-12-03 03:03:41,818 INFO L87 Difference]: Start difference. First operand 85 states and 105 transitions. Second operand 8 states. [2018-12-03 03:03:41,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:41,860 INFO L93 Difference]: Finished difference Result 126 states and 160 transitions. [2018-12-03 03:03:41,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 03:03:41,860 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-03 03:03:41,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:41,862 INFO L225 Difference]: With dead ends: 126 [2018-12-03 03:03:41,862 INFO L226 Difference]: Without dead ends: 100 [2018-12-03 03:03:41,862 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-12-03 03:03:41,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-03 03:03:41,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 93. [2018-12-03 03:03:41,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-03 03:03:41,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 113 transitions. [2018-12-03 03:03:41,871 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 113 transitions. Word has length 38 [2018-12-03 03:03:41,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:41,872 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 113 transitions. [2018-12-03 03:03:41,872 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 03:03:41,872 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 113 transitions. [2018-12-03 03:03:41,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:03:41,873 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:41,873 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:41,873 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:41,873 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:41,874 INFO L82 PathProgramCache]: Analyzing trace with hash -774274828, now seen corresponding path program 3 times [2018-12-03 03:03:41,874 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:41,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:41,874 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:03:41,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:41,875 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:41,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:41,967 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:03:41,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:03:41,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-03 03:03:41,967 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 03:03:41,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 03:03:41,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 03:03:41,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-03 03:03:41,968 INFO L87 Difference]: Start difference. First operand 93 states and 113 transitions. Second operand 10 states. [2018-12-03 03:03:54,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:54,807 INFO L93 Difference]: Finished difference Result 160 states and 211 transitions. [2018-12-03 03:03:54,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 03:03:54,807 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-12-03 03:03:54,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:54,808 INFO L225 Difference]: With dead ends: 160 [2018-12-03 03:03:54,808 INFO L226 Difference]: Without dead ends: 134 [2018-12-03 03:03:54,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-12-03 03:03:54,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-03 03:03:54,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 115. [2018-12-03 03:03:54,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-03 03:03:54,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 147 transitions. [2018-12-03 03:03:54,816 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 147 transitions. Word has length 42 [2018-12-03 03:03:54,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:54,816 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 147 transitions. [2018-12-03 03:03:54,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 03:03:54,816 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 147 transitions. [2018-12-03 03:03:54,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:03:54,817 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:54,817 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:54,817 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:54,817 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:54,817 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 2 times [2018-12-03 03:03:54,817 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:54,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:54,818 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:03:54,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:54,818 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:54,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:54,930 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:03:54,931 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:03:54,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-03 03:03:54,931 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 03:03:54,931 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 03:03:54,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 03:03:54,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:03:54,931 INFO L87 Difference]: Start difference. First operand 115 states and 147 transitions. Second operand 13 states. [2018-12-03 03:03:55,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:55,083 INFO L93 Difference]: Finished difference Result 140 states and 179 transitions. [2018-12-03 03:03:55,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-03 03:03:55,084 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-03 03:03:55,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:55,085 INFO L225 Difference]: With dead ends: 140 [2018-12-03 03:03:55,085 INFO L226 Difference]: Without dead ends: 138 [2018-12-03 03:03:55,085 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:03:55,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-03 03:03:55,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 119. [2018-12-03 03:03:55,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-12-03 03:03:55,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 150 transitions. [2018-12-03 03:03:55,092 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 150 transitions. Word has length 42 [2018-12-03 03:03:55,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:55,093 INFO L480 AbstractCegarLoop]: Abstraction has 119 states and 150 transitions. [2018-12-03 03:03:55,093 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 03:03:55,093 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 150 transitions. [2018-12-03 03:03:55,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:03:55,094 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:55,094 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:55,094 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:55,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:55,094 INFO L82 PathProgramCache]: Analyzing trace with hash 749157176, now seen corresponding path program 1 times [2018-12-03 03:03:55,095 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:55,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:55,095 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:03:55,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:55,095 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:55,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:55,145 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:03:55,146 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:55,146 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-03 03:03:55,146 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-12-03 03:03:55,146 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [50], [54], [60], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-03 03:03:55,147 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-03 03:03:55,147 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-03 03:03:55,201 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-03 03:03:55,201 INFO L272 AbstractInterpreter]: Visited 33 different actions 138 times. Merged at 8 different actions 40 times. Never widened. Performed 458 root evaluator evaluations with a maximum evaluation depth of 6. Performed 458 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 2 fixpoints after 1 different actions. Largest state had 19 variables. [2018-12-03 03:03:55,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:55,209 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-03 03:03:55,209 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:03:55,209 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:03:55,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:55,220 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-03 03:03:55,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:03:55,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:03:55,250 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:03:55,250 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:03:55,977 WARN L180 SmtUtils]: Spent 704.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:56,707 WARN L180 SmtUtils]: Spent 719.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:57,430 WARN L180 SmtUtils]: Spent 708.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:58,175 WARN L180 SmtUtils]: Spent 722.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:58,917 WARN L180 SmtUtils]: Spent 717.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:59,661 WARN L180 SmtUtils]: Spent 730.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-03 03:03:59,668 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:03:59,682 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:03:59,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 15 [2018-12-03 03:03:59,683 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-03 03:03:59,683 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 03:03:59,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 03:03:59,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-03 03:03:59,684 INFO L87 Difference]: Start difference. First operand 119 states and 150 transitions. Second operand 8 states. [2018-12-03 03:03:59,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:03:59,739 INFO L93 Difference]: Finished difference Result 188 states and 243 transitions. [2018-12-03 03:03:59,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 03:03:59,740 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-03 03:03:59,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:03:59,741 INFO L225 Difference]: With dead ends: 188 [2018-12-03 03:03:59,741 INFO L226 Difference]: Without dead ends: 162 [2018-12-03 03:03:59,741 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:03:59,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-03 03:03:59,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 147. [2018-12-03 03:03:59,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-03 03:03:59,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 189 transitions. [2018-12-03 03:03:59,750 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 189 transitions. Word has length 42 [2018-12-03 03:03:59,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:03:59,750 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 189 transitions. [2018-12-03 03:03:59,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 03:03:59,750 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 189 transitions. [2018-12-03 03:03:59,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:03:59,751 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:03:59,751 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:03:59,751 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:03:59,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:03:59,751 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-03 03:03:59,751 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 03:03:59,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:59,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:03:59,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 03:03:59,752 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 03:03:59,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 03:03:59,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 03:03:59,774 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-03 03:03:59,791 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 03:03:59 BoogieIcfgContainer [2018-12-03 03:03:59,791 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 03:03:59,792 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 03:03:59,792 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 03:03:59,792 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 03:03:59,792 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:03:39" (3/4) ... [2018-12-03 03:03:59,794 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-03 03:03:59,794 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 03:03:59,795 INFO L168 Benchmark]: Toolchain (without parser) took 20799.97 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 213.9 MB). Free memory was 949.7 MB in the beginning and 797.1 MB in the end (delta: 152.6 MB). Peak memory consumption was 366.5 MB. Max. memory is 11.5 GB. [2018-12-03 03:03:59,795 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:03:59,795 INFO L168 Benchmark]: CACSL2BoogieTranslator took 180.40 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 936.3 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. [2018-12-03 03:03:59,796 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.03 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 936.3 MB in the beginning and 1.1 GB in the end (delta: -193.1 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. [2018-12-03 03:03:59,796 INFO L168 Benchmark]: Boogie Preprocessor took 16.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:03:59,796 INFO L168 Benchmark]: RCFGBuilder took 184.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 11.5 GB. [2018-12-03 03:03:59,797 INFO L168 Benchmark]: TraceAbstraction took 20369.85 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 79.7 MB). Free memory was 1.1 GB in the beginning and 797.1 MB in the end (delta: 310.7 MB). Peak memory consumption was 390.4 MB. Max. memory is 11.5 GB. [2018-12-03 03:03:59,797 INFO L168 Benchmark]: Witness Printer took 2.85 ms. Allocated memory is still 1.2 GB. Free memory is still 797.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:03:59,799 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 180.40 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 936.3 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.03 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 936.3 MB in the beginning and 1.1 GB in the end (delta: -193.1 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 16.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 184.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20369.85 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 79.7 MB). Free memory was 1.1 GB in the beginning and 797.1 MB in the end (delta: 310.7 MB). Peak memory consumption was 390.4 MB. Max. memory is 11.5 GB. * Witness Printer took 2.85 ms. Allocated memory is still 1.2 GB. Free memory is still 797.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 98. Possible FailurePath: [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add1 ; [L222] unsigned int r_add2 ; [L223] unsigned int zero ; [L224] int tmp ; [L225] int tmp___0 ; [L226] int __retres14 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L230] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L230] RET, EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L230] zero = base2flt(0, 0) [L231] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L231] RET, EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L231] a = base2flt(ma, ea) [L232] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=4278190080, e=0, res=4278190080] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=36028797002186752, __retres4=4278190080, e=0, res=4278190080] [L232] RET, EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=36028797002186752, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L232] b = base2flt(mb, eb) [L233] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=4278190080] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080, ea=127, eb=2147483519] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. UNSAFE Result, 20.3s OverallTime, 8 OverallIterations, 3 TraceHistogramMax, 13.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 539 SDtfs, 304 SDslu, 4251 SDs, 0 SdLazy, 861 SolverSat, 42 SolverUnsat, 6 SolverUnknown, 0 SolverNotchecked, 12.8s Time, PredicateUnifierStatistics: 2 DeclaredPredicates, 436 GetRequests, 302 SyntacticMatches, 4 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 5.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=147occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.2s AbstIntTime, 4 AbstIntIterations, 1 AbstIntStrong, 0.5444444444444445 AbsIntWeakeningRatio, 1.8484848484848484 AbsIntAvgWeakeningVarsNumRemoved, 1.0 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 7 MinimizatonAttempts, 128 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 5.5s InterpolantComputationTime, 472 NumberOfCodeBlocks, 454 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 571 ConstructedInterpolants, 26 QuantifiedInterpolants, 62844 SizeOfPredicates, 20 NumberOfNonLiveVariables, 427 ConjunctsInSsa, 76 ConjunctsInUnsatCore, 15 InterpolantComputations, 4 PerfectInterpolantSequences, 193/242 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-03 03:04:01,129 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 03:04:01,130 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 03:04:01,136 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 03:04:01,136 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 03:04:01,136 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 03:04:01,137 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 03:04:01,138 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 03:04:01,138 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 03:04:01,139 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 03:04:01,139 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 03:04:01,139 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 03:04:01,140 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 03:04:01,140 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 03:04:01,141 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 03:04:01,141 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 03:04:01,141 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 03:04:01,142 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 03:04:01,143 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 03:04:01,144 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 03:04:01,144 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 03:04:01,145 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 03:04:01,146 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 03:04:01,146 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 03:04:01,146 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 03:04:01,146 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 03:04:01,147 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 03:04:01,147 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 03:04:01,148 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 03:04:01,148 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 03:04:01,148 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 03:04:01,149 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 03:04:01,149 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 03:04:01,149 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 03:04:01,149 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 03:04:01,150 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 03:04:01,150 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-12-03 03:04:01,157 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 03:04:01,157 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 03:04:01,157 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 03:04:01,157 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 03:04:01,157 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 03:04:01,157 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 03:04:01,158 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 03:04:01,158 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 03:04:01,159 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 03:04:01,159 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 03:04:01,160 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-03 03:04:01,160 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-03 03:04:01,177 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 03:04:01,185 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 03:04:01,187 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 03:04:01,188 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 03:04:01,188 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 03:04:01,189 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:04:01,225 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/267007a9d/273e982f890849cd9ad0480bdf91619d/FLAG3e8ba10b9 [2018-12-03 03:04:01,625 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 03:04:01,626 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:04:01,631 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/267007a9d/273e982f890849cd9ad0480bdf91619d/FLAG3e8ba10b9 [2018-12-03 03:04:01,639 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/data/267007a9d/273e982f890849cd9ad0480bdf91619d [2018-12-03 03:04:01,641 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 03:04:01,642 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 03:04:01,643 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 03:04:01,643 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 03:04:01,645 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 03:04:01,646 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,647 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@c19bd0f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01, skipping insertion in model container [2018-12-03 03:04:01,647 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,652 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 03:04:01,668 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 03:04:01,788 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 03:04:01,790 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 03:04:01,814 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 03:04:01,822 INFO L195 MainTranslator]: Completed translation [2018-12-03 03:04:01,823 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01 WrapperNode [2018-12-03 03:04:01,823 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 03:04:01,823 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 03:04:01,823 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 03:04:01,824 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 03:04:01,829 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,834 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,838 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 03:04:01,838 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 03:04:01,838 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 03:04:01,838 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 03:04:01,844 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,844 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,845 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,845 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,850 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,883 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,884 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... [2018-12-03 03:04:01,886 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 03:04:01,886 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 03:04:01,886 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 03:04:01,886 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 03:04:01,887 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 03:04:01,917 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-03 03:04:01,918 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-03 03:04:01,918 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 03:04:01,918 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-03 03:04:01,918 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-03 03:04:01,918 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-03 03:04:01,918 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-03 03:04:02,069 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 03:04:02,069 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-03 03:04:02,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:04:02 BoogieIcfgContainer [2018-12-03 03:04:02,070 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 03:04:02,070 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 03:04:02,070 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 03:04:02,072 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 03:04:02,072 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 03:04:01" (1/3) ... [2018-12-03 03:04:02,072 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18eb40bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 03:04:02, skipping insertion in model container [2018-12-03 03:04:02,072 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 03:04:01" (2/3) ... [2018-12-03 03:04:02,073 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18eb40bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 03:04:02, skipping insertion in model container [2018-12-03 03:04:02,073 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:04:02" (3/3) ... [2018-12-03 03:04:02,074 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-03 03:04:02,079 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 03:04:02,083 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-03 03:04:02,091 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-03 03:04:02,109 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-03 03:04:02,110 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 03:04:02,110 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 03:04:02,110 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 03:04:02,110 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 03:04:02,110 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 03:04:02,110 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 03:04:02,110 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 03:04:02,110 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 03:04:02,120 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-03 03:04:02,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-03 03:04:02,124 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:02,124 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:02,126 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:02,128 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:02,129 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-03 03:04:02,131 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:02,131 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:02,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:02,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:02,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:02,372 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,372 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:02,408 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,411 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:02,412 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:02,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:02,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:02,434 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:02,440 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,440 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:02,477 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,492 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:02,492 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 9 [2018-12-03 03:04:02,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 03:04:02,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 03:04:02,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-03 03:04:02,504 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 9 states. [2018-12-03 03:04:02,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:02,636 INFO L93 Difference]: Finished difference Result 136 states and 204 transitions. [2018-12-03 03:04:02,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 03:04:02,637 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-12-03 03:04:02,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:02,647 INFO L225 Difference]: With dead ends: 136 [2018-12-03 03:04:02,647 INFO L226 Difference]: Without dead ends: 78 [2018-12-03 03:04:02,649 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:04:02,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-12-03 03:04:02,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 64. [2018-12-03 03:04:02,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-12-03 03:04:02,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 86 transitions. [2018-12-03 03:04:02,678 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 86 transitions. Word has length 34 [2018-12-03 03:04:02,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:02,679 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 86 transitions. [2018-12-03 03:04:02,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 03:04:02,679 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 86 transitions. [2018-12-03 03:04:02,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 03:04:02,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:02,680 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:02,681 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:02,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:02,681 INFO L82 PathProgramCache]: Analyzing trace with hash 1790976707, now seen corresponding path program 1 times [2018-12-03 03:04:02,681 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:02,681 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:02,694 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:02,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:02,715 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:02,757 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:02,816 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:02,817 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:02,817 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:02,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:02,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:02,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:02,921 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-03 03:04:02,921 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:03,029 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:03,043 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:04:03,043 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [8, 8, 12] total 18 [2018-12-03 03:04:03,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-03 03:04:03,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-03 03:04:03,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2018-12-03 03:04:03,044 INFO L87 Difference]: Start difference. First operand 64 states and 86 transitions. Second operand 18 states. [2018-12-03 03:04:03,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:03,369 INFO L93 Difference]: Finished difference Result 169 states and 234 transitions. [2018-12-03 03:04:03,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-03 03:04:03,370 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 38 [2018-12-03 03:04:03,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:03,371 INFO L225 Difference]: With dead ends: 169 [2018-12-03 03:04:03,372 INFO L226 Difference]: Without dead ends: 139 [2018-12-03 03:04:03,372 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 130 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:04:03,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-03 03:04:03,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 92. [2018-12-03 03:04:03,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-03 03:04:03,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 126 transitions. [2018-12-03 03:04:03,384 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 126 transitions. Word has length 38 [2018-12-03 03:04:03,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:03,384 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 126 transitions. [2018-12-03 03:04:03,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-03 03:04:03,384 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 126 transitions. [2018-12-03 03:04:03,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-03 03:04:03,385 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:03,385 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:03,385 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:03,386 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:03,386 INFO L82 PathProgramCache]: Analyzing trace with hash -182008515, now seen corresponding path program 1 times [2018-12-03 03:04:03,386 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:03,386 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:03,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:03,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:03,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:03,442 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:03,442 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:03,443 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:03,443 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 03:04:03,443 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 03:04:03,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 03:04:03,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-03 03:04:03,444 INFO L87 Difference]: Start difference. First operand 92 states and 126 transitions. Second operand 8 states. [2018-12-03 03:04:03,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:03,494 INFO L93 Difference]: Finished difference Result 149 states and 202 transitions. [2018-12-03 03:04:03,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:04:03,495 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-03 03:04:03,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:03,495 INFO L225 Difference]: With dead ends: 149 [2018-12-03 03:04:03,496 INFO L226 Difference]: Without dead ends: 113 [2018-12-03 03:04:03,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-03 03:04:03,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-03 03:04:03,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 92. [2018-12-03 03:04:03,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-03 03:04:03,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 126 transitions. [2018-12-03 03:04:03,505 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 126 transitions. Word has length 38 [2018-12-03 03:04:03,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:03,505 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 126 transitions. [2018-12-03 03:04:03,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 03:04:03,505 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 126 transitions. [2018-12-03 03:04:03,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:03,506 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:03,506 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:03,506 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:03,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:03,506 INFO L82 PathProgramCache]: Analyzing trace with hash -977604237, now seen corresponding path program 1 times [2018-12-03 03:04:03,506 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:03,506 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:03,519 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:03,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:03,535 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:03,569 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-03 03:04:03,569 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:03,570 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:03,570 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-03 03:04:03,571 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 03:04:03,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 03:04:03,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-03 03:04:03,571 INFO L87 Difference]: Start difference. First operand 92 states and 126 transitions. Second operand 9 states. [2018-12-03 03:04:03,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:03,654 INFO L93 Difference]: Finished difference Result 136 states and 182 transitions. [2018-12-03 03:04:03,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 03:04:03,655 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-12-03 03:04:03,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:03,656 INFO L225 Difference]: With dead ends: 136 [2018-12-03 03:04:03,656 INFO L226 Difference]: Without dead ends: 115 [2018-12-03 03:04:03,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:04:03,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-03 03:04:03,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 100. [2018-12-03 03:04:03,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-03 03:04:03,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 135 transitions. [2018-12-03 03:04:03,670 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 135 transitions. Word has length 42 [2018-12-03 03:04:03,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:03,671 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 135 transitions. [2018-12-03 03:04:03,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 03:04:03,671 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 135 transitions. [2018-12-03 03:04:03,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:03,672 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:03,672 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:03,673 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:03,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:03,673 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 1 times [2018-12-03 03:04:03,673 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:03,673 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:03,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:03,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:03,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:03,810 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:04:03,810 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:03,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:03,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-03 03:04:03,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 03:04:03,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 03:04:03,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:04:03,812 INFO L87 Difference]: Start difference. First operand 100 states and 135 transitions. Second operand 13 states. [2018-12-03 03:04:03,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:03,973 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2018-12-03 03:04:03,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-03 03:04:03,974 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-03 03:04:03,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:03,975 INFO L225 Difference]: With dead ends: 181 [2018-12-03 03:04:03,975 INFO L226 Difference]: Without dead ends: 150 [2018-12-03 03:04:03,975 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:04:03,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-03 03:04:03,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 134. [2018-12-03 03:04:03,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-03 03:04:03,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 176 transitions. [2018-12-03 03:04:03,986 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 176 transitions. Word has length 42 [2018-12-03 03:04:03,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:03,986 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 176 transitions. [2018-12-03 03:04:03,986 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 03:04:03,986 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 176 transitions. [2018-12-03 03:04:03,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:03,988 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:03,988 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:03,988 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:03,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:03,988 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-03 03:04:03,989 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:03,989 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:04,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:04,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:04,031 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:04,096 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:04,096 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:04,252 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:04,253 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:04,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:04,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:04,269 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:04,277 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:04,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:04,300 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:04:04,300 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-03 03:04:04,300 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:04:04,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:04:04,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:04:04,301 INFO L87 Difference]: Start difference. First operand 134 states and 176 transitions. Second operand 11 states. [2018-12-03 03:04:04,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:04,476 INFO L93 Difference]: Finished difference Result 193 states and 247 transitions. [2018-12-03 03:04:04,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 03:04:04,477 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-12-03 03:04:04,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:04,478 INFO L225 Difference]: With dead ends: 193 [2018-12-03 03:04:04,478 INFO L226 Difference]: Without dead ends: 162 [2018-12-03 03:04:04,479 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2018-12-03 03:04:04,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-03 03:04:04,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 142. [2018-12-03 03:04:04,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 03:04:04,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 181 transitions. [2018-12-03 03:04:04,494 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 181 transitions. Word has length 42 [2018-12-03 03:04:04,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:04,495 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 181 transitions. [2018-12-03 03:04:04,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:04:04,495 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 181 transitions. [2018-12-03 03:04:04,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:04,496 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:04,496 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:04,496 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:04,496 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:04,496 INFO L82 PathProgramCache]: Analyzing trace with hash -1035766736, now seen corresponding path program 1 times [2018-12-03 03:04:04,497 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:04,497 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:04,509 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:04,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:04,541 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:04,603 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:04,603 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:04,605 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:04,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-03 03:04:04,605 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 03:04:04,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 03:04:04,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-03 03:04:04,606 INFO L87 Difference]: Start difference. First operand 142 states and 181 transitions. Second operand 12 states. [2018-12-03 03:04:04,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:04,861 INFO L93 Difference]: Finished difference Result 220 states and 285 transitions. [2018-12-03 03:04:04,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-03 03:04:04,862 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-12-03 03:04:04,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:04,863 INFO L225 Difference]: With dead ends: 220 [2018-12-03 03:04:04,863 INFO L226 Difference]: Without dead ends: 190 [2018-12-03 03:04:04,863 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-12-03 03:04:04,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-12-03 03:04:04,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 170. [2018-12-03 03:04:04,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-12-03 03:04:04,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 214 transitions. [2018-12-03 03:04:04,877 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 214 transitions. Word has length 42 [2018-12-03 03:04:04,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:04,878 INFO L480 AbstractCegarLoop]: Abstraction has 170 states and 214 transitions. [2018-12-03 03:04:04,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 03:04:04,878 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 214 transitions. [2018-12-03 03:04:04,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:04,879 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:04,879 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:04,879 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:04,879 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:04,879 INFO L82 PathProgramCache]: Analyzing trace with hash 487665268, now seen corresponding path program 1 times [2018-12-03 03:04:04,879 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:04,879 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:04,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:04,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:04,932 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:04,967 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:04:04,967 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:04,969 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:04,969 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 03:04:04,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 03:04:04,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 03:04:04,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 03:04:04,970 INFO L87 Difference]: Start difference. First operand 170 states and 214 transitions. Second operand 6 states. [2018-12-03 03:04:06,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:06,223 INFO L93 Difference]: Finished difference Result 215 states and 269 transitions. [2018-12-03 03:04:06,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 03:04:06,224 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-03 03:04:06,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:06,225 INFO L225 Difference]: With dead ends: 215 [2018-12-03 03:04:06,225 INFO L226 Difference]: Without dead ends: 213 [2018-12-03 03:04:06,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-03 03:04:06,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-12-03 03:04:06,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 176. [2018-12-03 03:04:06,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-12-03 03:04:06,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 221 transitions. [2018-12-03 03:04:06,235 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 221 transitions. Word has length 42 [2018-12-03 03:04:06,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:06,235 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 221 transitions. [2018-12-03 03:04:06,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 03:04:06,235 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 221 transitions. [2018-12-03 03:04:06,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-03 03:04:06,236 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:06,236 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:06,236 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:06,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:06,236 INFO L82 PathProgramCache]: Analyzing trace with hash 544923570, now seen corresponding path program 2 times [2018-12-03 03:04:06,237 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:06,237 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:06,249 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:04:06,273 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-03 03:04:06,274 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:04:06,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:06,305 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:04:06,305 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:06,307 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:06,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 03:04:06,307 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 03:04:06,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 03:04:06,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 03:04:06,307 INFO L87 Difference]: Start difference. First operand 176 states and 221 transitions. Second operand 6 states. [2018-12-03 03:04:08,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:08,384 INFO L93 Difference]: Finished difference Result 182 states and 226 transitions. [2018-12-03 03:04:08,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 03:04:08,385 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-03 03:04:08,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:08,386 INFO L225 Difference]: With dead ends: 182 [2018-12-03 03:04:08,386 INFO L226 Difference]: Without dead ends: 180 [2018-12-03 03:04:08,386 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-03 03:04:08,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-12-03 03:04:08,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 174. [2018-12-03 03:04:08,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-12-03 03:04:08,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 217 transitions. [2018-12-03 03:04:08,396 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 217 transitions. Word has length 42 [2018-12-03 03:04:08,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:08,397 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 217 transitions. [2018-12-03 03:04:08,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 03:04:08,397 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 217 transitions. [2018-12-03 03:04:08,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-03 03:04:08,397 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:08,397 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:08,398 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:08,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:08,398 INFO L82 PathProgramCache]: Analyzing trace with hash -1597355174, now seen corresponding path program 1 times [2018-12-03 03:04:08,398 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:08,398 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:08,418 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:04:08,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:08,436 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:08,475 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:08,475 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:08,530 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:08,532 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:08,532 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:08,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:08,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:08,547 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:08,564 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:08,564 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:08,617 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:08,632 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:08,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 10 [2018-12-03 03:04:08,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 03:04:08,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 03:04:08,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-03 03:04:08,634 INFO L87 Difference]: Start difference. First operand 174 states and 217 transitions. Second operand 10 states. [2018-12-03 03:04:08,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:08,785 INFO L93 Difference]: Finished difference Result 231 states and 295 transitions. [2018-12-03 03:04:08,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:04:08,786 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 47 [2018-12-03 03:04:08,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:08,787 INFO L225 Difference]: With dead ends: 231 [2018-12-03 03:04:08,787 INFO L226 Difference]: Without dead ends: 220 [2018-12-03 03:04:08,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 174 SyntacticMatches, 7 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-12-03 03:04:08,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-12-03 03:04:08,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 188. [2018-12-03 03:04:08,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-12-03 03:04:08,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 236 transitions. [2018-12-03 03:04:08,805 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 236 transitions. Word has length 47 [2018-12-03 03:04:08,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:08,805 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 236 transitions. [2018-12-03 03:04:08,805 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 03:04:08,805 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 236 transitions. [2018-12-03 03:04:08,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-03 03:04:08,806 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:08,806 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:08,806 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:08,806 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:08,806 INFO L82 PathProgramCache]: Analyzing trace with hash -896290596, now seen corresponding path program 1 times [2018-12-03 03:04:08,807 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:08,807 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:08,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:08,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:08,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:08,903 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:08,904 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:09,010 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:09,011 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:09,011 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:09,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:09,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:09,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:09,068 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:09,068 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:09,084 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:04:09,084 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [10, 10] total 17 [2018-12-03 03:04:09,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-03 03:04:09,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-03 03:04:09,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:04:09,084 INFO L87 Difference]: Start difference. First operand 188 states and 236 transitions. Second operand 17 states. [2018-12-03 03:04:09,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:09,352 INFO L93 Difference]: Finished difference Result 257 states and 326 transitions. [2018-12-03 03:04:09,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:04:09,353 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-12-03 03:04:09,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:09,354 INFO L225 Difference]: With dead ends: 257 [2018-12-03 03:04:09,354 INFO L226 Difference]: Without dead ends: 250 [2018-12-03 03:04:09,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 124 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=539, Unknown=0, NotChecked=0, Total=650 [2018-12-03 03:04:09,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-12-03 03:04:09,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 207. [2018-12-03 03:04:09,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-03 03:04:09,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 262 transitions. [2018-12-03 03:04:09,368 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 262 transitions. Word has length 47 [2018-12-03 03:04:09,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:09,368 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 262 transitions. [2018-12-03 03:04:09,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-03 03:04:09,368 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 262 transitions. [2018-12-03 03:04:09,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-03 03:04:09,369 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:09,369 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:09,370 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:09,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:09,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1716473666, now seen corresponding path program 1 times [2018-12-03 03:04:09,370 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:09,370 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:09,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:09,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:09,405 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:09,447 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:09,447 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:09,562 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:09,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:09,564 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:09,569 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:09,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:09,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:09,644 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:09,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:09,697 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:09,713 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:09,714 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 11, 11] total 21 [2018-12-03 03:04:09,714 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-03 03:04:09,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-03 03:04:09,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2018-12-03 03:04:09,715 INFO L87 Difference]: Start difference. First operand 207 states and 262 transitions. Second operand 21 states. [2018-12-03 03:04:10,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:10,214 INFO L93 Difference]: Finished difference Result 304 states and 389 transitions. [2018-12-03 03:04:10,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-03 03:04:10,215 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-12-03 03:04:10,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:10,216 INFO L225 Difference]: With dead ends: 304 [2018-12-03 03:04:10,216 INFO L226 Difference]: Without dead ends: 271 [2018-12-03 03:04:10,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=132, Invalid=798, Unknown=0, NotChecked=0, Total=930 [2018-12-03 03:04:10,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-12-03 03:04:10,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 228. [2018-12-03 03:04:10,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-12-03 03:04:10,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 289 transitions. [2018-12-03 03:04:10,230 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 289 transitions. Word has length 49 [2018-12-03 03:04:10,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:10,231 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 289 transitions. [2018-12-03 03:04:10,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-03 03:04:10,231 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 289 transitions. [2018-12-03 03:04:10,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-03 03:04:10,232 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:10,232 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:10,232 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:10,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:10,232 INFO L82 PathProgramCache]: Analyzing trace with hash 1773731968, now seen corresponding path program 1 times [2018-12-03 03:04:10,232 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:10,232 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:10,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:10,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:10,278 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:10,289 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-03 03:04:10,290 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:10,291 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:10,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 03:04:10,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 03:04:10,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 03:04:10,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 03:04:10,292 INFO L87 Difference]: Start difference. First operand 228 states and 289 transitions. Second operand 6 states. [2018-12-03 03:04:10,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:10,335 INFO L93 Difference]: Finished difference Result 236 states and 296 transitions. [2018-12-03 03:04:10,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 03:04:10,335 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 49 [2018-12-03 03:04:10,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:10,336 INFO L225 Difference]: With dead ends: 236 [2018-12-03 03:04:10,337 INFO L226 Difference]: Without dead ends: 209 [2018-12-03 03:04:10,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-03 03:04:10,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-12-03 03:04:10,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 201. [2018-12-03 03:04:10,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-12-03 03:04:10,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 253 transitions. [2018-12-03 03:04:10,348 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 253 transitions. Word has length 49 [2018-12-03 03:04:10,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:10,349 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 253 transitions. [2018-12-03 03:04:10,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 03:04:10,349 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 253 transitions. [2018-12-03 03:04:10,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-03 03:04:10,350 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:10,350 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:10,350 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:10,350 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:10,350 INFO L82 PathProgramCache]: Analyzing trace with hash 2005355055, now seen corresponding path program 1 times [2018-12-03 03:04:10,350 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:10,350 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:10,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:10,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:10,400 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:10,479 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:04:10,479 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:10,481 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:10,481 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-03 03:04:10,482 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-03 03:04:10,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-03 03:04:10,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-12-03 03:04:10,482 INFO L87 Difference]: Start difference. First operand 201 states and 253 transitions. Second operand 13 states. [2018-12-03 03:04:10,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:10,641 INFO L93 Difference]: Finished difference Result 256 states and 323 transitions. [2018-12-03 03:04:10,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 03:04:10,641 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 50 [2018-12-03 03:04:10,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:10,642 INFO L225 Difference]: With dead ends: 256 [2018-12-03 03:04:10,642 INFO L226 Difference]: Without dead ends: 221 [2018-12-03 03:04:10,643 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:04:10,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-12-03 03:04:10,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 197. [2018-12-03 03:04:10,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-12-03 03:04:10,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 243 transitions. [2018-12-03 03:04:10,654 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 243 transitions. Word has length 50 [2018-12-03 03:04:10,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:10,654 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 243 transitions. [2018-12-03 03:04:10,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-03 03:04:10,654 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 243 transitions. [2018-12-03 03:04:10,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-03 03:04:10,655 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:10,655 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:10,656 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:10,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:10,656 INFO L82 PathProgramCache]: Analyzing trace with hash -802652045, now seen corresponding path program 1 times [2018-12-03 03:04:10,656 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:10,656 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:10,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:10,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:10,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:10,815 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:10,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:10,923 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:10,923 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:10,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:10,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:10,952 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:10,999 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:10,999 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:11,076 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:04:11,076 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-03 03:04:11,076 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:04:11,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:04:11,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-12-03 03:04:11,077 INFO L87 Difference]: Start difference. First operand 197 states and 243 transitions. Second operand 11 states. [2018-12-03 03:04:14,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:14,157 INFO L93 Difference]: Finished difference Result 265 states and 330 transitions. [2018-12-03 03:04:14,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 03:04:14,157 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2018-12-03 03:04:14,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:14,158 INFO L225 Difference]: With dead ends: 265 [2018-12-03 03:04:14,158 INFO L226 Difference]: Without dead ends: 220 [2018-12-03 03:04:14,159 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 101 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-12-03 03:04:14,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-12-03 03:04:14,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 195. [2018-12-03 03:04:14,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-12-03 03:04:14,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 239 transitions. [2018-12-03 03:04:14,170 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 239 transitions. Word has length 50 [2018-12-03 03:04:14,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:14,171 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 239 transitions. [2018-12-03 03:04:14,171 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:04:14,171 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 239 transitions. [2018-12-03 03:04:14,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-03 03:04:14,172 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:14,172 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:14,172 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:14,172 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:14,172 INFO L82 PathProgramCache]: Analyzing trace with hash -526602707, now seen corresponding path program 1 times [2018-12-03 03:04:14,172 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:14,172 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:14,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:14,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:14,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:16,337 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-03 03:04:16,337 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:16,338 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:16,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-03 03:04:16,339 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-03 03:04:16,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-03 03:04:16,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=110, Unknown=1, NotChecked=0, Total=132 [2018-12-03 03:04:16,339 INFO L87 Difference]: Start difference. First operand 195 states and 239 transitions. Second operand 12 states. [2018-12-03 03:04:24,566 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 25 [2018-12-03 03:04:29,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:29,728 INFO L93 Difference]: Finished difference Result 270 states and 332 transitions. [2018-12-03 03:04:29,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-03 03:04:29,728 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 50 [2018-12-03 03:04:29,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:29,729 INFO L225 Difference]: With dead ends: 270 [2018-12-03 03:04:29,729 INFO L226 Difference]: Without dead ends: 225 [2018-12-03 03:04:29,729 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=101, Invalid=401, Unknown=4, NotChecked=0, Total=506 [2018-12-03 03:04:29,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-12-03 03:04:29,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 193. [2018-12-03 03:04:29,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-12-03 03:04:29,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 235 transitions. [2018-12-03 03:04:29,740 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 235 transitions. Word has length 50 [2018-12-03 03:04:29,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:29,740 INFO L480 AbstractCegarLoop]: Abstraction has 193 states and 235 transitions. [2018-12-03 03:04:29,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-03 03:04:29,740 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 235 transitions. [2018-12-03 03:04:29,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-03 03:04:29,740 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:29,740 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:29,740 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:29,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:29,741 INFO L82 PathProgramCache]: Analyzing trace with hash 960357489, now seen corresponding path program 1 times [2018-12-03 03:04:29,741 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:29,741 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:29,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:29,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:29,791 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:33,318 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:04:33,318 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:33,320 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:33,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 03:04:33,320 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 03:04:33,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 03:04:33,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-03 03:04:33,320 INFO L87 Difference]: Start difference. First operand 193 states and 235 transitions. Second operand 8 states. [2018-12-03 03:04:39,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:39,586 INFO L93 Difference]: Finished difference Result 213 states and 261 transitions. [2018-12-03 03:04:39,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 03:04:39,587 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 50 [2018-12-03 03:04:39,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:39,588 INFO L225 Difference]: With dead ends: 213 [2018-12-03 03:04:39,588 INFO L226 Difference]: Without dead ends: 211 [2018-12-03 03:04:39,589 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-12-03 03:04:39,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-12-03 03:04:39,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 198. [2018-12-03 03:04:39,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-12-03 03:04:39,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 240 transitions. [2018-12-03 03:04:39,600 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 240 transitions. Word has length 50 [2018-12-03 03:04:39,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:39,600 INFO L480 AbstractCegarLoop]: Abstraction has 198 states and 240 transitions. [2018-12-03 03:04:39,600 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 03:04:39,600 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 240 transitions. [2018-12-03 03:04:39,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 03:04:39,601 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:39,601 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:39,601 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:39,601 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:39,601 INFO L82 PathProgramCache]: Analyzing trace with hash -614439095, now seen corresponding path program 1 times [2018-12-03 03:04:39,602 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:39,602 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:39,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:39,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:39,629 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:39,691 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:39,691 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:39,815 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:39,816 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:39,816 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:39,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:39,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:39,834 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:39,836 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:39,836 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:39,916 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:39,931 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:39,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-12-03 03:04:39,931 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-03 03:04:39,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-03 03:04:39,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-03 03:04:39,932 INFO L87 Difference]: Start difference. First operand 198 states and 240 transitions. Second operand 16 states. [2018-12-03 03:04:40,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:40,315 INFO L93 Difference]: Finished difference Result 245 states and 319 transitions. [2018-12-03 03:04:40,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-03 03:04:40,315 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 51 [2018-12-03 03:04:40,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:40,317 INFO L225 Difference]: With dead ends: 245 [2018-12-03 03:04:40,317 INFO L226 Difference]: Without dead ends: 236 [2018-12-03 03:04:40,317 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 184 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2018-12-03 03:04:40,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-12-03 03:04:40,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 206. [2018-12-03 03:04:40,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-12-03 03:04:40,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 255 transitions. [2018-12-03 03:04:40,339 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 255 transitions. Word has length 51 [2018-12-03 03:04:40,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:40,339 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 255 transitions. [2018-12-03 03:04:40,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-03 03:04:40,339 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 255 transitions. [2018-12-03 03:04:40,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 03:04:40,340 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:40,340 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:40,341 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:40,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:40,341 INFO L82 PathProgramCache]: Analyzing trace with hash 1494907781, now seen corresponding path program 1 times [2018-12-03 03:04:40,341 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:40,341 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:40,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:40,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:40,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:40,502 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:40,502 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:40,785 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:40,786 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:40,786 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:40,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:04:40,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:40,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:40,809 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:40,809 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:40,890 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:40,904 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:40,904 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-03 03:04:40,905 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-03 03:04:40,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-03 03:04:40,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:04:40,905 INFO L87 Difference]: Start difference. First operand 206 states and 255 transitions. Second operand 24 states. [2018-12-03 03:04:42,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:42,057 INFO L93 Difference]: Finished difference Result 269 states and 366 transitions. [2018-12-03 03:04:42,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-03 03:04:42,058 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-03 03:04:42,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:42,059 INFO L225 Difference]: With dead ends: 269 [2018-12-03 03:04:42,059 INFO L226 Difference]: Without dead ends: 235 [2018-12-03 03:04:42,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 177 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=199, Invalid=1361, Unknown=0, NotChecked=0, Total=1560 [2018-12-03 03:04:42,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-12-03 03:04:42,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 195. [2018-12-03 03:04:42,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-12-03 03:04:42,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 254 transitions. [2018-12-03 03:04:42,080 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 254 transitions. Word has length 51 [2018-12-03 03:04:42,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:42,080 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 254 transitions. [2018-12-03 03:04:42,080 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-03 03:04:42,080 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 254 transitions. [2018-12-03 03:04:42,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 03:04:42,081 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:42,081 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:42,081 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:42,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:42,081 INFO L82 PathProgramCache]: Analyzing trace with hash 32918923, now seen corresponding path program 2 times [2018-12-03 03:04:42,081 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:42,081 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:42,102 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:04:42,116 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:04:42,116 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:04:42,117 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:42,177 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:42,178 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:42,282 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:42,283 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:42,283 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:42,289 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:04:42,300 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:04:42,300 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:04:42,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:42,304 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:42,304 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:42,375 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-03 03:04:42,389 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:42,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 14 [2018-12-03 03:04:42,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-03 03:04:42,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-03 03:04:42,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-12-03 03:04:42,390 INFO L87 Difference]: Start difference. First operand 195 states and 254 transitions. Second operand 14 states. [2018-12-03 03:04:42,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:42,813 INFO L93 Difference]: Finished difference Result 233 states and 325 transitions. [2018-12-03 03:04:42,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:04:42,814 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 51 [2018-12-03 03:04:42,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:42,814 INFO L225 Difference]: With dead ends: 233 [2018-12-03 03:04:42,814 INFO L226 Difference]: Without dead ends: 226 [2018-12-03 03:04:42,815 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 188 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2018-12-03 03:04:42,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-12-03 03:04:42,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 199. [2018-12-03 03:04:42,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-12-03 03:04:42,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 260 transitions. [2018-12-03 03:04:42,832 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 260 transitions. Word has length 51 [2018-12-03 03:04:42,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:42,832 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 260 transitions. [2018-12-03 03:04:42,832 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-03 03:04:42,832 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 260 transitions. [2018-12-03 03:04:42,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 03:04:42,832 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:42,833 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:42,833 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:42,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:42,833 INFO L82 PathProgramCache]: Analyzing trace with hash 1866743247, now seen corresponding path program 2 times [2018-12-03 03:04:42,833 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:42,833 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:42,846 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:04:42,862 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:04:42,862 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:04:42,863 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:42,935 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:42,935 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:43,253 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:43,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:04:43,254 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:04:43,263 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:04:43,290 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:04:43,290 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:04:43,292 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:43,296 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:43,296 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:04:43,401 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-03 03:04:43,416 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:04:43,416 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-03 03:04:43,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-03 03:04:43,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-03 03:04:43,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:04:43,417 INFO L87 Difference]: Start difference. First operand 199 states and 260 transitions. Second operand 24 states. [2018-12-03 03:04:44,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:04:44,496 INFO L93 Difference]: Finished difference Result 247 states and 329 transitions. [2018-12-03 03:04:44,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-03 03:04:44,496 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-03 03:04:44,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:04:44,497 INFO L225 Difference]: With dead ends: 247 [2018-12-03 03:04:44,497 INFO L226 Difference]: Without dead ends: 214 [2018-12-03 03:04:44,497 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 177 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=184, Invalid=1298, Unknown=0, NotChecked=0, Total=1482 [2018-12-03 03:04:44,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-12-03 03:04:44,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 179. [2018-12-03 03:04:44,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-12-03 03:04:44,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 234 transitions. [2018-12-03 03:04:44,512 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 234 transitions. Word has length 51 [2018-12-03 03:04:44,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:04:44,512 INFO L480 AbstractCegarLoop]: Abstraction has 179 states and 234 transitions. [2018-12-03 03:04:44,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-03 03:04:44,512 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 234 transitions. [2018-12-03 03:04:44,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-03 03:04:44,512 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:04:44,512 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:04:44,512 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:04:44,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:04:44,513 INFO L82 PathProgramCache]: Analyzing trace with hash -528325640, now seen corresponding path program 1 times [2018-12-03 03:04:44,513 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:04:44,513 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:04:44,528 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:04:44,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:04:44,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:04:54,378 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:04:54,378 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:04:54,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:04:54,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 03:04:54,380 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 03:04:54,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 03:04:54,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=38, Unknown=4, NotChecked=0, Total=56 [2018-12-03 03:04:54,380 INFO L87 Difference]: Start difference. First operand 179 states and 234 transitions. Second operand 8 states. [2018-12-03 03:05:12,223 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-03 03:05:23,718 WARN L180 SmtUtils]: Spent 6.17 s on a formula simplification. DAG size of input: 27 DAG size of output: 21 [2018-12-03 03:05:28,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:28,124 INFO L93 Difference]: Finished difference Result 195 states and 254 transitions. [2018-12-03 03:05:28,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:05:28,125 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-12-03 03:05:28,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:28,126 INFO L225 Difference]: With dead ends: 195 [2018-12-03 03:05:28,126 INFO L226 Difference]: Without dead ends: 191 [2018-12-03 03:05:28,126 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 22.0s TimeCoverageRelationStatistics Valid=28, Invalid=76, Unknown=6, NotChecked=0, Total=110 [2018-12-03 03:05:28,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-12-03 03:05:28,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 176. [2018-12-03 03:05:28,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-12-03 03:05:28,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 230 transitions. [2018-12-03 03:05:28,146 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 230 transitions. Word has length 51 [2018-12-03 03:05:28,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:28,146 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 230 transitions. [2018-12-03 03:05:28,146 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 03:05:28,146 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 230 transitions. [2018-12-03 03:05:28,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-03 03:05:28,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:28,147 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:28,147 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:28,147 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:28,147 INFO L82 PathProgramCache]: Analyzing trace with hash -1162373086, now seen corresponding path program 1 times [2018-12-03 03:05:28,147 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:28,148 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:28,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:28,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:28,176 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:28,220 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:05:28,220 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:05:28,221 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:05:28,222 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-03 03:05:28,222 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 03:05:28,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 03:05:28,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-03 03:05:28,222 INFO L87 Difference]: Start difference. First operand 176 states and 230 transitions. Second operand 9 states. [2018-12-03 03:05:28,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:28,353 INFO L93 Difference]: Finished difference Result 215 states and 303 transitions. [2018-12-03 03:05:28,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:05:28,354 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 57 [2018-12-03 03:05:28,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:28,354 INFO L225 Difference]: With dead ends: 215 [2018-12-03 03:05:28,355 INFO L226 Difference]: Without dead ends: 206 [2018-12-03 03:05:28,355 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:05:28,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-03 03:05:28,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 181. [2018-12-03 03:05:28,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-12-03 03:05:28,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 244 transitions. [2018-12-03 03:05:28,380 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 244 transitions. Word has length 57 [2018-12-03 03:05:28,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:28,381 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 244 transitions. [2018-12-03 03:05:28,381 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 03:05:28,381 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 244 transitions. [2018-12-03 03:05:28,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-03 03:05:28,381 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:28,382 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:28,382 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:28,382 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:28,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1304588962, now seen corresponding path program 1 times [2018-12-03 03:05:28,382 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:28,382 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:28,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:28,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:28,413 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:28,434 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:05:28,434 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:05:28,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:05:28,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 03:05:28,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 03:05:28,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 03:05:28,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 03:05:28,436 INFO L87 Difference]: Start difference. First operand 181 states and 244 transitions. Second operand 5 states. [2018-12-03 03:05:28,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:28,513 INFO L93 Difference]: Finished difference Result 220 states and 326 transitions. [2018-12-03 03:05:28,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 03:05:28,514 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 57 [2018-12-03 03:05:28,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:28,515 INFO L225 Difference]: With dead ends: 220 [2018-12-03 03:05:28,515 INFO L226 Difference]: Without dead ends: 209 [2018-12-03 03:05:28,515 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 03:05:28,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-12-03 03:05:28,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 202. [2018-12-03 03:05:28,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-12-03 03:05:28,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 289 transitions. [2018-12-03 03:05:28,536 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 289 transitions. Word has length 57 [2018-12-03 03:05:28,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:28,536 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 289 transitions. [2018-12-03 03:05:28,536 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 03:05:28,536 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 289 transitions. [2018-12-03 03:05:28,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-03 03:05:28,537 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:28,537 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:28,537 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:28,538 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:28,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1712427967, now seen corresponding path program 1 times [2018-12-03 03:05:28,538 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:28,538 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:28,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:28,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:28,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:28,642 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:05:28,642 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:28,786 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:05:28,787 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:28,787 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:28,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:28,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:28,806 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:28,810 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:05:28,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:28,880 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-03 03:05:28,895 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:28,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 18 [2018-12-03 03:05:28,895 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-03 03:05:28,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-03 03:05:28,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-12-03 03:05:28,896 INFO L87 Difference]: Start difference. First operand 202 states and 289 transitions. Second operand 18 states. [2018-12-03 03:05:29,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:29,165 INFO L93 Difference]: Finished difference Result 231 states and 327 transitions. [2018-12-03 03:05:29,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 03:05:29,166 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 64 [2018-12-03 03:05:29,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:29,167 INFO L225 Difference]: With dead ends: 231 [2018-12-03 03:05:29,167 INFO L226 Difference]: Without dead ends: 222 [2018-12-03 03:05:29,168 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-12-03 03:05:29,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-12-03 03:05:29,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 207. [2018-12-03 03:05:29,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-03 03:05:29,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 295 transitions. [2018-12-03 03:05:29,194 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 295 transitions. Word has length 64 [2018-12-03 03:05:29,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:29,194 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 295 transitions. [2018-12-03 03:05:29,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-03 03:05:29,194 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 295 transitions. [2018-12-03 03:05:29,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-03 03:05:29,195 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:29,195 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:29,196 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:29,196 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:29,196 INFO L82 PathProgramCache]: Analyzing trace with hash -1835326830, now seen corresponding path program 1 times [2018-12-03 03:05:29,196 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:29,196 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:29,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:29,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:29,230 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:29,261 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,261 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:29,320 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,321 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:29,321 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:29,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:29,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:29,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:29,341 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,341 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:29,388 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,403 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:29,403 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-03 03:05:29,403 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:05:29,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:05:29,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:05:29,403 INFO L87 Difference]: Start difference. First operand 207 states and 295 transitions. Second operand 11 states. [2018-12-03 03:05:29,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:29,545 INFO L93 Difference]: Finished difference Result 225 states and 317 transitions. [2018-12-03 03:05:29,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 03:05:29,546 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2018-12-03 03:05:29,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:29,546 INFO L225 Difference]: With dead ends: 225 [2018-12-03 03:05:29,546 INFO L226 Difference]: Without dead ends: 207 [2018-12-03 03:05:29,547 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-03 03:05:29,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-12-03 03:05:29,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-12-03 03:05:29,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-03 03:05:29,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 293 transitions. [2018-12-03 03:05:29,566 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 293 transitions. Word has length 64 [2018-12-03 03:05:29,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:29,566 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 293 transitions. [2018-12-03 03:05:29,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:05:29,566 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 293 transitions. [2018-12-03 03:05:29,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-03 03:05:29,566 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:29,567 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:29,567 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:29,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:29,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1527151470, now seen corresponding path program 2 times [2018-12-03 03:05:29,567 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:29,567 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:29,587 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:29,629 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:29,629 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:29,631 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:29,665 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,665 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:29,731 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,732 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:29,732 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:29,738 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:29,752 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:29,752 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:29,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:29,756 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,756 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:29,796 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-03 03:05:29,811 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:29,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-03 03:05:29,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:05:29,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:05:29,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:05:29,812 INFO L87 Difference]: Start difference. First operand 207 states and 293 transitions. Second operand 11 states. [2018-12-03 03:05:29,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:29,954 INFO L93 Difference]: Finished difference Result 220 states and 311 transitions. [2018-12-03 03:05:29,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:05:29,954 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2018-12-03 03:05:29,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:29,955 INFO L225 Difference]: With dead ends: 220 [2018-12-03 03:05:29,955 INFO L226 Difference]: Without dead ends: 202 [2018-12-03 03:05:29,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-12-03 03:05:29,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-12-03 03:05:29,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2018-12-03 03:05:29,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-12-03 03:05:29,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 284 transitions. [2018-12-03 03:05:29,976 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 284 transitions. Word has length 64 [2018-12-03 03:05:29,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:29,976 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 284 transitions. [2018-12-03 03:05:29,976 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:05:29,976 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 284 transitions. [2018-12-03 03:05:29,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-03 03:05:29,977 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:29,978 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:29,978 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:29,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:29,978 INFO L82 PathProgramCache]: Analyzing trace with hash 218346458, now seen corresponding path program 1 times [2018-12-03 03:05:29,978 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:29,978 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:29,991 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:05:30,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:30,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:30,043 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,044 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:30,101 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,102 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:30,102 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:30,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:30,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:30,120 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:30,123 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:30,173 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,188 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:30,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-03 03:05:30,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:05:30,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:05:30,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:05:30,188 INFO L87 Difference]: Start difference. First operand 202 states and 284 transitions. Second operand 11 states. [2018-12-03 03:05:30,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:30,319 INFO L93 Difference]: Finished difference Result 213 states and 295 transitions. [2018-12-03 03:05:30,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 03:05:30,320 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-03 03:05:30,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:30,320 INFO L225 Difference]: With dead ends: 213 [2018-12-03 03:05:30,320 INFO L226 Difference]: Without dead ends: 199 [2018-12-03 03:05:30,321 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-03 03:05:30,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-12-03 03:05:30,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2018-12-03 03:05:30,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-12-03 03:05:30,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 278 transitions. [2018-12-03 03:05:30,338 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 278 transitions. Word has length 66 [2018-12-03 03:05:30,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:30,338 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 278 transitions. [2018-12-03 03:05:30,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:05:30,338 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 278 transitions. [2018-12-03 03:05:30,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-03 03:05:30,339 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:30,339 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:30,339 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:30,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:30,339 INFO L82 PathProgramCache]: Analyzing trace with hash 166673046, now seen corresponding path program 2 times [2018-12-03 03:05:30,339 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:30,339 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:30,354 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:30,386 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:30,387 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:30,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:30,425 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:30,512 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,514 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:30,514 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:30,520 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:30,534 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:30,534 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:30,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:30,539 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,539 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:30,590 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:05:30,604 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:30,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-03 03:05:30,605 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:05:30,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:05:30,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:05:30,605 INFO L87 Difference]: Start difference. First operand 199 states and 278 transitions. Second operand 11 states. [2018-12-03 03:05:30,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:30,734 INFO L93 Difference]: Finished difference Result 210 states and 289 transitions. [2018-12-03 03:05:30,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 03:05:30,735 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-03 03:05:30,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:30,735 INFO L225 Difference]: With dead ends: 210 [2018-12-03 03:05:30,736 INFO L226 Difference]: Without dead ends: 196 [2018-12-03 03:05:30,736 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-12-03 03:05:30,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-12-03 03:05:30,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 194. [2018-12-03 03:05:30,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-12-03 03:05:30,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 261 transitions. [2018-12-03 03:05:30,754 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 261 transitions. Word has length 66 [2018-12-03 03:05:30,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:30,754 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 261 transitions. [2018-12-03 03:05:30,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:05:30,754 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 261 transitions. [2018-12-03 03:05:30,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-03 03:05:30,755 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:30,755 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:30,755 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:30,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:30,755 INFO L82 PathProgramCache]: Analyzing trace with hash -1109140964, now seen corresponding path program 1 times [2018-12-03 03:05:30,755 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:30,755 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:30,768 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:05:30,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:30,786 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:30,865 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:30,865 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:31,028 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:31,029 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:31,029 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:31,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:31,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:31,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:31,058 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:31,059 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:31,169 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:31,183 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:31,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-12-03 03:05:31,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-03 03:05:31,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-03 03:05:31,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-03 03:05:31,184 INFO L87 Difference]: Start difference. First operand 194 states and 261 transitions. Second operand 16 states. [2018-12-03 03:05:31,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:31,518 INFO L93 Difference]: Finished difference Result 212 states and 289 transitions. [2018-12-03 03:05:31,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 03:05:31,519 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 71 [2018-12-03 03:05:31,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:31,519 INFO L225 Difference]: With dead ends: 212 [2018-12-03 03:05:31,520 INFO L226 Difference]: Without dead ends: 169 [2018-12-03 03:05:31,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 265 SyntacticMatches, 6 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:05:31,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-03 03:05:31,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 159. [2018-12-03 03:05:31,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-03 03:05:31,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 227 transitions. [2018-12-03 03:05:31,542 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 227 transitions. Word has length 71 [2018-12-03 03:05:31,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:31,542 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 227 transitions. [2018-12-03 03:05:31,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-03 03:05:31,543 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 227 transitions. [2018-12-03 03:05:31,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-03 03:05:31,543 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:31,544 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:31,544 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:31,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:31,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1251533860, now seen corresponding path program 2 times [2018-12-03 03:05:31,544 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:31,544 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:31,558 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:31,595 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:31,596 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:31,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:31,739 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 10 proven. 8 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:31,739 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:32,038 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:32,038 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:32,044 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:32,061 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:32,061 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:32,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:32,138 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-03 03:05:32,138 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:05:32,152 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-03 03:05:32,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [15] total 20 [2018-12-03 03:05:32,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-03 03:05:32,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-03 03:05:32,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=454, Unknown=0, NotChecked=0, Total=506 [2018-12-03 03:05:32,153 INFO L87 Difference]: Start difference. First operand 159 states and 227 transitions. Second operand 20 states. [2018-12-03 03:05:33,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:33,114 INFO L93 Difference]: Finished difference Result 214 states and 282 transitions. [2018-12-03 03:05:33,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-03 03:05:33,115 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 71 [2018-12-03 03:05:33,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:33,115 INFO L225 Difference]: With dead ends: 214 [2018-12-03 03:05:33,115 INFO L226 Difference]: Without dead ends: 174 [2018-12-03 03:05:33,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=171, Invalid=1089, Unknown=0, NotChecked=0, Total=1260 [2018-12-03 03:05:33,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-12-03 03:05:33,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 151. [2018-12-03 03:05:33,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-03 03:05:33,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 206 transitions. [2018-12-03 03:05:33,130 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 206 transitions. Word has length 71 [2018-12-03 03:05:33,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:33,130 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 206 transitions. [2018-12-03 03:05:33,130 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-03 03:05:33,130 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 206 transitions. [2018-12-03 03:05:33,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-03 03:05:33,131 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:33,131 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:33,131 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:33,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:33,131 INFO L82 PathProgramCache]: Analyzing trace with hash 1043562547, now seen corresponding path program 1 times [2018-12-03 03:05:33,131 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:33,131 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:33,145 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:05:33,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:33,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:33,560 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:05:33,560 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:34,709 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:05:34,711 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:34,711 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:34,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:34,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:34,747 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:35,310 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:05:35,310 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:37,369 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:05:37,384 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:37,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13, 14] total 38 [2018-12-03 03:05:37,384 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-03 03:05:37,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-03 03:05:37,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1232, Unknown=0, NotChecked=0, Total=1406 [2018-12-03 03:05:37,385 INFO L87 Difference]: Start difference. First operand 151 states and 206 transitions. Second operand 38 states. [2018-12-03 03:05:38,054 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 48 [2018-12-03 03:05:38,517 WARN L180 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 45 [2018-12-03 03:05:38,992 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 43 [2018-12-03 03:05:39,477 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 46 [2018-12-03 03:05:39,755 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 45 [2018-12-03 03:05:40,023 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 47 [2018-12-03 03:05:41,227 WARN L180 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2018-12-03 03:05:42,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:42,366 INFO L93 Difference]: Finished difference Result 200 states and 283 transitions. [2018-12-03 03:05:42,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-03 03:05:42,367 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 71 [2018-12-03 03:05:42,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:42,367 INFO L225 Difference]: With dead ends: 200 [2018-12-03 03:05:42,367 INFO L226 Difference]: Without dead ends: 189 [2018-12-03 03:05:42,368 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 240 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 502 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=446, Invalid=2206, Unknown=0, NotChecked=0, Total=2652 [2018-12-03 03:05:42,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-12-03 03:05:42,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 163. [2018-12-03 03:05:42,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-03 03:05:42,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 230 transitions. [2018-12-03 03:05:42,386 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 230 transitions. Word has length 71 [2018-12-03 03:05:42,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:42,387 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 230 transitions. [2018-12-03 03:05:42,387 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-03 03:05:42,387 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 230 transitions. [2018-12-03 03:05:42,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-03 03:05:42,387 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:42,387 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:42,387 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:42,388 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:42,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1017205495, now seen corresponding path program 2 times [2018-12-03 03:05:42,388 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:42,388 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:42,402 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:42,470 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:42,470 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:42,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:42,819 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:05:42,820 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:44,017 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:05:44,018 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:44,018 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:44,024 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:05:44,055 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:05:44,055 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:05:44,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:44,623 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:05:44,623 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:44,746 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2018-12-03 03:05:46,663 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:05:46,678 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:05:46,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13, 14] total 38 [2018-12-03 03:05:46,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-03 03:05:46,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-03 03:05:46,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=1235, Unknown=0, NotChecked=0, Total=1406 [2018-12-03 03:05:46,679 INFO L87 Difference]: Start difference. First operand 163 states and 230 transitions. Second operand 38 states. [2018-12-03 03:05:47,327 WARN L180 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 47 [2018-12-03 03:05:48,060 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 44 [2018-12-03 03:05:48,675 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 43 [2018-12-03 03:05:48,899 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 38 [2018-12-03 03:05:49,236 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 46 [2018-12-03 03:05:49,607 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 45 [2018-12-03 03:05:49,944 WARN L180 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 50 [2018-12-03 03:05:50,778 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 36 [2018-12-03 03:05:51,050 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 48 [2018-12-03 03:05:51,629 WARN L180 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 55 [2018-12-03 03:05:52,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:52,363 INFO L93 Difference]: Finished difference Result 205 states and 290 transitions. [2018-12-03 03:05:52,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-03 03:05:52,364 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 71 [2018-12-03 03:05:52,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:52,365 INFO L225 Difference]: With dead ends: 205 [2018-12-03 03:05:52,365 INFO L226 Difference]: Without dead ends: 194 [2018-12-03 03:05:52,366 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 242 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 505 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=449, Invalid=2203, Unknown=0, NotChecked=0, Total=2652 [2018-12-03 03:05:52,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-12-03 03:05:52,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 173. [2018-12-03 03:05:52,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-03 03:05:52,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 247 transitions. [2018-12-03 03:05:52,387 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 247 transitions. Word has length 71 [2018-12-03 03:05:52,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:52,387 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 247 transitions. [2018-12-03 03:05:52,387 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-03 03:05:52,387 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 247 transitions. [2018-12-03 03:05:52,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-03 03:05:52,388 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:52,388 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:52,388 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:52,388 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:52,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1098580064, now seen corresponding path program 1 times [2018-12-03 03:05:52,388 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:52,389 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:52,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:05:52,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:52,420 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:52,519 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:05:52,519 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:52,592 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:52,592 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:52,598 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:52,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:52,651 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:53,766 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-03 03:05:53,766 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:05:53,780 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-03 03:05:53,780 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [13] total 29 [2018-12-03 03:05:53,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-03 03:05:53,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-03 03:05:53,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=785, Unknown=0, NotChecked=0, Total=870 [2018-12-03 03:05:53,781 INFO L87 Difference]: Start difference. First operand 173 states and 247 transitions. Second operand 29 states. [2018-12-03 03:05:55,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:05:55,587 INFO L93 Difference]: Finished difference Result 200 states and 276 transitions. [2018-12-03 03:05:55,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-03 03:05:55,588 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 71 [2018-12-03 03:05:55,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:05:55,589 INFO L225 Difference]: With dead ends: 200 [2018-12-03 03:05:55,589 INFO L226 Difference]: Without dead ends: 191 [2018-12-03 03:05:55,589 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=204, Invalid=1518, Unknown=0, NotChecked=0, Total=1722 [2018-12-03 03:05:55,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-12-03 03:05:55,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 173. [2018-12-03 03:05:55,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-03 03:05:55,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 246 transitions. [2018-12-03 03:05:55,610 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 246 transitions. Word has length 71 [2018-12-03 03:05:55,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:05:55,610 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 246 transitions. [2018-12-03 03:05:55,610 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-03 03:05:55,610 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 246 transitions. [2018-12-03 03:05:55,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-03 03:05:55,610 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:05:55,610 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:05:55,611 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:05:55,611 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:05:55,611 INFO L82 PathProgramCache]: Analyzing trace with hash -1669060429, now seen corresponding path program 1 times [2018-12-03 03:05:55,611 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:05:55,611 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:05:55,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:55,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:55,697 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:56,277 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:05:56,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:56,556 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-12-03 03:05:57,521 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:05:57,522 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:05:57,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:05:57,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:05:57,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:05:58,639 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-03 03:05:58,639 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:05:58,881 WARN L180 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2018-12-03 03:05:59,326 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:05:59,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18] total 23 [2018-12-03 03:05:59,326 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-03 03:05:59,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-03 03:05:59,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=741, Unknown=0, NotChecked=0, Total=812 [2018-12-03 03:05:59,327 INFO L87 Difference]: Start difference. First operand 173 states and 246 transitions. Second operand 23 states. [2018-12-03 03:06:00,779 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 39 [2018-12-03 03:06:02,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:02,526 INFO L93 Difference]: Finished difference Result 202 states and 278 transitions. [2018-12-03 03:06:02,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-03 03:06:02,527 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 76 [2018-12-03 03:06:02,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:02,528 INFO L225 Difference]: With dead ends: 202 [2018-12-03 03:06:02,528 INFO L226 Difference]: Without dead ends: 186 [2018-12-03 03:06:02,529 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 142 SyntacticMatches, 5 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=161, Invalid=1321, Unknown=0, NotChecked=0, Total=1482 [2018-12-03 03:06:02,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-12-03 03:06:02,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 173. [2018-12-03 03:06:02,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-03 03:06:02,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 241 transitions. [2018-12-03 03:06:02,549 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 241 transitions. Word has length 76 [2018-12-03 03:06:02,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:02,550 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 241 transitions. [2018-12-03 03:06:02,550 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-03 03:06:02,550 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 241 transitions. [2018-12-03 03:06:02,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-03 03:06:02,551 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:02,551 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:02,551 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:02,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:02,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1038546648, now seen corresponding path program 1 times [2018-12-03 03:06:02,551 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:02,551 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:02,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:02,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:02,594 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:02,608 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-03 03:06:02,609 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:02,648 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-03 03:06:02,649 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:02,649 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:02,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:02,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:02,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:02,673 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-03 03:06:02,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:02,709 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-03 03:06:02,723 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:06:02,723 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6] total 6 [2018-12-03 03:06:02,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 03:06:02,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 03:06:02,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 03:06:02,724 INFO L87 Difference]: Start difference. First operand 173 states and 241 transitions. Second operand 6 states. [2018-12-03 03:06:02,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:02,767 INFO L93 Difference]: Finished difference Result 185 states and 253 transitions. [2018-12-03 03:06:02,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 03:06:02,767 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2018-12-03 03:06:02,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:02,768 INFO L225 Difference]: With dead ends: 185 [2018-12-03 03:06:02,768 INFO L226 Difference]: Without dead ends: 180 [2018-12-03 03:06:02,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 282 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-03 03:06:02,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-12-03 03:06:02,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 173. [2018-12-03 03:06:02,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-03 03:06:02,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 241 transitions. [2018-12-03 03:06:02,788 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 241 transitions. Word has length 73 [2018-12-03 03:06:02,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:02,788 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 241 transitions. [2018-12-03 03:06:02,788 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 03:06:02,788 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 241 transitions. [2018-12-03 03:06:02,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-03 03:06:02,789 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:02,789 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:02,789 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:02,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:02,789 INFO L82 PathProgramCache]: Analyzing trace with hash 1937569667, now seen corresponding path program 1 times [2018-12-03 03:06:02,789 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:02,790 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:02,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:02,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:02,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:03,187 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:03,187 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:04,315 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:06:04,316 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:04,316 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:04,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:04,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:04,352 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:04,361 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:04,361 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:04,695 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:06:04,709 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:06:04,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-12-03 03:06:04,710 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-03 03:06:04,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-03 03:06:04,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2018-12-03 03:06:04,710 INFO L87 Difference]: Start difference. First operand 173 states and 241 transitions. Second operand 22 states. [2018-12-03 03:06:05,195 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 41 [2018-12-03 03:06:05,700 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 38 [2018-12-03 03:06:06,053 WARN L180 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-03 03:06:06,407 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 43 [2018-12-03 03:06:07,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:07,326 INFO L93 Difference]: Finished difference Result 194 states and 263 transitions. [2018-12-03 03:06:07,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-03 03:06:07,326 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-12-03 03:06:07,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:07,327 INFO L225 Difference]: With dead ends: 194 [2018-12-03 03:06:07,327 INFO L226 Difference]: Without dead ends: 183 [2018-12-03 03:06:07,328 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=196, Invalid=796, Unknown=0, NotChecked=0, Total=992 [2018-12-03 03:06:07,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-12-03 03:06:07,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 173. [2018-12-03 03:06:07,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-03 03:06:07,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 239 transitions. [2018-12-03 03:06:07,348 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 239 transitions. Word has length 73 [2018-12-03 03:06:07,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:07,348 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 239 transitions. [2018-12-03 03:06:07,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-03 03:06:07,348 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 239 transitions. [2018-12-03 03:06:07,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-03 03:06:07,349 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:07,349 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:07,349 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:07,349 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:07,349 INFO L82 PathProgramCache]: Analyzing trace with hash -1573324402, now seen corresponding path program 1 times [2018-12-03 03:06:07,349 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:07,350 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 63 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:07,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:07,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:07,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:07,826 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-03 03:06:07,826 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:08,413 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-12-03 03:06:09,346 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 03:06:09,348 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:09,348 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:09,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:09,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:09,442 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:09,481 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-03 03:06:09,482 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:09,771 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-12-03 03:06:09,969 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 03:06:09,984 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:06:09,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 13, 15] total 24 [2018-12-03 03:06:09,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-03 03:06:09,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-03 03:06:09,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:06:09,985 INFO L87 Difference]: Start difference. First operand 173 states and 239 transitions. Second operand 24 states. [2018-12-03 03:06:13,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:13,100 INFO L93 Difference]: Finished difference Result 241 states and 314 transitions. [2018-12-03 03:06:13,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-03 03:06:13,101 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 77 [2018-12-03 03:06:13,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:13,102 INFO L225 Difference]: With dead ends: 241 [2018-12-03 03:06:13,102 INFO L226 Difference]: Without dead ends: 177 [2018-12-03 03:06:13,103 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 281 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=262, Invalid=1220, Unknown=0, NotChecked=0, Total=1482 [2018-12-03 03:06:13,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-03 03:06:13,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 166. [2018-12-03 03:06:13,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-12-03 03:06:13,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 228 transitions. [2018-12-03 03:06:13,124 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 228 transitions. Word has length 77 [2018-12-03 03:06:13,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:13,124 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 228 transitions. [2018-12-03 03:06:13,124 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-03 03:06:13,124 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 228 transitions. [2018-12-03 03:06:13,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-03 03:06:13,125 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:13,125 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:13,125 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:13,125 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:13,125 INFO L82 PathProgramCache]: Analyzing trace with hash -880217657, now seen corresponding path program 2 times [2018-12-03 03:06:13,125 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:13,125 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:13,141 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:13,208 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:13,208 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:13,210 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:13,523 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:13,523 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:14,640 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:06:14,641 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:14,641 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:14,652 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:14,684 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:14,684 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:14,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:14,699 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:14,699 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:15,021 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-03 03:06:15,035 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:06:15,036 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-12-03 03:06:15,036 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-03 03:06:15,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-03 03:06:15,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2018-12-03 03:06:15,036 INFO L87 Difference]: Start difference. First operand 166 states and 228 transitions. Second operand 22 states. [2018-12-03 03:06:15,537 WARN L180 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 41 [2018-12-03 03:06:15,970 WARN L180 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 38 [2018-12-03 03:06:16,249 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-03 03:06:16,459 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 43 [2018-12-03 03:06:17,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:17,396 INFO L93 Difference]: Finished difference Result 187 states and 250 transitions. [2018-12-03 03:06:17,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:06:17,398 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-12-03 03:06:17,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:17,398 INFO L225 Difference]: With dead ends: 187 [2018-12-03 03:06:17,398 INFO L226 Difference]: Without dead ends: 173 [2018-12-03 03:06:17,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=192, Invalid=800, Unknown=0, NotChecked=0, Total=992 [2018-12-03 03:06:17,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-03 03:06:17,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 163. [2018-12-03 03:06:17,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-03 03:06:17,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 219 transitions. [2018-12-03 03:06:17,418 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 219 transitions. Word has length 73 [2018-12-03 03:06:17,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:17,418 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 219 transitions. [2018-12-03 03:06:17,418 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-03 03:06:17,418 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 219 transitions. [2018-12-03 03:06:17,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-03 03:06:17,418 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:17,418 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:17,419 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:17,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:17,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1211717294, now seen corresponding path program 2 times [2018-12-03 03:06:17,419 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:17,419 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:17,431 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:17,502 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:17,502 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:17,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:17,841 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-03 03:06:17,841 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:19,718 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 03:06:19,720 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:19,720 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:19,730 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:19,811 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:19,811 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:19,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:20,542 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-03 03:06:20,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:20,779 WARN L180 SmtUtils]: Spent 221.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 57 [2018-12-03 03:06:22,073 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 41 [2018-12-03 03:06:23,293 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-03 03:06:23,308 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:06:23,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 16, 17] total 43 [2018-12-03 03:06:23,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-12-03 03:06:23,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-12-03 03:06:23,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=221, Invalid=1585, Unknown=0, NotChecked=0, Total=1806 [2018-12-03 03:06:23,309 INFO L87 Difference]: Start difference. First operand 163 states and 219 transitions. Second operand 43 states. [2018-12-03 03:06:24,691 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2018-12-03 03:06:25,030 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2018-12-03 03:06:26,919 WARN L180 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 35 [2018-12-03 03:06:28,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:28,852 INFO L93 Difference]: Finished difference Result 229 states and 295 transitions. [2018-12-03 03:06:28,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-03 03:06:28,852 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 77 [2018-12-03 03:06:28,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:28,853 INFO L225 Difference]: With dead ends: 229 [2018-12-03 03:06:28,853 INFO L226 Difference]: Without dead ends: 169 [2018-12-03 03:06:28,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 260 SyntacticMatches, 5 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 688 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=637, Invalid=3145, Unknown=0, NotChecked=0, Total=3782 [2018-12-03 03:06:28,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-03 03:06:28,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 148. [2018-12-03 03:06:28,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-03 03:06:28,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 195 transitions. [2018-12-03 03:06:28,870 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 195 transitions. Word has length 77 [2018-12-03 03:06:28,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:28,870 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 195 transitions. [2018-12-03 03:06:28,870 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-12-03 03:06:28,870 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 195 transitions. [2018-12-03 03:06:28,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-03 03:06:28,870 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:28,871 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:28,871 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:28,871 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:28,871 INFO L82 PathProgramCache]: Analyzing trace with hash 237463554, now seen corresponding path program 1 times [2018-12-03 03:06:28,871 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:28,871 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:28,883 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:06:28,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:28,903 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:28,919 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-03 03:06:28,919 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:06:28,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:06:28,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 03:06:28,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 03:06:28,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 03:06:28,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-03 03:06:28,921 INFO L87 Difference]: Start difference. First operand 148 states and 195 transitions. Second operand 6 states. [2018-12-03 03:06:28,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:28,961 INFO L93 Difference]: Finished difference Result 160 states and 207 transitions. [2018-12-03 03:06:28,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 03:06:28,962 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2018-12-03 03:06:28,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:28,962 INFO L225 Difference]: With dead ends: 160 [2018-12-03 03:06:28,962 INFO L226 Difference]: Without dead ends: 151 [2018-12-03 03:06:28,962 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 70 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-03 03:06:28,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-03 03:06:28,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 137. [2018-12-03 03:06:28,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-03 03:06:28,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 174 transitions. [2018-12-03 03:06:28,977 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 174 transitions. Word has length 75 [2018-12-03 03:06:28,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:28,977 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 174 transitions. [2018-12-03 03:06:28,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 03:06:28,977 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 174 transitions. [2018-12-03 03:06:28,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 03:06:28,978 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:28,978 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:28,978 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:28,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:28,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1637188566, now seen corresponding path program 1 times [2018-12-03 03:06:28,978 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:28,978 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 70 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:28,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:29,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:29,055 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:29,234 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:29,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:29,379 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:29,379 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:29,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:29,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:29,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:29,598 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 24 proven. 3 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:06:29,598 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:29,820 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:06:29,820 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15] total 15 [2018-12-03 03:06:29,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 03:06:29,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 03:06:29,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-03 03:06:29,820 INFO L87 Difference]: Start difference. First operand 137 states and 174 transitions. Second operand 15 states. [2018-12-03 03:06:30,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:30,781 INFO L93 Difference]: Finished difference Result 169 states and 214 transitions. [2018-12-03 03:06:30,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:06:30,782 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 80 [2018-12-03 03:06:30,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:30,782 INFO L225 Difference]: With dead ends: 169 [2018-12-03 03:06:30,782 INFO L226 Difference]: Without dead ends: 160 [2018-12-03 03:06:30,783 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 161 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=439, Unknown=0, NotChecked=0, Total=506 [2018-12-03 03:06:30,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-03 03:06:30,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 144. [2018-12-03 03:06:30,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-03 03:06:30,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 188 transitions. [2018-12-03 03:06:30,800 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 188 transitions. Word has length 80 [2018-12-03 03:06:30,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:30,800 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 188 transitions. [2018-12-03 03:06:30,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 03:06:30,800 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 188 transitions. [2018-12-03 03:06:30,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 03:06:30,800 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:30,800 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:30,800 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:30,806 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:30,806 INFO L82 PathProgramCache]: Analyzing trace with hash -734550696, now seen corresponding path program 1 times [2018-12-03 03:06:30,806 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:30,807 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:30,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:30,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:30,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:33,921 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:33,921 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:34,308 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:34,308 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:34,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:34,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:34,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:34,459 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-03 03:06:34,459 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:34,660 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-12-03 03:06:34,977 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:06:34,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 14 [2018-12-03 03:06:34,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-03 03:06:34,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-03 03:06:34,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=180, Unknown=1, NotChecked=0, Total=210 [2018-12-03 03:06:34,977 INFO L87 Difference]: Start difference. First operand 144 states and 188 transitions. Second operand 14 states. [2018-12-03 03:06:45,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:45,320 INFO L93 Difference]: Finished difference Result 171 states and 215 transitions. [2018-12-03 03:06:45,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 03:06:45,321 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 80 [2018-12-03 03:06:45,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:45,322 INFO L225 Difference]: With dead ends: 171 [2018-12-03 03:06:45,322 INFO L226 Difference]: Without dead ends: 162 [2018-12-03 03:06:45,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=65, Invalid=395, Unknown=2, NotChecked=0, Total=462 [2018-12-03 03:06:45,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-03 03:06:45,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 144. [2018-12-03 03:06:45,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-03 03:06:45,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 187 transitions. [2018-12-03 03:06:45,340 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 187 transitions. Word has length 80 [2018-12-03 03:06:45,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:45,340 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 187 transitions. [2018-12-03 03:06:45,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-03 03:06:45,340 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2018-12-03 03:06:45,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 03:06:45,341 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:45,341 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:45,341 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:45,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:45,341 INFO L82 PathProgramCache]: Analyzing trace with hash -1107258990, now seen corresponding path program 2 times [2018-12-03 03:06:45,341 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:45,341 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 74 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:45,356 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:45,421 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:45,421 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:45,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:45,627 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:06:45,627 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-03 03:06:45,628 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 03:06:45,628 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-03 03:06:45,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-03 03:06:45,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-03 03:06:45,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-12-03 03:06:45,629 INFO L87 Difference]: Start difference. First operand 144 states and 187 transitions. Second operand 11 states. [2018-12-03 03:06:46,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:46,317 INFO L93 Difference]: Finished difference Result 167 states and 210 transitions. [2018-12-03 03:06:46,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 03:06:46,318 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 80 [2018-12-03 03:06:46,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:46,318 INFO L225 Difference]: With dead ends: 167 [2018-12-03 03:06:46,318 INFO L226 Difference]: Without dead ends: 158 [2018-12-03 03:06:46,319 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:06:46,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-03 03:06:46,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 144. [2018-12-03 03:06:46,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-03 03:06:46,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2018-12-03 03:06:46,336 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 80 [2018-12-03 03:06:46,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:46,336 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2018-12-03 03:06:46,336 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-03 03:06:46,336 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2018-12-03 03:06:46,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 03:06:46,337 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:46,337 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:46,337 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:46,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:46,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1359709994, now seen corresponding path program 1 times [2018-12-03 03:06:46,337 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:46,337 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:46,350 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:06:46,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:46,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:47,051 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:06:47,051 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:49,403 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:06:49,405 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:49,405 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:49,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:06:49,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:06:49,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:50,243 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:06:50,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:51,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:06:51,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 16] total 31 [2018-12-03 03:06:51,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-12-03 03:06:51,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-12-03 03:06:51,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=937, Unknown=0, NotChecked=0, Total=1122 [2018-12-03 03:06:51,346 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand 31 states. [2018-12-03 03:06:53,392 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 38 [2018-12-03 03:06:54,898 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-12-03 03:06:55,650 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 36 [2018-12-03 03:06:56,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:06:56,030 INFO L93 Difference]: Finished difference Result 198 states and 248 transitions. [2018-12-03 03:06:56,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-03 03:06:56,031 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 80 [2018-12-03 03:06:56,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:06:56,032 INFO L225 Difference]: With dead ends: 198 [2018-12-03 03:06:56,032 INFO L226 Difference]: Without dead ends: 173 [2018-12-03 03:06:56,033 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 213 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=412, Invalid=2038, Unknown=0, NotChecked=0, Total=2450 [2018-12-03 03:06:56,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-03 03:06:56,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 142. [2018-12-03 03:06:56,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-03 03:06:56,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 178 transitions. [2018-12-03 03:06:56,050 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 178 transitions. Word has length 80 [2018-12-03 03:06:56,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:06:56,050 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 178 transitions. [2018-12-03 03:06:56,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-12-03 03:06:56,050 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 178 transitions. [2018-12-03 03:06:56,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-03 03:06:56,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:06:56,051 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:06:56,051 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:06:56,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:06:56,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1037358574, now seen corresponding path program 2 times [2018-12-03 03:06:56,051 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:06:56,051 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:06:56,064 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:56,161 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:56,161 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:56,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:06:56,773 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:06:56,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:06:59,068 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:06:59,070 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:06:59,070 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:06:59,075 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:06:59,228 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:06:59,229 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:06:59,231 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:00,427 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:07:00,427 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:00,764 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-03 03:07:00,924 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-03 03:07:01,027 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-03 03:07:02,748 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-03 03:07:02,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18] total 35 [2018-12-03 03:07:02,748 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-03 03:07:02,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-03 03:07:02,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=1422, Unknown=0, NotChecked=0, Total=1640 [2018-12-03 03:07:02,749 INFO L87 Difference]: Start difference. First operand 142 states and 178 transitions. Second operand 35 states. [2018-12-03 03:07:03,486 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 38 [2018-12-03 03:07:04,171 WARN L180 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 39 [2018-12-03 03:07:05,618 WARN L180 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 39 [2018-12-03 03:07:05,919 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 42 [2018-12-03 03:07:06,970 WARN L180 SmtUtils]: Spent 249.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-12-03 03:07:07,449 WARN L180 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 38 [2018-12-03 03:07:09,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:09,468 INFO L93 Difference]: Finished difference Result 196 states and 241 transitions. [2018-12-03 03:07:09,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-03 03:07:09,470 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 80 [2018-12-03 03:07:09,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:09,470 INFO L225 Difference]: With dead ends: 196 [2018-12-03 03:07:09,470 INFO L226 Difference]: Without dead ends: 176 [2018-12-03 03:07:09,471 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 211 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 638 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=475, Invalid=2831, Unknown=0, NotChecked=0, Total=3306 [2018-12-03 03:07:09,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-03 03:07:09,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 162. [2018-12-03 03:07:09,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-03 03:07:09,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 202 transitions. [2018-12-03 03:07:09,492 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 202 transitions. Word has length 80 [2018-12-03 03:07:09,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:09,492 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 202 transitions. [2018-12-03 03:07:09,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-03 03:07:09,492 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 202 transitions. [2018-12-03 03:07:09,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-03 03:07:09,493 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:09,493 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:09,493 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:09,493 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:09,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1128172057, now seen corresponding path program 1 times [2018-12-03 03:07:09,493 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:09,493 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:09,506 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:07:09,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:09,528 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:09,593 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 17 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:09,594 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:09,744 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:09,745 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:09,745 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:09,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:07:09,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:09,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:09,773 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:09,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:09,818 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:09,832 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:07:09,832 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10] total 18 [2018-12-03 03:07:09,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-03 03:07:09,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-03 03:07:09,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-12-03 03:07:09,833 INFO L87 Difference]: Start difference. First operand 162 states and 202 transitions. Second operand 18 states. [2018-12-03 03:07:10,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:10,221 INFO L93 Difference]: Finished difference Result 173 states and 214 transitions. [2018-12-03 03:07:10,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-03 03:07:10,221 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-12-03 03:07:10,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:10,221 INFO L225 Difference]: With dead ends: 173 [2018-12-03 03:07:10,222 INFO L226 Difference]: Without dead ends: 143 [2018-12-03 03:07:10,222 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 333 GetRequests, 310 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2018-12-03 03:07:10,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-03 03:07:10,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-12-03 03:07:10,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-03 03:07:10,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 181 transitions. [2018-12-03 03:07:10,242 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 181 transitions. Word has length 81 [2018-12-03 03:07:10,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:10,242 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 181 transitions. [2018-12-03 03:07:10,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-03 03:07:10,242 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 181 transitions. [2018-12-03 03:07:10,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-03 03:07:10,243 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:10,243 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:10,243 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:10,243 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:10,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1949643741, now seen corresponding path program 2 times [2018-12-03 03:07:10,243 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:10,243 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 81 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:10,262 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:07:10,294 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:07:10,295 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:07:10,296 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:10,357 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:10,357 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:10,503 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-03 03:07:10,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-03 03:07:10,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 17 [2018-12-03 03:07:10,504 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-03 03:07:10,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-03 03:07:10,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-12-03 03:07:10,505 INFO L87 Difference]: Start difference. First operand 143 states and 181 transitions. Second operand 17 states. [2018-12-03 03:07:11,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:11,003 INFO L93 Difference]: Finished difference Result 154 states and 192 transitions. [2018-12-03 03:07:11,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 03:07:11,004 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 81 [2018-12-03 03:07:11,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:11,004 INFO L225 Difference]: With dead ends: 154 [2018-12-03 03:07:11,004 INFO L226 Difference]: Without dead ends: 113 [2018-12-03 03:07:11,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 149 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=468, Unknown=0, NotChecked=0, Total=552 [2018-12-03 03:07:11,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-03 03:07:11,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 110. [2018-12-03 03:07:11,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-03 03:07:11,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 144 transitions. [2018-12-03 03:07:11,019 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 144 transitions. Word has length 81 [2018-12-03 03:07:11,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:11,020 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 144 transitions. [2018-12-03 03:07:11,020 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-03 03:07:11,020 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 144 transitions. [2018-12-03 03:07:11,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-03 03:07:11,020 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:11,020 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:11,020 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:11,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:11,021 INFO L82 PathProgramCache]: Analyzing trace with hash -1581370087, now seen corresponding path program 1 times [2018-12-03 03:07:11,021 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:11,021 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 82 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:11,036 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:07:11,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:11,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:11,118 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:11,118 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:11,252 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:11,253 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:11,253 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:11,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:07:11,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:11,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:11,282 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:11,282 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:11,352 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:11,367 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:07:11,367 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-12-03 03:07:11,367 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 03:07:11,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 03:07:11,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-03 03:07:11,367 INFO L87 Difference]: Start difference. First operand 110 states and 144 transitions. Second operand 15 states. [2018-12-03 03:07:11,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:11,859 INFO L93 Difference]: Finished difference Result 119 states and 152 transitions. [2018-12-03 03:07:11,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-03 03:07:11,859 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-03 03:07:11,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:11,860 INFO L225 Difference]: With dead ends: 119 [2018-12-03 03:07:11,860 INFO L226 Difference]: Without dead ends: 106 [2018-12-03 03:07:11,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 305 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-12-03 03:07:11,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-03 03:07:11,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-03 03:07:11,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-03 03:07:11,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 138 transitions. [2018-12-03 03:07:11,877 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 138 transitions. Word has length 81 [2018-12-03 03:07:11,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:11,877 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 138 transitions. [2018-12-03 03:07:11,877 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 03:07:11,877 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 138 transitions. [2018-12-03 03:07:11,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-03 03:07:11,877 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:11,877 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:11,877 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:11,878 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:11,878 INFO L82 PathProgramCache]: Analyzing trace with hash 1716375510, now seen corresponding path program 1 times [2018-12-03 03:07:11,878 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:11,878 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 84 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:11,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:07:12,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:12,014 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:13,138 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:07:13,138 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:13,428 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 49 [2018-12-03 03:07:17,509 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:17,511 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:17,511 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:17,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:07:17,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:17,673 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:17,900 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:07:17,900 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:19,064 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-03 03:07:19,239 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-03 03:07:19,412 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:19,427 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:07:19,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 21, 18, 21] total 40 [2018-12-03 03:07:19,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-03 03:07:19,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-03 03:07:19,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1393, Unknown=0, NotChecked=0, Total=1560 [2018-12-03 03:07:19,427 INFO L87 Difference]: Start difference. First operand 106 states and 138 transitions. Second operand 40 states. [2018-12-03 03:07:20,802 WARN L180 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 52 [2018-12-03 03:07:21,672 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 33 [2018-12-03 03:07:22,552 WARN L180 SmtUtils]: Spent 371.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 75 [2018-12-03 03:07:24,190 WARN L180 SmtUtils]: Spent 1.08 s on a formula simplification. DAG size of input: 108 DAG size of output: 106 [2018-12-03 03:07:25,211 WARN L180 SmtUtils]: Spent 498.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2018-12-03 03:07:26,459 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-12-03 03:07:27,241 WARN L180 SmtUtils]: Spent 258.00 ms on a formula simplification that was a NOOP. DAG size: 83 [2018-12-03 03:07:27,618 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-12-03 03:07:29,212 WARN L180 SmtUtils]: Spent 761.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 106 [2018-12-03 03:07:30,865 WARN L180 SmtUtils]: Spent 264.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 62 [2018-12-03 03:07:32,442 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 47 [2018-12-03 03:07:34,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:34,706 INFO L93 Difference]: Finished difference Result 143 states and 183 transitions. [2018-12-03 03:07:34,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-12-03 03:07:34,707 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 78 [2018-12-03 03:07:34,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:34,708 INFO L225 Difference]: With dead ends: 143 [2018-12-03 03:07:34,708 INFO L226 Difference]: Without dead ends: 126 [2018-12-03 03:07:34,709 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 268 SyntacticMatches, 4 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 887 ImplicationChecksByTransitivity, 16.3s TimeCoverageRelationStatistics Valid=639, Invalid=4911, Unknown=0, NotChecked=0, Total=5550 [2018-12-03 03:07:34,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-03 03:07:34,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 114. [2018-12-03 03:07:34,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-03 03:07:34,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 146 transitions. [2018-12-03 03:07:34,726 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 146 transitions. Word has length 78 [2018-12-03 03:07:34,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:34,726 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 146 transitions. [2018-12-03 03:07:34,726 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-03 03:07:34,727 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 146 transitions. [2018-12-03 03:07:34,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-03 03:07:34,727 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:34,727 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:34,727 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:34,728 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:34,728 INFO L82 PathProgramCache]: Analyzing trace with hash -178410659, now seen corresponding path program 2 times [2018-12-03 03:07:34,728 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:34,728 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 86 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:34,745 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:07:34,779 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:07:34,779 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:07:34,781 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:34,843 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:34,843 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:34,983 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:34,985 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:34,985 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:34,992 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:07:35,015 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:07:35,015 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:07:35,017 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:35,024 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:35,024 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:35,107 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:35,121 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:07:35,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-12-03 03:07:35,122 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-03 03:07:35,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-03 03:07:35,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-03 03:07:35,122 INFO L87 Difference]: Start difference. First operand 114 states and 146 transitions. Second operand 15 states. [2018-12-03 03:07:35,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:35,549 INFO L93 Difference]: Finished difference Result 121 states and 152 transitions. [2018-12-03 03:07:35,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-03 03:07:35,550 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-03 03:07:35,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:35,550 INFO L225 Difference]: With dead ends: 121 [2018-12-03 03:07:35,550 INFO L226 Difference]: Without dead ends: 100 [2018-12-03 03:07:35,550 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 304 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2018-12-03 03:07:35,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-03 03:07:35,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 94. [2018-12-03 03:07:35,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-03 03:07:35,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 119 transitions. [2018-12-03 03:07:35,565 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 119 transitions. Word has length 81 [2018-12-03 03:07:35,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:35,565 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 119 transitions. [2018-12-03 03:07:35,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-03 03:07:35,565 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 119 transitions. [2018-12-03 03:07:35,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-03 03:07:35,566 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:35,566 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:35,566 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:35,566 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:35,566 INFO L82 PathProgramCache]: Analyzing trace with hash -1512796842, now seen corresponding path program 2 times [2018-12-03 03:07:35,566 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:35,566 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 88 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:35,580 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:07:35,673 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:07:35,673 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:07:35,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:36,307 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:07:36,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:36,416 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2018-12-03 03:07:38,639 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:38,641 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:38,641 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:38,647 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:07:38,807 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:07:38,807 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:07:38,809 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:40,383 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-03 03:07:40,383 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:44,598 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-03 03:07:44,612 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:07:44,612 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18, 21] total 51 [2018-12-03 03:07:44,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-12-03 03:07:44,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-12-03 03:07:44,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=2279, Unknown=0, NotChecked=0, Total=2550 [2018-12-03 03:07:44,613 INFO L87 Difference]: Start difference. First operand 94 states and 119 transitions. Second operand 51 states. [2018-12-03 03:07:45,480 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 55 [2018-12-03 03:07:46,490 WARN L180 SmtUtils]: Spent 261.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 68 [2018-12-03 03:07:48,628 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 42 [2018-12-03 03:07:48,947 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-12-03 03:07:49,532 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2018-12-03 03:07:50,423 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-12-03 03:07:50,753 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-12-03 03:07:51,977 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 40 [2018-12-03 03:07:52,384 WARN L180 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 40 [2018-12-03 03:07:52,796 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 41 [2018-12-03 03:07:53,283 WARN L180 SmtUtils]: Spent 276.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 40 [2018-12-03 03:07:53,734 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 41 [2018-12-03 03:07:54,447 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 33 [2018-12-03 03:07:54,740 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 45 [2018-12-03 03:07:55,114 WARN L180 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 48 [2018-12-03 03:07:56,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:07:56,206 INFO L93 Difference]: Finished difference Result 123 states and 153 transitions. [2018-12-03 03:07:56,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-12-03 03:07:56,208 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 78 [2018-12-03 03:07:56,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:07:56,208 INFO L225 Difference]: With dead ends: 123 [2018-12-03 03:07:56,208 INFO L226 Difference]: Without dead ends: 110 [2018-12-03 03:07:56,209 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 339 GetRequests, 255 SyntacticMatches, 6 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1357 ImplicationChecksByTransitivity, 14.6s TimeCoverageRelationStatistics Valid=884, Invalid=5436, Unknown=0, NotChecked=0, Total=6320 [2018-12-03 03:07:56,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-03 03:07:56,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 89. [2018-12-03 03:07:56,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-12-03 03:07:56,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 112 transitions. [2018-12-03 03:07:56,222 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 112 transitions. Word has length 78 [2018-12-03 03:07:56,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:07:56,222 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 112 transitions. [2018-12-03 03:07:56,222 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-12-03 03:07:56,222 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 112 transitions. [2018-12-03 03:07:56,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-03 03:07:56,223 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:07:56,223 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:07:56,223 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:07:56,223 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:07:56,223 INFO L82 PathProgramCache]: Analyzing trace with hash -1418902222, now seen corresponding path program 1 times [2018-12-03 03:07:56,223 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:07:56,223 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 90 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:07:56,236 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:07:56,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:07:56,656 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:07:58,170 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:07:58,170 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:07:59,820 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:07:59,820 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:07:59,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:08:00,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:08:00,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:00,601 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:00,601 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:01,205 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:08:01,205 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-12-03 03:08:01,205 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-03 03:08:01,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-03 03:08:01,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=593, Unknown=0, NotChecked=0, Total=650 [2018-12-03 03:08:01,206 INFO L87 Difference]: Start difference. First operand 89 states and 112 transitions. Second operand 20 states. [2018-12-03 03:08:04,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:08:04,930 INFO L93 Difference]: Finished difference Result 103 states and 127 transitions. [2018-12-03 03:08:04,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-03 03:08:04,931 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 83 [2018-12-03 03:08:04,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:08:04,932 INFO L225 Difference]: With dead ends: 103 [2018-12-03 03:08:04,932 INFO L226 Difference]: Without dead ends: 94 [2018-12-03 03:08:04,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=129, Invalid=1431, Unknown=0, NotChecked=0, Total=1560 [2018-12-03 03:08:04,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-12-03 03:08:04,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 89. [2018-12-03 03:08:04,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-12-03 03:08:04,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 111 transitions. [2018-12-03 03:08:04,945 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 111 transitions. Word has length 83 [2018-12-03 03:08:04,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:08:04,946 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 111 transitions. [2018-12-03 03:08:04,946 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-03 03:08:04,946 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 111 transitions. [2018-12-03 03:08:04,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-03 03:08:04,946 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:08:04,946 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:08:04,946 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:08:04,946 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:08:04,946 INFO L82 PathProgramCache]: Analyzing trace with hash -1912539214, now seen corresponding path program 2 times [2018-12-03 03:08:04,946 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:08:04,947 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 92 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:08:04,959 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:08:05,383 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:08:05,383 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:08:05,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:06,979 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:06,979 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:07,296 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-03 03:08:07,471 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-03 03:08:07,576 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-03 03:08:08,676 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:08:08,676 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:08:08,683 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:08:09,505 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:08:09,505 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:08:09,509 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:09,863 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 03:08:09,863 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:10,160 WARN L180 SmtUtils]: Spent 278.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-03 03:08:10,354 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-03 03:08:11,299 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:08:11,299 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 22] total 22 [2018-12-03 03:08:11,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-03 03:08:11,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-03 03:08:11,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=746, Unknown=0, NotChecked=0, Total=812 [2018-12-03 03:08:11,299 INFO L87 Difference]: Start difference. First operand 89 states and 111 transitions. Second operand 22 states. [2018-12-03 03:08:15,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:08:15,525 INFO L93 Difference]: Finished difference Result 105 states and 128 transitions. [2018-12-03 03:08:15,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-03 03:08:15,526 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 83 [2018-12-03 03:08:15,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:08:15,527 INFO L225 Difference]: With dead ends: 105 [2018-12-03 03:08:15,527 INFO L226 Difference]: Without dead ends: 96 [2018-12-03 03:08:15,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 157 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=144, Invalid=1748, Unknown=0, NotChecked=0, Total=1892 [2018-12-03 03:08:15,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-03 03:08:15,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 87. [2018-12-03 03:08:15,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-03 03:08:15,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 106 transitions. [2018-12-03 03:08:15,544 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 106 transitions. Word has length 83 [2018-12-03 03:08:15,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:08:15,545 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 106 transitions. [2018-12-03 03:08:15,545 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-03 03:08:15,545 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 106 transitions. [2018-12-03 03:08:15,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 03:08:15,545 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:08:15,545 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:08:15,545 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:08:15,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:08:15,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1984707855, now seen corresponding path program 1 times [2018-12-03 03:08:15,546 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:08:15,546 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 94 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:08:15,567 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:08:15,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:08:15,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:16,143 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:16,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:18,057 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-03 03:08:18,059 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:08:18,059 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:08:18,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:08:18,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:08:18,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:20,583 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 11 proven. 16 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 03:08:20,583 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:20,797 WARN L180 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2018-12-03 03:08:21,925 WARN L180 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-03 03:08:23,363 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-03 03:08:23,377 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:08:23,377 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 21, 16] total 43 [2018-12-03 03:08:23,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-12-03 03:08:23,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-12-03 03:08:23,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=1584, Unknown=0, NotChecked=0, Total=1806 [2018-12-03 03:08:23,378 INFO L87 Difference]: Start difference. First operand 87 states and 106 transitions. Second operand 43 states. [2018-12-03 03:08:25,091 WARN L180 SmtUtils]: Spent 222.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 41 [2018-12-03 03:08:25,549 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-03 03:08:26,248 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 41 [2018-12-03 03:08:27,712 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 38 [2018-12-03 03:08:30,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:08:30,231 INFO L93 Difference]: Finished difference Result 116 states and 140 transitions. [2018-12-03 03:08:30,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-12-03 03:08:30,232 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 84 [2018-12-03 03:08:30,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:08:30,233 INFO L225 Difference]: With dead ends: 116 [2018-12-03 03:08:30,233 INFO L226 Difference]: Without dead ends: 87 [2018-12-03 03:08:30,233 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 358 GetRequests, 289 SyntacticMatches, 4 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1022 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=615, Invalid=3807, Unknown=0, NotChecked=0, Total=4422 [2018-12-03 03:08:30,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-03 03:08:30,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 80. [2018-12-03 03:08:30,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-03 03:08:30,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 97 transitions. [2018-12-03 03:08:30,244 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 97 transitions. Word has length 84 [2018-12-03 03:08:30,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:08:30,244 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 97 transitions. [2018-12-03 03:08:30,244 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-12-03 03:08:30,244 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 97 transitions. [2018-12-03 03:08:30,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-03 03:08:30,245 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:08:30,245 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:08:30,245 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:08:30,245 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:08:30,245 INFO L82 PathProgramCache]: Analyzing trace with hash -107585423, now seen corresponding path program 2 times [2018-12-03 03:08:30,245 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:08:30,245 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 96 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:08:30,258 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:08:30,362 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:08:30,362 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:08:30,364 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:30,838 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:30,838 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:30,958 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-12-03 03:08:32,817 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-03 03:08:32,819 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:08:32,819 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:08:32,824 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:08:33,043 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:08:33,043 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:08:33,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:34,797 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:34,798 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:35,049 WARN L180 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 66 [2018-12-03 03:08:35,537 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-12-03 03:08:35,716 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-03 03:08:35,731 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-03 03:08:35,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 19, 14] total 34 [2018-12-03 03:08:35,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-12-03 03:08:35,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-12-03 03:08:35,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=968, Unknown=0, NotChecked=0, Total=1122 [2018-12-03 03:08:35,732 INFO L87 Difference]: Start difference. First operand 80 states and 97 transitions. Second operand 34 states. [2018-12-03 03:08:36,867 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 63 [2018-12-03 03:08:38,396 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 36 [2018-12-03 03:08:38,776 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 38 [2018-12-03 03:08:39,980 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 35 [2018-12-03 03:08:41,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:08:41,355 INFO L93 Difference]: Finished difference Result 117 states and 137 transitions. [2018-12-03 03:08:41,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-12-03 03:08:41,356 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 84 [2018-12-03 03:08:41,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:08:41,356 INFO L225 Difference]: With dead ends: 117 [2018-12-03 03:08:41,356 INFO L226 Difference]: Without dead ends: 73 [2018-12-03 03:08:41,357 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 302 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 746 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=513, Invalid=3027, Unknown=0, NotChecked=0, Total=3540 [2018-12-03 03:08:41,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-12-03 03:08:41,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-12-03 03:08:41,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-12-03 03:08:41,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 87 transitions. [2018-12-03 03:08:41,365 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 87 transitions. Word has length 84 [2018-12-03 03:08:41,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:08:41,365 INFO L480 AbstractCegarLoop]: Abstraction has 73 states and 87 transitions. [2018-12-03 03:08:41,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-12-03 03:08:41,366 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 87 transitions. [2018-12-03 03:08:41,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-03 03:08:41,366 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:08:41,366 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:08:41,366 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:08:41,366 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:08:41,366 INFO L82 PathProgramCache]: Analyzing trace with hash 593862840, now seen corresponding path program 1 times [2018-12-03 03:08:41,366 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:08:41,366 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 98 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:08:41,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 03:08:41,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:08:41,706 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:43,781 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:43,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:44,236 WARN L180 SmtUtils]: Spent 244.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2018-12-03 03:08:45,600 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:08:45,600 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:08:45,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 03:08:46,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 03:08:46,292 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:48,921 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 03:08:48,921 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:49,169 WARN L180 SmtUtils]: Spent 243.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 65 [2018-12-03 03:08:50,862 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:08:50,862 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 32 [2018-12-03 03:08:50,862 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-03 03:08:50,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-03 03:08:50,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1612, Unknown=0, NotChecked=0, Total=1722 [2018-12-03 03:08:50,862 INFO L87 Difference]: Start difference. First operand 73 states and 87 transitions. Second operand 32 states. [2018-12-03 03:08:56,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:08:56,479 INFO L93 Difference]: Finished difference Result 82 states and 96 transitions. [2018-12-03 03:08:56,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-03 03:08:56,480 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 85 [2018-12-03 03:08:56,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:08:56,481 INFO L225 Difference]: With dead ends: 82 [2018-12-03 03:08:56,481 INFO L226 Difference]: Without dead ends: 71 [2018-12-03 03:08:56,481 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 151 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=210, Invalid=3212, Unknown=0, NotChecked=0, Total=3422 [2018-12-03 03:08:56,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-03 03:08:56,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-03 03:08:56,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-03 03:08:56,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 83 transitions. [2018-12-03 03:08:56,489 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 83 transitions. Word has length 85 [2018-12-03 03:08:56,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:08:56,489 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 83 transitions. [2018-12-03 03:08:56,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-03 03:08:56,489 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 83 transitions. [2018-12-03 03:08:56,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-03 03:08:56,490 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 03:08:56,490 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 03:08:56,490 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 03:08:56,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 03:08:56,490 INFO L82 PathProgramCache]: Analyzing trace with hash 516304508, now seen corresponding path program 2 times [2018-12-03 03:08:56,490 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-03 03:08:56,490 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/cvc4 Starting monitored process 100 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-03 03:08:56,503 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-03 03:08:56,767 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:08:56,767 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:08:56,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:08:58,834 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-03 03:08:58,834 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:08:59,317 WARN L180 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-12-03 03:08:59,596 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-12-03 03:09:00,653 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-03 03:09:00,653 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/z3 Starting monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-03 03:09:00,659 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-03 03:09:01,342 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-03 03:09:01,342 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-03 03:09:01,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-03 03:09:03,603 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-03 03:09:03,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-03 03:09:03,860 WARN L180 SmtUtils]: Spent 253.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-12-03 03:09:04,456 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-03 03:09:04,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 31 [2018-12-03 03:09:04,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-12-03 03:09:04,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-12-03 03:09:04,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=1243, Unknown=0, NotChecked=0, Total=1332 [2018-12-03 03:09:04,456 INFO L87 Difference]: Start difference. First operand 71 states and 83 transitions. Second operand 31 states. [2018-12-03 03:09:09,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 03:09:09,995 INFO L93 Difference]: Finished difference Result 71 states and 83 transitions. [2018-12-03 03:09:09,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-03 03:09:09,996 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 85 [2018-12-03 03:09:09,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 03:09:09,996 INFO L225 Difference]: With dead ends: 71 [2018-12-03 03:09:09,997 INFO L226 Difference]: Without dead ends: 0 [2018-12-03 03:09:09,997 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 155 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=181, Invalid=2681, Unknown=0, NotChecked=0, Total=2862 [2018-12-03 03:09:09,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-12-03 03:09:09,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-12-03 03:09:09,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-12-03 03:09:09,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-12-03 03:09:09,997 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 85 [2018-12-03 03:09:09,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 03:09:09,997 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-12-03 03:09:09,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-12-03 03:09:09,997 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-12-03 03:09:09,998 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-12-03 03:09:10,000 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-12-03 03:09:10,139 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:10,860 WARN L180 SmtUtils]: Spent 238.00 ms on a formula simplification. DAG size of input: 397 DAG size of output: 366 [2018-12-03 03:09:10,862 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:10,862 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:10,984 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 313 DAG size of output: 284 [2018-12-03 03:09:11,339 WARN L180 SmtUtils]: Spent 353.00 ms on a formula simplification. DAG size of input: 421 DAG size of output: 399 [2018-12-03 03:09:11,577 WARN L180 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 392 DAG size of output: 362 [2018-12-03 03:09:11,597 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:11,602 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:11,765 WARN L180 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 321 DAG size of output: 305 [2018-12-03 03:09:12,010 WARN L180 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 293 DAG size of output: 274 [2018-12-03 03:09:12,149 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 270 DAG size of output: 254 [2018-12-03 03:09:12,579 WARN L180 SmtUtils]: Spent 429.00 ms on a formula simplification. DAG size of input: 445 DAG size of output: 414 [2018-12-03 03:09:12,738 WARN L180 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 292 DAG size of output: 272 [2018-12-03 03:09:12,745 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:12,947 WARN L180 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 300 DAG size of output: 283 [2018-12-03 03:09:13,136 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 356 DAG size of output: 338 [2018-12-03 03:09:13,439 WARN L180 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 321 DAG size of output: 305 [2018-12-03 03:09:13,615 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 406 DAG size of output: 376 [2018-12-03 03:09:13,616 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:13,761 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 318 DAG size of output: 302 [2018-12-03 03:09:13,762 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-03 03:09:14,072 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 352 DAG size of output: 323 [2018-12-03 03:09:14,427 WARN L180 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 366 DAG size of output: 338 [2018-12-03 03:10:18,815 WARN L180 SmtUtils]: Spent 1.07 m on a formula simplification. DAG size of input: 347 DAG size of output: 57 [2018-12-03 03:10:18,951 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 1 [2018-12-03 03:13:00,102 WARN L180 SmtUtils]: Spent 2.69 m on a formula simplification. DAG size of input: 771 DAG size of output: 184 [2018-12-03 03:13:03,166 WARN L180 SmtUtils]: Spent 3.06 s on a formula simplification. DAG size of input: 170 DAG size of output: 88 [2018-12-03 03:16:03,225 WARN L180 SmtUtils]: Spent 3.00 m on a formula simplification. DAG size of input: 518 DAG size of output: 143 [2018-12-03 03:16:03,229 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L19(lines 19 24) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L48(lines 47 62) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L451 ceAbstractionStarter]: At program point L69(lines 18 71) the Hoare annotation is: true [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L28(lines 27 42) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L49(lines 47 62) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L37(lines 37 41) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L451 ceAbstractionStarter]: At program point L37-1(lines 27 42) the Hoare annotation is: true [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point L25(lines 25 65) no Hoare annotation was computed. [2018-12-03 03:16:03,229 INFO L451 ceAbstractionStarter]: At program point base2fltENTRY(lines 14 72) the Hoare annotation is: true [2018-12-03 03:16:03,229 INFO L448 ceAbstractionStarter]: For program point base2fltFINAL(lines 14 72) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L451 ceAbstractionStarter]: At program point L63(lines 25 65) the Hoare annotation is: true [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point base2fltEXIT(lines 14 72) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L451 ceAbstractionStarter]: At program point L47-2(lines 47 62) the Hoare annotation is: true [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-12-03 03:16:03,230 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 214 252) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 214 252) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point L236(lines 236 245) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L444 ceAbstractionStarter]: At program point L234(line 234) the Hoare annotation is: (let ((.cse24 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~b~0))) (.cse18 (bvlshr main_~b~0 (_ bv24 32))) (.cse5 (bvlshr main_~a~0 (_ bv24 32)))) (let ((.cse23 (bvlshr .cse24 (bvadd (bvneg (bvadd .cse18 (_ bv4294967168 32))) .cse5 (_ bv4294967168 32)))) (.cse25 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~a~0)))) (let ((.cse21 (bvlshr .cse25 (bvadd .cse18 (bvneg (bvadd .cse5 (_ bv4294967168 32))) (_ bv4294967168 32)))) (.cse4 (bvadd .cse25 .cse23))) (let ((.cse14 (= main_~a~0 (_ bv0 32))) (.cse13 (= (bvadd .cse18 (_ bv4294967041 32)) (_ bv0 32))) (.cse8 (= (bvand (_ bv33554432 32) .cse4) (_ bv0 32))) (.cse17 (bvadd .cse21 .cse24))) (let ((.cse15 (= (_ bv0 32) (bvand (_ bv33554432 32) .cse17))) (.cse10 (= (bvadd .cse5 (_ bv4294967041 32)) (_ bv0 32))) (.cse9 (not .cse8)) (.cse19 (not .cse13)) (.cse20 (= main_~b~0 (_ bv0 32))) (.cse16 (not .cse14)) (.cse1 (= .cse23 (_ bv0 32)))) (let ((.cse3 (let ((.cse22 (and .cse19 (not .cse20) .cse16 (not .cse1)))) (or (and .cse22 (not .cse10) .cse9) (and .cse8 .cse22 (= (bvor (bvand (_ bv16777215 32) .cse4) (bvshl .cse5 (_ bv24 32))) main_~r_add1~0))))) (.cse11 (= (_ bv4294967295 32) main_~r_add1~0)) (.cse7 (= main_~b~0 main_~r_add1~0)) (.cse6 (= .cse21 (_ bv0 32))) (.cse2 (bvult main_~a~0 main_~b~0)) (.cse12 (not .cse15)) (.cse0 (= main_~a~0 main_~r_add1~0))) (or (and .cse0 .cse1 (not .cse2)) (and .cse3 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse4 (_ bv1 32))) (bvshl (bvadd .cse5 (_ bv1 32)) (_ bv24 32))))) (and .cse6 .cse2 .cse7) (and .cse8 .cse3) (and .cse9 .cse10 .cse11) (and .cse12 .cse13 .cse11) (and .cse14 .cse7) (and .cse15 .cse16 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) .cse17) (bvshl .cse18 (_ bv24 32)))) (not .cse6)) (and .cse19 .cse16 .cse2 .cse12 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse17 (_ bv1 32))) (bvshl (bvadd .cse18 (_ bv1 32)) (_ bv24 32))))) (and .cse20 .cse0)))))))) [2018-12-03 03:16:03,230 INFO L444 ceAbstractionStarter]: At program point L236-2(lines 236 245) the Hoare annotation is: (and (= main_~tmp___0~0 (_ bv0 32)) (= main_~tmp~2 (_ bv0 32))) [2018-12-03 03:16:03,230 INFO L448 ceAbstractionStarter]: For program point L234-1(line 234) no Hoare annotation was computed. [2018-12-03 03:16:03,230 INFO L451 ceAbstractionStarter]: At program point L232(line 232) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L232-1(line 232) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L451 ceAbstractionStarter]: At program point L230(line 230) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L230-1(line 230) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 214 252) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L247(line 247) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L239(lines 239 243) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L239-2(lines 239 243) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L451 ceAbstractionStarter]: At program point L233(line 233) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L233-1(line 233) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L451 ceAbstractionStarter]: At program point L231(line 231) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L231-1(line 231) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L128(line 128) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L451 ceAbstractionStarter]: At program point addfltENTRY(lines 73 136) the Hoare annotation is: true [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point addfltFINAL(lines 73 136) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L116(lines 116 121) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L108(lines 108 113) no Hoare annotation was computed. [2018-12-03 03:16:03,231 INFO L444 ceAbstractionStarter]: At program point L104(line 104) the Hoare annotation is: (let ((.cse0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse1 (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv4294967168 32))) (.cse2 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse4 (= addflt_~a |addflt_#in~a|))) (and (or (bvult |addflt_#in~a| |addflt_#in~b|) (and (= .cse0 addflt_~mb~0) (= .cse1 addflt_~eb~0) (= .cse2 addflt_~ma~0) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (let ((.cse3 (and (not (= (_ bv0 32) |addflt_#in~b|)) (exists ((addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (and (= (bvadd addflt_~eb~0 (_ bv128 32)) (bvlshr addflt_~b (_ bv24 32))) (not (bvult addflt_~a addflt_~b)) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (not (bvult addflt_~a addflt_~b))))) (or (and (= addflt_~b |addflt_#in~a|) .cse3 (= addflt_~a |addflt_#in~b|)) (and .cse3 .cse4 (= addflt_~b |addflt_#in~b|)))) (or (and (= .cse0 addflt_~ma~0) (= .cse1 addflt_~ea~0) (= .cse2 addflt_~mb~0) (= (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32)) addflt_~eb~0)) .cse4) (not (= (_ bv0 32) |addflt_#in~a|)))) [2018-12-03 03:16:03,231 INFO L448 ceAbstractionStarter]: For program point L104-1(line 104) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L444 ceAbstractionStarter]: At program point L133(lines 83 135) the Hoare annotation is: (let ((.cse5 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse18 (bvlshr |addflt_#in~a| (_ bv24 32))) (.cse40 (bvadd .cse5 (_ bv4294967168 32)))) (let ((.cse33 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse47 (bvneg .cse40)) (.cse44 (bvadd .cse18 (_ bv4294967168 32)))) (let ((.cse34 (bvneg .cse44)) (.cse19 (bvlshr .cse33 (bvadd .cse18 .cse47 (_ bv4294967168 32)))) (.cse24 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)))) (let ((.cse17 (bvadd .cse19 .cse24)) (.cse3 (= (_ bv0 32) |addflt_#in~b|)) (.cse45 (bvlshr .cse24 (bvadd .cse5 .cse34 (_ bv4294967168 32))))) (let ((.cse13 (= .cse45 (_ bv0 32))) (.cse2 (= addflt_~b |addflt_#in~b|)) (.cse29 (= addflt_~a |addflt_#in~b|)) (.cse0 (not .cse3)) (.cse20 (= (bvand (_ bv33554432 32) .cse17) (_ bv0 32)))) (let ((.cse37 (not (= (_ bv127 32) addflt_~ea~0))) (.cse9 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) (.cse8 (not .cse20)) (.cse41 (= (bvadd .cse18 (_ bv4294967041 32)) (_ bv0 32))) (.cse30 (let ((.cse48 (and .cse0 (not (bvult addflt_~a addflt_~b))))) (or (and .cse48 .cse2) (and .cse48 .cse29)))) (.cse39 (not (= (bvadd |addflt_#in~a| (_ bv1 32)) (_ bv0 32)))) (.cse4 (bvadd .cse45 .cse33)) (.cse10 (= (bvadd .cse5 (_ bv4294967041 32)) (_ bv0 32))) (.cse43 (not .cse13)) (.cse46 (bvlshr .cse33 (bvadd .cse47 addflt_~ea~0)))) (let ((.cse27 (= (bvadd .cse46 .cse24) addflt_~ma~0)) (.cse32 (= (bvadd addflt_~__retres10~0 (_ bv1 32)) (_ bv0 32))) (.cse16 (= (bvlshr .cse33 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse47 (_ bv4294967168 32))) addflt_~mb~0)) (.cse35 (or .cse43 (not (bvult addflt_~ma~0 (_ bv33554432 32))))) (.cse36 (bvult |addflt_#in~a| |addflt_#in~b|)) (.cse1 (= addflt_~a |addflt_#in~a|)) (.cse38 (= addflt_~mb~0 .cse46)) (.cse28 (not .cse10)) (.cse25 (= (bvand (_ bv33554432 32) .cse4) (_ bv0 32))) (.cse14 (and .cse30 (or (= (bvadd |addflt_#res| (_ bv1 32)) (_ bv0 32)) .cse39) (= addflt_~__retres10~0 |addflt_#in~b|) .cse29 (not (bvult addflt_~a |addflt_#in~a|)))) (.cse31 (= addflt_~b |addflt_#in~a|)) (.cse15 (or .cse37 .cse9 (and .cse8 .cse41))) (.cse11 (= .cse45 addflt_~mb~0)) (.cse42 (= (_ bv0 32) |addflt_#in~a|))) (let ((.cse23 (= .cse44 addflt_~ea~0)) (.cse7 (and .cse31 (not .cse41) .cse15 .cse43 .cse11 (not .cse42) (bvult addflt_~b |addflt_#in~b|))) (.cse21 (and .cse42 .cse14 .cse31)) (.cse6 (not .cse25)) (.cse22 (and .cse27 .cse2 .cse41 .cse32 .cse16 .cse35 (not .cse36) .cse1 .cse38 (or (not (= (_ bv0 32) (bvlshr addflt_~mb~0 (bvadd addflt_~ea~0 (bvneg addflt_~eb~0))))) .cse28))) (.cse26 (= .cse40 addflt_~ea~0)) (.cse12 (not (= (_ bv255 32) .cse18)))) (and (or .cse0 (and .cse1 .cse2 (= addflt_~__retres10~0 |addflt_#in~a|))) (or .cse3 (and (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse4 (_ bv1 32))) (bvshl (bvadd .cse5 (_ bv1 32)) (_ bv24 32)))) .cse6 .cse7 (or .cse8 .cse9)) (and .cse10 .cse11 .cse12 .cse6) (and .cse13 .cse14) (and .cse15 (or .cse9 .cse6) .cse16 (= (bvor (bvand (_ bv16777215 32) (bvlshr .cse17 (_ bv1 32))) (bvshl (bvadd .cse18 (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0)) (and (not (= .cse19 (_ bv0 32))) .cse20) .cse21 .cse22 (and .cse23 .cse16 (= .cse24 addflt_~ma~0) (= (_ bv0 32) addflt_~mb~0)) (and .cse25 .cse26 .cse7 (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse4) (bvshl .cse5 (_ bv24 32)))))) (or .cse9 .cse21 .cse3 (and .cse27 .cse23) .cse6) (or .cse3 (and .cse7 .cse28 .cse29) (and .cse2 .cse28 (and .cse30 .cse1)) (and .cse25 .cse7 .cse29) .cse21 (and .cse26 .cse31 .cse32 .cse6 .cse29 (= (bvadd .cse33 (bvlshr .cse24 (bvadd .cse34 addflt_~ea~0))) addflt_~ma~0)) .cse22 (and (= .cse33 addflt_~ma~0) .cse13 .cse26 .cse31 .cse14 .cse11)) (or .cse3 (and .cse8 .cse12) (and .cse35 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32))) (= (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0) (bvadd (bvneg (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) addflt_~ma~0)))) .cse36 (and .cse16 (or .cse37 (= (bvand (_ bv33554432 32) (bvadd addflt_~mb~0 addflt_~ma~0)) (_ bv0 32))) .cse38 (= (bvor (bvand (_ bv16777215 32) .cse17) (bvshl .cse18 (_ bv24 32))) addflt_~__retres10~0))) (or (not (= (_ bv4294967295 32) |addflt_#in~b|)) (= (_ bv127 32) addflt_~eb~0) .cse39))))))))))) [2018-12-03 03:16:03,232 INFO L448 ceAbstractionStarter]: For program point addfltEXIT(lines 73 136) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L448 ceAbstractionStarter]: For program point L84(lines 84 90) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L448 ceAbstractionStarter]: For program point L115(lines 115 126) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L448 ceAbstractionStarter]: For program point L84-2(lines 83 135) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L444 ceAbstractionStarter]: At program point L115-2(lines 115 126) the Hoare annotation is: (let ((.cse14 (bvlshr |addflt_#in~a| (_ bv24 32)))) (let ((.cse13 (bvadd .cse14 (_ bv4294967168 32))) (.cse10 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse25 (bvadd .cse10 (_ bv4294967168 32))) (.cse18 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse33 (bvneg .cse13))) (let ((.cse6 (= addflt_~b |addflt_#in~a|)) (.cse15 (= addflt_~a |addflt_#in~a|)) (.cse5 (= addflt_~b |addflt_#in~b|)) (.cse24 (bvlshr .cse18 (bvadd .cse33 addflt_~ea~0))) (.cse22 (bvlshr .cse18 (bvadd .cse10 .cse33 (_ bv4294967168 32)))) (.cse20 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse21 (bvneg .cse25))) (let ((.cse19 (bvlshr .cse20 (bvadd .cse21 addflt_~ea~0))) (.cse9 (bvadd .cse22 .cse20)) (.cse4 (not (= (bvadd .cse14 (_ bv4294967041 32)) (_ bv0 32)))) (.cse16 (= (bvadd .cse20 .cse24) addflt_~ma~0)) (.cse1 (bvult |addflt_#in~a| |addflt_#in~b|)) (.cse2 (let ((.cse26 (let ((.cse28 (= addflt_~a |addflt_#in~b|)) (.cse29 (and (not (= (_ bv0 32) addflt_~b)) (and (not (= (_ bv0 32) |addflt_#in~b|)) (not (bvult addflt_~a addflt_~b))))) (.cse30 (not (bvult addflt_~a |addflt_#in~a|)))) (or (and (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvlshr (bvadd (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (_ bv1 32)) addflt_~ma~0)) (and (let ((.cse27 (or (and .cse29 .cse5) (and .cse29 .cse28)))) (or (and .cse27 .cse15) (and .cse27 .cse28))) .cse30)) (and (and (let ((.cse31 (let ((.cse32 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0)))) (or (and .cse32 .cse29 .cse28) (and .cse32 .cse29 .cse5))))) (or (and .cse31 .cse28) (and .cse31 .cse15))) .cse30) (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))))))))) (or (and .cse26 .cse6) (and .cse26 .cse15))))) (let ((.cse8 (let ((.cse23 (and (= .cse22 addflt_~mb~0) .cse1 .cse2))) (or (and (not (= .cse22 (_ bv0 32))) .cse23 (= (bvlshr .cse9 (_ bv1 32)) addflt_~ma~0) .cse4) (and (not (= (_ bv0 32) .cse24)) .cse23 (= .cse25 addflt_~ea~0) .cse16)))) (.cse12 (= (bvadd .cse19 .cse18) addflt_~ma~0)) (.cse3 (= (bvlshr .cse20 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse21 (_ bv4294967168 32))) addflt_~mb~0)) (.cse17 (bvlshr .cse20 (bvadd .cse14 .cse21 (_ bv4294967168 32))))) (let ((.cse0 (and .cse12 .cse2 .cse3 (not (= .cse17 (_ bv0 32))) (= addflt_~mb~0 .cse19))) (.cse7 (bvadd .cse17 .cse18)) (.cse11 (and .cse8 .cse16))) (and (or .cse0 (and .cse1 .cse2) (and .cse2 .cse3 .cse4)) (or .cse5 .cse6) (or (not (= (bvand (_ bv33554432 32) .cse7) (_ bv0 32))) (and .cse8 (not (= (bvand (_ bv33554432 32) .cse9) (_ bv0 32))) (not (= (bvadd .cse10 (_ bv4294967041 32)) (_ bv0 32)))) .cse11 .cse0) (or (and .cse12 (= .cse13 addflt_~ea~0) .cse3) (and (= (bvadd .cse10 (_ bv4294967169 32)) addflt_~ea~0) .cse8) (and (= (bvlshr .cse7 (_ bv1 32)) addflt_~ma~0) (= (bvadd .cse14 (_ bv4294967169 32)) addflt_~ea~0) .cse15) .cse11))))))))) [2018-12-03 03:16:03,232 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 7) no Hoare annotation was computed. [2018-12-03 03:16:03,232 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 5 10) the Hoare annotation is: true [2018-12-03 03:16:03,233 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 5 10) no Hoare annotation was computed. [2018-12-03 03:16:03,233 INFO L448 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. [2018-12-03 03:16:03,233 INFO L448 ceAbstractionStarter]: For program point L6(lines 6 8) no Hoare annotation was computed. [2018-12-03 03:16:03,233 INFO L448 ceAbstractionStarter]: For program point L6-2(lines 5 10) no Hoare annotation was computed. [2018-12-03 03:16:03,240 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-03 03:16:03,240 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-03 03:16:03,251 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-03 03:16:03,252 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-03 03:16:03,256 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 03:16:03 BoogieIcfgContainer [2018-12-03 03:16:03,256 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 03:16:03,257 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 03:16:03,257 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 03:16:03,257 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 03:16:03,257 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 03:04:02" (3/4) ... [2018-12-03 03:16:03,259 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-12-03 03:16:03,264 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-12-03 03:16:03,264 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure base2flt [2018-12-03 03:16:03,264 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-12-03 03:16:03,264 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure addflt [2018-12-03 03:16:03,264 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-12-03 03:16:03,268 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 11 nodes and edges [2018-12-03 03:16:03,268 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2018-12-03 03:16:03,268 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-12-03 03:16:03,286 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((!(0bv32 == \old(b)) || ((a == \old(a) && b == \old(b)) && __retres10 == \old(a))) && (((((((((0bv32 == \old(b) || (((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || (((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32 && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(255bv32 == ~bvlshr64(\old(a), 24bv32))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) || (~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32 && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a)))) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10)) || (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32)) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || (((((((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32))) && !~bvult64(\old(a), \old(b))) && a == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) || (((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) && 0bv32 == mb)) || (((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))))) && ((((0bv32 == ~bvand64(33554432bv32, ma) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || 0bv32 == \old(b)) || (~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && (((((((0bv32 == \old(b) || ((((((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && a == \old(b))) || ((b == \old(b) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && a == \old(a))) || ((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && a == \old(b))) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && b == \old(a)) && ~bvadd64(__retres10, 1bv32) == 0bv32) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && a == \old(b)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (((((((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32))) && !~bvult64(\old(a), \old(b))) && a == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) || (((((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && b == \old(a)) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb))) && ((((0bv32 == \old(b) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32)) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0) == ~bvadd64(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), ma)))) || ~bvult64(\old(a), \old(b))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (!(127bv32 == ea) || ~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) [2018-12-03 03:16:03,296 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_25cbb3b5-3c4e-40d9-b907-f3366509751f/bin-2019/utaipan/witness.graphml [2018-12-03 03:16:03,296 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 03:16:03,297 INFO L168 Benchmark]: Toolchain (without parser) took 721655.66 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.0 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -153.1 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:16:03,297 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:16:03,297 INFO L168 Benchmark]: CACSL2BoogieTranslator took 180.57 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 927.3 MB in the end (delta: 17.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 11.5 GB. [2018-12-03 03:16:03,297 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.58 ms. Allocated memory is still 1.0 GB. Free memory is still 927.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 03:16:03,298 INFO L168 Benchmark]: Boogie Preprocessor took 48.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 128.5 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -189.4 MB). Peak memory consumption was 13.7 MB. Max. memory is 11.5 GB. [2018-12-03 03:16:03,298 INFO L168 Benchmark]: RCFGBuilder took 183.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.1 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2018-12-03 03:16:03,298 INFO L168 Benchmark]: TraceAbstraction took 721186.28 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 524.3 kB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -6.0 MB). Peak memory consumption was 346.2 MB. Max. memory is 11.5 GB. [2018-12-03 03:16:03,298 INFO L168 Benchmark]: Witness Printer took 39.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-12-03 03:16:03,299 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 180.57 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 927.3 MB in the end (delta: 17.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.58 ms. Allocated memory is still 1.0 GB. Free memory is still 927.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 48.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 128.5 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -189.4 MB). Peak memory consumption was 13.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 183.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.1 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 721186.28 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 524.3 kB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -6.0 MB). Peak memory consumption was 346.2 MB. Max. memory is 11.5 GB. * Witness Printer took 39.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 7]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 25]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 18]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 83]: Loop Invariant [2018-12-03 03:16:03,301 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-03 03:16:03,302 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-03 03:16:03,304 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-03 03:16:03,304 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] Derived loop invariant: (((((!(0bv32 == \old(b)) || ((a == \old(a) && b == \old(b)) && __retres10 == \old(a))) && (((((((((0bv32 == \old(b) || (((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || (((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32 && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(255bv32 == ~bvlshr64(\old(a), 24bv32))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) || (~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32 && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a)))) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10)) || (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32)) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || (((((((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32))) && !~bvult64(\old(a), \old(b))) && a == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) || (((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) && 0bv32 == mb)) || (((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))))) && ((((0bv32 == ~bvand64(33554432bv32, ma) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || 0bv32 == \old(b)) || (~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea)) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && (((((((0bv32 == \old(b) || ((((((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && a == \old(b))) || ((b == \old(b) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && a == \old(a))) || ((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 && (((((b == \old(a) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && ~bvult64(b, \old(b))) && a == \old(b))) || ((0bv32 == \old(a) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && b == \old(a))) || (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && b == \old(a)) && ~bvadd64(__retres10, 1bv32) == 0bv32) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && a == \old(b)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (((((((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32))) && !~bvult64(\old(a), \old(b))) && a == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) || (((((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && b == \old(a)) && ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) || ((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && !~bvult64(a, \old(a))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb))) && ((((0bv32 == \old(b) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || !~bvult64(ma, 33554432bv32)) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32 :: ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0) == ~bvadd64(~bvneg32(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), ma)))) || ~bvult64(\old(a), \old(b))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (!(127bv32 == ea) || ~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) - InvariantResult [Line: 47]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 27]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. SAFE Result, 721.1s OverallTime, 58 OverallIterations, 5 TraceHistogramMax, 180.6s AutomataDifference, 0.0s DeadEndRemovalTime, 413.2s HoareAnnotationTime, HoareTripleCheckerStatistics: 4226 SDtfs, 4529 SDslu, 42061 SDs, 0 SdLazy, 20847 SolverSat, 2181 SolverUnsat, 15 SolverUnknown, 0 SolverNotchecked, 81.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 11265 GetRequests, 9582 SyntacticMatches, 117 SemanticMatches, 1566 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 10131 ImplicationChecksByTransitivity, 185.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=228occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.9s AutomataMinimizationTime, 58 MinimizatonAttempts, 952 StatesRemovedByMinimization, 50 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 20 LocationsWithAnnotation, 342 PreInvPairs, 1372 NumberOfFragments, 9553 HoareAnnotationTreeSize, 342 FomulaSimplifications, 2220652445 FormulaSimplificationTreeSizeReduction, 4.7s HoareSimplificationTime, 20 FomulaSimplificationsInter, 90378253 FormulaSimplificationTreeSizeReductionInter, 408.4s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 7.9s SatisfiabilityAnalysisTime, 115.7s InterpolantComputationTime, 6572 NumberOfCodeBlocks, 6554 NumberOfCodeBlocksAsserted, 130 NumberOfCheckSat, 10398 ConstructedInterpolants, 138 QuantifiedInterpolants, 4945838 SizeOfPredicates, 1032 NumberOfNonLiveVariables, 11712 ConjunctsInSsa, 1907 ConjunctsInUnsatCore, 160 InterpolantComputations, 20 PerfectInterpolantSequences, 4650/5625 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...