./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0565341d48a13ae8e32e38d25cc35ee0d392a001 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 04:57:30,106 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 04:57:30,107 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 04:57:30,115 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 04:57:30,115 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 04:57:30,116 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 04:57:30,117 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 04:57:30,118 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 04:57:30,119 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 04:57:30,120 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 04:57:30,120 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 04:57:30,121 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 04:57:30,121 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 04:57:30,122 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 04:57:30,123 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 04:57:30,123 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 04:57:30,124 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 04:57:30,125 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 04:57:30,127 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 04:57:30,128 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 04:57:30,128 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 04:57:30,129 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 04:57:30,131 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 04:57:30,131 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 04:57:30,131 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 04:57:30,132 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 04:57:30,133 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 04:57:30,133 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 04:57:30,134 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 04:57:30,135 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 04:57:30,135 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 04:57:30,135 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 04:57:30,136 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 04:57:30,136 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 04:57:30,136 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 04:57:30,137 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 04:57:30,137 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-02 04:57:30,147 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 04:57:30,147 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 04:57:30,148 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 04:57:30,148 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 04:57:30,148 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 04:57:30,148 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 04:57:30,148 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 04:57:30,148 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-02 04:57:30,148 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 04:57:30,149 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 04:57:30,149 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-02 04:57:30,149 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-02 04:57:30,149 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 04:57:30,149 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 04:57:30,149 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 04:57:30,150 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 04:57:30,151 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 04:57:30,151 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 04:57:30,151 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-02 04:57:30,152 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 04:57:30,152 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 04:57:30,152 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-02 04:57:30,152 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0565341d48a13ae8e32e38d25cc35ee0d392a001 [2018-12-02 04:57:30,175 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 04:57:30,184 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 04:57:30,187 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 04:57:30,188 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 04:57:30,188 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 04:57:30,189 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-12-02 04:57:30,228 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/data/eb50f5ba7/f159c7287d13432ebf38b1e099a810a7/FLAG140d14b7a [2018-12-02 04:57:30,653 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 04:57:30,653 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-12-02 04:57:30,660 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/data/eb50f5ba7/f159c7287d13432ebf38b1e099a810a7/FLAG140d14b7a [2018-12-02 04:57:30,668 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/data/eb50f5ba7/f159c7287d13432ebf38b1e099a810a7 [2018-12-02 04:57:30,670 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 04:57:30,671 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 04:57:30,671 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 04:57:30,671 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 04:57:30,673 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 04:57:30,673 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:30,675 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ab2707f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30, skipping insertion in model container [2018-12-02 04:57:30,675 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:30,679 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 04:57:30,700 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 04:57:30,880 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 04:57:30,888 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 04:57:30,963 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 04:57:30,994 INFO L195 MainTranslator]: Completed translation [2018-12-02 04:57:30,994 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30 WrapperNode [2018-12-02 04:57:30,994 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 04:57:30,995 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 04:57:30,995 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 04:57:30,995 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 04:57:31,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,011 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,027 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 04:57:31,027 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 04:57:31,027 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 04:57:31,027 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 04:57:31,033 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,033 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,036 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,036 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,043 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,046 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,048 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... [2018-12-02 04:57:31,050 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 04:57:31,051 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 04:57:31,051 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 04:57:31,051 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 04:57:31,051 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 04:57:31,085 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-02 04:57:31,085 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-02 04:57:31,085 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-02 04:57:31,085 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-02 04:57:31,085 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-02 04:57:31,086 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-02 04:57:31,086 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-02 04:57:31,086 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-02 04:57:31,086 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 04:57:31,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 04:57:31,087 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-02 04:57:31,508 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 04:57:31,508 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-02 04:57:31,509 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 04:57:31 BoogieIcfgContainer [2018-12-02 04:57:31,509 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 04:57:31,509 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 04:57:31,509 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 04:57:31,511 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 04:57:31,511 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 04:57:30" (1/3) ... [2018-12-02 04:57:31,511 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ad81c92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 04:57:31, skipping insertion in model container [2018-12-02 04:57:31,512 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 04:57:30" (2/3) ... [2018-12-02 04:57:31,512 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ad81c92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 04:57:31, skipping insertion in model container [2018-12-02 04:57:31,512 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 04:57:31" (3/3) ... [2018-12-02 04:57:31,513 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_power.opt_false-unreach-call.i [2018-12-02 04:57:31,545 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,545 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,546 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,546 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,546 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,546 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,546 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,547 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,548 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,549 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,550 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,550 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,550 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,550 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,550 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,551 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,552 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,553 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,553 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,554 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,555 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,556 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,557 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,558 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,559 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,560 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,561 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,562 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,563 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,564 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,565 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,566 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,567 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,568 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,569 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,570 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,571 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,572 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,573 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,574 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,575 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,576 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,577 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,578 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,579 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,580 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,581 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,582 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-02 04:57:31,588 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-02 04:57:31,589 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 04:57:31,596 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-02 04:57:31,607 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-02 04:57:31,623 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 04:57:31,623 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 04:57:31,623 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 04:57:31,623 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 04:57:31,624 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 04:57:31,624 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 04:57:31,624 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 04:57:31,624 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 04:57:31,631 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-12-02 04:58:54,922 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-12-02 04:58:54,923 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-12-02 04:58:54,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-02 04:58:54,929 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:58:54,929 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:58:54,930 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:58:54,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:58:54,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-12-02 04:58:54,935 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:58:54,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:58:54,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:58:54,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:58:54,971 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:58:55,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:58:55,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:58:55,087 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:58:55,087 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 04:58:55,087 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:58:55,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 04:58:55,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 04:58:55,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:58:55,101 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-12-02 04:59:01,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:01,713 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-12-02 04:59:01,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 04:59:01,715 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-12-02 04:59:01,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:03,227 INFO L225 Difference]: With dead ends: 604682 [2018-12-02 04:59:03,227 INFO L226 Difference]: Without dead ends: 434932 [2018-12-02 04:59:03,229 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:59:06,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-12-02 04:59:11,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-12-02 04:59:11,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-12-02 04:59:12,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-12-02 04:59:12,759 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-12-02 04:59:12,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:12,760 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-12-02 04:59:12,760 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 04:59:12,760 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-12-02 04:59:12,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-02 04:59:12,774 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:12,775 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:12,775 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:12,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:12,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-12-02 04:59:12,775 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:12,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:12,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:12,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:12,778 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:12,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:12,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:12,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:12,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 04:59:12,853 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:12,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 04:59:12,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 04:59:12,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:59:12,854 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-12-02 04:59:17,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:17,895 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-12-02 04:59:17,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 04:59:17,895 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-12-02 04:59:17,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:18,574 INFO L225 Difference]: With dead ends: 237806 [2018-12-02 04:59:18,574 INFO L226 Difference]: Without dead ends: 229076 [2018-12-02 04:59:18,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 04:59:20,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-12-02 04:59:23,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-12-02 04:59:23,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-12-02 04:59:24,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-12-02 04:59:24,220 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-12-02 04:59:24,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:24,221 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-12-02 04:59:24,221 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 04:59:24,221 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-12-02 04:59:24,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 04:59:24,230 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:24,230 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:24,231 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:24,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:24,231 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-12-02 04:59:24,231 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:24,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:24,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:24,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:24,233 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:24,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:24,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:24,293 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:24,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 04:59:24,293 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:24,293 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 04:59:24,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 04:59:24,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 04:59:24,294 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-12-02 04:59:24,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:24,575 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-12-02 04:59:24,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 04:59:24,576 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-02 04:59:24,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:24,716 INFO L225 Difference]: With dead ends: 62964 [2018-12-02 04:59:24,717 INFO L226 Difference]: Without dead ends: 55536 [2018-12-02 04:59:24,717 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 04:59:24,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-12-02 04:59:25,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-12-02 04:59:25,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-12-02 04:59:26,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-12-02 04:59:26,005 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-12-02 04:59:26,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:26,006 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-12-02 04:59:26,006 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 04:59:26,006 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-12-02 04:59:26,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-02 04:59:26,008 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:26,009 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:26,009 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:26,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:26,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-12-02 04:59:26,009 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:26,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:26,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:26,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:26,011 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:26,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:26,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:26,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:26,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 04:59:26,072 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:26,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 04:59:26,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 04:59:26,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 04:59:26,072 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-12-02 04:59:26,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:26,797 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-12-02 04:59:26,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-02 04:59:26,798 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-02 04:59:26,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:27,058 INFO L225 Difference]: With dead ends: 117028 [2018-12-02 04:59:27,058 INFO L226 Difference]: Without dead ends: 116528 [2018-12-02 04:59:27,058 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-02 04:59:27,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-12-02 04:59:28,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-12-02 04:59:28,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-12-02 04:59:28,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-12-02 04:59:28,701 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-12-02 04:59:28,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:28,702 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-12-02 04:59:28,702 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 04:59:28,702 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-12-02 04:59:28,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-02 04:59:28,706 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:28,706 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:28,706 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:28,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:28,706 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-12-02 04:59:28,706 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:28,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:28,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:28,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:28,709 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:28,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:28,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:28,740 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:28,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 04:59:28,740 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:28,740 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 04:59:28,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 04:59:28,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:28,740 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-12-02 04:59:29,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:29,140 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-12-02 04:59:29,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 04:59:29,141 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-12-02 04:59:29,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:29,360 INFO L225 Difference]: With dead ends: 99897 [2018-12-02 04:59:29,360 INFO L226 Difference]: Without dead ends: 99897 [2018-12-02 04:59:29,360 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:29,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-12-02 04:59:30,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-12-02 04:59:30,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-12-02 04:59:30,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-12-02 04:59:30,874 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-12-02 04:59:30,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:30,875 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-12-02 04:59:30,875 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 04:59:30,875 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-12-02 04:59:30,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-02 04:59:30,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:30,881 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:30,881 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:30,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:30,881 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-12-02 04:59:30,881 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:30,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:30,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:30,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:30,883 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:30,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:30,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:30,948 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:30,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 04:59:30,948 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:30,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 04:59:30,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 04:59:30,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-02 04:59:30,949 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-12-02 04:59:31,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:31,794 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-12-02 04:59:31,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 04:59:31,794 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-12-02 04:59:31,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:32,020 INFO L225 Difference]: With dead ends: 104973 [2018-12-02 04:59:32,020 INFO L226 Difference]: Without dead ends: 104443 [2018-12-02 04:59:32,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-12-02 04:59:32,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-12-02 04:59:33,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-12-02 04:59:33,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-12-02 04:59:33,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-12-02 04:59:33,510 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-12-02 04:59:33,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:33,511 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-12-02 04:59:33,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 04:59:33,511 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-12-02 04:59:33,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 04:59:33,529 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:33,529 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:33,529 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:33,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:33,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-12-02 04:59:33,529 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:33,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:33,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:33,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:33,531 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:33,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:33,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:33,581 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:33,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 04:59:33,581 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:33,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 04:59:33,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 04:59:33,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:59:33,582 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-12-02 04:59:33,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:33,979 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-12-02 04:59:33,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 04:59:33,979 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-12-02 04:59:33,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:34,151 INFO L225 Difference]: With dead ends: 85627 [2018-12-02 04:59:34,152 INFO L226 Difference]: Without dead ends: 85627 [2018-12-02 04:59:34,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 04:59:34,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-12-02 04:59:35,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-12-02 04:59:35,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-12-02 04:59:35,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-12-02 04:59:35,528 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-12-02 04:59:35,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:35,528 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-12-02 04:59:35,528 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 04:59:35,528 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-12-02 04:59:35,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-02 04:59:35,546 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:35,546 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:35,547 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:35,547 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:35,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-12-02 04:59:35,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:35,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:35,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:35,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:35,548 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:35,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:35,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:35,734 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:35,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 04:59:35,734 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:35,734 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 04:59:35,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 04:59:35,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-02 04:59:35,735 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-12-02 04:59:36,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:36,920 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-12-02 04:59:36,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 04:59:36,921 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-12-02 04:59:36,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:37,153 INFO L225 Difference]: With dead ends: 111736 [2018-12-02 04:59:37,153 INFO L226 Difference]: Without dead ends: 111381 [2018-12-02 04:59:37,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-12-02 04:59:37,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-12-02 04:59:38,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-12-02 04:59:38,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-12-02 04:59:38,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-12-02 04:59:38,975 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-12-02 04:59:38,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:38,976 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-12-02 04:59:38,976 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 04:59:38,976 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-12-02 04:59:39,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-02 04:59:39,012 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:39,012 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:39,012 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:39,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:39,012 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-12-02 04:59:39,012 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:39,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:39,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:39,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:39,014 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:39,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:39,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:39,035 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:39,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 04:59:39,035 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:39,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 04:59:39,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 04:59:39,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:39,036 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-12-02 04:59:39,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:39,480 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-12-02 04:59:39,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 04:59:39,480 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-12-02 04:59:39,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:39,713 INFO L225 Difference]: With dead ends: 110538 [2018-12-02 04:59:39,713 INFO L226 Difference]: Without dead ends: 110538 [2018-12-02 04:59:39,713 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:39,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-12-02 04:59:42,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-12-02 04:59:42,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-12-02 04:59:43,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-12-02 04:59:43,109 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-12-02 04:59:43,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:43,109 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-12-02 04:59:43,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 04:59:43,109 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-12-02 04:59:43,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 04:59:43,145 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:43,145 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:43,146 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:43,146 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:43,146 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-12-02 04:59:43,146 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:43,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:43,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:43,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:43,147 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:43,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:43,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:43,189 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:43,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 04:59:43,189 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:43,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 04:59:43,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 04:59:43,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:59:43,190 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-12-02 04:59:43,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:43,830 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-12-02 04:59:43,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 04:59:43,831 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-02 04:59:43,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:44,086 INFO L225 Difference]: With dead ends: 119085 [2018-12-02 04:59:44,086 INFO L226 Difference]: Without dead ends: 119085 [2018-12-02 04:59:44,086 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 04:59:44,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-12-02 04:59:45,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-12-02 04:59:45,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-12-02 04:59:45,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-12-02 04:59:45,885 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-12-02 04:59:45,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:45,885 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-12-02 04:59:45,885 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 04:59:45,885 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-12-02 04:59:45,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-02 04:59:45,935 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:45,936 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:45,936 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:45,936 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:45,936 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-12-02 04:59:45,936 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:45,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:45,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:45,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:45,938 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:45,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:45,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:45,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:45,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 04:59:45,967 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:45,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 04:59:45,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 04:59:45,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:45,968 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-12-02 04:59:46,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:46,514 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-12-02 04:59:46,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 04:59:46,514 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-12-02 04:59:46,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:47,023 INFO L225 Difference]: With dead ends: 107236 [2018-12-02 04:59:47,023 INFO L226 Difference]: Without dead ends: 107236 [2018-12-02 04:59:47,024 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 04:59:47,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-12-02 04:59:48,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-12-02 04:59:48,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-12-02 04:59:48,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-12-02 04:59:48,580 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-12-02 04:59:48,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:48,580 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-12-02 04:59:48,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 04:59:48,580 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-12-02 04:59:48,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 04:59:48,632 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:48,632 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:48,632 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:48,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:48,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-12-02 04:59:48,633 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:48,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:48,634 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:48,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:48,872 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:48,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:48,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:48,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:48,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 04:59:48,922 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:48,922 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 04:59:48,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 04:59:48,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 04:59:48,922 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-12-02 04:59:50,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:50,090 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-12-02 04:59:50,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 04:59:50,090 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 04:59:50,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:50,372 INFO L225 Difference]: With dead ends: 138332 [2018-12-02 04:59:50,372 INFO L226 Difference]: Without dead ends: 137832 [2018-12-02 04:59:50,373 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 04:59:50,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-12-02 04:59:52,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-12-02 04:59:52,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-12-02 04:59:52,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-12-02 04:59:52,415 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-12-02 04:59:52,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:52,416 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-12-02 04:59:52,416 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 04:59:52,416 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-12-02 04:59:52,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 04:59:52,472 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:52,472 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:52,472 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:52,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:52,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-12-02 04:59:52,473 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:52,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:52,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:52,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:52,474 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:52,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:52,565 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:52,565 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 04:59:52,566 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:52,566 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 04:59:52,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 04:59:52,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-02 04:59:52,566 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-12-02 04:59:53,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:53,606 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-12-02 04:59:53,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 04:59:53,607 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 04:59:53,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:53,855 INFO L225 Difference]: With dead ends: 133218 [2018-12-02 04:59:53,855 INFO L226 Difference]: Without dead ends: 133218 [2018-12-02 04:59:53,856 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-02 04:59:54,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-12-02 04:59:55,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-12-02 04:59:55,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-12-02 04:59:57,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-12-02 04:59:57,919 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-12-02 04:59:57,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 04:59:57,919 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-12-02 04:59:57,919 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 04:59:57,919 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-12-02 04:59:57,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 04:59:57,970 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 04:59:57,971 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 04:59:57,971 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 04:59:57,971 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 04:59:57,971 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-12-02 04:59:57,971 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 04:59:57,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:57,972 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 04:59:57,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 04:59:57,972 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 04:59:57,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 04:59:58,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 04:59:58,024 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 04:59:58,024 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 04:59:58,024 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 04:59:58,024 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 04:59:58,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 04:59:58,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 04:59:58,025 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-12-02 04:59:58,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 04:59:58,828 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-12-02 04:59:58,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 04:59:58,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 04:59:58,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 04:59:59,135 INFO L225 Difference]: With dead ends: 151316 [2018-12-02 04:59:59,135 INFO L226 Difference]: Without dead ends: 151316 [2018-12-02 04:59:59,135 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 04:59:59,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-12-02 05:00:01,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-12-02 05:00:01,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-12-02 05:00:01,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-12-02 05:00:01,377 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-12-02 05:00:01,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:01,377 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-12-02 05:00:01,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:01,377 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-12-02 05:00:01,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 05:00:01,443 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:01,443 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:01,443 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:01,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:01,444 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-12-02 05:00:01,444 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:01,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:01,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:01,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:01,445 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:01,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:01,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:01,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:01,494 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:01,494 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:01,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:01,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:01,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:01,495 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-12-02 05:00:02,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:02,779 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-12-02 05:00:02,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 05:00:02,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-02 05:00:02,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:03,224 INFO L225 Difference]: With dead ends: 206315 [2018-12-02 05:00:03,224 INFO L226 Difference]: Without dead ends: 206315 [2018-12-02 05:00:03,224 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-02 05:00:03,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-12-02 05:00:05,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-12-02 05:00:05,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-12-02 05:00:06,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-12-02 05:00:06,505 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-12-02 05:00:06,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:06,506 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-12-02 05:00:06,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:06,506 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-12-02 05:00:06,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-02 05:00:06,581 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:06,581 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:06,582 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:06,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:06,582 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-12-02 05:00:06,582 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:06,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:06,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:06,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:06,583 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:06,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:06,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:06,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:06,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 05:00:06,627 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:06,627 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 05:00:06,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 05:00:06,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:06,627 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 6 states. [2018-12-02 05:00:06,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:06,814 INFO L93 Difference]: Finished difference Result 54182 states and 168525 transitions. [2018-12-02 05:00:06,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 05:00:06,815 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-02 05:00:06,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:06,871 INFO L225 Difference]: With dead ends: 54182 [2018-12-02 05:00:06,871 INFO L226 Difference]: Without dead ends: 44774 [2018-12-02 05:00:06,871 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-02 05:00:06,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44774 states. [2018-12-02 05:00:07,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44774 to 38449. [2018-12-02 05:00:07,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38449 states. [2018-12-02 05:00:07,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38449 states to 38449 states and 117604 transitions. [2018-12-02 05:00:07,345 INFO L78 Accepts]: Start accepts. Automaton has 38449 states and 117604 transitions. Word has length 95 [2018-12-02 05:00:07,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:07,346 INFO L480 AbstractCegarLoop]: Abstraction has 38449 states and 117604 transitions. [2018-12-02 05:00:07,346 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 05:00:07,346 INFO L276 IsEmpty]: Start isEmpty. Operand 38449 states and 117604 transitions. [2018-12-02 05:00:07,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 05:00:07,374 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:07,374 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:07,374 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:07,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:07,375 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-12-02 05:00:07,375 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:07,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:07,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:07,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:07,376 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:07,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:07,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:07,408 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:07,408 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:07,408 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:07,408 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:07,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:07,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:07,408 INFO L87 Difference]: Start difference. First operand 38449 states and 117604 transitions. Second operand 5 states. [2018-12-02 05:00:07,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:07,587 INFO L93 Difference]: Finished difference Result 43859 states and 134447 transitions. [2018-12-02 05:00:07,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 05:00:07,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 05:00:07,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:07,638 INFO L225 Difference]: With dead ends: 43859 [2018-12-02 05:00:07,639 INFO L226 Difference]: Without dead ends: 43859 [2018-12-02 05:00:07,639 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-02 05:00:07,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43859 states. [2018-12-02 05:00:08,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43859 to 38564. [2018-12-02 05:00:08,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38564 states. [2018-12-02 05:00:09,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38564 states to 38564 states and 117926 transitions. [2018-12-02 05:00:09,349 INFO L78 Accepts]: Start accepts. Automaton has 38564 states and 117926 transitions. Word has length 98 [2018-12-02 05:00:09,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:09,349 INFO L480 AbstractCegarLoop]: Abstraction has 38564 states and 117926 transitions. [2018-12-02 05:00:09,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:09,349 INFO L276 IsEmpty]: Start isEmpty. Operand 38564 states and 117926 transitions. [2018-12-02 05:00:09,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 05:00:09,374 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:09,374 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:09,374 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:09,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:09,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-12-02 05:00:09,375 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:09,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:09,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:09,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:09,376 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:09,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:09,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:09,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:09,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:09,448 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:09,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:09,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:09,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:09,449 INFO L87 Difference]: Start difference. First operand 38564 states and 117926 transitions. Second operand 5 states. [2018-12-02 05:00:09,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:09,625 INFO L93 Difference]: Finished difference Result 49646 states and 153106 transitions. [2018-12-02 05:00:09,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 05:00:09,626 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-02 05:00:09,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:09,687 INFO L225 Difference]: With dead ends: 49646 [2018-12-02 05:00:09,687 INFO L226 Difference]: Without dead ends: 49646 [2018-12-02 05:00:09,688 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:09,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49646 states. [2018-12-02 05:00:10,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49646 to 39434. [2018-12-02 05:00:10,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39434 states. [2018-12-02 05:00:10,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39434 states to 39434 states and 120372 transitions. [2018-12-02 05:00:10,139 INFO L78 Accepts]: Start accepts. Automaton has 39434 states and 120372 transitions. Word has length 98 [2018-12-02 05:00:10,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:10,139 INFO L480 AbstractCegarLoop]: Abstraction has 39434 states and 120372 transitions. [2018-12-02 05:00:10,139 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:10,139 INFO L276 IsEmpty]: Start isEmpty. Operand 39434 states and 120372 transitions. [2018-12-02 05:00:10,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-02 05:00:10,165 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:10,165 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:10,166 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:10,166 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:10,166 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-12-02 05:00:10,166 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:10,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:10,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:10,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:10,167 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:10,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:10,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:10,247 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:10,248 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 05:00:10,248 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:10,248 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 05:00:10,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 05:00:10,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:10,248 INFO L87 Difference]: Start difference. First operand 39434 states and 120372 transitions. Second operand 6 states. [2018-12-02 05:00:10,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:10,843 INFO L93 Difference]: Finished difference Result 78743 states and 240695 transitions. [2018-12-02 05:00:10,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-02 05:00:10,843 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-12-02 05:00:10,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:10,935 INFO L225 Difference]: With dead ends: 78743 [2018-12-02 05:00:10,936 INFO L226 Difference]: Without dead ends: 78148 [2018-12-02 05:00:10,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-02 05:00:11,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78148 states. [2018-12-02 05:00:11,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78148 to 42604. [2018-12-02 05:00:11,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42604 states. [2018-12-02 05:00:11,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42604 states to 42604 states and 129633 transitions. [2018-12-02 05:00:11,559 INFO L78 Accepts]: Start accepts. Automaton has 42604 states and 129633 transitions. Word has length 98 [2018-12-02 05:00:11,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:11,559 INFO L480 AbstractCegarLoop]: Abstraction has 42604 states and 129633 transitions. [2018-12-02 05:00:11,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 05:00:11,559 INFO L276 IsEmpty]: Start isEmpty. Operand 42604 states and 129633 transitions. [2018-12-02 05:00:11,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-12-02 05:00:11,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:11,680 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:11,680 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:11,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:11,680 INFO L82 PathProgramCache]: Analyzing trace with hash 1472576150, now seen corresponding path program 1 times [2018-12-02 05:00:11,680 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:11,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:11,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:11,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:11,681 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:11,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:11,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:11,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:11,722 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 05:00:11,722 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:11,722 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 05:00:11,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 05:00:11,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 05:00:11,723 INFO L87 Difference]: Start difference. First operand 42604 states and 129633 transitions. Second operand 4 states. [2018-12-02 05:00:11,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:11,891 INFO L93 Difference]: Finished difference Result 47734 states and 144082 transitions. [2018-12-02 05:00:11,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 05:00:11,892 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-12-02 05:00:11,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:11,944 INFO L225 Difference]: With dead ends: 47734 [2018-12-02 05:00:11,945 INFO L226 Difference]: Without dead ends: 47734 [2018-12-02 05:00:11,945 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:12,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47734 states. [2018-12-02 05:00:12,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47734 to 44939. [2018-12-02 05:00:12,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44939 states. [2018-12-02 05:00:12,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44939 states to 44939 states and 135996 transitions. [2018-12-02 05:00:12,448 INFO L78 Accepts]: Start accepts. Automaton has 44939 states and 135996 transitions. Word has length 120 [2018-12-02 05:00:12,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:12,448 INFO L480 AbstractCegarLoop]: Abstraction has 44939 states and 135996 transitions. [2018-12-02 05:00:12,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 05:00:12,449 INFO L276 IsEmpty]: Start isEmpty. Operand 44939 states and 135996 transitions. [2018-12-02 05:00:12,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:12,488 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:12,488 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:12,488 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:12,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:12,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1945328128, now seen corresponding path program 1 times [2018-12-02 05:00:12,489 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:12,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:12,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:12,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:12,490 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:12,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:12,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:12,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:12,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:12,547 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:12,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:12,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:12,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:12,548 INFO L87 Difference]: Start difference. First operand 44939 states and 135996 transitions. Second operand 5 states. [2018-12-02 05:00:12,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:12,766 INFO L93 Difference]: Finished difference Result 53609 states and 161847 transitions. [2018-12-02 05:00:12,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 05:00:12,767 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-12-02 05:00:12,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:12,830 INFO L225 Difference]: With dead ends: 53609 [2018-12-02 05:00:12,830 INFO L226 Difference]: Without dead ends: 53609 [2018-12-02 05:00:12,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 05:00:12,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53609 states. [2018-12-02 05:00:13,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53609 to 45069. [2018-12-02 05:00:13,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45069 states. [2018-12-02 05:00:13,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45069 states to 45069 states and 136195 transitions. [2018-12-02 05:00:13,360 INFO L78 Accepts]: Start accepts. Automaton has 45069 states and 136195 transitions. Word has length 122 [2018-12-02 05:00:13,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:13,360 INFO L480 AbstractCegarLoop]: Abstraction has 45069 states and 136195 transitions. [2018-12-02 05:00:13,360 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:13,360 INFO L276 IsEmpty]: Start isEmpty. Operand 45069 states and 136195 transitions. [2018-12-02 05:00:13,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:13,400 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:13,400 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:13,400 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:13,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:13,401 INFO L82 PathProgramCache]: Analyzing trace with hash -483748129, now seen corresponding path program 1 times [2018-12-02 05:00:13,401 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:13,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:13,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:13,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:13,402 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:13,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:13,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:13,471 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:13,471 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:13,471 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:13,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:13,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:13,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:13,471 INFO L87 Difference]: Start difference. First operand 45069 states and 136195 transitions. Second operand 5 states. [2018-12-02 05:00:13,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:13,946 INFO L93 Difference]: Finished difference Result 73185 states and 219003 transitions. [2018-12-02 05:00:13,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 05:00:13,946 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-12-02 05:00:13,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:14,031 INFO L225 Difference]: With dead ends: 73185 [2018-12-02 05:00:14,031 INFO L226 Difference]: Without dead ends: 73185 [2018-12-02 05:00:14,031 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:14,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73185 states. [2018-12-02 05:00:14,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73185 to 47879. [2018-12-02 05:00:14,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47879 states. [2018-12-02 05:00:14,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47879 states to 47879 states and 144868 transitions. [2018-12-02 05:00:14,727 INFO L78 Accepts]: Start accepts. Automaton has 47879 states and 144868 transitions. Word has length 122 [2018-12-02 05:00:14,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:14,727 INFO L480 AbstractCegarLoop]: Abstraction has 47879 states and 144868 transitions. [2018-12-02 05:00:14,727 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:14,727 INFO L276 IsEmpty]: Start isEmpty. Operand 47879 states and 144868 transitions. [2018-12-02 05:00:14,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:14,769 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:14,769 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:14,769 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:14,770 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:14,770 INFO L82 PathProgramCache]: Analyzing trace with hash -132948192, now seen corresponding path program 1 times [2018-12-02 05:00:14,770 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:14,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:14,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:14,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:14,771 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:14,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:14,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:14,839 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:14,839 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 05:00:14,839 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:14,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 05:00:14,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 05:00:14,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:14,840 INFO L87 Difference]: Start difference. First operand 47879 states and 144868 transitions. Second operand 6 states. [2018-12-02 05:00:15,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:15,258 INFO L93 Difference]: Finished difference Result 61355 states and 184599 transitions. [2018-12-02 05:00:15,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 05:00:15,259 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-12-02 05:00:15,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:15,330 INFO L225 Difference]: With dead ends: 61355 [2018-12-02 05:00:15,330 INFO L226 Difference]: Without dead ends: 61227 [2018-12-02 05:00:15,331 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-02 05:00:15,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61227 states. [2018-12-02 05:00:15,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61227 to 51369. [2018-12-02 05:00:15,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51369 states. [2018-12-02 05:00:15,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51369 states to 51369 states and 155865 transitions. [2018-12-02 05:00:15,993 INFO L78 Accepts]: Start accepts. Automaton has 51369 states and 155865 transitions. Word has length 122 [2018-12-02 05:00:15,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:15,994 INFO L480 AbstractCegarLoop]: Abstraction has 51369 states and 155865 transitions. [2018-12-02 05:00:15,994 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 05:00:15,994 INFO L276 IsEmpty]: Start isEmpty. Operand 51369 states and 155865 transitions. [2018-12-02 05:00:16,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:16,046 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:16,046 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:16,047 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:16,047 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:16,047 INFO L82 PathProgramCache]: Analyzing trace with hash -426351199, now seen corresponding path program 1 times [2018-12-02 05:00:16,047 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:16,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:16,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:16,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:16,048 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:16,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:16,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:16,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:16,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-02 05:00:16,111 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:16,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-02 05:00:16,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-02 05:00:16,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-02 05:00:16,112 INFO L87 Difference]: Start difference. First operand 51369 states and 155865 transitions. Second operand 8 states. [2018-12-02 05:00:16,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:16,667 INFO L93 Difference]: Finished difference Result 83081 states and 255622 transitions. [2018-12-02 05:00:16,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-02 05:00:16,668 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 122 [2018-12-02 05:00:16,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:16,856 INFO L225 Difference]: With dead ends: 83081 [2018-12-02 05:00:16,856 INFO L226 Difference]: Without dead ends: 83081 [2018-12-02 05:00:16,856 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-02 05:00:16,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83081 states. [2018-12-02 05:00:17,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83081 to 55077. [2018-12-02 05:00:17,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55077 states. [2018-12-02 05:00:17,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55077 states to 55077 states and 168055 transitions. [2018-12-02 05:00:17,589 INFO L78 Accepts]: Start accepts. Automaton has 55077 states and 168055 transitions. Word has length 122 [2018-12-02 05:00:17,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:17,590 INFO L480 AbstractCegarLoop]: Abstraction has 55077 states and 168055 transitions. [2018-12-02 05:00:17,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-02 05:00:17,590 INFO L276 IsEmpty]: Start isEmpty. Operand 55077 states and 168055 transitions. [2018-12-02 05:00:17,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:17,645 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:17,645 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:17,645 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:17,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:17,645 INFO L82 PathProgramCache]: Analyzing trace with hash 2061161634, now seen corresponding path program 1 times [2018-12-02 05:00:17,646 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:17,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:17,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:17,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:17,647 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:17,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:17,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:17,717 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:17,717 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 05:00:17,717 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:17,717 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 05:00:17,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 05:00:17,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:17,718 INFO L87 Difference]: Start difference. First operand 55077 states and 168055 transitions. Second operand 6 states. [2018-12-02 05:00:17,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:17,907 INFO L93 Difference]: Finished difference Result 69153 states and 210071 transitions. [2018-12-02 05:00:17,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 05:00:17,908 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-12-02 05:00:17,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:17,991 INFO L225 Difference]: With dead ends: 69153 [2018-12-02 05:00:17,991 INFO L226 Difference]: Without dead ends: 69153 [2018-12-02 05:00:17,991 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:18,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-12-02 05:00:18,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 55867. [2018-12-02 05:00:18,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55867 states. [2018-12-02 05:00:18,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55867 states to 55867 states and 169562 transitions. [2018-12-02 05:00:18,704 INFO L78 Accepts]: Start accepts. Automaton has 55867 states and 169562 transitions. Word has length 122 [2018-12-02 05:00:18,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:18,704 INFO L480 AbstractCegarLoop]: Abstraction has 55867 states and 169562 transitions. [2018-12-02 05:00:18,704 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 05:00:18,705 INFO L276 IsEmpty]: Start isEmpty. Operand 55867 states and 169562 transitions. [2018-12-02 05:00:18,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-02 05:00:18,760 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:18,760 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:18,760 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:18,760 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:18,760 INFO L82 PathProgramCache]: Analyzing trace with hash -2022454749, now seen corresponding path program 1 times [2018-12-02 05:00:18,760 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:18,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:18,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:18,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:18,761 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:18,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:18,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:18,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:18,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 05:00:18,791 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:18,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 05:00:18,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 05:00:18,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 05:00:18,791 INFO L87 Difference]: Start difference. First operand 55867 states and 169562 transitions. Second operand 3 states. [2018-12-02 05:00:18,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:18,936 INFO L93 Difference]: Finished difference Result 54843 states and 165402 transitions. [2018-12-02 05:00:18,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 05:00:18,936 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 122 [2018-12-02 05:00:18,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:19,001 INFO L225 Difference]: With dead ends: 54843 [2018-12-02 05:00:19,001 INFO L226 Difference]: Without dead ends: 54715 [2018-12-02 05:00:19,001 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 05:00:19,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54715 states. [2018-12-02 05:00:19,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54715 to 46678. [2018-12-02 05:00:19,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46678 states. [2018-12-02 05:00:19,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46678 states to 46678 states and 139997 transitions. [2018-12-02 05:00:19,633 INFO L78 Accepts]: Start accepts. Automaton has 46678 states and 139997 transitions. Word has length 122 [2018-12-02 05:00:19,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:19,633 INFO L480 AbstractCegarLoop]: Abstraction has 46678 states and 139997 transitions. [2018-12-02 05:00:19,633 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 05:00:19,633 INFO L276 IsEmpty]: Start isEmpty. Operand 46678 states and 139997 transitions. [2018-12-02 05:00:19,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:19,674 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:19,674 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:19,674 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:19,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:19,674 INFO L82 PathProgramCache]: Analyzing trace with hash 424243755, now seen corresponding path program 1 times [2018-12-02 05:00:19,674 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:19,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:19,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:19,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:19,675 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:19,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:19,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:19,711 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:19,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 05:00:19,711 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:19,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 05:00:19,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 05:00:19,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 05:00:19,712 INFO L87 Difference]: Start difference. First operand 46678 states and 139997 transitions. Second operand 4 states. [2018-12-02 05:00:19,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:19,883 INFO L93 Difference]: Finished difference Result 49429 states and 148437 transitions. [2018-12-02 05:00:19,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 05:00:19,883 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 05:00:19,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:19,942 INFO L225 Difference]: With dead ends: 49429 [2018-12-02 05:00:19,942 INFO L226 Difference]: Without dead ends: 49429 [2018-12-02 05:00:19,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 05:00:20,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49429 states. [2018-12-02 05:00:20,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49429 to 47223. [2018-12-02 05:00:20,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47223 states. [2018-12-02 05:00:20,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47223 states to 47223 states and 141618 transitions. [2018-12-02 05:00:20,488 INFO L78 Accepts]: Start accepts. Automaton has 47223 states and 141618 transitions. Word has length 124 [2018-12-02 05:00:20,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:20,488 INFO L480 AbstractCegarLoop]: Abstraction has 47223 states and 141618 transitions. [2018-12-02 05:00:20,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 05:00:20,489 INFO L276 IsEmpty]: Start isEmpty. Operand 47223 states and 141618 transitions. [2018-12-02 05:00:20,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:20,529 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:20,530 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:20,530 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:20,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:20,530 INFO L82 PathProgramCache]: Analyzing trace with hash -572828598, now seen corresponding path program 1 times [2018-12-02 05:00:20,530 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:20,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:20,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:20,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:20,531 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:20,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:20,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:20,573 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:20,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 05:00:20,574 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:20,574 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 05:00:20,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 05:00:20,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 05:00:20,574 INFO L87 Difference]: Start difference. First operand 47223 states and 141618 transitions. Second operand 4 states. [2018-12-02 05:00:20,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:20,875 INFO L93 Difference]: Finished difference Result 58413 states and 174275 transitions. [2018-12-02 05:00:20,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 05:00:20,875 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 05:00:20,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:20,943 INFO L225 Difference]: With dead ends: 58413 [2018-12-02 05:00:20,943 INFO L226 Difference]: Without dead ends: 58038 [2018-12-02 05:00:20,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:21,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58038 states. [2018-12-02 05:00:21,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58038 to 50983. [2018-12-02 05:00:21,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50983 states. [2018-12-02 05:00:21,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50983 states to 50983 states and 152251 transitions. [2018-12-02 05:00:21,706 INFO L78 Accepts]: Start accepts. Automaton has 50983 states and 152251 transitions. Word has length 124 [2018-12-02 05:00:21,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:21,706 INFO L480 AbstractCegarLoop]: Abstraction has 50983 states and 152251 transitions. [2018-12-02 05:00:21,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 05:00:21,706 INFO L276 IsEmpty]: Start isEmpty. Operand 50983 states and 152251 transitions. [2018-12-02 05:00:21,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:21,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:21,753 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:21,753 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:21,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:21,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1385857772, now seen corresponding path program 1 times [2018-12-02 05:00:21,753 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:21,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:21,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:21,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:21,755 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:21,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:21,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:21,820 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:21,820 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 05:00:21,820 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:21,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 05:00:21,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 05:00:21,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-02 05:00:21,820 INFO L87 Difference]: Start difference. First operand 50983 states and 152251 transitions. Second operand 7 states. [2018-12-02 05:00:22,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:22,248 INFO L93 Difference]: Finished difference Result 60459 states and 180186 transitions. [2018-12-02 05:00:22,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 05:00:22,249 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 124 [2018-12-02 05:00:22,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:22,320 INFO L225 Difference]: With dead ends: 60459 [2018-12-02 05:00:22,320 INFO L226 Difference]: Without dead ends: 60459 [2018-12-02 05:00:22,320 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-02 05:00:22,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60459 states. [2018-12-02 05:00:22,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60459 to 56588. [2018-12-02 05:00:22,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56588 states. [2018-12-02 05:00:23,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56588 states to 56588 states and 168755 transitions. [2018-12-02 05:00:23,010 INFO L78 Accepts]: Start accepts. Automaton has 56588 states and 168755 transitions. Word has length 124 [2018-12-02 05:00:23,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:23,010 INFO L480 AbstractCegarLoop]: Abstraction has 56588 states and 168755 transitions. [2018-12-02 05:00:23,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 05:00:23,010 INFO L276 IsEmpty]: Start isEmpty. Operand 56588 states and 168755 transitions. [2018-12-02 05:00:23,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:23,065 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:23,066 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:23,066 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:23,066 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:23,066 INFO L82 PathProgramCache]: Analyzing trace with hash 388785419, now seen corresponding path program 1 times [2018-12-02 05:00:23,066 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:23,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:23,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:23,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:23,067 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:23,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:23,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:23,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:23,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 05:00:23,098 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:23,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 05:00:23,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 05:00:23,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 05:00:23,099 INFO L87 Difference]: Start difference. First operand 56588 states and 168755 transitions. Second operand 4 states. [2018-12-02 05:00:23,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:23,351 INFO L93 Difference]: Finished difference Result 57164 states and 170627 transitions. [2018-12-02 05:00:23,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 05:00:23,352 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-02 05:00:23,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:23,417 INFO L225 Difference]: With dead ends: 57164 [2018-12-02 05:00:23,418 INFO L226 Difference]: Without dead ends: 57036 [2018-12-02 05:00:23,418 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:23,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57036 states. [2018-12-02 05:00:23,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57036 to 54596. [2018-12-02 05:00:23,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54596 states. [2018-12-02 05:00:24,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54596 states to 54596 states and 162867 transitions. [2018-12-02 05:00:24,075 INFO L78 Accepts]: Start accepts. Automaton has 54596 states and 162867 transitions. Word has length 124 [2018-12-02 05:00:24,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:24,075 INFO L480 AbstractCegarLoop]: Abstraction has 54596 states and 162867 transitions. [2018-12-02 05:00:24,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 05:00:24,075 INFO L276 IsEmpty]: Start isEmpty. Operand 54596 states and 162867 transitions. [2018-12-02 05:00:24,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:24,130 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:24,130 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:24,130 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:24,130 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:24,130 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-12-02 05:00:24,130 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:24,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:24,131 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:24,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:24,131 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:24,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:24,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:24,202 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:24,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 05:00:24,202 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:24,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 05:00:24,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 05:00:24,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-02 05:00:24,203 INFO L87 Difference]: Start difference. First operand 54596 states and 162867 transitions. Second operand 10 states. [2018-12-02 05:00:24,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:24,929 INFO L93 Difference]: Finished difference Result 64859 states and 193823 transitions. [2018-12-02 05:00:24,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-02 05:00:24,929 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-12-02 05:00:24,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:25,003 INFO L225 Difference]: With dead ends: 64859 [2018-12-02 05:00:25,003 INFO L226 Difference]: Without dead ends: 64859 [2018-12-02 05:00:25,003 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-12-02 05:00:25,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64859 states. [2018-12-02 05:00:25,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64859 to 58091. [2018-12-02 05:00:25,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58091 states. [2018-12-02 05:00:25,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58091 states to 58091 states and 173498 transitions. [2018-12-02 05:00:25,692 INFO L78 Accepts]: Start accepts. Automaton has 58091 states and 173498 transitions. Word has length 124 [2018-12-02 05:00:25,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:25,692 INFO L480 AbstractCegarLoop]: Abstraction has 58091 states and 173498 transitions. [2018-12-02 05:00:25,692 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 05:00:25,693 INFO L276 IsEmpty]: Start isEmpty. Operand 58091 states and 173498 transitions. [2018-12-02 05:00:25,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:25,751 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:25,751 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:25,752 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:25,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:25,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-12-02 05:00:25,752 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:25,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:25,753 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:25,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:25,753 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:25,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:25,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:25,830 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:25,830 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:25,830 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:25,830 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:25,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:25,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:25,831 INFO L87 Difference]: Start difference. First operand 58091 states and 173498 transitions. Second operand 5 states. [2018-12-02 05:00:26,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:26,000 INFO L93 Difference]: Finished difference Result 57771 states and 172266 transitions. [2018-12-02 05:00:26,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 05:00:26,000 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-02 05:00:26,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:26,068 INFO L225 Difference]: With dead ends: 57771 [2018-12-02 05:00:26,069 INFO L226 Difference]: Without dead ends: 57771 [2018-12-02 05:00:26,069 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:26,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57771 states. [2018-12-02 05:00:26,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57771 to 52564. [2018-12-02 05:00:26,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52564 states. [2018-12-02 05:00:26,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52564 states to 52564 states and 157066 transitions. [2018-12-02 05:00:26,705 INFO L78 Accepts]: Start accepts. Automaton has 52564 states and 157066 transitions. Word has length 124 [2018-12-02 05:00:26,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:26,705 INFO L480 AbstractCegarLoop]: Abstraction has 52564 states and 157066 transitions. [2018-12-02 05:00:26,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:26,706 INFO L276 IsEmpty]: Start isEmpty. Operand 52564 states and 157066 transitions. [2018-12-02 05:00:26,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-02 05:00:26,757 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:26,757 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:26,758 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:26,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:26,758 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-12-02 05:00:26,758 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:26,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:26,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:26,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:26,759 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:26,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:26,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:26,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:26,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 05:00:26,781 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:26,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 05:00:26,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 05:00:26,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 05:00:26,782 INFO L87 Difference]: Start difference. First operand 52564 states and 157066 transitions. Second operand 3 states. [2018-12-02 05:00:26,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:26,912 INFO L93 Difference]: Finished difference Result 52564 states and 157002 transitions. [2018-12-02 05:00:26,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 05:00:26,912 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-12-02 05:00:26,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:26,976 INFO L225 Difference]: With dead ends: 52564 [2018-12-02 05:00:26,976 INFO L226 Difference]: Without dead ends: 52564 [2018-12-02 05:00:26,976 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 05:00:27,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52564 states. [2018-12-02 05:00:27,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52564 to 52564. [2018-12-02 05:00:27,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52564 states. [2018-12-02 05:00:27,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52564 states to 52564 states and 157002 transitions. [2018-12-02 05:00:27,587 INFO L78 Accepts]: Start accepts. Automaton has 52564 states and 157002 transitions. Word has length 124 [2018-12-02 05:00:27,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:27,587 INFO L480 AbstractCegarLoop]: Abstraction has 52564 states and 157002 transitions. [2018-12-02 05:00:27,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 05:00:27,587 INFO L276 IsEmpty]: Start isEmpty. Operand 52564 states and 157002 transitions. [2018-12-02 05:00:27,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:27,638 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:27,638 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:27,638 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:27,638 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:27,639 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-12-02 05:00:27,639 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:27,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:27,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:27,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:27,640 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:27,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:27,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:27,733 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:27,733 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-02 05:00:27,733 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:27,733 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-02 05:00:27,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-02 05:00:27,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-02 05:00:27,734 INFO L87 Difference]: Start difference. First operand 52564 states and 157002 transitions. Second operand 10 states. [2018-12-02 05:00:28,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:28,243 INFO L93 Difference]: Finished difference Result 70198 states and 209589 transitions. [2018-12-02 05:00:28,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 05:00:28,243 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-12-02 05:00:28,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:28,270 INFO L225 Difference]: With dead ends: 70198 [2018-12-02 05:00:28,270 INFO L226 Difference]: Without dead ends: 25566 [2018-12-02 05:00:28,270 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-12-02 05:00:28,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25566 states. [2018-12-02 05:00:28,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25566 to 24952. [2018-12-02 05:00:28,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24952 states. [2018-12-02 05:00:28,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24952 states to 24952 states and 69878 transitions. [2018-12-02 05:00:28,529 INFO L78 Accepts]: Start accepts. Automaton has 24952 states and 69878 transitions. Word has length 126 [2018-12-02 05:00:28,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:28,529 INFO L480 AbstractCegarLoop]: Abstraction has 24952 states and 69878 transitions. [2018-12-02 05:00:28,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-02 05:00:28,529 INFO L276 IsEmpty]: Start isEmpty. Operand 24952 states and 69878 transitions. [2018-12-02 05:00:28,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:28,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:28,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:28,553 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:28,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:28,553 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-12-02 05:00:28,553 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:28,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:28,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:28,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:28,554 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:28,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:28,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:28,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:28,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-02 05:00:28,636 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:28,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-02 05:00:28,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-02 05:00:28,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-02 05:00:28,637 INFO L87 Difference]: Start difference. First operand 24952 states and 69878 transitions. Second operand 9 states. [2018-12-02 05:00:29,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:29,019 INFO L93 Difference]: Finished difference Result 36166 states and 103352 transitions. [2018-12-02 05:00:29,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-02 05:00:29,019 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-12-02 05:00:29,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:29,029 INFO L225 Difference]: With dead ends: 36166 [2018-12-02 05:00:29,029 INFO L226 Difference]: Without dead ends: 9759 [2018-12-02 05:00:29,029 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-02 05:00:29,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9759 states. [2018-12-02 05:00:29,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9759 to 9759. [2018-12-02 05:00:29,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9759 states. [2018-12-02 05:00:29,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9759 states to 9759 states and 29415 transitions. [2018-12-02 05:00:29,115 INFO L78 Accepts]: Start accepts. Automaton has 9759 states and 29415 transitions. Word has length 126 [2018-12-02 05:00:29,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:29,115 INFO L480 AbstractCegarLoop]: Abstraction has 9759 states and 29415 transitions. [2018-12-02 05:00:29,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-02 05:00:29,116 INFO L276 IsEmpty]: Start isEmpty. Operand 9759 states and 29415 transitions. [2018-12-02 05:00:29,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:29,124 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:29,124 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:29,124 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:29,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:29,124 INFO L82 PathProgramCache]: Analyzing trace with hash 661191913, now seen corresponding path program 1 times [2018-12-02 05:00:29,124 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:29,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,126 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-02 05:00:29,126 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,126 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:29,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:29,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:29,192 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:29,192 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-02 05:00:29,192 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:29,192 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-02 05:00:29,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-02 05:00:29,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:29,192 INFO L87 Difference]: Start difference. First operand 9759 states and 29415 transitions. Second operand 6 states. [2018-12-02 05:00:29,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:29,267 INFO L93 Difference]: Finished difference Result 10751 states and 32067 transitions. [2018-12-02 05:00:29,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 05:00:29,268 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-02 05:00:29,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:29,277 INFO L225 Difference]: With dead ends: 10751 [2018-12-02 05:00:29,277 INFO L226 Difference]: Without dead ends: 10615 [2018-12-02 05:00:29,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-02 05:00:29,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10615 states. [2018-12-02 05:00:29,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10615 to 9311. [2018-12-02 05:00:29,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9311 states. [2018-12-02 05:00:29,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9311 states to 9311 states and 27943 transitions. [2018-12-02 05:00:29,368 INFO L78 Accepts]: Start accepts. Automaton has 9311 states and 27943 transitions. Word has length 126 [2018-12-02 05:00:29,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:29,368 INFO L480 AbstractCegarLoop]: Abstraction has 9311 states and 27943 transitions. [2018-12-02 05:00:29,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-02 05:00:29,368 INFO L276 IsEmpty]: Start isEmpty. Operand 9311 states and 27943 transitions. [2018-12-02 05:00:29,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:29,375 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:29,376 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:29,376 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:29,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:29,376 INFO L82 PathProgramCache]: Analyzing trace with hash -1522485014, now seen corresponding path program 1 times [2018-12-02 05:00:29,376 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:29,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:29,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,377 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:29,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:29,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:29,426 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:29,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 05:00:29,427 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:29,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 05:00:29,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 05:00:29,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 05:00:29,427 INFO L87 Difference]: Start difference. First operand 9311 states and 27943 transitions. Second operand 5 states. [2018-12-02 05:00:29,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:29,507 INFO L93 Difference]: Finished difference Result 9975 states and 29573 transitions. [2018-12-02 05:00:29,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 05:00:29,507 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-12-02 05:00:29,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:29,516 INFO L225 Difference]: With dead ends: 9975 [2018-12-02 05:00:29,516 INFO L226 Difference]: Without dead ends: 9975 [2018-12-02 05:00:29,517 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-02 05:00:29,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9975 states. [2018-12-02 05:00:29,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9975 to 8531. [2018-12-02 05:00:29,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8531 states. [2018-12-02 05:00:29,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8531 states to 8531 states and 25486 transitions. [2018-12-02 05:00:29,606 INFO L78 Accepts]: Start accepts. Automaton has 8531 states and 25486 transitions. Word has length 126 [2018-12-02 05:00:29,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:29,606 INFO L480 AbstractCegarLoop]: Abstraction has 8531 states and 25486 transitions. [2018-12-02 05:00:29,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 05:00:29,606 INFO L276 IsEmpty]: Start isEmpty. Operand 8531 states and 25486 transitions. [2018-12-02 05:00:29,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:29,614 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:29,614 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:29,614 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:29,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:29,614 INFO L82 PathProgramCache]: Analyzing trace with hash 573363246, now seen corresponding path program 1 times [2018-12-02 05:00:29,614 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:29,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:29,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,615 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:29,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 05:00:29,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 05:00:29,673 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 05:00:29,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-02 05:00:29,673 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 05:00:29,673 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-02 05:00:29,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-02 05:00:29,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-02 05:00:29,674 INFO L87 Difference]: Start difference. First operand 8531 states and 25486 transitions. Second operand 7 states. [2018-12-02 05:00:29,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 05:00:29,793 INFO L93 Difference]: Finished difference Result 13092 states and 39364 transitions. [2018-12-02 05:00:29,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 05:00:29,794 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-12-02 05:00:29,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 05:00:29,807 INFO L225 Difference]: With dead ends: 13092 [2018-12-02 05:00:29,807 INFO L226 Difference]: Without dead ends: 13092 [2018-12-02 05:00:29,807 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-02 05:00:29,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13092 states. [2018-12-02 05:00:29,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13092 to 8131. [2018-12-02 05:00:29,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8131 states. [2018-12-02 05:00:29,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8131 states to 8131 states and 24250 transitions. [2018-12-02 05:00:29,903 INFO L78 Accepts]: Start accepts. Automaton has 8131 states and 24250 transitions. Word has length 126 [2018-12-02 05:00:29,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 05:00:29,903 INFO L480 AbstractCegarLoop]: Abstraction has 8131 states and 24250 transitions. [2018-12-02 05:00:29,903 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-02 05:00:29,903 INFO L276 IsEmpty]: Start isEmpty. Operand 8131 states and 24250 transitions. [2018-12-02 05:00:29,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-02 05:00:29,910 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 05:00:29,910 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 05:00:29,910 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 05:00:29,910 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 05:00:29,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1771303795, now seen corresponding path program 3 times [2018-12-02 05:00:29,910 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 05:00:29,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,911 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 05:00:29,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 05:00:29,911 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 05:00:29,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 05:00:29,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 05:00:29,965 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 05:00:30,078 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-02 05:00:30,079 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 05:00:30 BasicIcfg [2018-12-02 05:00:30,079 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 05:00:30,079 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 05:00:30,079 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 05:00:30,079 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 05:00:30,080 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 04:57:31" (3/4) ... [2018-12-02 05:00:30,081 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-02 05:00:30,201 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_190a1f37-fc79-48ad-a585-6262628c1b08/bin-2019/utaipan/witness.graphml [2018-12-02 05:00:30,201 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 05:00:30,201 INFO L168 Benchmark]: Toolchain (without parser) took 179531.06 ms. Allocated memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: 5.8 GB). Free memory was 948.1 MB in the beginning and 3.5 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,202 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 05:00:30,202 INFO L168 Benchmark]: CACSL2BoogieTranslator took 323.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.3 MB). Free memory was 948.1 MB in the beginning and 1.1 GB in the end (delta: -175.4 MB). Peak memory consumption was 31.9 MB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,202 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,202 INFO L168 Benchmark]: Boogie Preprocessor took 23.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 05:00:30,203 INFO L168 Benchmark]: RCFGBuilder took 458.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 70.5 MB). Peak memory consumption was 70.5 MB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,203 INFO L168 Benchmark]: TraceAbstraction took 178569.94 ms. Allocated memory was 1.2 GB in the beginning and 6.8 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,203 INFO L168 Benchmark]: Witness Printer took 121.38 ms. Allocated memory is still 6.8 GB. Free memory was 3.6 GB in the beginning and 3.5 GB in the end (delta: 83.8 MB). Peak memory consumption was 83.8 MB. Max. memory is 11.5 GB. [2018-12-02 05:00:30,204 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 323.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 147.3 MB). Free memory was 948.1 MB in the beginning and 1.1 GB in the end (delta: -175.4 MB). Peak memory consumption was 31.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 32.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.53 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 458.15 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 70.5 MB). Peak memory consumption was 70.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 178569.94 ms. Allocated memory was 1.2 GB in the beginning and 6.8 GB in the end (delta: 5.6 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 121.38 ms. Allocated memory is still 6.8 GB. Free memory was 3.6 GB in the beginning and 3.5 GB in the end (delta: 83.8 MB). Peak memory consumption was 83.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 178.4s OverallTime, 39 OverallIterations, 1 TraceHistogramMax, 35.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12959 SDtfs, 17797 SDslu, 27533 SDs, 0 SdLazy, 9923 SolverSat, 678 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 369 GetRequests, 90 SyntacticMatches, 39 SemanticMatches, 240 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 338 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 55.6s AutomataMinimizationTime, 38 MinimizatonAttempts, 583905 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 4121 NumberOfCodeBlocks, 4121 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 3957 ConstructedInterpolants, 0 QuantifiedInterpolants, 1038977 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...