./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_rmo.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_rmo.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 478fcdde90c096ffe23685288d0106509c7be558 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-03 06:03:00,436 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-03 06:03:00,437 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-03 06:03:00,446 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-03 06:03:00,446 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-03 06:03:00,447 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-03 06:03:00,448 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-03 06:03:00,449 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-03 06:03:00,450 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-03 06:03:00,450 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-03 06:03:00,451 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-03 06:03:00,451 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-03 06:03:00,452 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-03 06:03:00,452 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-03 06:03:00,453 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-03 06:03:00,453 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-03 06:03:00,454 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-03 06:03:00,455 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-03 06:03:00,456 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-03 06:03:00,456 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-03 06:03:00,457 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-03 06:03:00,458 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-03 06:03:00,459 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-03 06:03:00,460 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-03 06:03:00,460 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-03 06:03:00,460 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-03 06:03:00,461 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-03 06:03:00,461 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-03 06:03:00,461 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-03 06:03:00,462 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-03 06:03:00,462 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-03 06:03:00,462 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-03 06:03:00,463 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-03 06:03:00,463 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-03 06:03:00,463 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-03 06:03:00,463 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-03 06:03:00,464 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-03 06:03:00,473 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-03 06:03:00,473 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-03 06:03:00,474 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-03 06:03:00,474 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-03 06:03:00,474 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-03 06:03:00,474 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-03 06:03:00,474 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-03 06:03:00,474 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-03 06:03:00,475 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-03 06:03:00,475 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-03 06:03:00,475 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-03 06:03:00,475 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-03 06:03:00,475 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-03 06:03:00,476 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-03 06:03:00,476 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-03 06:03:00,476 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-03 06:03:00,476 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-03 06:03:00,476 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-03 06:03:00,476 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-03 06:03:00,477 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-03 06:03:00,477 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-03 06:03:00,478 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-03 06:03:00,478 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-03 06:03:00,478 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 06:03:00,478 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-03 06:03:00,478 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-03 06:03:00,478 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-03 06:03:00,479 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-03 06:03:00,479 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-03 06:03:00,479 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-03 06:03:00,479 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-03 06:03:00,479 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 478fcdde90c096ffe23685288d0106509c7be558 [2018-12-03 06:03:00,502 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-03 06:03:00,510 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-03 06:03:00,512 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-03 06:03:00,513 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-03 06:03:00,513 INFO L276 PluginConnector]: CDTParser initialized [2018-12-03 06:03:00,514 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/thin001_rmo.oepc_false-unreach-call.i [2018-12-03 06:03:00,552 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/data/6379614f2/bb453dcaff2a43168a5117ca74859c7f/FLAGa4d20e611 [2018-12-03 06:03:00,992 INFO L307 CDTParser]: Found 1 translation units. [2018-12-03 06:03:00,993 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/sv-benchmarks/c/pthread-wmm/thin001_rmo.oepc_false-unreach-call.i [2018-12-03 06:03:01,001 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/data/6379614f2/bb453dcaff2a43168a5117ca74859c7f/FLAGa4d20e611 [2018-12-03 06:03:01,010 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/data/6379614f2/bb453dcaff2a43168a5117ca74859c7f [2018-12-03 06:03:01,012 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-03 06:03:01,014 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-03 06:03:01,014 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-03 06:03:01,014 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-03 06:03:01,017 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-03 06:03:01,017 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,019 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@628262cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01, skipping insertion in model container [2018-12-03 06:03:01,019 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,025 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-03 06:03:01,057 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-03 06:03:01,259 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 06:03:01,266 INFO L191 MainTranslator]: Completed pre-run [2018-12-03 06:03:01,344 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-03 06:03:01,376 INFO L195 MainTranslator]: Completed translation [2018-12-03 06:03:01,376 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01 WrapperNode [2018-12-03 06:03:01,376 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-03 06:03:01,376 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-03 06:03:01,376 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-03 06:03:01,377 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-03 06:03:01,382 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,392 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,407 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-03 06:03:01,407 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-03 06:03:01,407 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-03 06:03:01,407 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-03 06:03:01,413 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,413 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,415 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,416 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,421 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,423 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,425 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... [2018-12-03 06:03:01,427 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-03 06:03:01,427 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-03 06:03:01,427 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-03 06:03:01,427 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-03 06:03:01,428 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-03 06:03:01,458 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-03 06:03:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-03 06:03:01,458 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-03 06:03:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-03 06:03:01,459 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-03 06:03:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-03 06:03:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-03 06:03:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-03 06:03:01,459 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-03 06:03:01,460 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-03 06:03:01,746 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-03 06:03:01,746 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-12-03 06:03:01,747 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 06:03:01 BoogieIcfgContainer [2018-12-03 06:03:01,747 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-03 06:03:01,747 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-03 06:03:01,748 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-03 06:03:01,750 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-03 06:03:01,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.12 06:03:01" (1/3) ... [2018-12-03 06:03:01,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d0c766 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 06:03:01, skipping insertion in model container [2018-12-03 06:03:01,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.12 06:03:01" (2/3) ... [2018-12-03 06:03:01,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d0c766 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.12 06:03:01, skipping insertion in model container [2018-12-03 06:03:01,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 06:03:01" (3/3) ... [2018-12-03 06:03:01,752 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_rmo.oepc_false-unreach-call.i [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,782 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe Thread2_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,783 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,784 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,785 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,786 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,787 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,788 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,789 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,790 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,791 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,792 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,793 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P0_#t~nondet30.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,794 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,795 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet31.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe Thread1_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,796 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~mem32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~mem32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,797 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,798 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,799 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P2_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-03 06:03:01,804 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-03 06:03:01,804 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-03 06:03:01,810 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-03 06:03:01,820 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-03 06:03:01,836 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-03 06:03:01,837 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-03 06:03:01,837 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-03 06:03:01,837 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-03 06:03:01,837 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-03 06:03:01,837 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-03 06:03:01,837 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-03 06:03:01,837 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-03 06:03:01,845 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 163places, 195 transitions [2018-12-03 06:03:17,042 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 137010 states. [2018-12-03 06:03:17,043 INFO L276 IsEmpty]: Start isEmpty. Operand 137010 states. [2018-12-03 06:03:17,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-12-03 06:03:17,128 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:17,129 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:17,131 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:17,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:17,137 INFO L82 PathProgramCache]: Analyzing trace with hash 430587499, now seen corresponding path program 1 times [2018-12-03 06:03:17,139 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:17,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:17,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:17,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:17,190 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:17,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:17,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:17,348 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:17,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:17,348 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:17,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:17,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:17,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:17,365 INFO L87 Difference]: Start difference. First operand 137010 states. Second operand 4 states. [2018-12-03 06:03:18,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:18,633 INFO L93 Difference]: Finished difference Result 213428 states and 945063 transitions. [2018-12-03 06:03:18,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:18,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2018-12-03 06:03:18,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:19,113 INFO L225 Difference]: With dead ends: 213428 [2018-12-03 06:03:19,113 INFO L226 Difference]: Without dead ends: 144378 [2018-12-03 06:03:19,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:21,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144378 states. [2018-12-03 06:03:23,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144378 to 138333. [2018-12-03 06:03:23,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138333 states. [2018-12-03 06:03:24,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138333 states to 138333 states and 627922 transitions. [2018-12-03 06:03:24,127 INFO L78 Accepts]: Start accepts. Automaton has 138333 states and 627922 transitions. Word has length 79 [2018-12-03 06:03:24,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:24,128 INFO L480 AbstractCegarLoop]: Abstraction has 138333 states and 627922 transitions. [2018-12-03 06:03:24,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:24,128 INFO L276 IsEmpty]: Start isEmpty. Operand 138333 states and 627922 transitions. [2018-12-03 06:03:24,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-03 06:03:24,178 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:24,178 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:24,178 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:24,178 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:24,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1091098697, now seen corresponding path program 1 times [2018-12-03 06:03:24,178 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:24,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:24,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:24,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:24,181 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:24,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:24,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:24,238 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:24,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:24,239 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:24,240 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:24,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:24,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:24,241 INFO L87 Difference]: Start difference. First operand 138333 states and 627922 transitions. Second operand 4 states. [2018-12-03 06:03:24,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:24,830 INFO L93 Difference]: Finished difference Result 124090 states and 551747 transitions. [2018-12-03 06:03:24,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:24,830 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2018-12-03 06:03:24,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:25,164 INFO L225 Difference]: With dead ends: 124090 [2018-12-03 06:03:25,164 INFO L226 Difference]: Without dead ends: 120375 [2018-12-03 06:03:25,165 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:26,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120375 states. [2018-12-03 06:03:27,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120375 to 120375. [2018-12-03 06:03:27,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120375 states. [2018-12-03 06:03:28,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120375 states to 120375 states and 538517 transitions. [2018-12-03 06:03:28,300 INFO L78 Accepts]: Start accepts. Automaton has 120375 states and 538517 transitions. Word has length 81 [2018-12-03 06:03:28,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:28,301 INFO L480 AbstractCegarLoop]: Abstraction has 120375 states and 538517 transitions. [2018-12-03 06:03:28,301 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:28,301 INFO L276 IsEmpty]: Start isEmpty. Operand 120375 states and 538517 transitions. [2018-12-03 06:03:28,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-03 06:03:28,334 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:28,335 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:28,335 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:28,335 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:28,335 INFO L82 PathProgramCache]: Analyzing trace with hash 753345610, now seen corresponding path program 1 times [2018-12-03 06:03:28,335 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:28,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:28,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:28,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:28,338 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:28,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:28,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:28,394 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:28,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 06:03:28,394 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:28,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:03:28,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:03:28,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:28,395 INFO L87 Difference]: Start difference. First operand 120375 states and 538517 transitions. Second operand 5 states. [2018-12-03 06:03:28,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:28,588 INFO L93 Difference]: Finished difference Result 43419 states and 175132 transitions. [2018-12-03 06:03:28,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-03 06:03:28,589 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2018-12-03 06:03:28,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:28,691 INFO L225 Difference]: With dead ends: 43419 [2018-12-03 06:03:28,691 INFO L226 Difference]: Without dead ends: 40207 [2018-12-03 06:03:28,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-03 06:03:28,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40207 states. [2018-12-03 06:03:29,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40207 to 40207. [2018-12-03 06:03:29,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40207 states. [2018-12-03 06:03:29,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40207 states to 40207 states and 162099 transitions. [2018-12-03 06:03:29,264 INFO L78 Accepts]: Start accepts. Automaton has 40207 states and 162099 transitions. Word has length 82 [2018-12-03 06:03:29,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:29,264 INFO L480 AbstractCegarLoop]: Abstraction has 40207 states and 162099 transitions. [2018-12-03 06:03:29,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:03:29,264 INFO L276 IsEmpty]: Start isEmpty. Operand 40207 states and 162099 transitions. [2018-12-03 06:03:29,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-03 06:03:29,289 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:29,289 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:29,290 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:29,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:29,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1150338573, now seen corresponding path program 1 times [2018-12-03 06:03:29,290 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:29,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:29,291 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:29,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:29,292 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:29,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:29,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:29,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:29,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:29,352 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:29,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:29,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:29,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:29,353 INFO L87 Difference]: Start difference. First operand 40207 states and 162099 transitions. Second operand 4 states. [2018-12-03 06:03:29,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:29,631 INFO L93 Difference]: Finished difference Result 41223 states and 163379 transitions. [2018-12-03 06:03:29,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:29,631 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-03 06:03:29,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:29,707 INFO L225 Difference]: With dead ends: 41223 [2018-12-03 06:03:29,707 INFO L226 Difference]: Without dead ends: 41223 [2018-12-03 06:03:29,708 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:29,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41223 states. [2018-12-03 06:03:31,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41223 to 38343. [2018-12-03 06:03:31,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38343 states. [2018-12-03 06:03:31,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38343 states to 38343 states and 152547 transitions. [2018-12-03 06:03:31,186 INFO L78 Accepts]: Start accepts. Automaton has 38343 states and 152547 transitions. Word has length 93 [2018-12-03 06:03:31,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:31,187 INFO L480 AbstractCegarLoop]: Abstraction has 38343 states and 152547 transitions. [2018-12-03 06:03:31,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:31,187 INFO L276 IsEmpty]: Start isEmpty. Operand 38343 states and 152547 transitions. [2018-12-03 06:03:31,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:31,213 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:31,214 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:31,214 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:31,214 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:31,214 INFO L82 PathProgramCache]: Analyzing trace with hash -886906216, now seen corresponding path program 1 times [2018-12-03 06:03:31,214 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:31,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:31,216 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:31,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:31,216 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:31,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:31,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:31,280 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:31,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:31,280 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:31,280 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:31,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:31,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:31,281 INFO L87 Difference]: Start difference. First operand 38343 states and 152547 transitions. Second operand 4 states. [2018-12-03 06:03:31,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:31,545 INFO L93 Difference]: Finished difference Result 49659 states and 195684 transitions. [2018-12-03 06:03:31,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:31,546 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-03 06:03:31,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:31,643 INFO L225 Difference]: With dead ends: 49659 [2018-12-03 06:03:31,643 INFO L226 Difference]: Without dead ends: 49659 [2018-12-03 06:03:31,643 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:31,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49659 states. [2018-12-03 06:03:32,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49659 to 42267. [2018-12-03 06:03:32,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42267 states. [2018-12-03 06:03:32,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42267 states to 42267 states and 166772 transitions. [2018-12-03 06:03:32,292 INFO L78 Accepts]: Start accepts. Automaton has 42267 states and 166772 transitions. Word has length 95 [2018-12-03 06:03:32,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:32,292 INFO L480 AbstractCegarLoop]: Abstraction has 42267 states and 166772 transitions. [2018-12-03 06:03:32,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:32,292 INFO L276 IsEmpty]: Start isEmpty. Operand 42267 states and 166772 transitions. [2018-12-03 06:03:32,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:32,327 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:32,327 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:32,327 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:32,327 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:32,327 INFO L82 PathProgramCache]: Analyzing trace with hash 227311800, now seen corresponding path program 1 times [2018-12-03 06:03:32,328 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:32,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:32,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:32,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:32,329 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:32,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:32,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:32,386 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:32,386 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 06:03:32,386 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:32,386 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:03:32,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:03:32,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:32,387 INFO L87 Difference]: Start difference. First operand 42267 states and 166772 transitions. Second operand 5 states. [2018-12-03 06:03:33,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:33,008 INFO L93 Difference]: Finished difference Result 88070 states and 341366 transitions. [2018-12-03 06:03:33,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-03 06:03:33,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-03 06:03:33,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:33,186 INFO L225 Difference]: With dead ends: 88070 [2018-12-03 06:03:33,186 INFO L226 Difference]: Without dead ends: 88070 [2018-12-03 06:03:33,186 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:03:33,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88070 states. [2018-12-03 06:03:33,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88070 to 32997. [2018-12-03 06:03:33,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32997 states. [2018-12-03 06:03:33,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32997 states to 32997 states and 128800 transitions. [2018-12-03 06:03:33,989 INFO L78 Accepts]: Start accepts. Automaton has 32997 states and 128800 transitions. Word has length 95 [2018-12-03 06:03:33,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:33,989 INFO L480 AbstractCegarLoop]: Abstraction has 32997 states and 128800 transitions. [2018-12-03 06:03:33,989 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:03:33,989 INFO L276 IsEmpty]: Start isEmpty. Operand 32997 states and 128800 transitions. [2018-12-03 06:03:34,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:34,011 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:34,012 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:34,012 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:34,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:34,012 INFO L82 PathProgramCache]: Analyzing trace with hash -1569639559, now seen corresponding path program 1 times [2018-12-03 06:03:34,012 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:34,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:34,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:34,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:34,014 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:34,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:34,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:34,217 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:34,217 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:34,217 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:34,218 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:34,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:34,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:34,218 INFO L87 Difference]: Start difference. First operand 32997 states and 128800 transitions. Second operand 4 states. [2018-12-03 06:03:34,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:34,537 INFO L93 Difference]: Finished difference Result 42976 states and 164960 transitions. [2018-12-03 06:03:34,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:34,537 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-03 06:03:34,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:34,610 INFO L225 Difference]: With dead ends: 42976 [2018-12-03 06:03:34,610 INFO L226 Difference]: Without dead ends: 42976 [2018-12-03 06:03:34,610 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:34,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42976 states. [2018-12-03 06:03:35,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42976 to 39537. [2018-12-03 06:03:35,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39537 states. [2018-12-03 06:03:35,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39537 states to 39537 states and 152763 transitions. [2018-12-03 06:03:35,183 INFO L78 Accepts]: Start accepts. Automaton has 39537 states and 152763 transitions. Word has length 95 [2018-12-03 06:03:35,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:35,183 INFO L480 AbstractCegarLoop]: Abstraction has 39537 states and 152763 transitions. [2018-12-03 06:03:35,183 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:35,184 INFO L276 IsEmpty]: Start isEmpty. Operand 39537 states and 152763 transitions. [2018-12-03 06:03:35,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:35,211 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:35,211 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:35,211 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:35,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:35,211 INFO L82 PathProgramCache]: Analyzing trace with hash -1824376104, now seen corresponding path program 1 times [2018-12-03 06:03:35,211 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:35,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:35,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:35,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:35,213 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:35,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:35,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:35,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:35,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:35,257 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:35,257 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:35,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:35,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:35,257 INFO L87 Difference]: Start difference. First operand 39537 states and 152763 transitions. Second operand 4 states. [2018-12-03 06:03:35,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:35,607 INFO L93 Difference]: Finished difference Result 48833 states and 187891 transitions. [2018-12-03 06:03:35,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:35,607 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-03 06:03:35,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:35,690 INFO L225 Difference]: With dead ends: 48833 [2018-12-03 06:03:35,690 INFO L226 Difference]: Without dead ends: 47233 [2018-12-03 06:03:35,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:35,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47233 states. [2018-12-03 06:03:36,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47233 to 45201. [2018-12-03 06:03:36,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45201 states. [2018-12-03 06:03:36,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45201 states to 45201 states and 173947 transitions. [2018-12-03 06:03:36,331 INFO L78 Accepts]: Start accepts. Automaton has 45201 states and 173947 transitions. Word has length 95 [2018-12-03 06:03:36,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:36,332 INFO L480 AbstractCegarLoop]: Abstraction has 45201 states and 173947 transitions. [2018-12-03 06:03:36,332 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:36,332 INFO L276 IsEmpty]: Start isEmpty. Operand 45201 states and 173947 transitions. [2018-12-03 06:03:36,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:36,365 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:36,365 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:36,365 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:36,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:36,365 INFO L82 PathProgramCache]: Analyzing trace with hash -2117779111, now seen corresponding path program 1 times [2018-12-03 06:03:36,365 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:36,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:36,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:36,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:36,366 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:36,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:36,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:36,444 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:36,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 06:03:36,444 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:36,444 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 06:03:36,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 06:03:36,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-03 06:03:36,444 INFO L87 Difference]: Start difference. First operand 45201 states and 173947 transitions. Second operand 6 states. [2018-12-03 06:03:36,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:36,788 INFO L93 Difference]: Finished difference Result 53895 states and 205519 transitions. [2018-12-03 06:03:36,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 06:03:36,789 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-03 06:03:36,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:36,886 INFO L225 Difference]: With dead ends: 53895 [2018-12-03 06:03:36,887 INFO L226 Difference]: Without dead ends: 53895 [2018-12-03 06:03:36,887 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 5 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:36,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53895 states. [2018-12-03 06:03:37,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53895 to 46461. [2018-12-03 06:03:37,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46461 states. [2018-12-03 06:03:37,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46461 states to 46461 states and 178434 transitions. [2018-12-03 06:03:37,671 INFO L78 Accepts]: Start accepts. Automaton has 46461 states and 178434 transitions. Word has length 95 [2018-12-03 06:03:37,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:37,671 INFO L480 AbstractCegarLoop]: Abstraction has 46461 states and 178434 transitions. [2018-12-03 06:03:37,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 06:03:37,671 INFO L276 IsEmpty]: Start isEmpty. Operand 46461 states and 178434 transitions. [2018-12-03 06:03:37,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:37,708 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:37,708 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:37,708 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:37,708 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:37,708 INFO L82 PathProgramCache]: Analyzing trace with hash -873014630, now seen corresponding path program 1 times [2018-12-03 06:03:37,708 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:37,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:37,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:37,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:37,710 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:37,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:37,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:37,810 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:37,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 06:03:37,810 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:37,810 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 06:03:37,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 06:03:37,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:37,811 INFO L87 Difference]: Start difference. First operand 46461 states and 178434 transitions. Second operand 8 states. [2018-12-03 06:03:38,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:38,349 INFO L93 Difference]: Finished difference Result 61671 states and 232239 transitions. [2018-12-03 06:03:38,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-03 06:03:38,349 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-12-03 06:03:38,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:38,461 INFO L225 Difference]: With dead ends: 61671 [2018-12-03 06:03:38,461 INFO L226 Difference]: Without dead ends: 61671 [2018-12-03 06:03:38,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-12-03 06:03:38,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61671 states. [2018-12-03 06:03:39,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61671 to 51841. [2018-12-03 06:03:39,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51841 states. [2018-12-03 06:03:39,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51841 states to 51841 states and 196217 transitions. [2018-12-03 06:03:39,257 INFO L78 Accepts]: Start accepts. Automaton has 51841 states and 196217 transitions. Word has length 95 [2018-12-03 06:03:39,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:39,258 INFO L480 AbstractCegarLoop]: Abstraction has 51841 states and 196217 transitions. [2018-12-03 06:03:39,258 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 06:03:39,258 INFO L276 IsEmpty]: Start isEmpty. Operand 51841 states and 196217 transitions. [2018-12-03 06:03:39,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-03 06:03:39,293 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:39,293 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:39,293 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:39,293 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:39,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1614498203, now seen corresponding path program 1 times [2018-12-03 06:03:39,293 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:39,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:39,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,294 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:39,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:39,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:39,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:39,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-03 06:03:39,353 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:39,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-03 06:03:39,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-03 06:03:39,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-03 06:03:39,353 INFO L87 Difference]: Start difference. First operand 51841 states and 196217 transitions. Second operand 6 states. [2018-12-03 06:03:39,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:39,424 INFO L93 Difference]: Finished difference Result 14289 states and 46769 transitions. [2018-12-03 06:03:39,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 06:03:39,424 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-03 06:03:39,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:39,439 INFO L225 Difference]: With dead ends: 14289 [2018-12-03 06:03:39,439 INFO L226 Difference]: Without dead ends: 11595 [2018-12-03 06:03:39,439 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:03:39,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11595 states. [2018-12-03 06:03:39,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11595 to 11445. [2018-12-03 06:03:39,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11445 states. [2018-12-03 06:03:39,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11445 states to 11445 states and 36772 transitions. [2018-12-03 06:03:39,558 INFO L78 Accepts]: Start accepts. Automaton has 11445 states and 36772 transitions. Word has length 95 [2018-12-03 06:03:39,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:39,559 INFO L480 AbstractCegarLoop]: Abstraction has 11445 states and 36772 transitions. [2018-12-03 06:03:39,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-03 06:03:39,559 INFO L276 IsEmpty]: Start isEmpty. Operand 11445 states and 36772 transitions. [2018-12-03 06:03:39,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-12-03 06:03:39,570 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:39,570 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:39,570 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:39,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:39,570 INFO L82 PathProgramCache]: Analyzing trace with hash -340783929, now seen corresponding path program 1 times [2018-12-03 06:03:39,570 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:39,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:39,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,571 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:39,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:39,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:39,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:39,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-03 06:03:39,613 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:39,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-03 06:03:39,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-03 06:03:39,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-03 06:03:39,614 INFO L87 Difference]: Start difference. First operand 11445 states and 36772 transitions. Second operand 4 states. [2018-12-03 06:03:39,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:39,714 INFO L93 Difference]: Finished difference Result 15662 states and 49621 transitions. [2018-12-03 06:03:39,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-03 06:03:39,714 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 110 [2018-12-03 06:03:39,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:39,732 INFO L225 Difference]: With dead ends: 15662 [2018-12-03 06:03:39,732 INFO L226 Difference]: Without dead ends: 15412 [2018-12-03 06:03:39,732 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:39,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15412 states. [2018-12-03 06:03:39,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15412 to 12866. [2018-12-03 06:03:39,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12866 states. [2018-12-03 06:03:39,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12866 states to 12866 states and 40987 transitions. [2018-12-03 06:03:39,883 INFO L78 Accepts]: Start accepts. Automaton has 12866 states and 40987 transitions. Word has length 110 [2018-12-03 06:03:39,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:39,883 INFO L480 AbstractCegarLoop]: Abstraction has 12866 states and 40987 transitions. [2018-12-03 06:03:39,883 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-03 06:03:39,883 INFO L276 IsEmpty]: Start isEmpty. Operand 12866 states and 40987 transitions. [2018-12-03 06:03:39,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 06:03:39,894 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:39,894 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:39,895 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:39,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:39,895 INFO L82 PathProgramCache]: Analyzing trace with hash -818933337, now seen corresponding path program 1 times [2018-12-03 06:03:39,895 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:39,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:39,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:39,896 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:39,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:39,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:39,937 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:39,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 06:03:39,937 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:39,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:03:39,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:03:39,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:39,938 INFO L87 Difference]: Start difference. First operand 12866 states and 40987 transitions. Second operand 5 states. [2018-12-03 06:03:40,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:40,059 INFO L93 Difference]: Finished difference Result 15852 states and 50228 transitions. [2018-12-03 06:03:40,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 06:03:40,059 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2018-12-03 06:03:40,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:40,076 INFO L225 Difference]: With dead ends: 15852 [2018-12-03 06:03:40,077 INFO L226 Difference]: Without dead ends: 15602 [2018-12-03 06:03:40,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:40,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15602 states. [2018-12-03 06:03:40,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15602 to 12836. [2018-12-03 06:03:40,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12836 states. [2018-12-03 06:03:40,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12836 states to 12836 states and 40893 transitions. [2018-12-03 06:03:40,228 INFO L78 Accepts]: Start accepts. Automaton has 12836 states and 40893 transitions. Word has length 112 [2018-12-03 06:03:40,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:40,228 INFO L480 AbstractCegarLoop]: Abstraction has 12836 states and 40893 transitions. [2018-12-03 06:03:40,228 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:03:40,228 INFO L276 IsEmpty]: Start isEmpty. Operand 12836 states and 40893 transitions. [2018-12-03 06:03:40,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 06:03:40,241 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:40,241 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:40,241 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:40,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:40,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1073669882, now seen corresponding path program 1 times [2018-12-03 06:03:40,241 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:40,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:40,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:40,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:40,242 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:40,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:40,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:40,304 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:40,304 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-03 06:03:40,304 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:40,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-03 06:03:40,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-03 06:03:40,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-03 06:03:40,305 INFO L87 Difference]: Start difference. First operand 12836 states and 40893 transitions. Second operand 5 states. [2018-12-03 06:03:40,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:40,427 INFO L93 Difference]: Finished difference Result 18663 states and 59455 transitions. [2018-12-03 06:03:40,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 06:03:40,428 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 112 [2018-12-03 06:03:40,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:40,449 INFO L225 Difference]: With dead ends: 18663 [2018-12-03 06:03:40,449 INFO L226 Difference]: Without dead ends: 18663 [2018-12-03 06:03:40,450 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:40,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18663 states. [2018-12-03 06:03:40,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18663 to 16352. [2018-12-03 06:03:40,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16352 states. [2018-12-03 06:03:40,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16352 states to 16352 states and 52101 transitions. [2018-12-03 06:03:40,662 INFO L78 Accepts]: Start accepts. Automaton has 16352 states and 52101 transitions. Word has length 112 [2018-12-03 06:03:40,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:40,662 INFO L480 AbstractCegarLoop]: Abstraction has 16352 states and 52101 transitions. [2018-12-03 06:03:40,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-03 06:03:40,662 INFO L276 IsEmpty]: Start isEmpty. Operand 16352 states and 52101 transitions. [2018-12-03 06:03:40,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 06:03:40,677 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:40,677 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:40,678 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:40,678 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:40,678 INFO L82 PathProgramCache]: Analyzing trace with hash 1930822054, now seen corresponding path program 1 times [2018-12-03 06:03:40,678 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:40,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:40,679 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:40,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:40,679 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:40,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:40,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:40,759 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:40,759 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 06:03:40,759 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:40,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 06:03:40,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 06:03:40,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:40,759 INFO L87 Difference]: Start difference. First operand 16352 states and 52101 transitions. Second operand 8 states. [2018-12-03 06:03:41,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:41,036 INFO L93 Difference]: Finished difference Result 20516 states and 64961 transitions. [2018-12-03 06:03:41,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-03 06:03:41,037 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 112 [2018-12-03 06:03:41,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:41,059 INFO L225 Difference]: With dead ends: 20516 [2018-12-03 06:03:41,060 INFO L226 Difference]: Without dead ends: 20516 [2018-12-03 06:03:41,060 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 6 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2018-12-03 06:03:41,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20516 states. [2018-12-03 06:03:41,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20516 to 16647. [2018-12-03 06:03:41,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16647 states. [2018-12-03 06:03:41,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16647 states to 16647 states and 53027 transitions. [2018-12-03 06:03:41,260 INFO L78 Accepts]: Start accepts. Automaton has 16647 states and 53027 transitions. Word has length 112 [2018-12-03 06:03:41,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:41,260 INFO L480 AbstractCegarLoop]: Abstraction has 16647 states and 53027 transitions. [2018-12-03 06:03:41,260 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 06:03:41,261 INFO L276 IsEmpty]: Start isEmpty. Operand 16647 states and 53027 transitions. [2018-12-03 06:03:41,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 06:03:41,275 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:41,276 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:41,276 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:41,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:41,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1961841861, now seen corresponding path program 1 times [2018-12-03 06:03:41,276 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:41,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:41,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:41,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:41,277 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:41,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:41,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:41,383 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:41,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-03 06:03:41,383 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:41,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-03 06:03:41,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-03 06:03:41,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-03 06:03:41,384 INFO L87 Difference]: Start difference. First operand 16647 states and 53027 transitions. Second operand 10 states. [2018-12-03 06:03:41,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:41,739 INFO L93 Difference]: Finished difference Result 21045 states and 66892 transitions. [2018-12-03 06:03:41,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-03 06:03:41,739 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 112 [2018-12-03 06:03:41,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:41,762 INFO L225 Difference]: With dead ends: 21045 [2018-12-03 06:03:41,763 INFO L226 Difference]: Without dead ends: 21045 [2018-12-03 06:03:41,763 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2018-12-03 06:03:41,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21045 states. [2018-12-03 06:03:41,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21045 to 16272. [2018-12-03 06:03:41,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16272 states. [2018-12-03 06:03:41,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16272 states to 16272 states and 51857 transitions. [2018-12-03 06:03:41,962 INFO L78 Accepts]: Start accepts. Automaton has 16272 states and 51857 transitions. Word has length 112 [2018-12-03 06:03:41,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:41,962 INFO L480 AbstractCegarLoop]: Abstraction has 16272 states and 51857 transitions. [2018-12-03 06:03:41,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-03 06:03:41,962 INFO L276 IsEmpty]: Start isEmpty. Operand 16272 states and 51857 transitions. [2018-12-03 06:03:41,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-03 06:03:41,976 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:41,976 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:41,976 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:41,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:41,977 INFO L82 PathProgramCache]: Analyzing trace with hash 154387398, now seen corresponding path program 1 times [2018-12-03 06:03:41,977 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:41,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:41,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:41,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:41,978 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:41,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:42,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:42,006 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:42,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 06:03:42,006 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:42,006 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:03:42,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:03:42,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:03:42,006 INFO L87 Difference]: Start difference. First operand 16272 states and 51857 transitions. Second operand 3 states. [2018-12-03 06:03:42,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:42,046 INFO L93 Difference]: Finished difference Result 16272 states and 51793 transitions. [2018-12-03 06:03:42,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:03:42,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2018-12-03 06:03:42,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:42,066 INFO L225 Difference]: With dead ends: 16272 [2018-12-03 06:03:42,066 INFO L226 Difference]: Without dead ends: 16272 [2018-12-03 06:03:42,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:03:42,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16272 states. [2018-12-03 06:03:42,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16272 to 16272. [2018-12-03 06:03:42,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16272 states. [2018-12-03 06:03:42,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16272 states to 16272 states and 51793 transitions. [2018-12-03 06:03:42,227 INFO L78 Accepts]: Start accepts. Automaton has 16272 states and 51793 transitions. Word has length 112 [2018-12-03 06:03:42,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:42,227 INFO L480 AbstractCegarLoop]: Abstraction has 16272 states and 51793 transitions. [2018-12-03 06:03:42,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:03:42,227 INFO L276 IsEmpty]: Start isEmpty. Operand 16272 states and 51793 transitions. [2018-12-03 06:03:42,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-03 06:03:42,241 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:42,241 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:42,241 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:42,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:42,241 INFO L82 PathProgramCache]: Analyzing trace with hash 332954121, now seen corresponding path program 1 times [2018-12-03 06:03:42,241 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:42,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:42,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,242 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:42,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:42,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:42,336 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:42,336 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-03 06:03:42,336 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:42,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-03 06:03:42,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-03 06:03:42,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-03 06:03:42,336 INFO L87 Difference]: Start difference. First operand 16272 states and 51793 transitions. Second operand 9 states. [2018-12-03 06:03:42,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:42,497 INFO L93 Difference]: Finished difference Result 27536 states and 87929 transitions. [2018-12-03 06:03:42,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-03 06:03:42,497 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 114 [2018-12-03 06:03:42,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:42,512 INFO L225 Difference]: With dead ends: 27536 [2018-12-03 06:03:42,512 INFO L226 Difference]: Without dead ends: 14112 [2018-12-03 06:03:42,512 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=127, Unknown=0, NotChecked=0, Total=182 [2018-12-03 06:03:42,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14112 states. [2018-12-03 06:03:42,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14112 to 14112. [2018-12-03 06:03:42,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14112 states. [2018-12-03 06:03:42,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14112 states to 14112 states and 44355 transitions. [2018-12-03 06:03:42,650 INFO L78 Accepts]: Start accepts. Automaton has 14112 states and 44355 transitions. Word has length 114 [2018-12-03 06:03:42,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:42,650 INFO L480 AbstractCegarLoop]: Abstraction has 14112 states and 44355 transitions. [2018-12-03 06:03:42,650 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-03 06:03:42,650 INFO L276 IsEmpty]: Start isEmpty. Operand 14112 states and 44355 transitions. [2018-12-03 06:03:42,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-03 06:03:42,663 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:42,663 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:42,663 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:42,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:42,664 INFO L82 PathProgramCache]: Analyzing trace with hash 902596467, now seen corresponding path program 2 times [2018-12-03 06:03:42,664 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:42,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:42,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,665 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:42,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:42,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:42,741 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:42,741 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-03 06:03:42,741 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:42,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-03 06:03:42,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-03 06:03:42,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-03 06:03:42,742 INFO L87 Difference]: Start difference. First operand 14112 states and 44355 transitions. Second operand 8 states. [2018-12-03 06:03:42,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:42,823 INFO L93 Difference]: Finished difference Result 18320 states and 57435 transitions. [2018-12-03 06:03:42,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-03 06:03:42,823 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 114 [2018-12-03 06:03:42,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:42,828 INFO L225 Difference]: With dead ends: 18320 [2018-12-03 06:03:42,829 INFO L226 Difference]: Without dead ends: 5216 [2018-12-03 06:03:42,829 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-12-03 06:03:42,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5216 states. [2018-12-03 06:03:42,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5216 to 5216. [2018-12-03 06:03:42,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5216 states. [2018-12-03 06:03:42,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5216 states to 5216 states and 15399 transitions. [2018-12-03 06:03:42,873 INFO L78 Accepts]: Start accepts. Automaton has 5216 states and 15399 transitions. Word has length 114 [2018-12-03 06:03:42,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:42,873 INFO L480 AbstractCegarLoop]: Abstraction has 5216 states and 15399 transitions. [2018-12-03 06:03:42,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-03 06:03:42,873 INFO L276 IsEmpty]: Start isEmpty. Operand 5216 states and 15399 transitions. [2018-12-03 06:03:42,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-03 06:03:42,877 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:42,877 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:42,877 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:42,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:42,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1118510685, now seen corresponding path program 1 times [2018-12-03 06:03:42,878 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:42,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,878 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-03 06:03:42,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:42,879 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:42,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-03 06:03:42,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-03 06:03:42,898 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-03 06:03:42,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-03 06:03:42,899 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-03 06:03:42,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-03 06:03:42,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-03 06:03:42,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:03:42,899 INFO L87 Difference]: Start difference. First operand 5216 states and 15399 transitions. Second operand 3 states. [2018-12-03 06:03:42,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-03 06:03:42,930 INFO L93 Difference]: Finished difference Result 7600 states and 23284 transitions. [2018-12-03 06:03:42,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-03 06:03:42,931 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-12-03 06:03:42,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-03 06:03:42,939 INFO L225 Difference]: With dead ends: 7600 [2018-12-03 06:03:42,939 INFO L226 Difference]: Without dead ends: 7600 [2018-12-03 06:03:42,939 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-03 06:03:42,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7600 states. [2018-12-03 06:03:42,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7600 to 4801. [2018-12-03 06:03:42,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4801 states. [2018-12-03 06:03:42,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4801 states to 4801 states and 14353 transitions. [2018-12-03 06:03:42,999 INFO L78 Accepts]: Start accepts. Automaton has 4801 states and 14353 transitions. Word has length 114 [2018-12-03 06:03:42,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-03 06:03:42,999 INFO L480 AbstractCegarLoop]: Abstraction has 4801 states and 14353 transitions. [2018-12-03 06:03:42,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-03 06:03:42,999 INFO L276 IsEmpty]: Start isEmpty. Operand 4801 states and 14353 transitions. [2018-12-03 06:03:43,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-03 06:03:43,004 INFO L394 BasicCegarLoop]: Found error trace [2018-12-03 06:03:43,004 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-03 06:03:43,004 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-03 06:03:43,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-03 06:03:43,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1100656581, now seen corresponding path program 3 times [2018-12-03 06:03:43,004 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-03 06:03:43,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:43,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-03 06:03:43,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-03 06:03:43,005 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-03 06:03:43,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 06:03:43,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-03 06:03:43,070 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-03 06:03:43,197 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-03 06:03:43,198 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.12 06:03:43 BasicIcfg [2018-12-03 06:03:43,198 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-03 06:03:43,198 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-03 06:03:43,198 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-03 06:03:43,198 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-03 06:03:43,199 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.12 06:03:01" (3/4) ... [2018-12-03 06:03:43,200 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-03 06:03:43,327 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_90b745e2-057a-42c5-a97b-e1df2a070944/bin-2019/utaipan/witness.graphml [2018-12-03 06:03:43,328 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-03 06:03:43,328 INFO L168 Benchmark]: Toolchain (without parser) took 42315.40 ms. Allocated memory was 1.0 GB in the beginning and 5.6 GB in the end (delta: 4.5 GB). Free memory was 948.2 MB in the beginning and 2.8 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,329 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: CACSL2BoogieTranslator took 361.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 161.5 MB). Free memory was 948.2 MB in the beginning and 1.1 GB in the end (delta: -190.4 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: Boogie Procedure Inliner took 30.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: Boogie Preprocessor took 19.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: RCFGBuilder took 319.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.1 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: TraceAbstraction took 41450.62 ms. Allocated memory was 1.2 GB in the beginning and 5.6 GB in the end (delta: 4.4 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,330 INFO L168 Benchmark]: Witness Printer took 129.37 ms. Allocated memory is still 5.6 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 46.3 MB). Peak memory consumption was 46.3 MB. Max. memory is 11.5 GB. [2018-12-03 06:03:43,331 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 361.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 161.5 MB). Free memory was 948.2 MB in the beginning and 1.1 GB in the end (delta: -190.4 MB). Peak memory consumption was 31.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 30.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 19.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 319.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.1 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 41450.62 ms. Allocated memory was 1.2 GB in the beginning and 5.6 GB in the end (delta: 4.4 GB). Free memory was 1.1 GB in the beginning and 2.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 129.37 ms. Allocated memory is still 5.6 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 46.3 MB). Peak memory consumption was 46.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L673] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L675] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L682] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L683] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L684] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L685] -1 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L686] -1 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L687] -1 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L688] -1 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L689] -1 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L690] -1 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L691] -1 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L693] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L695] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L696] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L697] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L699] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L703] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}] [L704] -1 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0] [L705] -1 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0] [L706] -1 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L707] -1 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L708] -1 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L709] -1 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L710] -1 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L711] -1 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L712] -1 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L713] -1 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L714] -1 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L715] -1 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L716] -1 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L717] -1 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L718] -1 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L719] -1 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L720] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L721] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L722] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] -1 pthread_t t2695; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] FCALL, FORK -1 pthread_create(&t2695, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] -1 pthread_t t2696; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] FCALL, FORK -1 pthread_create(&t2696, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L726] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L727] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L728] 0 z$flush_delayed = weak$$choice2 [L729] EXPR 0 \read(z) [L729] 0 z$mem_tmp = z [L803] -1 pthread_t t2697; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L730] EXPR 0 \read(z) [L730] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] FCALL, FORK -1 pthread_create(&t2697, ((void *)0), P2, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] 0 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L731] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L732] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L733] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L734] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L735] EXPR 0 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 0 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L736] EXPR 0 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={262:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L736] 0 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L737] 0 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L738] 0 __unbuffered_p0_EAX$read_delayed_var = &z [L739] EXPR 0 \read(z) [L739] 0 __unbuffered_p0_EAX = z [L740] EXPR 0 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={262:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L740] 0 z = z$flush_delayed ? z$mem_tmp : z [L741] 0 z$flush_delayed = (_Bool)0 [L744] 0 x = 1 [L749] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 __unbuffered_p1_EAX = x [L759] 1 y = 1 [L764] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 __unbuffered_p2_EAX = y [L774] 2 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L777] EXPR 2 \read(z) [L777] EXPR 2 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L777] 2 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L778] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L779] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L780] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 2 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L781] EXPR 2 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L781] 2 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L784] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L806] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L810] EXPR -1 \read(z) [L810] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] -1 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L811] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L811] -1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L812] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L812] -1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L813] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] -1 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L814] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L814] -1 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L817] -1 weak$$choice1 = __VERIFIER_nondet_bool() [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L818] EXPR -1 \read(*__unbuffered_p0_EAX$read_delayed_var) [L818] EXPR -1 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] EXPR -1 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L818] -1 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L819] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={262:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={262:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 232 locations, 1 error locations. UNSAFE Result, 41.3s OverallTime, 21 OverallIterations, 1 TraceHistogramMax, 7.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4758 SDtfs, 6212 SDslu, 10818 SDs, 0 SdLazy, 3247 SolverSat, 223 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 210 GetRequests, 56 SyntacticMatches, 30 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=138333occurred in iteration=1, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 15.8s AutomataMinimizationTime, 20 MinimizatonAttempts, 113339 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 2126 NumberOfCodeBlocks, 2126 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 1992 ConstructedInterpolants, 0 QuantifiedInterpolants, 476857 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...