./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/toy1_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/systemc/toy1_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 133c91eb4ca703e3ebf3582d43ed0be6dbefca67 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-02 15:22:15,181 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-02 15:22:15,182 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-02 15:22:15,188 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-02 15:22:15,188 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-02 15:22:15,189 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-02 15:22:15,189 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-02 15:22:15,190 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-02 15:22:15,191 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-02 15:22:15,191 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-02 15:22:15,192 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-02 15:22:15,192 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-02 15:22:15,192 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-02 15:22:15,193 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-02 15:22:15,193 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-02 15:22:15,194 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-02 15:22:15,194 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-02 15:22:15,195 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-02 15:22:15,196 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-02 15:22:15,196 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-02 15:22:15,197 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-02 15:22:15,197 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-02 15:22:15,199 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-02 15:22:15,199 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-02 15:22:15,199 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-02 15:22:15,199 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-02 15:22:15,200 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-02 15:22:15,200 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-02 15:22:15,200 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-02 15:22:15,201 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-02 15:22:15,201 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-02 15:22:15,201 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-02 15:22:15,201 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-02 15:22:15,201 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-02 15:22:15,202 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-02 15:22:15,202 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-02 15:22:15,202 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-02 15:22:15,209 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-02 15:22:15,209 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-02 15:22:15,210 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-02 15:22:15,210 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-02 15:22:15,210 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-02 15:22:15,211 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-02 15:22:15,211 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-02 15:22:15,212 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 15:22:15,212 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-02 15:22:15,212 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-02 15:22:15,213 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-02 15:22:15,213 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133c91eb4ca703e3ebf3582d43ed0be6dbefca67 [2018-12-02 15:22:15,229 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-02 15:22:15,235 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-02 15:22:15,237 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-02 15:22:15,238 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-02 15:22:15,238 INFO L276 PluginConnector]: CDTParser initialized [2018-12-02 15:22:15,238 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/../../sv-benchmarks/c/systemc/toy1_false-unreach-call_false-termination.cil.c [2018-12-02 15:22:15,271 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/data/1c8ef3c3f/bd0064d2233a411cb216ee3d1eda01b3/FLAG17310201e [2018-12-02 15:22:15,658 INFO L307 CDTParser]: Found 1 translation units. [2018-12-02 15:22:15,659 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/sv-benchmarks/c/systemc/toy1_false-unreach-call_false-termination.cil.c [2018-12-02 15:22:15,664 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/data/1c8ef3c3f/bd0064d2233a411cb216ee3d1eda01b3/FLAG17310201e [2018-12-02 15:22:15,672 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/data/1c8ef3c3f/bd0064d2233a411cb216ee3d1eda01b3 [2018-12-02 15:22:15,673 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-02 15:22:15,674 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-02 15:22:15,675 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-02 15:22:15,675 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-02 15:22:15,677 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-02 15:22:15,677 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,679 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cdf4af6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15, skipping insertion in model container [2018-12-02 15:22:15,679 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,683 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-02 15:22:15,700 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-02 15:22:15,809 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 15:22:15,812 INFO L191 MainTranslator]: Completed pre-run [2018-12-02 15:22:15,839 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-02 15:22:15,848 INFO L195 MainTranslator]: Completed translation [2018-12-02 15:22:15,848 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15 WrapperNode [2018-12-02 15:22:15,848 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-02 15:22:15,849 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-02 15:22:15,849 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-02 15:22:15,849 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-02 15:22:15,853 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,858 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,892 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-02 15:22:15,892 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-02 15:22:15,892 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-02 15:22:15,892 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-02 15:22:15,900 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,901 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,903 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,903 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,911 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,919 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,920 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... [2018-12-02 15:22:15,922 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-02 15:22:15,922 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-02 15:22:15,922 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-02 15:22:15,922 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-02 15:22:15,923 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-02 15:22:15,955 INFO L130 BoogieDeclarations]: Found specification of procedure read [2018-12-02 15:22:15,955 INFO L138 BoogieDeclarations]: Found implementation of procedure read [2018-12-02 15:22:15,955 INFO L130 BoogieDeclarations]: Found specification of procedure write_back [2018-12-02 15:22:15,955 INFO L138 BoogieDeclarations]: Found implementation of procedure write_back [2018-12-02 15:22:15,955 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-02 15:22:15,955 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-02 15:22:15,955 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-12-02 15:22:15,955 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-12-02 15:22:15,955 INFO L130 BoogieDeclarations]: Found specification of procedure compute2 [2018-12-02 15:22:15,955 INFO L138 BoogieDeclarations]: Found implementation of procedure compute2 [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure compute1 [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure compute1 [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure write_loop [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure write_loop [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-12-02 15:22:15,956 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-02 15:22:15,956 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-02 15:22:16,252 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-02 15:22:16,252 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-12-02 15:22:16,252 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:22:16 BoogieIcfgContainer [2018-12-02 15:22:16,253 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-02 15:22:16,253 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-02 15:22:16,253 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-02 15:22:16,255 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-02 15:22:16,255 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 03:22:15" (1/3) ... [2018-12-02 15:22:16,256 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e9de850 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:22:16, skipping insertion in model container [2018-12-02 15:22:16,256 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 03:22:15" (2/3) ... [2018-12-02 15:22:16,256 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e9de850 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 03:22:16, skipping insertion in model container [2018-12-02 15:22:16,256 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:22:16" (3/3) ... [2018-12-02 15:22:16,257 INFO L112 eAbstractionObserver]: Analyzing ICFG toy1_false-unreach-call_false-termination.cil.c [2018-12-02 15:22:16,263 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-02 15:22:16,268 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-02 15:22:16,278 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-02 15:22:16,297 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-02 15:22:16,297 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-02 15:22:16,298 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-02 15:22:16,298 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-02 15:22:16,298 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-02 15:22:16,298 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-02 15:22:16,298 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-02 15:22:16,298 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-02 15:22:16,311 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states. [2018-12-02 15:22:16,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:16,316 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:16,317 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:16,318 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:16,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:16,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1366020299, now seen corresponding path program 1 times [2018-12-02 15:22:16,323 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:16,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:16,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,352 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:16,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:16,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:16,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:16,460 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:16,460 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:16,464 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:16,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:16,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:16,473 INFO L87 Difference]: Start difference. First operand 161 states. Second operand 3 states. [2018-12-02 15:22:16,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:16,510 INFO L93 Difference]: Finished difference Result 304 states and 521 transitions. [2018-12-02 15:22:16,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:16,511 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-12-02 15:22:16,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:16,518 INFO L225 Difference]: With dead ends: 304 [2018-12-02 15:22:16,518 INFO L226 Difference]: Without dead ends: 152 [2018-12-02 15:22:16,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:16,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-02 15:22:16,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-12-02 15:22:16,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-02 15:22:16,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 246 transitions. [2018-12-02 15:22:16,552 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 246 transitions. Word has length 47 [2018-12-02 15:22:16,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:16,552 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 246 transitions. [2018-12-02 15:22:16,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:16,553 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 246 transitions. [2018-12-02 15:22:16,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:16,554 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:16,554 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:16,555 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:16,555 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:16,555 INFO L82 PathProgramCache]: Analyzing trace with hash 684963699, now seen corresponding path program 1 times [2018-12-02 15:22:16,555 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,556 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:16,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:16,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:16,628 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:16,628 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:16,628 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:16,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:16,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:16,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:16,629 INFO L87 Difference]: Start difference. First operand 152 states and 246 transitions. Second operand 4 states. [2018-12-02 15:22:16,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:16,767 INFO L93 Difference]: Finished difference Result 394 states and 641 transitions. [2018-12-02 15:22:16,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:22:16,767 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:16,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:16,768 INFO L225 Difference]: With dead ends: 394 [2018-12-02 15:22:16,768 INFO L226 Difference]: Without dead ends: 259 [2018-12-02 15:22:16,769 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:16,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-12-02 15:22:16,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 249. [2018-12-02 15:22:16,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-12-02 15:22:16,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 402 transitions. [2018-12-02 15:22:16,788 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 402 transitions. Word has length 47 [2018-12-02 15:22:16,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:16,788 INFO L480 AbstractCegarLoop]: Abstraction has 249 states and 402 transitions. [2018-12-02 15:22:16,788 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:16,788 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 402 transitions. [2018-12-02 15:22:16,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:16,790 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:16,790 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:16,790 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:16,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:16,790 INFO L82 PathProgramCache]: Analyzing trace with hash 959723313, now seen corresponding path program 1 times [2018-12-02 15:22:16,790 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:16,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:16,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,791 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:16,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:16,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:16,831 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:16,831 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:16,831 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:16,831 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:16,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:16,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:16,832 INFO L87 Difference]: Start difference. First operand 249 states and 402 transitions. Second operand 4 states. [2018-12-02 15:22:16,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:16,936 INFO L93 Difference]: Finished difference Result 675 states and 1099 transitions. [2018-12-02 15:22:16,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:22:16,936 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:16,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:16,938 INFO L225 Difference]: With dead ends: 675 [2018-12-02 15:22:16,938 INFO L226 Difference]: Without dead ends: 445 [2018-12-02 15:22:16,939 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:16,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states. [2018-12-02 15:22:16,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 431. [2018-12-02 15:22:16,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 431 states. [2018-12-02 15:22:16,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 699 transitions. [2018-12-02 15:22:16,961 INFO L78 Accepts]: Start accepts. Automaton has 431 states and 699 transitions. Word has length 47 [2018-12-02 15:22:16,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:16,962 INFO L480 AbstractCegarLoop]: Abstraction has 431 states and 699 transitions. [2018-12-02 15:22:16,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:16,962 INFO L276 IsEmpty]: Start isEmpty. Operand 431 states and 699 transitions. [2018-12-02 15:22:16,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:16,963 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:16,963 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:16,964 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:16,964 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:16,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1661323187, now seen corresponding path program 1 times [2018-12-02 15:22:16,964 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:16,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:16,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:16,965 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:16,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:16,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:16,999 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:16,999 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:17,000 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:17,000 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:17,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:17,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:17,001 INFO L87 Difference]: Start difference. First operand 431 states and 699 transitions. Second operand 4 states. [2018-12-02 15:22:17,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:17,127 INFO L93 Difference]: Finished difference Result 1281 states and 2081 transitions. [2018-12-02 15:22:17,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:22:17,127 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:17,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:17,130 INFO L225 Difference]: With dead ends: 1281 [2018-12-02 15:22:17,130 INFO L226 Difference]: Without dead ends: 870 [2018-12-02 15:22:17,132 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:17,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 870 states. [2018-12-02 15:22:17,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 870 to 860. [2018-12-02 15:22:17,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 860 states. [2018-12-02 15:22:17,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 860 states to 860 states and 1387 transitions. [2018-12-02 15:22:17,166 INFO L78 Accepts]: Start accepts. Automaton has 860 states and 1387 transitions. Word has length 47 [2018-12-02 15:22:17,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:17,167 INFO L480 AbstractCegarLoop]: Abstraction has 860 states and 1387 transitions. [2018-12-02 15:22:17,167 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:17,167 INFO L276 IsEmpty]: Start isEmpty. Operand 860 states and 1387 transitions. [2018-12-02 15:22:17,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:17,169 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:17,169 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:17,169 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:17,169 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:17,169 INFO L82 PathProgramCache]: Analyzing trace with hash 1683955441, now seen corresponding path program 1 times [2018-12-02 15:22:17,169 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:17,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:17,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,170 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:17,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:17,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:17,197 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:17,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:17,197 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:17,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:17,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:17,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:17,197 INFO L87 Difference]: Start difference. First operand 860 states and 1387 transitions. Second operand 4 states. [2018-12-02 15:22:17,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:17,365 INFO L93 Difference]: Finished difference Result 3013 states and 4877 transitions. [2018-12-02 15:22:17,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:22:17,365 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:17,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:17,374 INFO L225 Difference]: With dead ends: 3013 [2018-12-02 15:22:17,374 INFO L226 Difference]: Without dead ends: 2185 [2018-12-02 15:22:17,377 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:17,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2185 states. [2018-12-02 15:22:17,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2185 to 2115. [2018-12-02 15:22:17,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2115 states. [2018-12-02 15:22:17,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2115 states to 2115 states and 3404 transitions. [2018-12-02 15:22:17,455 INFO L78 Accepts]: Start accepts. Automaton has 2115 states and 3404 transitions. Word has length 47 [2018-12-02 15:22:17,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:17,456 INFO L480 AbstractCegarLoop]: Abstraction has 2115 states and 3404 transitions. [2018-12-02 15:22:17,456 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:17,456 INFO L276 IsEmpty]: Start isEmpty. Operand 2115 states and 3404 transitions. [2018-12-02 15:22:17,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:17,458 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:17,458 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:17,458 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:17,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:17,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1224808461, now seen corresponding path program 1 times [2018-12-02 15:22:17,458 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:17,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:17,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,459 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:17,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:17,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:17,518 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:17,518 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:22:17,519 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:17,519 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:22:17,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:22:17,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:17,519 INFO L87 Difference]: Start difference. First operand 2115 states and 3404 transitions. Second operand 5 states. [2018-12-02 15:22:17,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:17,774 INFO L93 Difference]: Finished difference Result 6477 states and 10462 transitions. [2018-12-02 15:22:17,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:22:17,775 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-02 15:22:17,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:17,785 INFO L225 Difference]: With dead ends: 6477 [2018-12-02 15:22:17,785 INFO L226 Difference]: Without dead ends: 4382 [2018-12-02 15:22:17,790 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:22:17,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4382 states. [2018-12-02 15:22:17,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4382 to 3296. [2018-12-02 15:22:17,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3296 states. [2018-12-02 15:22:17,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3296 states to 3296 states and 5300 transitions. [2018-12-02 15:22:17,913 INFO L78 Accepts]: Start accepts. Automaton has 3296 states and 5300 transitions. Word has length 47 [2018-12-02 15:22:17,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:17,913 INFO L480 AbstractCegarLoop]: Abstraction has 3296 states and 5300 transitions. [2018-12-02 15:22:17,913 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:22:17,913 INFO L276 IsEmpty]: Start isEmpty. Operand 3296 states and 5300 transitions. [2018-12-02 15:22:17,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:17,916 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:17,916 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:17,916 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:17,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:17,916 INFO L82 PathProgramCache]: Analyzing trace with hash -424223241, now seen corresponding path program 1 times [2018-12-02 15:22:17,916 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:17,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:17,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:17,917 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:17,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:17,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:17,956 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:17,956 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:17,956 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:17,956 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:17,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:17,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:17,956 INFO L87 Difference]: Start difference. First operand 3296 states and 5300 transitions. Second operand 4 states. [2018-12-02 15:22:18,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:18,195 INFO L93 Difference]: Finished difference Result 6609 states and 10702 transitions. [2018-12-02 15:22:18,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:18,196 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:18,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:18,204 INFO L225 Difference]: With dead ends: 6609 [2018-12-02 15:22:18,204 INFO L226 Difference]: Without dead ends: 3379 [2018-12-02 15:22:18,210 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:18,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3379 states. [2018-12-02 15:22:18,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3379 to 3359. [2018-12-02 15:22:18,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3359 states. [2018-12-02 15:22:18,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3359 states to 3359 states and 5291 transitions. [2018-12-02 15:22:18,300 INFO L78 Accepts]: Start accepts. Automaton has 3359 states and 5291 transitions. Word has length 47 [2018-12-02 15:22:18,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:18,300 INFO L480 AbstractCegarLoop]: Abstraction has 3359 states and 5291 transitions. [2018-12-02 15:22:18,300 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:18,300 INFO L276 IsEmpty]: Start isEmpty. Operand 3359 states and 5291 transitions. [2018-12-02 15:22:18,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:18,302 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:18,303 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:18,303 INFO L423 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:18,303 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:18,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1521415, now seen corresponding path program 1 times [2018-12-02 15:22:18,303 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:18,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:18,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:18,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:18,304 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:18,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:18,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:18,331 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:18,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:18,331 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:18,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:18,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:18,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:18,332 INFO L87 Difference]: Start difference. First operand 3359 states and 5291 transitions. Second operand 4 states. [2018-12-02 15:22:18,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:18,538 INFO L93 Difference]: Finished difference Result 6871 states and 10809 transitions. [2018-12-02 15:22:18,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:18,539 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:18,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:18,548 INFO L225 Difference]: With dead ends: 6871 [2018-12-02 15:22:18,548 INFO L226 Difference]: Without dead ends: 3594 [2018-12-02 15:22:18,555 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:18,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3594 states. [2018-12-02 15:22:18,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3594 to 3554. [2018-12-02 15:22:18,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3554 states. [2018-12-02 15:22:18,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3554 states to 3554 states and 5523 transitions. [2018-12-02 15:22:18,681 INFO L78 Accepts]: Start accepts. Automaton has 3554 states and 5523 transitions. Word has length 47 [2018-12-02 15:22:18,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:18,681 INFO L480 AbstractCegarLoop]: Abstraction has 3554 states and 5523 transitions. [2018-12-02 15:22:18,681 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:18,681 INFO L276 IsEmpty]: Start isEmpty. Operand 3554 states and 5523 transitions. [2018-12-02 15:22:18,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:18,682 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:18,682 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:18,682 INFO L423 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:18,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:18,683 INFO L82 PathProgramCache]: Analyzing trace with hash -819169865, now seen corresponding path program 1 times [2018-12-02 15:22:18,683 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:18,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:18,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:18,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:18,683 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:18,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:18,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:18,711 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:18,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:18,711 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:18,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:18,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:18,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:18,712 INFO L87 Difference]: Start difference. First operand 3554 states and 5523 transitions. Second operand 4 states. [2018-12-02 15:22:18,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:18,942 INFO L93 Difference]: Finished difference Result 7652 states and 12054 transitions. [2018-12-02 15:22:18,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:18,943 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 47 [2018-12-02 15:22:18,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:18,956 INFO L225 Difference]: With dead ends: 7652 [2018-12-02 15:22:18,956 INFO L226 Difference]: Without dead ends: 4156 [2018-12-02 15:22:18,967 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:18,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4156 states. [2018-12-02 15:22:19,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4156 to 4146. [2018-12-02 15:22:19,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4146 states. [2018-12-02 15:22:19,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4146 states to 4146 states and 6362 transitions. [2018-12-02 15:22:19,119 INFO L78 Accepts]: Start accepts. Automaton has 4146 states and 6362 transitions. Word has length 47 [2018-12-02 15:22:19,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:19,120 INFO L480 AbstractCegarLoop]: Abstraction has 4146 states and 6362 transitions. [2018-12-02 15:22:19,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:19,120 INFO L276 IsEmpty]: Start isEmpty. Operand 4146 states and 6362 transitions. [2018-12-02 15:22:19,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-02 15:22:19,121 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:19,122 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:19,122 INFO L423 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:19,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:19,122 INFO L82 PathProgramCache]: Analyzing trace with hash 1481652725, now seen corresponding path program 1 times [2018-12-02 15:22:19,122 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:19,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:19,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:19,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:19,123 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:19,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:19,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:19,151 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:19,151 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:19,151 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:19,151 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:19,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:19,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:19,152 INFO L87 Difference]: Start difference. First operand 4146 states and 6362 transitions. Second operand 3 states. [2018-12-02 15:22:19,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:19,305 INFO L93 Difference]: Finished difference Result 9137 states and 14288 transitions. [2018-12-02 15:22:19,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:19,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-12-02 15:22:19,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:19,322 INFO L225 Difference]: With dead ends: 9137 [2018-12-02 15:22:19,322 INFO L226 Difference]: Without dead ends: 5045 [2018-12-02 15:22:19,333 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:19,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5045 states. [2018-12-02 15:22:19,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5045 to 4973. [2018-12-02 15:22:19,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4973 states. [2018-12-02 15:22:19,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4973 states to 4973 states and 7578 transitions. [2018-12-02 15:22:19,460 INFO L78 Accepts]: Start accepts. Automaton has 4973 states and 7578 transitions. Word has length 47 [2018-12-02 15:22:19,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:19,461 INFO L480 AbstractCegarLoop]: Abstraction has 4973 states and 7578 transitions. [2018-12-02 15:22:19,461 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:19,461 INFO L276 IsEmpty]: Start isEmpty. Operand 4973 states and 7578 transitions. [2018-12-02 15:22:19,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-02 15:22:19,464 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:19,464 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:19,464 INFO L423 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:19,464 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:19,464 INFO L82 PathProgramCache]: Analyzing trace with hash 584484674, now seen corresponding path program 1 times [2018-12-02 15:22:19,464 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:19,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:19,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:19,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:19,465 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:19,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:19,491 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:22:19,491 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:19,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:22:19,491 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:19,492 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:22:19,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:22:19,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:19,492 INFO L87 Difference]: Start difference. First operand 4973 states and 7578 transitions. Second operand 5 states. [2018-12-02 15:22:20,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:20,019 INFO L93 Difference]: Finished difference Result 12503 states and 19791 transitions. [2018-12-02 15:22:20,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-02 15:22:20,019 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-02 15:22:20,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:20,034 INFO L225 Difference]: With dead ends: 12503 [2018-12-02 15:22:20,034 INFO L226 Difference]: Without dead ends: 7576 [2018-12-02 15:22:20,043 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-02 15:22:20,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7576 states. [2018-12-02 15:22:20,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7576 to 7478. [2018-12-02 15:22:20,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7478 states. [2018-12-02 15:22:20,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7478 states to 7478 states and 11595 transitions. [2018-12-02 15:22:20,227 INFO L78 Accepts]: Start accepts. Automaton has 7478 states and 11595 transitions. Word has length 67 [2018-12-02 15:22:20,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:20,227 INFO L480 AbstractCegarLoop]: Abstraction has 7478 states and 11595 transitions. [2018-12-02 15:22:20,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:22:20,227 INFO L276 IsEmpty]: Start isEmpty. Operand 7478 states and 11595 transitions. [2018-12-02 15:22:20,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 15:22:20,232 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:20,232 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:20,232 INFO L423 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:20,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:20,232 INFO L82 PathProgramCache]: Analyzing trace with hash -923082464, now seen corresponding path program 1 times [2018-12-02 15:22:20,232 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:20,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:20,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:20,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:20,233 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:20,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:20,277 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 15:22:20,277 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:22:20,277 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:22:20,278 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 82 with the following transitions: [2018-12-02 15:22:20,279 INFO L205 CegarAbsIntRunner]: [45], [46], [74], [83], [87], [113], [116], [135], [148], [161], [174], [225], [228], [230], [233], [235], [238], [242], [251], [253], [264], [276], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [686], [690], [693], [694], [705], [707], [709], [710], [711], [713] [2018-12-02 15:22:20,302 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:22:20,302 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:22:20,423 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:22:20,424 INFO L272 AbstractInterpreter]: Visited 46 different actions 46 times. Never merged. Never widened. Performed 464 root evaluator evaluations with a maximum evaluation depth of 3. Performed 464 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 64 variables. [2018-12-02 15:22:20,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:20,428 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:22:20,535 INFO L227 lantSequenceWeakener]: Weakened 60 states. On average, predicates are now at 83.38% of their original sizes. [2018-12-02 15:22:20,535 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:22:20,714 INFO L418 sIntCurrentIteration]: We unified 80 AI predicates to 80 [2018-12-02 15:22:20,714 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:22:20,715 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:22:20,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [7] total 29 [2018-12-02 15:22:20,715 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:20,715 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-02 15:22:20,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-02 15:22:20,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=439, Unknown=0, NotChecked=0, Total=552 [2018-12-02 15:22:20,716 INFO L87 Difference]: Start difference. First operand 7478 states and 11595 transitions. Second operand 24 states. [2018-12-02 15:22:23,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:23,549 INFO L93 Difference]: Finished difference Result 14808 states and 23442 transitions. [2018-12-02 15:22:23,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-02 15:22:23,549 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-12-02 15:22:23,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:23,563 INFO L225 Difference]: With dead ends: 14808 [2018-12-02 15:22:23,563 INFO L226 Difference]: Without dead ends: 7339 [2018-12-02 15:22:23,574 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 91 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=280, Invalid=910, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 15:22:23,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7339 states. [2018-12-02 15:22:23,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7339 to 7247. [2018-12-02 15:22:23,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7247 states. [2018-12-02 15:22:23,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7247 states to 7247 states and 11330 transitions. [2018-12-02 15:22:23,774 INFO L78 Accepts]: Start accepts. Automaton has 7247 states and 11330 transitions. Word has length 81 [2018-12-02 15:22:23,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:23,774 INFO L480 AbstractCegarLoop]: Abstraction has 7247 states and 11330 transitions. [2018-12-02 15:22:23,774 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-02 15:22:23,774 INFO L276 IsEmpty]: Start isEmpty. Operand 7247 states and 11330 transitions. [2018-12-02 15:22:23,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-02 15:22:23,778 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:23,778 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:23,778 INFO L423 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:23,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:23,778 INFO L82 PathProgramCache]: Analyzing trace with hash -846181666, now seen corresponding path program 1 times [2018-12-02 15:22:23,779 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:23,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:23,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:23,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:23,779 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:23,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:23,812 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-12-02 15:22:23,812 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:23,813 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:23,813 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:23,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:23,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:23,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:23,814 INFO L87 Difference]: Start difference. First operand 7247 states and 11330 transitions. Second operand 4 states. [2018-12-02 15:22:24,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:24,210 INFO L93 Difference]: Finished difference Result 20386 states and 31845 transitions. [2018-12-02 15:22:24,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:24,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2018-12-02 15:22:24,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:24,234 INFO L225 Difference]: With dead ends: 20386 [2018-12-02 15:22:24,234 INFO L226 Difference]: Without dead ends: 13291 [2018-12-02 15:22:24,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:24,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13291 states. [2018-12-02 15:22:24,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13291 to 13287. [2018-12-02 15:22:24,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13287 states. [2018-12-02 15:22:24,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13287 states to 13287 states and 20737 transitions. [2018-12-02 15:22:24,603 INFO L78 Accepts]: Start accepts. Automaton has 13287 states and 20737 transitions. Word has length 81 [2018-12-02 15:22:24,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:24,603 INFO L480 AbstractCegarLoop]: Abstraction has 13287 states and 20737 transitions. [2018-12-02 15:22:24,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:24,603 INFO L276 IsEmpty]: Start isEmpty. Operand 13287 states and 20737 transitions. [2018-12-02 15:22:24,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-02 15:22:24,611 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:24,612 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:24,612 INFO L423 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:24,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:24,612 INFO L82 PathProgramCache]: Analyzing trace with hash -442374851, now seen corresponding path program 1 times [2018-12-02 15:22:24,612 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:24,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:24,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:24,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:24,613 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:24,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:24,712 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 15:22:24,713 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:22:24,713 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:22:24,713 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 89 with the following transitions: [2018-12-02 15:22:24,713 INFO L205 CegarAbsIntRunner]: [45], [46], [74], [83], [87], [113], [116], [126], [129], [135], [148], [161], [174], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [264], [276], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [686], [690], [693], [694], [695], [696], [705], [707], [709], [710], [711], [713] [2018-12-02 15:22:24,715 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:22:24,715 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:22:24,743 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:22:24,743 INFO L272 AbstractInterpreter]: Visited 55 different actions 55 times. Never merged. Never widened. Performed 541 root evaluator evaluations with a maximum evaluation depth of 3. Performed 541 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 65 variables. [2018-12-02 15:22:24,744 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:24,744 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:22:24,801 INFO L227 lantSequenceWeakener]: Weakened 69 states. On average, predicates are now at 83.77% of their original sizes. [2018-12-02 15:22:24,801 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:22:25,007 INFO L418 sIntCurrentIteration]: We unified 87 AI predicates to 87 [2018-12-02 15:22:25,007 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:22:25,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:22:25,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [28] imperfect sequences [7] total 33 [2018-12-02 15:22:25,008 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:25,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-12-02 15:22:25,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-12-02 15:22:25,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=630, Unknown=0, NotChecked=0, Total=756 [2018-12-02 15:22:25,008 INFO L87 Difference]: Start difference. First operand 13287 states and 20737 transitions. Second operand 28 states. [2018-12-02 15:22:30,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:30,094 INFO L93 Difference]: Finished difference Result 18869 states and 29453 transitions. [2018-12-02 15:22:30,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-02 15:22:30,094 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 88 [2018-12-02 15:22:30,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:30,115 INFO L225 Difference]: With dead ends: 18869 [2018-12-02 15:22:30,116 INFO L226 Difference]: Without dead ends: 13453 [2018-12-02 15:22:30,127 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 100 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 352 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=307, Invalid=1333, Unknown=0, NotChecked=0, Total=1640 [2018-12-02 15:22:30,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13453 states. [2018-12-02 15:22:30,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13453 to 13321. [2018-12-02 15:22:30,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13321 states. [2018-12-02 15:22:30,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13321 states to 13321 states and 20775 transitions. [2018-12-02 15:22:30,523 INFO L78 Accepts]: Start accepts. Automaton has 13321 states and 20775 transitions. Word has length 88 [2018-12-02 15:22:30,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:30,523 INFO L480 AbstractCegarLoop]: Abstraction has 13321 states and 20775 transitions. [2018-12-02 15:22:30,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-12-02 15:22:30,523 INFO L276 IsEmpty]: Start isEmpty. Operand 13321 states and 20775 transitions. [2018-12-02 15:22:30,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-12-02 15:22:30,527 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:30,527 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:30,527 INFO L423 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:30,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:30,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1641060370, now seen corresponding path program 1 times [2018-12-02 15:22:30,527 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:30,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:30,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:30,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:30,528 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:30,576 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-02 15:22:30,577 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:22:30,577 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:22:30,577 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 91 with the following transitions: [2018-12-02 15:22:30,577 INFO L205 CegarAbsIntRunner]: [45], [46], [74], [83], [87], [113], [116], [126], [132], [135], [139], [145], [148], [152], [155], [161], [174], [225], [228], [230], [233], [235], [238], [242], [251], [253], [264], [276], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [661], [677], [679], [685], [686], [690], [693], [694], [699], [700], [705], [707], [709], [710], [711], [713] [2018-12-02 15:22:30,578 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:22:30,578 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:22:30,606 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:22:30,606 INFO L272 AbstractInterpreter]: Visited 61 different actions 63 times. Merged at 2 different actions 2 times. Never widened. Performed 567 root evaluator evaluations with a maximum evaluation depth of 3. Performed 567 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 67 variables. [2018-12-02 15:22:30,608 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:30,608 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:22:30,682 INFO L227 lantSequenceWeakener]: Weakened 75 states. On average, predicates are now at 83.42% of their original sizes. [2018-12-02 15:22:30,683 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:22:30,945 INFO L418 sIntCurrentIteration]: We unified 89 AI predicates to 89 [2018-12-02 15:22:30,945 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:22:30,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:22:30,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [32] imperfect sequences [7] total 37 [2018-12-02 15:22:30,945 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:30,945 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-02 15:22:30,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-02 15:22:30,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=839, Unknown=0, NotChecked=0, Total=992 [2018-12-02 15:22:30,946 INFO L87 Difference]: Start difference. First operand 13321 states and 20775 transitions. Second operand 32 states. [2018-12-02 15:22:38,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:38,582 INFO L93 Difference]: Finished difference Result 31510 states and 50819 transitions. [2018-12-02 15:22:38,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-02 15:22:38,582 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 90 [2018-12-02 15:22:38,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:38,622 INFO L225 Difference]: With dead ends: 31510 [2018-12-02 15:22:38,622 INFO L226 Difference]: Without dead ends: 20674 [2018-12-02 15:22:38,651 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 102 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=359, Invalid=1621, Unknown=0, NotChecked=0, Total=1980 [2018-12-02 15:22:38,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20674 states. [2018-12-02 15:22:39,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20674 to 20342. [2018-12-02 15:22:39,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20342 states. [2018-12-02 15:22:39,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20342 states to 20342 states and 31666 transitions. [2018-12-02 15:22:39,387 INFO L78 Accepts]: Start accepts. Automaton has 20342 states and 31666 transitions. Word has length 90 [2018-12-02 15:22:39,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:39,388 INFO L480 AbstractCegarLoop]: Abstraction has 20342 states and 31666 transitions. [2018-12-02 15:22:39,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-02 15:22:39,388 INFO L276 IsEmpty]: Start isEmpty. Operand 20342 states and 31666 transitions. [2018-12-02 15:22:39,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-02 15:22:39,401 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:39,401 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:39,401 INFO L423 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:39,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:39,401 INFO L82 PathProgramCache]: Analyzing trace with hash 1627628034, now seen corresponding path program 1 times [2018-12-02 15:22:39,401 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:39,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:39,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:39,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:39,402 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:39,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:39,506 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-12-02 15:22:39,506 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:39,507 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:39,507 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:39,507 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:39,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:39,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:39,507 INFO L87 Difference]: Start difference. First operand 20342 states and 31666 transitions. Second operand 4 states. [2018-12-02 15:22:40,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:40,085 INFO L93 Difference]: Finished difference Result 32242 states and 50488 transitions. [2018-12-02 15:22:40,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:40,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2018-12-02 15:22:40,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:40,124 INFO L225 Difference]: With dead ends: 32242 [2018-12-02 15:22:40,124 INFO L226 Difference]: Without dead ends: 18557 [2018-12-02 15:22:40,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:40,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18557 states. [2018-12-02 15:22:40,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18557 to 18170. [2018-12-02 15:22:40,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18170 states. [2018-12-02 15:22:40,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18170 states to 18170 states and 28220 transitions. [2018-12-02 15:22:40,632 INFO L78 Accepts]: Start accepts. Automaton has 18170 states and 28220 transitions. Word has length 105 [2018-12-02 15:22:40,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:40,632 INFO L480 AbstractCegarLoop]: Abstraction has 18170 states and 28220 transitions. [2018-12-02 15:22:40,632 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:40,632 INFO L276 IsEmpty]: Start isEmpty. Operand 18170 states and 28220 transitions. [2018-12-02 15:22:40,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-02 15:22:40,636 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:40,636 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:40,637 INFO L423 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:40,637 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:40,637 INFO L82 PathProgramCache]: Analyzing trace with hash 485125568, now seen corresponding path program 1 times [2018-12-02 15:22:40,637 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:40,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:40,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:40,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:40,637 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:40,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:40,694 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:22:40,695 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:40,695 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:22:40,695 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:40,695 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:22:40,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:22:40,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:40,695 INFO L87 Difference]: Start difference. First operand 18170 states and 28220 transitions. Second operand 5 states. [2018-12-02 15:22:41,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:41,387 INFO L93 Difference]: Finished difference Result 36794 states and 58417 transitions. [2018-12-02 15:22:41,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 15:22:41,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-02 15:22:41,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:41,419 INFO L225 Difference]: With dead ends: 36794 [2018-12-02 15:22:41,419 INFO L226 Difference]: Without dead ends: 19275 [2018-12-02 15:22:41,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:22:41,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19275 states. [2018-12-02 15:22:41,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19275 to 17961. [2018-12-02 15:22:41,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17961 states. [2018-12-02 15:22:42,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17961 states to 17961 states and 26844 transitions. [2018-12-02 15:22:42,005 INFO L78 Accepts]: Start accepts. Automaton has 17961 states and 26844 transitions. Word has length 105 [2018-12-02 15:22:42,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:42,006 INFO L480 AbstractCegarLoop]: Abstraction has 17961 states and 26844 transitions. [2018-12-02 15:22:42,006 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:22:42,006 INFO L276 IsEmpty]: Start isEmpty. Operand 17961 states and 26844 transitions. [2018-12-02 15:22:42,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-02 15:22:42,015 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:42,015 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:42,015 INFO L423 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:42,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:42,015 INFO L82 PathProgramCache]: Analyzing trace with hash 654604212, now seen corresponding path program 1 times [2018-12-02 15:22:42,015 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:42,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:42,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:42,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:42,016 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:42,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:42,042 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-02 15:22:42,043 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:42,043 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:42,043 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:42,043 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:42,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:42,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:42,044 INFO L87 Difference]: Start difference. First operand 17961 states and 26844 transitions. Second operand 4 states. [2018-12-02 15:22:42,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:42,633 INFO L93 Difference]: Finished difference Result 33914 states and 50807 transitions. [2018-12-02 15:22:42,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:42,633 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-02 15:22:42,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:42,659 INFO L225 Difference]: With dead ends: 33914 [2018-12-02 15:22:42,659 INFO L226 Difference]: Without dead ends: 16623 [2018-12-02 15:22:42,676 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:42,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16623 states. [2018-12-02 15:22:43,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16623 to 9174. [2018-12-02 15:22:43,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9174 states. [2018-12-02 15:22:43,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9174 states to 9174 states and 13649 transitions. [2018-12-02 15:22:43,036 INFO L78 Accepts]: Start accepts. Automaton has 9174 states and 13649 transitions. Word has length 113 [2018-12-02 15:22:43,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:43,037 INFO L480 AbstractCegarLoop]: Abstraction has 9174 states and 13649 transitions. [2018-12-02 15:22:43,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:43,037 INFO L276 IsEmpty]: Start isEmpty. Operand 9174 states and 13649 transitions. [2018-12-02 15:22:43,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-02 15:22:43,041 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:43,041 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:43,041 INFO L423 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:43,041 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:43,042 INFO L82 PathProgramCache]: Analyzing trace with hash 487918840, now seen corresponding path program 1 times [2018-12-02 15:22:43,042 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:43,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:43,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:43,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:43,042 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:43,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:43,077 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-02 15:22:43,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:43,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-02 15:22:43,077 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:43,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:22:43,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:22:43,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-02 15:22:43,078 INFO L87 Difference]: Start difference. First operand 9174 states and 13649 transitions. Second operand 4 states. [2018-12-02 15:22:43,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:43,416 INFO L93 Difference]: Finished difference Result 16627 states and 24886 transitions. [2018-12-02 15:22:43,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-02 15:22:43,416 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-02 15:22:43,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:43,428 INFO L225 Difference]: With dead ends: 16627 [2018-12-02 15:22:43,428 INFO L226 Difference]: Without dead ends: 8616 [2018-12-02 15:22:43,437 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:22:43,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8616 states. [2018-12-02 15:22:43,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8616 to 8616. [2018-12-02 15:22:43,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8616 states. [2018-12-02 15:22:43,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12859 transitions. [2018-12-02 15:22:43,758 INFO L78 Accepts]: Start accepts. Automaton has 8616 states and 12859 transitions. Word has length 113 [2018-12-02 15:22:43,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:43,759 INFO L480 AbstractCegarLoop]: Abstraction has 8616 states and 12859 transitions. [2018-12-02 15:22:43,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:22:43,759 INFO L276 IsEmpty]: Start isEmpty. Operand 8616 states and 12859 transitions. [2018-12-02 15:22:43,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-12-02 15:22:43,763 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:43,763 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:43,763 INFO L423 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:43,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:43,763 INFO L82 PathProgramCache]: Analyzing trace with hash -887055750, now seen corresponding path program 1 times [2018-12-02 15:22:43,763 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:43,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:43,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:43,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:43,764 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:43,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:43,789 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:22:43,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:43,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:43,789 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:43,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:43,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:43,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:43,790 INFO L87 Difference]: Start difference. First operand 8616 states and 12859 transitions. Second operand 3 states. [2018-12-02 15:22:44,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:44,352 INFO L93 Difference]: Finished difference Result 21199 states and 32987 transitions. [2018-12-02 15:22:44,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:44,352 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 128 [2018-12-02 15:22:44,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:44,368 INFO L225 Difference]: With dead ends: 21199 [2018-12-02 15:22:44,368 INFO L226 Difference]: Without dead ends: 12684 [2018-12-02 15:22:44,381 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:44,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12684 states. [2018-12-02 15:22:44,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12684 to 12672. [2018-12-02 15:22:44,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12672 states. [2018-12-02 15:22:44,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12672 states to 12672 states and 19267 transitions. [2018-12-02 15:22:44,908 INFO L78 Accepts]: Start accepts. Automaton has 12672 states and 19267 transitions. Word has length 128 [2018-12-02 15:22:44,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:44,909 INFO L480 AbstractCegarLoop]: Abstraction has 12672 states and 19267 transitions. [2018-12-02 15:22:44,909 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:44,909 INFO L276 IsEmpty]: Start isEmpty. Operand 12672 states and 19267 transitions. [2018-12-02 15:22:44,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-12-02 15:22:44,916 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:44,916 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:44,916 INFO L423 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:44,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:44,917 INFO L82 PathProgramCache]: Analyzing trace with hash 963090874, now seen corresponding path program 1 times [2018-12-02 15:22:44,917 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:44,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:44,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:44,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:44,917 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:44,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:44,945 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:22:44,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:44,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:44,945 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:44,945 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:44,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:44,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:44,946 INFO L87 Difference]: Start difference. First operand 12672 states and 19267 transitions. Second operand 3 states. [2018-12-02 15:22:45,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:45,795 INFO L93 Difference]: Finished difference Result 31870 states and 50116 transitions. [2018-12-02 15:22:45,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:45,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 128 [2018-12-02 15:22:45,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:45,830 INFO L225 Difference]: With dead ends: 31870 [2018-12-02 15:22:45,830 INFO L226 Difference]: Without dead ends: 19299 [2018-12-02 15:22:45,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:45,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19299 states. [2018-12-02 15:22:46,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19299 to 19263. [2018-12-02 15:22:46,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19263 states. [2018-12-02 15:22:46,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19263 states to 19263 states and 29384 transitions. [2018-12-02 15:22:46,798 INFO L78 Accepts]: Start accepts. Automaton has 19263 states and 29384 transitions. Word has length 128 [2018-12-02 15:22:46,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:46,798 INFO L480 AbstractCegarLoop]: Abstraction has 19263 states and 29384 transitions. [2018-12-02 15:22:46,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:46,798 INFO L276 IsEmpty]: Start isEmpty. Operand 19263 states and 29384 transitions. [2018-12-02 15:22:46,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-12-02 15:22:46,813 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:46,813 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:46,813 INFO L423 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:46,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:46,813 INFO L82 PathProgramCache]: Analyzing trace with hash -764348816, now seen corresponding path program 1 times [2018-12-02 15:22:46,813 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:46,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:46,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:46,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:46,814 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:46,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:46,846 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:22:46,846 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:46,846 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:46,846 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:46,847 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:46,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:46,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:46,847 INFO L87 Difference]: Start difference. First operand 19263 states and 29384 transitions. Second operand 3 states. [2018-12-02 15:22:47,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:47,822 INFO L93 Difference]: Finished difference Result 38940 states and 60976 transitions. [2018-12-02 15:22:47,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:47,823 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2018-12-02 15:22:47,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:47,864 INFO L225 Difference]: With dead ends: 38940 [2018-12-02 15:22:47,864 INFO L226 Difference]: Without dead ends: 19778 [2018-12-02 15:22:47,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:47,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19778 states. [2018-12-02 15:22:48,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19778 to 19734. [2018-12-02 15:22:48,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19734 states. [2018-12-02 15:22:48,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19734 states to 19734 states and 29382 transitions. [2018-12-02 15:22:48,945 INFO L78 Accepts]: Start accepts. Automaton has 19734 states and 29382 transitions. Word has length 134 [2018-12-02 15:22:48,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:48,945 INFO L480 AbstractCegarLoop]: Abstraction has 19734 states and 29382 transitions. [2018-12-02 15:22:48,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:48,945 INFO L276 IsEmpty]: Start isEmpty. Operand 19734 states and 29382 transitions. [2018-12-02 15:22:48,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-12-02 15:22:48,962 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:48,962 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:48,962 INFO L423 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:48,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:48,962 INFO L82 PathProgramCache]: Analyzing trace with hash 565559208, now seen corresponding path program 1 times [2018-12-02 15:22:48,962 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:48,962 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:48,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:48,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:48,963 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:48,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:48,983 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:22:48,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:48,983 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:48,983 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:48,983 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:48,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:48,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:48,983 INFO L87 Difference]: Start difference. First operand 19734 states and 29382 transitions. Second operand 3 states. [2018-12-02 15:22:50,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:50,015 INFO L93 Difference]: Finished difference Result 40071 states and 61338 transitions. [2018-12-02 15:22:50,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:50,016 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2018-12-02 15:22:50,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:50,058 INFO L225 Difference]: With dead ends: 40071 [2018-12-02 15:22:50,058 INFO L226 Difference]: Without dead ends: 20438 [2018-12-02 15:22:50,126 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:50,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20438 states. [2018-12-02 15:22:51,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20438 to 20144. [2018-12-02 15:22:51,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20144 states. [2018-12-02 15:22:51,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20144 states to 20144 states and 29342 transitions. [2018-12-02 15:22:51,140 INFO L78 Accepts]: Start accepts. Automaton has 20144 states and 29342 transitions. Word has length 136 [2018-12-02 15:22:51,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:51,141 INFO L480 AbstractCegarLoop]: Abstraction has 20144 states and 29342 transitions. [2018-12-02 15:22:51,141 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:51,141 INFO L276 IsEmpty]: Start isEmpty. Operand 20144 states and 29342 transitions. [2018-12-02 15:22:51,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-12-02 15:22:51,156 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:51,156 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:51,156 INFO L423 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:51,156 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:51,156 INFO L82 PathProgramCache]: Analyzing trace with hash -1188592528, now seen corresponding path program 1 times [2018-12-02 15:22:51,156 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:51,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:51,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:51,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:51,157 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:51,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:51,181 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:22:51,181 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:51,181 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:51,181 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:51,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:51,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:51,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:51,182 INFO L87 Difference]: Start difference. First operand 20144 states and 29342 transitions. Second operand 3 states. [2018-12-02 15:22:53,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:53,072 INFO L93 Difference]: Finished difference Result 57506 states and 89548 transitions. [2018-12-02 15:22:53,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:53,073 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2018-12-02 15:22:53,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:53,147 INFO L225 Difference]: With dead ends: 57506 [2018-12-02 15:22:53,147 INFO L226 Difference]: Without dead ends: 37472 [2018-12-02 15:22:53,238 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:53,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37472 states. [2018-12-02 15:22:54,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37472 to 36664. [2018-12-02 15:22:54,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36664 states. [2018-12-02 15:22:55,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36664 states to 36664 states and 55172 transitions. [2018-12-02 15:22:55,192 INFO L78 Accepts]: Start accepts. Automaton has 36664 states and 55172 transitions. Word has length 138 [2018-12-02 15:22:55,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:55,193 INFO L480 AbstractCegarLoop]: Abstraction has 36664 states and 55172 transitions. [2018-12-02 15:22:55,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:55,193 INFO L276 IsEmpty]: Start isEmpty. Operand 36664 states and 55172 transitions. [2018-12-02 15:22:55,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-12-02 15:22:55,237 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:55,237 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:55,237 INFO L423 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:55,237 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:55,237 INFO L82 PathProgramCache]: Analyzing trace with hash -223499261, now seen corresponding path program 1 times [2018-12-02 15:22:55,237 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:55,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:55,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:55,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:55,238 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:55,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:55,257 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-12-02 15:22:55,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:55,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:55,257 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:55,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:55,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:55,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:55,258 INFO L87 Difference]: Start difference. First operand 36664 states and 55172 transitions. Second operand 3 states. [2018-12-02 15:22:57,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:22:57,091 INFO L93 Difference]: Finished difference Result 70785 states and 106785 transitions. [2018-12-02 15:22:57,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:22:57,092 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2018-12-02 15:22:57,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:22:57,178 INFO L225 Difference]: With dead ends: 70785 [2018-12-02 15:22:57,178 INFO L226 Difference]: Without dead ends: 36664 [2018-12-02 15:22:57,288 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:57,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36664 states. [2018-12-02 15:22:59,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36664 to 36638. [2018-12-02 15:22:59,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36638 states. [2018-12-02 15:22:59,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36638 states to 36638 states and 54990 transitions. [2018-12-02 15:22:59,275 INFO L78 Accepts]: Start accepts. Automaton has 36638 states and 54990 transitions. Word has length 139 [2018-12-02 15:22:59,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:22:59,276 INFO L480 AbstractCegarLoop]: Abstraction has 36638 states and 54990 transitions. [2018-12-02 15:22:59,276 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:22:59,276 INFO L276 IsEmpty]: Start isEmpty. Operand 36638 states and 54990 transitions. [2018-12-02 15:22:59,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-12-02 15:22:59,324 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:22:59,325 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:22:59,325 INFO L423 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:22:59,325 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:22:59,325 INFO L82 PathProgramCache]: Analyzing trace with hash -647145983, now seen corresponding path program 1 times [2018-12-02 15:22:59,325 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:22:59,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:59,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:22:59,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:22:59,326 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:22:59,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:22:59,349 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:22:59,349 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:22:59,349 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:22:59,349 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:22:59,350 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:22:59,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:22:59,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:22:59,350 INFO L87 Difference]: Start difference. First operand 36638 states and 54990 transitions. Second operand 3 states. [2018-12-02 15:23:01,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:23:01,175 INFO L93 Difference]: Finished difference Result 49776 states and 77534 transitions. [2018-12-02 15:23:01,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:23:01,175 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2018-12-02 15:23:01,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:23:01,237 INFO L225 Difference]: With dead ends: 49776 [2018-12-02 15:23:01,237 INFO L226 Difference]: Without dead ends: 36094 [2018-12-02 15:23:01,306 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:23:01,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36094 states. [2018-12-02 15:23:02,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36094 to 35394. [2018-12-02 15:23:02,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35394 states. [2018-12-02 15:23:03,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35394 states to 35394 states and 53022 transitions. [2018-12-02 15:23:03,095 INFO L78 Accepts]: Start accepts. Automaton has 35394 states and 53022 transitions. Word has length 139 [2018-12-02 15:23:03,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:23:03,096 INFO L480 AbstractCegarLoop]: Abstraction has 35394 states and 53022 transitions. [2018-12-02 15:23:03,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:23:03,096 INFO L276 IsEmpty]: Start isEmpty. Operand 35394 states and 53022 transitions. [2018-12-02 15:23:03,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-12-02 15:23:03,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:23:03,147 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:23:03,147 INFO L423 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:23:03,147 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:03,147 INFO L82 PathProgramCache]: Analyzing trace with hash -897372578, now seen corresponding path program 1 times [2018-12-02 15:23:03,147 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:23:03,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:03,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:23:03,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:03,148 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:23:03,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:23:03,194 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-02 15:23:03,195 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:23:03,195 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:23:03,195 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 142 with the following transitions: [2018-12-02 15:23:03,195 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [126], [129], [132], [139], [142], [145], [152], [155], [161], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [497], [499], [504], [510], [516], [522], [526], [532], [535], [556], [561], [568], [573], [580], [585], [594], [600], [606], [612], [618], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:23:03,197 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:23:03,197 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:23:03,483 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:23:03,483 INFO L272 AbstractInterpreter]: Visited 115 different actions 640 times. Merged at 52 different actions 184 times. Never widened. Performed 10187 root evaluator evaluations with a maximum evaluation depth of 3. Performed 10187 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 40 fixpoints after 12 different actions. Largest state had 67 variables. [2018-12-02 15:23:03,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:03,489 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:23:03,597 INFO L227 lantSequenceWeakener]: Weakened 136 states. On average, predicates are now at 81.44% of their original sizes. [2018-12-02 15:23:03,597 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:23:04,435 INFO L418 sIntCurrentIteration]: We unified 140 AI predicates to 140 [2018-12-02 15:23:04,435 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:23:04,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:23:04,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [59] imperfect sequences [7] total 64 [2018-12-02 15:23:04,435 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:23:04,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-12-02 15:23:04,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-12-02 15:23:04,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=401, Invalid=3021, Unknown=0, NotChecked=0, Total=3422 [2018-12-02 15:23:04,436 INFO L87 Difference]: Start difference. First operand 35394 states and 53022 transitions. Second operand 59 states. [2018-12-02 15:23:30,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:23:30,622 INFO L93 Difference]: Finished difference Result 109506 states and 166448 transitions. [2018-12-02 15:23:30,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 112 states. [2018-12-02 15:23:30,622 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 141 [2018-12-02 15:23:30,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:23:30,788 INFO L225 Difference]: With dead ends: 109506 [2018-12-02 15:23:30,788 INFO L226 Difference]: Without dead ends: 72319 [2018-12-02 15:23:31,006 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 242 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8726 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=2808, Invalid=22952, Unknown=0, NotChecked=0, Total=25760 [2018-12-02 15:23:31,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72319 states. [2018-12-02 15:23:34,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72319 to 66794. [2018-12-02 15:23:34,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66794 states. [2018-12-02 15:23:34,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66794 states to 66794 states and 93447 transitions. [2018-12-02 15:23:34,420 INFO L78 Accepts]: Start accepts. Automaton has 66794 states and 93447 transitions. Word has length 141 [2018-12-02 15:23:34,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:23:34,421 INFO L480 AbstractCegarLoop]: Abstraction has 66794 states and 93447 transitions. [2018-12-02 15:23:34,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-12-02 15:23:34,421 INFO L276 IsEmpty]: Start isEmpty. Operand 66794 states and 93447 transitions. [2018-12-02 15:23:34,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-12-02 15:23:34,448 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:23:34,448 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:23:34,448 INFO L423 AbstractCegarLoop]: === Iteration 28 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:23:34,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:34,449 INFO L82 PathProgramCache]: Analyzing trace with hash 495077703, now seen corresponding path program 1 times [2018-12-02 15:23:34,449 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:23:34,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:34,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:23:34,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:34,449 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:23:34,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:23:34,480 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 29 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-02 15:23:34,480 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:23:34,480 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:23:34,480 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 146 with the following transitions: [2018-12-02 15:23:34,481 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [126], [129], [132], [139], [142], [145], [152], [155], [161], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [285], [290], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [703], [707], [708], [709], [710], [711], [713] [2018-12-02 15:23:34,482 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:23:34,482 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:23:34,519 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:23:34,519 INFO L272 AbstractInterpreter]: Visited 69 different actions 93 times. Merged at 7 different actions 12 times. Never widened. Performed 1565 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1565 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 67 variables. [2018-12-02 15:23:34,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:34,520 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:23:34,590 INFO L227 lantSequenceWeakener]: Weakened 89 states. On average, predicates are now at 78.61% of their original sizes. [2018-12-02 15:23:34,590 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:23:34,890 INFO L418 sIntCurrentIteration]: We unified 144 AI predicates to 144 [2018-12-02 15:23:34,891 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:23:34,891 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:23:34,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [35] imperfect sequences [5] total 38 [2018-12-02 15:23:34,891 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:23:34,891 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-02 15:23:34,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-02 15:23:34,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=1031, Unknown=0, NotChecked=0, Total=1190 [2018-12-02 15:23:34,891 INFO L87 Difference]: Start difference. First operand 66794 states and 93447 transitions. Second operand 35 states. [2018-12-02 15:23:41,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:23:41,290 INFO L93 Difference]: Finished difference Result 106043 states and 146141 transitions. [2018-12-02 15:23:41,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-02 15:23:41,290 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 145 [2018-12-02 15:23:41,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:23:41,442 INFO L225 Difference]: With dead ends: 106043 [2018-12-02 15:23:41,442 INFO L226 Difference]: Without dead ends: 66887 [2018-12-02 15:23:41,547 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 165 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 837 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=443, Invalid=2637, Unknown=0, NotChecked=0, Total=3080 [2018-12-02 15:23:41,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66887 states. [2018-12-02 15:23:44,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66887 to 66617. [2018-12-02 15:23:44,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66617 states. [2018-12-02 15:23:44,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66617 states to 66617 states and 93158 transitions. [2018-12-02 15:23:44,949 INFO L78 Accepts]: Start accepts. Automaton has 66617 states and 93158 transitions. Word has length 145 [2018-12-02 15:23:44,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:23:44,949 INFO L480 AbstractCegarLoop]: Abstraction has 66617 states and 93158 transitions. [2018-12-02 15:23:44,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-02 15:23:44,949 INFO L276 IsEmpty]: Start isEmpty. Operand 66617 states and 93158 transitions. [2018-12-02 15:23:44,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-12-02 15:23:44,979 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:23:44,979 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:23:44,979 INFO L423 AbstractCegarLoop]: === Iteration 29 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:23:44,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:44,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1125052489, now seen corresponding path program 1 times [2018-12-02 15:23:44,979 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:23:44,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:44,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:23:44,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:44,980 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:23:44,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:23:45,014 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-12-02 15:23:45,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:23:45,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:23:45,015 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:23:45,015 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:23:45,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:23:45,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:23:45,015 INFO L87 Difference]: Start difference. First operand 66617 states and 93158 transitions. Second operand 5 states. [2018-12-02 15:23:48,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:23:48,022 INFO L93 Difference]: Finished difference Result 93171 states and 134081 transitions. [2018-12-02 15:23:48,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-02 15:23:48,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 149 [2018-12-02 15:23:48,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:23:48,121 INFO L225 Difference]: With dead ends: 93171 [2018-12-02 15:23:48,121 INFO L226 Difference]: Without dead ends: 28654 [2018-12-02 15:23:48,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:23:48,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28654 states. [2018-12-02 15:23:49,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28654 to 27371. [2018-12-02 15:23:49,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27371 states. [2018-12-02 15:23:49,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27371 states to 27371 states and 36649 transitions. [2018-12-02 15:23:49,888 INFO L78 Accepts]: Start accepts. Automaton has 27371 states and 36649 transitions. Word has length 149 [2018-12-02 15:23:49,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:23:49,888 INFO L480 AbstractCegarLoop]: Abstraction has 27371 states and 36649 transitions. [2018-12-02 15:23:49,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:23:49,889 INFO L276 IsEmpty]: Start isEmpty. Operand 27371 states and 36649 transitions. [2018-12-02 15:23:49,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-12-02 15:23:49,906 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:23:49,906 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:23:49,906 INFO L423 AbstractCegarLoop]: === Iteration 30 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:23:49,906 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:49,906 INFO L82 PathProgramCache]: Analyzing trace with hash 1895285557, now seen corresponding path program 1 times [2018-12-02 15:23:49,906 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:23:49,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:49,907 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:23:49,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:23:49,907 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:23:49,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:23:49,943 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 41 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-02 15:23:49,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:23:49,943 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:23:49,943 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 165 with the following transitions: [2018-12-02 15:23:49,943 INFO L205 CegarAbsIntRunner]: [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:23:49,944 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:23:49,944 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:23:50,046 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:23:50,047 INFO L272 AbstractInterpreter]: Visited 86 different actions 260 times. Merged at 21 different actions 63 times. Never widened. Performed 4122 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4122 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 16 fixpoints after 8 different actions. Largest state had 68 variables. [2018-12-02 15:23:50,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:23:50,048 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:23:50,135 INFO L227 lantSequenceWeakener]: Weakened 111 states. On average, predicates are now at 78.08% of their original sizes. [2018-12-02 15:23:50,135 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:23:50,687 INFO L418 sIntCurrentIteration]: We unified 163 AI predicates to 163 [2018-12-02 15:23:50,688 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:23:50,688 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:23:50,688 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [53] imperfect sequences [5] total 56 [2018-12-02 15:23:50,688 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:23:50,688 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-12-02 15:23:50,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-12-02 15:23:50,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=306, Invalid=2450, Unknown=0, NotChecked=0, Total=2756 [2018-12-02 15:23:50,689 INFO L87 Difference]: Start difference. First operand 27371 states and 36649 transitions. Second operand 53 states. [2018-12-02 15:24:06,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:24:06,737 INFO L93 Difference]: Finished difference Result 55840 states and 74599 transitions. [2018-12-02 15:24:06,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2018-12-02 15:24:06,737 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 164 [2018-12-02 15:24:06,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:24:06,799 INFO L225 Difference]: With dead ends: 55840 [2018-12-02 15:24:06,799 INFO L226 Difference]: Without dead ends: 28666 [2018-12-02 15:24:06,847 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 260 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8428 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2580, Invalid=19770, Unknown=0, NotChecked=0, Total=22350 [2018-12-02 15:24:06,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28666 states. [2018-12-02 15:24:08,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28666 to 25495. [2018-12-02 15:24:08,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25495 states. [2018-12-02 15:24:08,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25495 states to 25495 states and 33647 transitions. [2018-12-02 15:24:08,266 INFO L78 Accepts]: Start accepts. Automaton has 25495 states and 33647 transitions. Word has length 164 [2018-12-02 15:24:08,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:24:08,266 INFO L480 AbstractCegarLoop]: Abstraction has 25495 states and 33647 transitions. [2018-12-02 15:24:08,266 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-12-02 15:24:08,266 INFO L276 IsEmpty]: Start isEmpty. Operand 25495 states and 33647 transitions. [2018-12-02 15:24:08,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-12-02 15:24:08,283 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:24:08,283 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:24:08,283 INFO L423 AbstractCegarLoop]: === Iteration 31 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:24:08,283 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:08,283 INFO L82 PathProgramCache]: Analyzing trace with hash 474707661, now seen corresponding path program 1 times [2018-12-02 15:24:08,283 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:24:08,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:08,284 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:24:08,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:08,284 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:24:08,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:24:08,321 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 42 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-02 15:24:08,321 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:24:08,321 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:24:08,321 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 167 with the following transitions: [2018-12-02 15:24:08,321 INFO L205 CegarAbsIntRunner]: [4], [7], [18], [20], [24], [27], [32], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:24:08,322 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:24:08,322 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:24:08,424 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:24:08,424 INFO L272 AbstractInterpreter]: Visited 85 different actions 264 times. Merged at 21 different actions 66 times. Never widened. Performed 4128 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4128 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 17 fixpoints after 7 different actions. Largest state had 68 variables. [2018-12-02 15:24:08,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:08,425 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:24:08,513 INFO L227 lantSequenceWeakener]: Weakened 112 states. On average, predicates are now at 77.66% of their original sizes. [2018-12-02 15:24:08,514 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:24:09,061 INFO L418 sIntCurrentIteration]: We unified 165 AI predicates to 165 [2018-12-02 15:24:09,061 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:24:09,061 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:24:09,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [51] imperfect sequences [5] total 54 [2018-12-02 15:24:09,061 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:24:09,062 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-12-02 15:24:09,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-12-02 15:24:09,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=2251, Unknown=0, NotChecked=0, Total=2550 [2018-12-02 15:24:09,062 INFO L87 Difference]: Start difference. First operand 25495 states and 33647 transitions. Second operand 51 states. [2018-12-02 15:24:25,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:24:25,373 INFO L93 Difference]: Finished difference Result 41765 states and 54463 transitions. [2018-12-02 15:24:25,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-12-02 15:24:25,373 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 166 [2018-12-02 15:24:25,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:24:25,427 INFO L225 Difference]: With dead ends: 41765 [2018-12-02 15:24:25,428 INFO L226 Difference]: Without dead ends: 28708 [2018-12-02 15:24:25,450 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 258 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 142 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7652 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=2341, Invalid=18251, Unknown=0, NotChecked=0, Total=20592 [2018-12-02 15:24:25,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28708 states. [2018-12-02 15:24:26,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28708 to 25603. [2018-12-02 15:24:26,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25603 states. [2018-12-02 15:24:26,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25603 states to 25603 states and 33745 transitions. [2018-12-02 15:24:26,823 INFO L78 Accepts]: Start accepts. Automaton has 25603 states and 33745 transitions. Word has length 166 [2018-12-02 15:24:26,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:24:26,823 INFO L480 AbstractCegarLoop]: Abstraction has 25603 states and 33745 transitions. [2018-12-02 15:24:26,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-12-02 15:24:26,823 INFO L276 IsEmpty]: Start isEmpty. Operand 25603 states and 33745 transitions. [2018-12-02 15:24:26,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-12-02 15:24:26,841 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:24:26,841 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:24:26,841 INFO L423 AbstractCegarLoop]: === Iteration 32 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:24:26,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:26,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1742108318, now seen corresponding path program 1 times [2018-12-02 15:24:26,842 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:24:26,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:26,842 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:24:26,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:26,842 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:24:26,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:24:26,880 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:24:26,880 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:24:26,880 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:24:26,880 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 167 with the following transitions: [2018-12-02 15:24:26,880 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [184], [187], [198], [200], [204], [207], [210], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:24:26,881 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:24:26,881 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:24:26,997 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:24:26,997 INFO L272 AbstractInterpreter]: Visited 82 different actions 288 times. Merged at 20 different actions 78 times. Widened at 1 different actions 1 times. Performed 4625 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4625 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 18 fixpoints after 7 different actions. Largest state had 68 variables. [2018-12-02 15:24:26,999 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:26,999 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:24:27,068 INFO L227 lantSequenceWeakener]: Weakened 109 states. On average, predicates are now at 78.31% of their original sizes. [2018-12-02 15:24:27,068 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:24:27,494 INFO L418 sIntCurrentIteration]: We unified 165 AI predicates to 165 [2018-12-02 15:24:27,494 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:24:27,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:24:27,494 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [45] imperfect sequences [5] total 48 [2018-12-02 15:24:27,494 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:24:27,494 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-12-02 15:24:27,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-12-02 15:24:27,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=252, Invalid=1728, Unknown=0, NotChecked=0, Total=1980 [2018-12-02 15:24:27,495 INFO L87 Difference]: Start difference. First operand 25603 states and 33745 transitions. Second operand 45 states. [2018-12-02 15:24:39,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:24:39,798 INFO L93 Difference]: Finished difference Result 53325 states and 70238 transitions. [2018-12-02 15:24:39,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2018-12-02 15:24:39,798 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 166 [2018-12-02 15:24:39,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:24:39,863 INFO L225 Difference]: With dead ends: 53325 [2018-12-02 15:24:39,863 INFO L226 Difference]: Without dead ends: 30132 [2018-12-02 15:24:39,902 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 266 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7880 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2492, Invalid=18678, Unknown=0, NotChecked=0, Total=21170 [2018-12-02 15:24:39,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30132 states. [2018-12-02 15:24:41,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30132 to 27236. [2018-12-02 15:24:41,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27236 states. [2018-12-02 15:24:41,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27236 states to 27236 states and 35850 transitions. [2018-12-02 15:24:41,459 INFO L78 Accepts]: Start accepts. Automaton has 27236 states and 35850 transitions. Word has length 166 [2018-12-02 15:24:41,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:24:41,459 INFO L480 AbstractCegarLoop]: Abstraction has 27236 states and 35850 transitions. [2018-12-02 15:24:41,459 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-12-02 15:24:41,460 INFO L276 IsEmpty]: Start isEmpty. Operand 27236 states and 35850 transitions. [2018-12-02 15:24:41,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-12-02 15:24:41,480 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:24:41,480 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:24:41,480 INFO L423 AbstractCegarLoop]: === Iteration 33 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:24:41,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:41,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1910221361, now seen corresponding path program 1 times [2018-12-02 15:24:41,480 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:24:41,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:41,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:24:41,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:41,481 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:24:41,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:24:41,518 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 41 proven. 9 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-02 15:24:41,518 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:24:41,518 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:24:41,518 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 163 with the following transitions: [2018-12-02 15:24:41,518 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:24:41,519 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:24:41,519 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:24:41,578 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:24:41,578 INFO L272 AbstractInterpreter]: Visited 72 different actions 137 times. Merged at 11 different actions 27 times. Never widened. Performed 2727 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2727 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 2 fixpoints after 1 different actions. Largest state had 68 variables. [2018-12-02 15:24:41,579 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:41,579 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:24:41,645 INFO L227 lantSequenceWeakener]: Weakened 96 states. On average, predicates are now at 78.59% of their original sizes. [2018-12-02 15:24:41,645 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:24:42,028 INFO L418 sIntCurrentIteration]: We unified 161 AI predicates to 161 [2018-12-02 15:24:42,028 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:24:42,028 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:24:42,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [42] imperfect sequences [5] total 45 [2018-12-02 15:24:42,028 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:24:42,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-12-02 15:24:42,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-12-02 15:24:42,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1509, Unknown=0, NotChecked=0, Total=1722 [2018-12-02 15:24:42,029 INFO L87 Difference]: Start difference. First operand 27236 states and 35850 transitions. Second operand 42 states. [2018-12-02 15:24:47,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:24:47,871 INFO L93 Difference]: Finished difference Result 44574 states and 58203 transitions. [2018-12-02 15:24:47,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-12-02 15:24:47,871 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 162 [2018-12-02 15:24:47,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:24:47,909 INFO L225 Difference]: With dead ends: 44574 [2018-12-02 15:24:47,909 INFO L226 Difference]: Without dead ends: 20696 [2018-12-02 15:24:47,942 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 196 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1848 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=816, Invalid=5036, Unknown=0, NotChecked=0, Total=5852 [2018-12-02 15:24:47,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20696 states. [2018-12-02 15:24:49,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20696 to 20209. [2018-12-02 15:24:49,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20209 states. [2018-12-02 15:24:49,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20209 states to 20209 states and 25983 transitions. [2018-12-02 15:24:49,047 INFO L78 Accepts]: Start accepts. Automaton has 20209 states and 25983 transitions. Word has length 162 [2018-12-02 15:24:49,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:24:49,047 INFO L480 AbstractCegarLoop]: Abstraction has 20209 states and 25983 transitions. [2018-12-02 15:24:49,047 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-12-02 15:24:49,047 INFO L276 IsEmpty]: Start isEmpty. Operand 20209 states and 25983 transitions. [2018-12-02 15:24:49,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-12-02 15:24:49,063 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:24:49,063 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:24:49,063 INFO L423 AbstractCegarLoop]: === Iteration 34 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:24:49,063 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:49,064 INFO L82 PathProgramCache]: Analyzing trace with hash 245757477, now seen corresponding path program 1 times [2018-12-02 15:24:49,064 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:24:49,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:49,064 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:24:49,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:24:49,064 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:24:49,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:24:49,098 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-02 15:24:49,099 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:24:49,099 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:24:49,099 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 169 with the following transitions: [2018-12-02 15:24:49,099 INFO L205 CegarAbsIntRunner]: [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:24:49,100 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:24:49,100 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:24:49,155 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:24:49,156 INFO L272 AbstractInterpreter]: Visited 82 different actions 155 times. Merged at 18 different actions 31 times. Never widened. Performed 2235 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2235 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 9 fixpoints after 5 different actions. Largest state had 68 variables. [2018-12-02 15:24:49,157 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:24:49,157 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:24:49,231 INFO L227 lantSequenceWeakener]: Weakened 109 states. On average, predicates are now at 79.76% of their original sizes. [2018-12-02 15:24:49,231 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:24:49,623 INFO L418 sIntCurrentIteration]: We unified 167 AI predicates to 167 [2018-12-02 15:24:49,623 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:24:49,624 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:24:49,624 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [5] total 49 [2018-12-02 15:24:49,624 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:24:49,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-12-02 15:24:49,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-12-02 15:24:49,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=1821, Unknown=0, NotChecked=0, Total=2070 [2018-12-02 15:24:49,624 INFO L87 Difference]: Start difference. First operand 20209 states and 25983 transitions. Second operand 46 states. [2018-12-02 15:24:58,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:24:58,873 INFO L93 Difference]: Finished difference Result 44142 states and 57512 transitions. [2018-12-02 15:24:58,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-12-02 15:24:58,873 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 168 [2018-12-02 15:24:58,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:24:58,923 INFO L225 Difference]: With dead ends: 44142 [2018-12-02 15:24:58,924 INFO L226 Difference]: Without dead ends: 27685 [2018-12-02 15:24:58,952 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 249 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5624 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2023, Invalid=14233, Unknown=0, NotChecked=0, Total=16256 [2018-12-02 15:24:58,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27685 states. [2018-12-02 15:25:00,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27685 to 25328. [2018-12-02 15:25:00,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25328 states. [2018-12-02 15:25:00,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25328 states to 25328 states and 32542 transitions. [2018-12-02 15:25:00,420 INFO L78 Accepts]: Start accepts. Automaton has 25328 states and 32542 transitions. Word has length 168 [2018-12-02 15:25:00,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:25:00,421 INFO L480 AbstractCegarLoop]: Abstraction has 25328 states and 32542 transitions. [2018-12-02 15:25:00,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-12-02 15:25:00,421 INFO L276 IsEmpty]: Start isEmpty. Operand 25328 states and 32542 transitions. [2018-12-02 15:25:00,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-12-02 15:25:00,443 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:25:00,443 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:25:00,444 INFO L423 AbstractCegarLoop]: === Iteration 35 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:25:00,444 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:00,444 INFO L82 PathProgramCache]: Analyzing trace with hash 1568441876, now seen corresponding path program 1 times [2018-12-02 15:25:00,444 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:25:00,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:00,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:25:00,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:00,444 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:25:00,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:25:00,471 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 41 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:25:00,471 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:25:00,471 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:25:00,472 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 164 with the following transitions: [2018-12-02 15:25:00,472 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:25:00,473 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:25:00,473 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:25:00,590 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:25:00,590 INFO L272 AbstractInterpreter]: Visited 90 different actions 284 times. Merged at 22 different actions 67 times. Never widened. Performed 4823 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4823 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 24 fixpoints after 10 different actions. Largest state had 68 variables. [2018-12-02 15:25:00,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:00,592 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:25:00,672 INFO L227 lantSequenceWeakener]: Weakened 115 states. On average, predicates are now at 81.06% of their original sizes. [2018-12-02 15:25:00,672 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:25:01,116 INFO L418 sIntCurrentIteration]: We unified 162 AI predicates to 162 [2018-12-02 15:25:01,116 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:25:01,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:25:01,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [47] imperfect sequences [5] total 50 [2018-12-02 15:25:01,116 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:25:01,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-12-02 15:25:01,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-12-02 15:25:01,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=250, Invalid=1912, Unknown=0, NotChecked=0, Total=2162 [2018-12-02 15:25:01,117 INFO L87 Difference]: Start difference. First operand 25328 states and 32542 transitions. Second operand 47 states. [2018-12-02 15:25:15,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:25:15,719 INFO L93 Difference]: Finished difference Result 54783 states and 70665 transitions. [2018-12-02 15:25:15,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2018-12-02 15:25:15,719 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 163 [2018-12-02 15:25:15,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:25:15,797 INFO L225 Difference]: With dead ends: 54783 [2018-12-02 15:25:15,797 INFO L226 Difference]: Without dead ends: 33408 [2018-12-02 15:25:15,832 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 251 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6203 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2398, Invalid=15962, Unknown=0, NotChecked=0, Total=18360 [2018-12-02 15:25:15,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33408 states. [2018-12-02 15:25:17,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33408 to 30262. [2018-12-02 15:25:17,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30262 states. [2018-12-02 15:25:17,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30262 states to 30262 states and 39164 transitions. [2018-12-02 15:25:17,660 INFO L78 Accepts]: Start accepts. Automaton has 30262 states and 39164 transitions. Word has length 163 [2018-12-02 15:25:17,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:25:17,660 INFO L480 AbstractCegarLoop]: Abstraction has 30262 states and 39164 transitions. [2018-12-02 15:25:17,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-12-02 15:25:17,660 INFO L276 IsEmpty]: Start isEmpty. Operand 30262 states and 39164 transitions. [2018-12-02 15:25:17,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-12-02 15:25:17,684 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:25:17,684 INFO L402 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:25:17,684 INFO L423 AbstractCegarLoop]: === Iteration 36 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:25:17,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:17,684 INFO L82 PathProgramCache]: Analyzing trace with hash 473588359, now seen corresponding path program 1 times [2018-12-02 15:25:17,684 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:25:17,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:17,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:25:17,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:17,685 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:25:17,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:25:17,711 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 40 proven. 6 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:25:17,711 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:25:17,711 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:25:17,711 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 165 with the following transitions: [2018-12-02 15:25:17,711 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [92], [94], [99], [104], [109], [113], [116], [122], [126], [129], [132], [139], [142], [145], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:25:17,712 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:25:17,712 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:25:17,779 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:25:17,779 INFO L272 AbstractInterpreter]: Visited 78 different actions 180 times. Merged at 17 different actions 42 times. Never widened. Performed 2646 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2646 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 17 fixpoints after 8 different actions. Largest state had 68 variables. [2018-12-02 15:25:17,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:17,780 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:25:17,854 INFO L227 lantSequenceWeakener]: Weakened 104 states. On average, predicates are now at 78.41% of their original sizes. [2018-12-02 15:25:17,854 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:25:18,269 INFO L418 sIntCurrentIteration]: We unified 163 AI predicates to 163 [2018-12-02 15:25:18,269 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:25:18,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:25:18,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [44] imperfect sequences [5] total 47 [2018-12-02 15:25:18,269 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:25:18,270 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-12-02 15:25:18,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-12-02 15:25:18,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=1657, Unknown=0, NotChecked=0, Total=1892 [2018-12-02 15:25:18,270 INFO L87 Difference]: Start difference. First operand 30262 states and 39164 transitions. Second operand 44 states. [2018-12-02 15:25:25,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:25:25,851 INFO L93 Difference]: Finished difference Result 53418 states and 69209 transitions. [2018-12-02 15:25:25,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-12-02 15:25:25,851 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 164 [2018-12-02 15:25:25,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:25:25,922 INFO L225 Difference]: With dead ends: 53418 [2018-12-02 15:25:25,922 INFO L226 Difference]: Without dead ends: 32159 [2018-12-02 15:25:25,966 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 192 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1719 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=685, Invalid=4571, Unknown=0, NotChecked=0, Total=5256 [2018-12-02 15:25:25,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32159 states. [2018-12-02 15:25:27,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32159 to 31196. [2018-12-02 15:25:27,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31196 states. [2018-12-02 15:25:27,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31196 states to 31196 states and 40361 transitions. [2018-12-02 15:25:27,868 INFO L78 Accepts]: Start accepts. Automaton has 31196 states and 40361 transitions. Word has length 164 [2018-12-02 15:25:27,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:25:27,868 INFO L480 AbstractCegarLoop]: Abstraction has 31196 states and 40361 transitions. [2018-12-02 15:25:27,868 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-12-02 15:25:27,868 INFO L276 IsEmpty]: Start isEmpty. Operand 31196 states and 40361 transitions. [2018-12-02 15:25:27,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-12-02 15:25:27,894 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:25:27,895 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:25:27,895 INFO L423 AbstractCegarLoop]: === Iteration 37 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:25:27,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:27,895 INFO L82 PathProgramCache]: Analyzing trace with hash 91253968, now seen corresponding path program 1 times [2018-12-02 15:25:27,895 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:25:27,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:27,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:25:27,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:27,895 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:25:27,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:25:27,926 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 42 proven. 5 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 15:25:27,926 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:25:27,926 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:25:27,926 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 165 with the following transitions: [2018-12-02 15:25:27,926 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:25:27,927 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:25:27,927 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:25:28,044 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:25:28,044 INFO L272 AbstractInterpreter]: Visited 89 different actions 292 times. Merged at 23 different actions 74 times. Never widened. Performed 4796 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4796 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 21 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:25:28,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:28,046 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:25:28,127 INFO L227 lantSequenceWeakener]: Weakened 116 states. On average, predicates are now at 80.97% of their original sizes. [2018-12-02 15:25:28,127 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:25:28,711 INFO L418 sIntCurrentIteration]: We unified 163 AI predicates to 163 [2018-12-02 15:25:28,711 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:25:28,711 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:25:28,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [48] imperfect sequences [5] total 51 [2018-12-02 15:25:28,711 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:25:28,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-12-02 15:25:28,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-12-02 15:25:28,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=1997, Unknown=0, NotChecked=0, Total=2256 [2018-12-02 15:25:28,712 INFO L87 Difference]: Start difference. First operand 31196 states and 40361 transitions. Second operand 48 states. [2018-12-02 15:25:45,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:25:45,347 INFO L93 Difference]: Finished difference Result 55470 states and 71789 transitions. [2018-12-02 15:25:45,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-12-02 15:25:45,347 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 164 [2018-12-02 15:25:45,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:25:45,418 INFO L225 Difference]: With dead ends: 55470 [2018-12-02 15:25:45,418 INFO L226 Difference]: Without dead ends: 34353 [2018-12-02 15:25:45,459 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 255 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6741 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=2558, Invalid=16902, Unknown=0, NotChecked=0, Total=19460 [2018-12-02 15:25:45,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34353 states. [2018-12-02 15:25:47,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34353 to 31193. [2018-12-02 15:25:47,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31193 states. [2018-12-02 15:25:47,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31193 states to 31193 states and 40354 transitions. [2018-12-02 15:25:47,398 INFO L78 Accepts]: Start accepts. Automaton has 31193 states and 40354 transitions. Word has length 164 [2018-12-02 15:25:47,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:25:47,398 INFO L480 AbstractCegarLoop]: Abstraction has 31193 states and 40354 transitions. [2018-12-02 15:25:47,398 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-12-02 15:25:47,399 INFO L276 IsEmpty]: Start isEmpty. Operand 31193 states and 40354 transitions. [2018-12-02 15:25:47,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-12-02 15:25:47,425 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:25:47,425 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:25:47,425 INFO L423 AbstractCegarLoop]: === Iteration 38 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:25:47,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:47,425 INFO L82 PathProgramCache]: Analyzing trace with hash 161963525, now seen corresponding path program 1 times [2018-12-02 15:25:47,425 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:25:47,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:47,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:25:47,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:25:47,426 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:25:47,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:25:47,457 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 42 proven. 5 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-02 15:25:47,457 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:25:47,457 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:25:47,457 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 165 with the following transitions: [2018-12-02 15:25:47,457 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:25:47,458 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:25:47,458 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:25:47,575 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:25:47,576 INFO L272 AbstractInterpreter]: Visited 89 different actions 278 times. Merged at 21 different actions 67 times. Never widened. Performed 4806 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4806 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 21 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:25:47,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:25:47,576 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:25:47,662 INFO L227 lantSequenceWeakener]: Weakened 116 states. On average, predicates are now at 80.71% of their original sizes. [2018-12-02 15:25:47,663 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:25:48,136 INFO L418 sIntCurrentIteration]: We unified 163 AI predicates to 163 [2018-12-02 15:25:48,136 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:25:48,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:25:48,137 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [50] imperfect sequences [5] total 53 [2018-12-02 15:25:48,137 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:25:48,137 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-12-02 15:25:48,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-12-02 15:25:48,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=2166, Unknown=0, NotChecked=0, Total=2450 [2018-12-02 15:25:48,138 INFO L87 Difference]: Start difference. First operand 31193 states and 40354 transitions. Second operand 50 states. [2018-12-02 15:26:05,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:26:05,883 INFO L93 Difference]: Finished difference Result 57843 states and 74792 transitions. [2018-12-02 15:26:05,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 95 states. [2018-12-02 15:26:05,883 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 164 [2018-12-02 15:26:05,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:26:05,957 INFO L225 Difference]: With dead ends: 57843 [2018-12-02 15:26:05,957 INFO L226 Difference]: Without dead ends: 34422 [2018-12-02 15:26:06,000 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 254 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 139 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6921 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2551, Invalid=17189, Unknown=0, NotChecked=0, Total=19740 [2018-12-02 15:26:06,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34422 states. [2018-12-02 15:26:07,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34422 to 31183. [2018-12-02 15:26:07,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31183 states. [2018-12-02 15:26:07,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31183 states to 31183 states and 40329 transitions. [2018-12-02 15:26:07,877 INFO L78 Accepts]: Start accepts. Automaton has 31183 states and 40329 transitions. Word has length 164 [2018-12-02 15:26:07,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:26:07,878 INFO L480 AbstractCegarLoop]: Abstraction has 31183 states and 40329 transitions. [2018-12-02 15:26:07,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-12-02 15:26:07,878 INFO L276 IsEmpty]: Start isEmpty. Operand 31183 states and 40329 transitions. [2018-12-02 15:26:07,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-12-02 15:26:07,905 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:26:07,905 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:26:07,905 INFO L423 AbstractCegarLoop]: === Iteration 39 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:26:07,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:26:07,905 INFO L82 PathProgramCache]: Analyzing trace with hash 2050055628, now seen corresponding path program 1 times [2018-12-02 15:26:07,906 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:26:07,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:26:07,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:26:07,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:26:07,906 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:26:07,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:26:07,933 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 50 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:26:07,933 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:26:07,933 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:26:07,933 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 170 with the following transitions: [2018-12-02 15:26:07,933 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:26:07,935 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:26:07,935 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:26:08,143 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:26:08,144 INFO L272 AbstractInterpreter]: Visited 102 different actions 531 times. Merged at 35 different actions 144 times. Widened at 1 different actions 2 times. Performed 7760 root evaluator evaluations with a maximum evaluation depth of 3. Performed 7760 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 51 fixpoints after 13 different actions. Largest state had 68 variables. [2018-12-02 15:26:08,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:26:08,145 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:26:08,229 INFO L227 lantSequenceWeakener]: Weakened 133 states. On average, predicates are now at 80.88% of their original sizes. [2018-12-02 15:26:08,230 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:26:08,969 INFO L418 sIntCurrentIteration]: We unified 168 AI predicates to 168 [2018-12-02 15:26:08,969 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:26:08,969 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:26:08,969 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [56] imperfect sequences [4] total 58 [2018-12-02 15:26:08,970 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:26:08,970 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-12-02 15:26:08,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-12-02 15:26:08,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=322, Invalid=2758, Unknown=0, NotChecked=0, Total=3080 [2018-12-02 15:26:08,971 INFO L87 Difference]: Start difference. First operand 31183 states and 40329 transitions. Second operand 56 states. [2018-12-02 15:26:38,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:26:38,072 INFO L93 Difference]: Finished difference Result 68061 states and 89563 transitions. [2018-12-02 15:26:38,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2018-12-02 15:26:38,072 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 169 [2018-12-02 15:26:38,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:26:38,166 INFO L225 Difference]: With dead ends: 68061 [2018-12-02 15:26:38,166 INFO L226 Difference]: Without dead ends: 41763 [2018-12-02 15:26:38,220 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 290 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 176 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11560 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=4164, Invalid=27342, Unknown=0, NotChecked=0, Total=31506 [2018-12-02 15:26:38,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41763 states. [2018-12-02 15:26:40,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41763 to 34711. [2018-12-02 15:26:40,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34711 states. [2018-12-02 15:26:40,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34711 states to 34711 states and 45083 transitions. [2018-12-02 15:26:40,298 INFO L78 Accepts]: Start accepts. Automaton has 34711 states and 45083 transitions. Word has length 169 [2018-12-02 15:26:40,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:26:40,298 INFO L480 AbstractCegarLoop]: Abstraction has 34711 states and 45083 transitions. [2018-12-02 15:26:40,298 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-12-02 15:26:40,298 INFO L276 IsEmpty]: Start isEmpty. Operand 34711 states and 45083 transitions. [2018-12-02 15:26:40,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-12-02 15:26:40,332 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:26:40,332 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:26:40,332 INFO L423 AbstractCegarLoop]: === Iteration 40 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:26:40,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:26:40,332 INFO L82 PathProgramCache]: Analyzing trace with hash 1445299864, now seen corresponding path program 1 times [2018-12-02 15:26:40,332 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:26:40,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:26:40,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:26:40,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:26:40,333 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:26:40,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:26:40,363 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 52 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:26:40,364 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:26:40,364 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:26:40,364 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 171 with the following transitions: [2018-12-02 15:26:40,364 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:26:40,365 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:26:40,365 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:26:40,615 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:26:40,615 INFO L272 AbstractInterpreter]: Visited 101 different actions 597 times. Merged at 34 different actions 177 times. Widened at 1 different actions 2 times. Performed 9557 root evaluator evaluations with a maximum evaluation depth of 3. Performed 9557 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 52 fixpoints after 10 different actions. Largest state had 68 variables. [2018-12-02 15:26:40,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:26:40,617 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:26:40,702 INFO L227 lantSequenceWeakener]: Weakened 134 states. On average, predicates are now at 80.76% of their original sizes. [2018-12-02 15:26:40,702 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:26:41,360 INFO L418 sIntCurrentIteration]: We unified 169 AI predicates to 169 [2018-12-02 15:26:41,360 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:26:41,360 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:26:41,360 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [57] imperfect sequences [5] total 60 [2018-12-02 15:26:41,360 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:26:41,361 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-12-02 15:26:41,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-12-02 15:26:41,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=330, Invalid=2862, Unknown=0, NotChecked=0, Total=3192 [2018-12-02 15:26:41,361 INFO L87 Difference]: Start difference. First operand 34711 states and 45083 transitions. Second operand 57 states. [2018-12-02 15:27:37,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:27:37,312 INFO L93 Difference]: Finished difference Result 77818 states and 102718 transitions. [2018-12-02 15:27:37,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 230 states. [2018-12-02 15:27:37,312 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 170 [2018-12-02 15:27:37,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:27:37,467 INFO L225 Difference]: With dead ends: 77818 [2018-12-02 15:27:37,467 INFO L226 Difference]: Without dead ends: 54701 [2018-12-02 15:27:37,533 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 395 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 281 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31779 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=9969, Invalid=69837, Unknown=0, NotChecked=0, Total=79806 [2018-12-02 15:27:37,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54701 states. [2018-12-02 15:27:40,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54701 to 43881. [2018-12-02 15:27:40,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43881 states. [2018-12-02 15:27:40,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43881 states to 43881 states and 57377 transitions. [2018-12-02 15:27:40,306 INFO L78 Accepts]: Start accepts. Automaton has 43881 states and 57377 transitions. Word has length 170 [2018-12-02 15:27:40,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:27:40,306 INFO L480 AbstractCegarLoop]: Abstraction has 43881 states and 57377 transitions. [2018-12-02 15:27:40,306 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-12-02 15:27:40,306 INFO L276 IsEmpty]: Start isEmpty. Operand 43881 states and 57377 transitions. [2018-12-02 15:27:40,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-12-02 15:27:40,354 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:27:40,354 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:27:40,354 INFO L423 AbstractCegarLoop]: === Iteration 41 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:27:40,354 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:27:40,354 INFO L82 PathProgramCache]: Analyzing trace with hash 1524133955, now seen corresponding path program 1 times [2018-12-02 15:27:40,354 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:27:40,355 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:27:40,355 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:27:40,355 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:27:40,355 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:27:40,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:27:40,404 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 49 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:27:40,404 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:27:40,404 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:27:40,404 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 173 with the following transitions: [2018-12-02 15:27:40,405 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [27], [32], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:27:40,406 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:27:40,406 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:27:40,569 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:27:40,569 INFO L272 AbstractInterpreter]: Visited 102 different actions 406 times. Merged at 23 different actions 97 times. Widened at 1 different actions 1 times. Performed 6367 root evaluator evaluations with a maximum evaluation depth of 3. Performed 6367 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 29 fixpoints after 11 different actions. Largest state had 68 variables. [2018-12-02 15:27:40,572 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:27:40,572 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:27:40,657 INFO L227 lantSequenceWeakener]: Weakened 134 states. On average, predicates are now at 78.68% of their original sizes. [2018-12-02 15:27:40,657 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:27:41,372 INFO L418 sIntCurrentIteration]: We unified 171 AI predicates to 171 [2018-12-02 15:27:41,373 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:27:41,373 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:27:41,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [58] imperfect sequences [5] total 61 [2018-12-02 15:27:41,373 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:27:41,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-12-02 15:27:41,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-12-02 15:27:41,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=360, Invalid=2946, Unknown=0, NotChecked=0, Total=3306 [2018-12-02 15:27:41,374 INFO L87 Difference]: Start difference. First operand 43881 states and 57377 transitions. Second operand 58 states. [2018-12-02 15:28:05,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:28:05,058 INFO L93 Difference]: Finished difference Result 93008 states and 123149 transitions. [2018-12-02 15:28:05,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 139 states. [2018-12-02 15:28:05,058 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 172 [2018-12-02 15:28:05,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:28:05,243 INFO L225 Difference]: With dead ends: 93008 [2018-12-02 15:28:05,243 INFO L226 Difference]: Without dead ends: 58929 [2018-12-02 15:28:05,349 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 307 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13971 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4429, Invalid=33013, Unknown=0, NotChecked=0, Total=37442 [2018-12-02 15:28:05,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58929 states. [2018-12-02 15:28:08,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58929 to 47967. [2018-12-02 15:28:08,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47967 states. [2018-12-02 15:28:08,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47967 states to 47967 states and 62913 transitions. [2018-12-02 15:28:08,528 INFO L78 Accepts]: Start accepts. Automaton has 47967 states and 62913 transitions. Word has length 172 [2018-12-02 15:28:08,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:28:08,529 INFO L480 AbstractCegarLoop]: Abstraction has 47967 states and 62913 transitions. [2018-12-02 15:28:08,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-12-02 15:28:08,529 INFO L276 IsEmpty]: Start isEmpty. Operand 47967 states and 62913 transitions. [2018-12-02 15:28:08,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-12-02 15:28:08,583 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:28:08,584 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:28:08,584 INFO L423 AbstractCegarLoop]: === Iteration 42 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:28:08,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:28:08,584 INFO L82 PathProgramCache]: Analyzing trace with hash 586942413, now seen corresponding path program 1 times [2018-12-02 15:28:08,584 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:28:08,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:28:08,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:28:08,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:28:08,585 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:28:08,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:28:08,617 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 52 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:28:08,617 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:28:08,617 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:28:08,618 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 171 with the following transitions: [2018-12-02 15:28:08,618 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:28:08,619 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:28:08,619 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:28:08,833 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:28:08,833 INFO L272 AbstractInterpreter]: Visited 101 different actions 539 times. Merged at 34 different actions 155 times. Widened at 1 different actions 2 times. Performed 8026 root evaluator evaluations with a maximum evaluation depth of 3. Performed 8026 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 46 fixpoints after 10 different actions. Largest state had 68 variables. [2018-12-02 15:28:08,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:28:08,835 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:28:08,920 INFO L227 lantSequenceWeakener]: Weakened 134 states. On average, predicates are now at 80.76% of their original sizes. [2018-12-02 15:28:08,921 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:28:09,534 INFO L418 sIntCurrentIteration]: We unified 169 AI predicates to 169 [2018-12-02 15:28:09,535 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:28:09,535 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:28:09,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [57] imperfect sequences [5] total 60 [2018-12-02 15:28:09,535 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:28:09,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-12-02 15:28:09,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-12-02 15:28:09,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=330, Invalid=2862, Unknown=0, NotChecked=0, Total=3192 [2018-12-02 15:28:09,536 INFO L87 Difference]: Start difference. First operand 47967 states and 62913 transitions. Second operand 57 states. [2018-12-02 15:28:53,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:28:53,750 INFO L93 Difference]: Finished difference Result 111372 states and 151215 transitions. [2018-12-02 15:28:53,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 229 states. [2018-12-02 15:28:53,751 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 170 [2018-12-02 15:28:53,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:28:54,040 INFO L225 Difference]: With dead ends: 111372 [2018-12-02 15:28:54,041 INFO L226 Difference]: Without dead ends: 80832 [2018-12-02 15:28:54,162 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 394 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 280 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31622 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=9919, Invalid=69323, Unknown=0, NotChecked=0, Total=79242 [2018-12-02 15:28:54,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80832 states. [2018-12-02 15:28:58,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80832 to 65342. [2018-12-02 15:28:58,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65342 states. [2018-12-02 15:28:58,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65342 states to 65342 states and 87842 transitions. [2018-12-02 15:28:58,933 INFO L78 Accepts]: Start accepts. Automaton has 65342 states and 87842 transitions. Word has length 170 [2018-12-02 15:28:58,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:28:58,933 INFO L480 AbstractCegarLoop]: Abstraction has 65342 states and 87842 transitions. [2018-12-02 15:28:58,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-12-02 15:28:58,933 INFO L276 IsEmpty]: Start isEmpty. Operand 65342 states and 87842 transitions. [2018-12-02 15:28:58,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-12-02 15:28:58,999 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:28:58,999 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:28:58,999 INFO L423 AbstractCegarLoop]: === Iteration 43 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:28:58,999 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:28:58,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1894721443, now seen corresponding path program 1 times [2018-12-02 15:28:59,000 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:28:59,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:28:59,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:28:59,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:28:59,000 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:28:59,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:28:59,035 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 54 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:28:59,035 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:28:59,035 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:28:59,035 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 172 with the following transitions: [2018-12-02 15:28:59,035 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:28:59,036 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:28:59,036 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:28:59,294 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:28:59,295 INFO L272 AbstractInterpreter]: Visited 100 different actions 608 times. Merged at 33 different actions 193 times. Widened at 1 different actions 2 times. Performed 9278 root evaluator evaluations with a maximum evaluation depth of 3. Performed 9278 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 50 fixpoints after 10 different actions. Largest state had 68 variables. [2018-12-02 15:28:59,296 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:28:59,296 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:28:59,387 INFO L227 lantSequenceWeakener]: Weakened 135 states. On average, predicates are now at 80.67% of their original sizes. [2018-12-02 15:28:59,388 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:29:00,028 INFO L418 sIntCurrentIteration]: We unified 170 AI predicates to 170 [2018-12-02 15:29:00,028 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:29:00,029 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:29:00,029 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [58] imperfect sequences [5] total 61 [2018-12-02 15:29:00,029 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:29:00,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-12-02 15:29:00,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-12-02 15:29:00,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=338, Invalid=2968, Unknown=0, NotChecked=0, Total=3306 [2018-12-02 15:29:00,029 INFO L87 Difference]: Start difference. First operand 65342 states and 87842 transitions. Second operand 58 states. [2018-12-02 15:29:46,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:29:46,628 INFO L93 Difference]: Finished difference Result 121543 states and 168289 transitions. [2018-12-02 15:29:46,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 232 states. [2018-12-02 15:29:46,628 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 171 [2018-12-02 15:29:46,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:29:46,913 INFO L225 Difference]: With dead ends: 121543 [2018-12-02 15:29:46,914 INFO L226 Difference]: Without dead ends: 81609 [2018-12-02 15:29:47,095 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 398 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 284 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32542 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=10345, Invalid=71165, Unknown=0, NotChecked=0, Total=81510 [2018-12-02 15:29:47,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81609 states. [2018-12-02 15:29:51,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81609 to 66689. [2018-12-02 15:29:51,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66689 states. [2018-12-02 15:29:52,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66689 states to 66689 states and 89724 transitions. [2018-12-02 15:29:52,068 INFO L78 Accepts]: Start accepts. Automaton has 66689 states and 89724 transitions. Word has length 171 [2018-12-02 15:29:52,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:29:52,069 INFO L480 AbstractCegarLoop]: Abstraction has 66689 states and 89724 transitions. [2018-12-02 15:29:52,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-12-02 15:29:52,069 INFO L276 IsEmpty]: Start isEmpty. Operand 66689 states and 89724 transitions. [2018-12-02 15:29:52,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-12-02 15:29:52,136 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:29:52,136 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:29:52,136 INFO L423 AbstractCegarLoop]: === Iteration 44 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:29:52,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:29:52,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1031499666, now seen corresponding path program 1 times [2018-12-02 15:29:52,136 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:29:52,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:29:52,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:29:52,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:29:52,137 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:29:52,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:29:52,185 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 48 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-02 15:29:52,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:29:52,186 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:29:52,186 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 173 with the following transitions: [2018-12-02 15:29:52,186 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [207], [212], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:29:52,187 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:29:52,187 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:29:52,332 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:29:52,332 INFO L272 AbstractInterpreter]: Visited 102 different actions 404 times. Merged at 24 different actions 96 times. Widened at 1 different actions 1 times. Performed 5684 root evaluator evaluations with a maximum evaluation depth of 3. Performed 5684 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 29 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:29:52,333 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:29:52,333 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:29:52,418 INFO L227 lantSequenceWeakener]: Weakened 134 states. On average, predicates are now at 78.7% of their original sizes. [2018-12-02 15:29:52,418 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:29:53,178 INFO L418 sIntCurrentIteration]: We unified 171 AI predicates to 171 [2018-12-02 15:29:53,178 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:29:53,178 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:29:53,178 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [58] imperfect sequences [5] total 61 [2018-12-02 15:29:53,178 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:29:53,179 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-12-02 15:29:53,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-12-02 15:29:53,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=2943, Unknown=0, NotChecked=0, Total=3306 [2018-12-02 15:29:53,179 INFO L87 Difference]: Start difference. First operand 66689 states and 89724 transitions. Second operand 58 states. [2018-12-02 15:30:18,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:30:18,760 INFO L93 Difference]: Finished difference Result 104817 states and 140895 transitions. [2018-12-02 15:30:18,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2018-12-02 15:30:18,760 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 172 [2018-12-02 15:30:18,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:30:19,046 INFO L225 Difference]: With dead ends: 104817 [2018-12-02 15:30:19,047 INFO L226 Difference]: Without dead ends: 84033 [2018-12-02 15:30:19,132 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 312 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 197 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14833 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=4705, Invalid=34697, Unknown=0, NotChecked=0, Total=39402 [2018-12-02 15:30:19,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84033 states. [2018-12-02 15:30:23,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84033 to 67932. [2018-12-02 15:30:23,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67932 states. [2018-12-02 15:30:23,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67932 states to 67932 states and 91547 transitions. [2018-12-02 15:30:24,004 INFO L78 Accepts]: Start accepts. Automaton has 67932 states and 91547 transitions. Word has length 172 [2018-12-02 15:30:24,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:30:24,004 INFO L480 AbstractCegarLoop]: Abstraction has 67932 states and 91547 transitions. [2018-12-02 15:30:24,004 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-12-02 15:30:24,004 INFO L276 IsEmpty]: Start isEmpty. Operand 67932 states and 91547 transitions. [2018-12-02 15:30:24,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-12-02 15:30:24,071 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:30:24,071 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:30:24,071 INFO L423 AbstractCegarLoop]: === Iteration 45 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:30:24,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:30:24,072 INFO L82 PathProgramCache]: Analyzing trace with hash 485120778, now seen corresponding path program 1 times [2018-12-02 15:30:24,072 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:30:24,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:30:24,072 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:30:24,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:30:24,072 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:30:24,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:30:24,111 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 50 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:30:24,111 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:30:24,111 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:30:24,111 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 173 with the following transitions: [2018-12-02 15:30:24,111 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [677], [679], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:30:24,112 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:30:24,112 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:30:24,311 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:30:24,312 INFO L272 AbstractInterpreter]: Visited 103 different actions 508 times. Merged at 35 different actions 139 times. Widened at 1 different actions 1 times. Performed 7583 root evaluator evaluations with a maximum evaluation depth of 3. Performed 7583 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 53 fixpoints after 13 different actions. Largest state had 68 variables. [2018-12-02 15:30:24,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:30:24,313 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:30:24,400 INFO L227 lantSequenceWeakener]: Weakened 135 states. On average, predicates are now at 78.86% of their original sizes. [2018-12-02 15:30:24,400 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:30:25,035 INFO L418 sIntCurrentIteration]: We unified 171 AI predicates to 171 [2018-12-02 15:30:25,035 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:30:25,035 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:30:25,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [56] imperfect sequences [5] total 59 [2018-12-02 15:30:25,035 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:30:25,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-12-02 15:30:25,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-12-02 15:30:25,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=335, Invalid=2745, Unknown=0, NotChecked=0, Total=3080 [2018-12-02 15:30:25,036 INFO L87 Difference]: Start difference. First operand 67932 states and 91547 transitions. Second operand 56 states. [2018-12-02 15:31:01,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:31:01,423 INFO L93 Difference]: Finished difference Result 138882 states and 187684 transitions. [2018-12-02 15:31:01,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 215 states. [2018-12-02 15:31:01,423 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 172 [2018-12-02 15:31:01,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:31:01,749 INFO L225 Difference]: With dead ends: 138882 [2018-12-02 15:31:01,749 INFO L226 Difference]: Without dead ends: 87109 [2018-12-02 15:31:01,910 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 383 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 266 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28339 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=8194, Invalid=63362, Unknown=0, NotChecked=0, Total=71556 [2018-12-02 15:31:01,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87109 states. [2018-12-02 15:31:06,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87109 to 70311. [2018-12-02 15:31:06,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70311 states. [2018-12-02 15:31:07,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70311 states to 70311 states and 94116 transitions. [2018-12-02 15:31:07,072 INFO L78 Accepts]: Start accepts. Automaton has 70311 states and 94116 transitions. Word has length 172 [2018-12-02 15:31:07,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:31:07,073 INFO L480 AbstractCegarLoop]: Abstraction has 70311 states and 94116 transitions. [2018-12-02 15:31:07,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-12-02 15:31:07,073 INFO L276 IsEmpty]: Start isEmpty. Operand 70311 states and 94116 transitions. [2018-12-02 15:31:07,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-12-02 15:31:07,119 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:31:07,119 INFO L402 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:31:07,119 INFO L423 AbstractCegarLoop]: === Iteration 46 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:31:07,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:07,119 INFO L82 PathProgramCache]: Analyzing trace with hash 1298725896, now seen corresponding path program 1 times [2018-12-02 15:31:07,119 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:31:07,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:07,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:31:07,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:07,120 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:31:07,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:31:07,194 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 40 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 15:31:07,194 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:31:07,194 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:31:07,194 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 175 with the following transitions: [2018-12-02 15:31:07,195 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [92], [94], [99], [104], [109], [113], [116], [122], [126], [129], [132], [139], [142], [145], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [215], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:31:07,195 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:31:07,195 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:31:07,297 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:31:07,298 INFO L272 AbstractInterpreter]: Visited 83 different actions 278 times. Merged at 23 different actions 82 times. Never widened. Performed 3999 root evaluator evaluations with a maximum evaluation depth of 3. Performed 3999 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 29 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:31:07,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:07,299 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:31:07,381 INFO L227 lantSequenceWeakener]: Weakened 114 states. On average, predicates are now at 77.98% of their original sizes. [2018-12-02 15:31:07,381 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:31:07,855 INFO L418 sIntCurrentIteration]: We unified 173 AI predicates to 173 [2018-12-02 15:31:07,855 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:31:07,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:31:07,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [50] imperfect sequences [9] total 57 [2018-12-02 15:31:07,855 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:31:07,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-12-02 15:31:07,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-12-02 15:31:07,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=2178, Unknown=0, NotChecked=0, Total=2450 [2018-12-02 15:31:07,856 INFO L87 Difference]: Start difference. First operand 70311 states and 94116 transitions. Second operand 50 states. [2018-12-02 15:31:20,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:31:20,030 INFO L93 Difference]: Finished difference Result 86514 states and 114820 transitions. [2018-12-02 15:31:20,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-12-02 15:31:20,030 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 174 [2018-12-02 15:31:20,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:31:20,342 INFO L225 Difference]: With dead ends: 86514 [2018-12-02 15:31:20,342 INFO L226 Difference]: Without dead ends: 71407 [2018-12-02 15:31:20,382 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 210 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2694 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=874, Invalid=6608, Unknown=0, NotChecked=0, Total=7482 [2018-12-02 15:31:20,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71407 states. [2018-12-02 15:31:25,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71407 to 70247. [2018-12-02 15:31:25,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70247 states. [2018-12-02 15:31:25,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70247 states to 70247 states and 94036 transitions. [2018-12-02 15:31:25,327 INFO L78 Accepts]: Start accepts. Automaton has 70247 states and 94036 transitions. Word has length 174 [2018-12-02 15:31:25,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:31:25,328 INFO L480 AbstractCegarLoop]: Abstraction has 70247 states and 94036 transitions. [2018-12-02 15:31:25,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-12-02 15:31:25,328 INFO L276 IsEmpty]: Start isEmpty. Operand 70247 states and 94036 transitions. [2018-12-02 15:31:25,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-12-02 15:31:25,374 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:31:25,375 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:31:25,375 INFO L423 AbstractCegarLoop]: === Iteration 47 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:31:25,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:25,375 INFO L82 PathProgramCache]: Analyzing trace with hash -572888549, now seen corresponding path program 1 times [2018-12-02 15:31:25,375 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:31:25,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:25,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:31:25,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:25,376 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:31:25,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:31:25,415 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 50 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:31:25,415 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:31:25,415 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:31:25,416 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 175 with the following transitions: [2018-12-02 15:31:25,416 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:31:25,417 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:31:25,417 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:31:25,573 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:31:25,573 INFO L272 AbstractInterpreter]: Visited 94 different actions 409 times. Merged at 28 different actions 121 times. Widened at 1 different actions 1 times. Performed 6128 root evaluator evaluations with a maximum evaluation depth of 3. Performed 6128 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 33 fixpoints after 11 different actions. Largest state had 68 variables. [2018-12-02 15:31:25,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:25,575 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:31:25,655 INFO L227 lantSequenceWeakener]: Weakened 126 states. On average, predicates are now at 80.85% of their original sizes. [2018-12-02 15:31:25,655 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:31:26,207 INFO L418 sIntCurrentIteration]: We unified 173 AI predicates to 173 [2018-12-02 15:31:26,207 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:31:26,207 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:31:26,208 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [54] imperfect sequences [5] total 57 [2018-12-02 15:31:26,208 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:31:26,208 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-12-02 15:31:26,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-12-02 15:31:26,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=308, Invalid=2554, Unknown=0, NotChecked=0, Total=2862 [2018-12-02 15:31:26,208 INFO L87 Difference]: Start difference. First operand 70247 states and 94036 transitions. Second operand 54 states. [2018-12-02 15:31:41,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:31:41,520 INFO L93 Difference]: Finished difference Result 100981 states and 133390 transitions. [2018-12-02 15:31:41,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-12-02 15:31:41,521 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 174 [2018-12-02 15:31:41,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:31:41,769 INFO L225 Difference]: With dead ends: 100981 [2018-12-02 15:31:41,769 INFO L226 Difference]: Without dead ends: 76259 [2018-12-02 15:31:41,850 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 265 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7505 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=2461, Invalid=18709, Unknown=0, NotChecked=0, Total=21170 [2018-12-02 15:31:41,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76259 states. [2018-12-02 15:31:46,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76259 to 69987. [2018-12-02 15:31:46,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69987 states. [2018-12-02 15:31:46,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69987 states to 69987 states and 93710 transitions. [2018-12-02 15:31:46,894 INFO L78 Accepts]: Start accepts. Automaton has 69987 states and 93710 transitions. Word has length 174 [2018-12-02 15:31:46,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:31:46,894 INFO L480 AbstractCegarLoop]: Abstraction has 69987 states and 93710 transitions. [2018-12-02 15:31:46,894 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-12-02 15:31:46,894 INFO L276 IsEmpty]: Start isEmpty. Operand 69987 states and 93710 transitions. [2018-12-02 15:31:46,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-12-02 15:31:46,936 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:31:46,937 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:31:46,937 INFO L423 AbstractCegarLoop]: === Iteration 48 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:31:46,937 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:46,937 INFO L82 PathProgramCache]: Analyzing trace with hash 943603334, now seen corresponding path program 1 times [2018-12-02 15:31:46,937 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:31:46,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:46,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:31:46,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:31:46,938 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:31:46,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:31:46,968 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 49 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-02 15:31:46,968 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:31:46,968 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:31:46,968 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 175 with the following transitions: [2018-12-02 15:31:46,969 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [215], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:31:46,969 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:31:46,969 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:31:47,143 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:31:47,143 INFO L272 AbstractInterpreter]: Visited 94 different actions 439 times. Merged at 28 different actions 132 times. Never widened. Performed 6913 root evaluator evaluations with a maximum evaluation depth of 3. Performed 6913 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 37 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:31:47,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:31:47,145 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:31:47,232 INFO L227 lantSequenceWeakener]: Weakened 126 states. On average, predicates are now at 80.45% of their original sizes. [2018-12-02 15:31:47,232 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:31:47,870 INFO L418 sIntCurrentIteration]: We unified 173 AI predicates to 173 [2018-12-02 15:31:47,870 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:31:47,870 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:31:47,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [54] imperfect sequences [5] total 57 [2018-12-02 15:31:47,870 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:31:47,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-12-02 15:31:47,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-12-02 15:31:47,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=308, Invalid=2554, Unknown=0, NotChecked=0, Total=2862 [2018-12-02 15:31:47,871 INFO L87 Difference]: Start difference. First operand 69987 states and 93710 transitions. Second operand 54 states. [2018-12-02 15:32:03,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:32:03,907 INFO L93 Difference]: Finished difference Result 97526 states and 128930 transitions. [2018-12-02 15:32:03,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-12-02 15:32:03,907 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 174 [2018-12-02 15:32:03,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:32:04,161 INFO L225 Difference]: With dead ends: 97526 [2018-12-02 15:32:04,161 INFO L226 Difference]: Without dead ends: 76282 [2018-12-02 15:32:04,241 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 265 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7508 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2486, Invalid=18684, Unknown=0, NotChecked=0, Total=21170 [2018-12-02 15:32:04,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76282 states. [2018-12-02 15:32:09,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76282 to 70010. [2018-12-02 15:32:09,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70010 states. [2018-12-02 15:32:09,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70010 states to 70010 states and 93736 transitions. [2018-12-02 15:32:09,264 INFO L78 Accepts]: Start accepts. Automaton has 70010 states and 93736 transitions. Word has length 174 [2018-12-02 15:32:09,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:32:09,264 INFO L480 AbstractCegarLoop]: Abstraction has 70010 states and 93736 transitions. [2018-12-02 15:32:09,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-12-02 15:32:09,264 INFO L276 IsEmpty]: Start isEmpty. Operand 70010 states and 93736 transitions. [2018-12-02 15:32:09,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-12-02 15:32:09,309 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:32:09,309 INFO L402 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:32:09,309 INFO L423 AbstractCegarLoop]: === Iteration 49 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:32:09,309 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:09,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1779935288, now seen corresponding path program 1 times [2018-12-02 15:32:09,309 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:32:09,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:09,310 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:32:09,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:09,310 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:32:09,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:32:09,366 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 44 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-02 15:32:09,366 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:32:09,366 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:32:09,366 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 176 with the following transitions: [2018-12-02 15:32:09,367 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [92], [94], [99], [104], [109], [113], [116], [122], [126], [129], [132], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:32:09,367 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:32:09,368 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:32:09,511 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:32:09,512 INFO L272 AbstractInterpreter]: Visited 94 different actions 397 times. Merged at 27 different actions 124 times. Widened at 1 different actions 2 times. Performed 5405 root evaluator evaluations with a maximum evaluation depth of 3. Performed 5405 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 34 fixpoints after 11 different actions. Largest state had 68 variables. [2018-12-02 15:32:09,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:09,513 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:32:09,604 INFO L227 lantSequenceWeakener]: Weakened 127 states. On average, predicates are now at 80.49% of their original sizes. [2018-12-02 15:32:09,604 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:32:10,200 INFO L418 sIntCurrentIteration]: We unified 174 AI predicates to 174 [2018-12-02 15:32:10,200 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:32:10,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:32:10,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [53] imperfect sequences [8] total 59 [2018-12-02 15:32:10,201 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:32:10,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-12-02 15:32:10,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-12-02 15:32:10,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=2470, Unknown=0, NotChecked=0, Total=2756 [2018-12-02 15:32:10,201 INFO L87 Difference]: Start difference. First operand 70010 states and 93736 transitions. Second operand 53 states. [2018-12-02 15:32:27,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:32:27,518 INFO L93 Difference]: Finished difference Result 91358 states and 121066 transitions. [2018-12-02 15:32:27,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2018-12-02 15:32:27,518 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 175 [2018-12-02 15:32:27,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:32:27,760 INFO L225 Difference]: With dead ends: 91358 [2018-12-02 15:32:27,760 INFO L226 Difference]: Without dead ends: 76343 [2018-12-02 15:32:27,821 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 250 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5823 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=2167, Invalid=14345, Unknown=0, NotChecked=0, Total=16512 [2018-12-02 15:32:27,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76343 states. [2018-12-02 15:32:32,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76343 to 70006. [2018-12-02 15:32:32,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70006 states. [2018-12-02 15:32:32,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70006 states to 70006 states and 93725 transitions. [2018-12-02 15:32:32,822 INFO L78 Accepts]: Start accepts. Automaton has 70006 states and 93725 transitions. Word has length 175 [2018-12-02 15:32:32,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:32:32,823 INFO L480 AbstractCegarLoop]: Abstraction has 70006 states and 93725 transitions. [2018-12-02 15:32:32,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-12-02 15:32:32,823 INFO L276 IsEmpty]: Start isEmpty. Operand 70006 states and 93725 transitions. [2018-12-02 15:32:32,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-12-02 15:32:32,869 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:32:32,869 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:32:32,869 INFO L423 AbstractCegarLoop]: === Iteration 50 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:32:32,869 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:32,869 INFO L82 PathProgramCache]: Analyzing trace with hash -544652342, now seen corresponding path program 1 times [2018-12-02 15:32:32,869 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:32:32,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:32,870 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:32:32,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:32,870 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:32:32,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:32:32,915 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 50 proven. 6 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-02 15:32:32,915 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:32:32,915 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:32:32,915 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 176 with the following transitions: [2018-12-02 15:32:32,915 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [215], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:32:32,916 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:32:32,916 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:32:33,100 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:32:33,100 INFO L272 AbstractInterpreter]: Visited 93 different actions 466 times. Merged at 27 different actions 143 times. Widened at 1 different actions 1 times. Performed 7360 root evaluator evaluations with a maximum evaluation depth of 3. Performed 7360 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 33 fixpoints after 8 different actions. Largest state had 68 variables. [2018-12-02 15:32:33,101 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:33,101 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:32:33,182 INFO L227 lantSequenceWeakener]: Weakened 127 states. On average, predicates are now at 80.74% of their original sizes. [2018-12-02 15:32:33,182 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:32:33,782 INFO L418 sIntCurrentIteration]: We unified 174 AI predicates to 174 [2018-12-02 15:32:33,782 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:32:33,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:32:33,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [55] imperfect sequences [5] total 58 [2018-12-02 15:32:33,782 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:32:33,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-12-02 15:32:33,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-12-02 15:32:33,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=315, Invalid=2655, Unknown=0, NotChecked=0, Total=2970 [2018-12-02 15:32:33,783 INFO L87 Difference]: Start difference. First operand 70006 states and 93725 transitions. Second operand 55 states. [2018-12-02 15:32:51,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:32:51,848 INFO L93 Difference]: Finished difference Result 102152 states and 134641 transitions. [2018-12-02 15:32:51,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2018-12-02 15:32:51,848 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 175 [2018-12-02 15:32:51,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:32:52,099 INFO L225 Difference]: With dead ends: 102152 [2018-12-02 15:32:52,099 INFO L226 Difference]: Without dead ends: 76516 [2018-12-02 15:32:52,180 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 270 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 149 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8191 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=2652, Invalid=19998, Unknown=0, NotChecked=0, Total=22650 [2018-12-02 15:32:52,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76516 states. [2018-12-02 15:32:56,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76516 to 70151. [2018-12-02 15:32:56,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70151 states. [2018-12-02 15:32:57,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70151 states to 70151 states and 93893 transitions. [2018-12-02 15:32:57,206 INFO L78 Accepts]: Start accepts. Automaton has 70151 states and 93893 transitions. Word has length 175 [2018-12-02 15:32:57,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:32:57,206 INFO L480 AbstractCegarLoop]: Abstraction has 70151 states and 93893 transitions. [2018-12-02 15:32:57,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-12-02 15:32:57,206 INFO L276 IsEmpty]: Start isEmpty. Operand 70151 states and 93893 transitions. [2018-12-02 15:32:57,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-12-02 15:32:57,253 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:32:57,253 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:32:57,253 INFO L423 AbstractCegarLoop]: === Iteration 51 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:32:57,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:57,254 INFO L82 PathProgramCache]: Analyzing trace with hash 1133502858, now seen corresponding path program 1 times [2018-12-02 15:32:57,254 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:32:57,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:57,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:32:57,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:32:57,254 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:32:57,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:32:57,367 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 52 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:32:57,368 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:32:57,368 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:32:57,368 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 176 with the following transitions: [2018-12-02 15:32:57,368 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [35], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:32:57,369 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:32:57,369 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:32:57,551 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-02 15:32:57,551 INFO L272 AbstractInterpreter]: Visited 93 different actions 460 times. Merged at 27 different actions 136 times. Widened at 1 different actions 1 times. Performed 7372 root evaluator evaluations with a maximum evaluation depth of 3. Performed 7372 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 33 fixpoints after 9 different actions. Largest state had 68 variables. [2018-12-02 15:32:57,552 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:32:57,552 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-02 15:32:57,632 INFO L227 lantSequenceWeakener]: Weakened 127 states. On average, predicates are now at 80.74% of their original sizes. [2018-12-02 15:32:57,633 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-02 15:32:58,227 INFO L418 sIntCurrentIteration]: We unified 174 AI predicates to 174 [2018-12-02 15:32:58,227 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-02 15:32:58,228 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:32:58,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [55] imperfect sequences [5] total 58 [2018-12-02 15:32:58,228 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:32:58,228 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-12-02 15:32:58,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-12-02 15:32:58,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=2652, Unknown=0, NotChecked=0, Total=2970 [2018-12-02 15:32:58,228 INFO L87 Difference]: Start difference. First operand 70151 states and 93893 transitions. Second operand 55 states. [2018-12-02 15:33:15,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:15,597 INFO L93 Difference]: Finished difference Result 97461 states and 128812 transitions. [2018-12-02 15:33:15,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-12-02 15:33:15,597 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 175 [2018-12-02 15:33:15,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:15,854 INFO L225 Difference]: With dead ends: 97461 [2018-12-02 15:33:15,855 INFO L226 Difference]: Without dead ends: 76492 [2018-12-02 15:33:15,933 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 272 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 151 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8365 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2742, Invalid=20514, Unknown=0, NotChecked=0, Total=23256 [2018-12-02 15:33:15,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76492 states. [2018-12-02 15:33:20,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76492 to 70124. [2018-12-02 15:33:20,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70124 states. [2018-12-02 15:33:21,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70124 states to 70124 states and 93860 transitions. [2018-12-02 15:33:21,028 INFO L78 Accepts]: Start accepts. Automaton has 70124 states and 93860 transitions. Word has length 175 [2018-12-02 15:33:21,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:21,029 INFO L480 AbstractCegarLoop]: Abstraction has 70124 states and 93860 transitions. [2018-12-02 15:33:21,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-12-02 15:33:21,029 INFO L276 IsEmpty]: Start isEmpty. Operand 70124 states and 93860 transitions. [2018-12-02 15:33:21,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-12-02 15:33:21,081 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:21,081 INFO L402 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:21,081 INFO L423 AbstractCegarLoop]: === Iteration 52 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:21,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:21,081 INFO L82 PathProgramCache]: Analyzing trace with hash -1806725738, now seen corresponding path program 1 times [2018-12-02 15:33:21,081 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:21,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:21,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:21,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:21,082 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:21,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:21,147 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 40 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-02 15:33:21,147 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:21,147 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:33:21,147 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 182 with the following transitions: [2018-12-02 15:33:21,148 INFO L205 CegarAbsIntRunner]: [2], [18], [20], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [92], [94], [99], [104], [109], [113], [116], [122], [126], [129], [132], [139], [142], [145], [148], [152], [155], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [207], [210], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:33:21,148 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:33:21,148 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:33:22,142 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 15:33:22,142 INFO L272 AbstractInterpreter]: Visited 142 different actions 2605 times. Merged at 68 different actions 891 times. Widened at 2 different actions 9 times. Performed 34487 root evaluator evaluations with a maximum evaluation depth of 4. Performed 34487 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 298 fixpoints after 24 different actions. Largest state had 68 variables. [2018-12-02 15:33:22,144 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:22,144 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 15:33:22,144 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:22,145 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:33:22,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:22,152 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 15:33:22,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:22,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:33:22,279 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-02 15:33:22,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 15:33:22,340 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 45 proven. 2 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-02 15:33:22,363 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:33:22,363 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [9, 3] total 11 [2018-12-02 15:33:22,363 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:22,363 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:33:22,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:33:22,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:33:22,364 INFO L87 Difference]: Start difference. First operand 70124 states and 93860 transitions. Second operand 3 states. [2018-12-02 15:33:24,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:24,745 INFO L93 Difference]: Finished difference Result 95967 states and 129597 transitions. [2018-12-02 15:33:24,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:33:24,745 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 181 [2018-12-02 15:33:24,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:24,822 INFO L225 Difference]: With dead ends: 95967 [2018-12-02 15:33:24,822 INFO L226 Difference]: Without dead ends: 28658 [2018-12-02 15:33:25,048 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 372 GetRequests, 363 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-12-02 15:33:25,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28658 states. [2018-12-02 15:33:26,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28658 to 24642. [2018-12-02 15:33:26,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24642 states. [2018-12-02 15:33:26,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24642 states to 24642 states and 30004 transitions. [2018-12-02 15:33:26,706 INFO L78 Accepts]: Start accepts. Automaton has 24642 states and 30004 transitions. Word has length 181 [2018-12-02 15:33:26,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:26,706 INFO L480 AbstractCegarLoop]: Abstraction has 24642 states and 30004 transitions. [2018-12-02 15:33:26,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:33:26,706 INFO L276 IsEmpty]: Start isEmpty. Operand 24642 states and 30004 transitions. [2018-12-02 15:33:26,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-12-02 15:33:26,721 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:26,721 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:26,721 INFO L423 AbstractCegarLoop]: === Iteration 53 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:26,721 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:26,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1611204853, now seen corresponding path program 1 times [2018-12-02 15:33:26,722 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:26,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:26,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:26,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:26,722 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:26,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:26,760 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-02 15:33:26,760 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:26,760 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:33:26,760 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 182 with the following transitions: [2018-12-02 15:33:26,761 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [27], [30], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [283], [297], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [705], [707], [708], [709], [710], [711], [713] [2018-12-02 15:33:26,761 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:33:26,761 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:33:28,057 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 15:33:28,058 INFO L272 AbstractInterpreter]: Visited 141 different actions 3019 times. Merged at 67 different actions 1004 times. Widened at 1 different actions 6 times. Performed 42326 root evaluator evaluations with a maximum evaluation depth of 4. Performed 42326 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 310 fixpoints after 19 different actions. Largest state had 68 variables. [2018-12-02 15:33:28,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:28,059 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 15:33:28,059 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:28,059 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:33:28,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:28,066 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 15:33:28,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:28,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:33:28,152 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-12-02 15:33:28,152 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 15:33:28,182 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-12-02 15:33:28,196 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-02 15:33:28,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [5] total 6 [2018-12-02 15:33:28,197 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:28,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:33:28,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:33:28,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:33:28,197 INFO L87 Difference]: Start difference. First operand 24642 states and 30004 transitions. Second operand 3 states. [2018-12-02 15:33:29,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:29,672 INFO L93 Difference]: Finished difference Result 24646 states and 30008 transitions. [2018-12-02 15:33:29,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:33:29,672 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 181 [2018-12-02 15:33:29,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:29,717 INFO L225 Difference]: With dead ends: 24646 [2018-12-02 15:33:29,717 INFO L226 Difference]: Without dead ends: 24643 [2018-12-02 15:33:29,727 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 365 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-02 15:33:29,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24643 states. [2018-12-02 15:33:31,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24643 to 24643. [2018-12-02 15:33:31,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24643 states. [2018-12-02 15:33:31,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24643 states to 24643 states and 30005 transitions. [2018-12-02 15:33:31,363 INFO L78 Accepts]: Start accepts. Automaton has 24643 states and 30005 transitions. Word has length 181 [2018-12-02 15:33:31,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:31,363 INFO L480 AbstractCegarLoop]: Abstraction has 24643 states and 30005 transitions. [2018-12-02 15:33:31,363 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:33:31,364 INFO L276 IsEmpty]: Start isEmpty. Operand 24643 states and 30005 transitions. [2018-12-02 15:33:31,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-12-02 15:33:31,378 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:31,378 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:31,379 INFO L423 AbstractCegarLoop]: === Iteration 54 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:31,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:31,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1611152060, now seen corresponding path program 1 times [2018-12-02 15:33:31,379 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:31,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:31,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:31,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:31,380 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:31,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:31,419 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-02 15:33:31,419 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:31,419 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:33:31,419 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 182 with the following transitions: [2018-12-02 15:33:31,420 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [27], [30], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [109], [113], [116], [119], [126], [129], [132], [135], [139], [142], [145], [152], [155], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [285], [290], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [707], [708], [709], [710], [711], [713] [2018-12-02 15:33:31,421 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:33:31,421 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:33:32,698 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 15:33:32,698 INFO L272 AbstractInterpreter]: Visited 141 different actions 3018 times. Merged at 67 different actions 967 times. Widened at 2 different actions 7 times. Performed 44066 root evaluator evaluations with a maximum evaluation depth of 3. Performed 44066 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 305 fixpoints after 17 different actions. Largest state had 68 variables. [2018-12-02 15:33:32,700 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:32,700 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 15:33:32,700 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:32,700 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:33:32,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:32,707 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 15:33:32,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:32,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:33:32,801 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-02 15:33:32,801 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 15:33:32,874 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-02 15:33:32,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:33:32,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [5, 4] total 9 [2018-12-02 15:33:32,890 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:32,890 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-02 15:33:32,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-02 15:33:32,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:33:32,891 INFO L87 Difference]: Start difference. First operand 24643 states and 30005 transitions. Second operand 4 states. [2018-12-02 15:33:33,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:33,724 INFO L93 Difference]: Finished difference Result 33588 states and 41185 transitions. [2018-12-02 15:33:33,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:33:33,724 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 181 [2018-12-02 15:33:33,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:33,745 INFO L225 Difference]: With dead ends: 33588 [2018-12-02 15:33:33,745 INFO L226 Difference]: Without dead ends: 10397 [2018-12-02 15:33:33,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 372 GetRequests, 363 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-12-02 15:33:33,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10397 states. [2018-12-02 15:33:34,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10397 to 8891. [2018-12-02 15:33:34,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8891 states. [2018-12-02 15:33:34,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8891 states to 8891 states and 10438 transitions. [2018-12-02 15:33:34,327 INFO L78 Accepts]: Start accepts. Automaton has 8891 states and 10438 transitions. Word has length 181 [2018-12-02 15:33:34,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:34,327 INFO L480 AbstractCegarLoop]: Abstraction has 8891 states and 10438 transitions. [2018-12-02 15:33:34,327 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-02 15:33:34,327 INFO L276 IsEmpty]: Start isEmpty. Operand 8891 states and 10438 transitions. [2018-12-02 15:33:34,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-12-02 15:33:34,330 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:34,330 INFO L402 BasicCegarLoop]: trace histogram [6, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:34,330 INFO L423 AbstractCegarLoop]: === Iteration 55 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:34,330 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:34,331 INFO L82 PathProgramCache]: Analyzing trace with hash -724831728, now seen corresponding path program 1 times [2018-12-02 15:33:34,331 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:34,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:34,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:34,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:34,331 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:34,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:34,380 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 53 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-02 15:33:34,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:34,381 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:33:34,381 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 187 with the following transitions: [2018-12-02 15:33:34,381 INFO L205 CegarAbsIntRunner]: [4], [7], [18], [20], [24], [27], [30], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [97], [99], [104], [109], [113], [116], [119], [122], [126], [129], [132], [135], [139], [142], [145], [152], [155], [158], [161], [165], [168], [174], [179], [182], [198], [200], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [285], [290], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [499], [504], [510], [516], [520], [526], [532], [535], [556], [561], [568], [573], [580], [585], [592], [600], [606], [612], [616], [622], [628], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [707], [708], [709], [710], [711], [713] [2018-12-02 15:33:34,382 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:33:34,382 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:33:34,548 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 15:33:34,548 INFO L272 AbstractInterpreter]: Visited 94 different actions 428 times. Merged at 28 different actions 120 times. Widened at 1 different actions 1 times. Performed 6767 root evaluator evaluations with a maximum evaluation depth of 3. Performed 6767 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 44 fixpoints after 14 different actions. Largest state had 68 variables. [2018-12-02 15:33:34,549 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:34,549 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 15:33:34,549 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:34,549 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:33:34,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:34,558 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 15:33:34,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:34,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:33:34,670 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 54 proven. 15 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-02 15:33:34,671 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 15:33:34,754 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-02 15:33:34,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-02 15:33:34,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5, 5] total 9 [2018-12-02 15:33:34,770 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:34,770 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:33:34,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:33:34,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:33:34,770 INFO L87 Difference]: Start difference. First operand 8891 states and 10438 transitions. Second operand 5 states. [2018-12-02 15:33:35,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:35,406 INFO L93 Difference]: Finished difference Result 13928 states and 16409 transitions. [2018-12-02 15:33:35,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-02 15:33:35,406 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 186 [2018-12-02 15:33:35,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:35,417 INFO L225 Difference]: With dead ends: 13928 [2018-12-02 15:33:35,417 INFO L226 Difference]: Without dead ends: 7574 [2018-12-02 15:33:35,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 378 GetRequests, 367 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-12-02 15:33:35,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7574 states. [2018-12-02 15:33:35,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7574 to 7536. [2018-12-02 15:33:35,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7536 states. [2018-12-02 15:33:35,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7536 states to 7536 states and 8836 transitions. [2018-12-02 15:33:35,883 INFO L78 Accepts]: Start accepts. Automaton has 7536 states and 8836 transitions. Word has length 186 [2018-12-02 15:33:35,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:35,884 INFO L480 AbstractCegarLoop]: Abstraction has 7536 states and 8836 transitions. [2018-12-02 15:33:35,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:33:35,884 INFO L276 IsEmpty]: Start isEmpty. Operand 7536 states and 8836 transitions. [2018-12-02 15:33:35,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2018-12-02 15:33:35,887 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:35,888 INFO L402 BasicCegarLoop]: trace histogram [7, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:35,888 INFO L423 AbstractCegarLoop]: === Iteration 56 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:35,888 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:35,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1451824636, now seen corresponding path program 1 times [2018-12-02 15:33:35,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:35,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:35,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:35,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:35,889 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:35,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:35,932 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-12-02 15:33:35,932 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:33:35,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-02 15:33:35,932 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:35,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-02 15:33:35,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-02 15:33:35,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:33:35,933 INFO L87 Difference]: Start difference. First operand 7536 states and 8836 transitions. Second operand 3 states. [2018-12-02 15:33:36,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:36,362 INFO L93 Difference]: Finished difference Result 10279 states and 12188 transitions. [2018-12-02 15:33:36,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-02 15:33:36,363 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 242 [2018-12-02 15:33:36,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:36,372 INFO L225 Difference]: With dead ends: 10279 [2018-12-02 15:33:36,372 INFO L226 Difference]: Without dead ends: 7200 [2018-12-02 15:33:36,377 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-02 15:33:36,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7200 states. [2018-12-02 15:33:36,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7200 to 7081. [2018-12-02 15:33:36,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7081 states. [2018-12-02 15:33:36,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7081 states to 7081 states and 8223 transitions. [2018-12-02 15:33:36,808 INFO L78 Accepts]: Start accepts. Automaton has 7081 states and 8223 transitions. Word has length 242 [2018-12-02 15:33:36,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:36,809 INFO L480 AbstractCegarLoop]: Abstraction has 7081 states and 8223 transitions. [2018-12-02 15:33:36,809 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-02 15:33:36,809 INFO L276 IsEmpty]: Start isEmpty. Operand 7081 states and 8223 transitions. [2018-12-02 15:33:36,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2018-12-02 15:33:36,812 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:36,812 INFO L402 BasicCegarLoop]: trace histogram [7, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:36,812 INFO L423 AbstractCegarLoop]: === Iteration 57 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:36,812 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:36,812 INFO L82 PathProgramCache]: Analyzing trace with hash -425238594, now seen corresponding path program 1 times [2018-12-02 15:33:36,812 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:36,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:36,813 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:36,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:36,813 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:36,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:36,859 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2018-12-02 15:33:36,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-02 15:33:36,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-02 15:33:36,859 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-02 15:33:36,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-02 15:33:36,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-02 15:33:36,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-02 15:33:36,860 INFO L87 Difference]: Start difference. First operand 7081 states and 8223 transitions. Second operand 5 states. [2018-12-02 15:33:37,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:37,223 INFO L93 Difference]: Finished difference Result 10601 states and 12459 transitions. [2018-12-02 15:33:37,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-02 15:33:37,224 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 242 [2018-12-02 15:33:37,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:37,231 INFO L225 Difference]: With dead ends: 10601 [2018-12-02 15:33:37,231 INFO L226 Difference]: Without dead ends: 4177 [2018-12-02 15:33:37,237 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-02 15:33:37,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4177 states. [2018-12-02 15:33:37,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4177 to 2714. [2018-12-02 15:33:37,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2714 states. [2018-12-02 15:33:37,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2714 states to 2714 states and 3068 transitions. [2018-12-02 15:33:37,441 INFO L78 Accepts]: Start accepts. Automaton has 2714 states and 3068 transitions. Word has length 242 [2018-12-02 15:33:37,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:37,441 INFO L480 AbstractCegarLoop]: Abstraction has 2714 states and 3068 transitions. [2018-12-02 15:33:37,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-02 15:33:37,442 INFO L276 IsEmpty]: Start isEmpty. Operand 2714 states and 3068 transitions. [2018-12-02 15:33:37,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-12-02 15:33:37,443 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:37,443 INFO L402 BasicCegarLoop]: trace histogram [7, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:37,443 INFO L423 AbstractCegarLoop]: === Iteration 58 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:37,444 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:37,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1611074281, now seen corresponding path program 1 times [2018-12-02 15:33:37,444 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:37,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:37,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:37,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:37,444 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:37,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:37,657 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 49 proven. 85 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-02 15:33:37,657 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:37,657 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-02 15:33:37,657 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 244 with the following transitions: [2018-12-02 15:33:37,657 INFO L205 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [24], [27], [30], [37], [44], [45], [46], [47], [58], [62], [65], [72], [73], [74], [83], [87], [89], [94], [99], [104], [107], [109], [113], [116], [119], [122], [126], [129], [135], [139], [142], [148], [152], [155], [158], [161], [165], [168], [174], [179], [182], [184], [187], [198], [200], [204], [207], [210], [217], [224], [225], [228], [230], [233], [235], [238], [242], [251], [253], [256], [259], [268], [271], [278], [280], [285], [290], [303], [304], [316], [320], [326], [332], [338], [346], [352], [358], [364], [370], [376], [388], [400], [412], [424], [436], [442], [448], [454], [460], [466], [472], [481], [483], [485], [488], [491], [495], [497], [499], [504], [510], [516], [520], [522], [526], [528], [532], [535], [540], [544], [549], [556], [561], [568], [573], [580], [585], [592], [594], [600], [606], [612], [616], [618], [622], [624], [628], [630], [635], [640], [645], [648], [661], [663], [666], [677], [679], [681], [685], [686], [690], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [707], [708], [709], [710], [711], [713] [2018-12-02 15:33:37,658 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-02 15:33:37,658 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-02 15:33:41,872 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-02 15:33:41,872 INFO L272 AbstractInterpreter]: Visited 163 different actions 11480 times. Merged at 87 different actions 3631 times. Widened at 4 different actions 27 times. Performed 135225 root evaluator evaluations with a maximum evaluation depth of 3. Performed 135225 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1373 fixpoints after 44 different actions. Largest state had 68 variables. [2018-12-02 15:33:41,873 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:41,873 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-02 15:33:41,873 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-02 15:33:41,873 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-02 15:33:41,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:41,881 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-02 15:33:41,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-02 15:33:41,968 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-02 15:33:42,107 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 120 proven. 15 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-02 15:33:42,108 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-02 15:33:42,383 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 119 proven. 15 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-02 15:33:42,398 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-02 15:33:42,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 16] total 29 [2018-12-02 15:33:42,399 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-02 15:33:42,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-02 15:33:42,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-02 15:33:42,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=719, Unknown=0, NotChecked=0, Total=812 [2018-12-02 15:33:42,399 INFO L87 Difference]: Start difference. First operand 2714 states and 3068 transitions. Second operand 22 states. [2018-12-02 15:33:49,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-02 15:33:49,923 INFO L93 Difference]: Finished difference Result 9448 states and 11111 transitions. [2018-12-02 15:33:49,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-12-02 15:33:49,924 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 243 [2018-12-02 15:33:49,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-02 15:33:49,939 INFO L225 Difference]: With dead ends: 9448 [2018-12-02 15:33:49,939 INFO L226 Difference]: Without dead ends: 7660 [2018-12-02 15:33:49,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 670 GetRequests, 544 SyntacticMatches, 10 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4149 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1507, Invalid=12299, Unknown=0, NotChecked=0, Total=13806 [2018-12-02 15:33:49,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7660 states. [2018-12-02 15:33:50,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7660 to 5750. [2018-12-02 15:33:50,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5750 states. [2018-12-02 15:33:50,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5750 states to 5750 states and 6608 transitions. [2018-12-02 15:33:50,349 INFO L78 Accepts]: Start accepts. Automaton has 5750 states and 6608 transitions. Word has length 243 [2018-12-02 15:33:50,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-02 15:33:50,349 INFO L480 AbstractCegarLoop]: Abstraction has 5750 states and 6608 transitions. [2018-12-02 15:33:50,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-02 15:33:50,349 INFO L276 IsEmpty]: Start isEmpty. Operand 5750 states and 6608 transitions. [2018-12-02 15:33:50,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2018-12-02 15:33:50,350 INFO L394 BasicCegarLoop]: Found error trace [2018-12-02 15:33:50,351 INFO L402 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-02 15:33:50,351 INFO L423 AbstractCegarLoop]: === Iteration 59 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-02 15:33:50,351 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-02 15:33:50,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1727712869, now seen corresponding path program 1 times [2018-12-02 15:33:50,351 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-02 15:33:50,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:50,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-02 15:33:50,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-02 15:33:50,352 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-02 15:33:50,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 15:33:50,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-02 15:33:50,439 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-02 15:33:50,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 03:33:50 BoogieIcfgContainer [2018-12-02 15:33:50,533 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-02 15:33:50,533 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-02 15:33:50,533 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-02 15:33:50,534 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-02 15:33:50,534 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 03:22:16" (3/4) ... [2018-12-02 15:33:50,536 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-02 15:33:50,639 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_553cdb29-c79a-49d0-9cae-bd714e26cff9/bin-2019/utaipan/witness.graphml [2018-12-02 15:33:50,640 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-02 15:33:50,640 INFO L168 Benchmark]: Toolchain (without parser) took 694966.62 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.4 GB). Free memory was 951.3 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,641 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 15:33:50,642 INFO L168 Benchmark]: CACSL2BoogieTranslator took 173.78 ms. Allocated memory is still 1.0 GB. Free memory was 951.3 MB in the beginning and 935.2 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,642 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.38 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 935.2 MB in the beginning and 1.1 GB in the end (delta: -158.0 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,642 INFO L168 Benchmark]: Boogie Preprocessor took 30.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,642 INFO L168 Benchmark]: RCFGBuilder took 330.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 41.2 MB). Peak memory consumption was 41.2 MB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,642 INFO L168 Benchmark]: TraceAbstraction took 694280.15 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2018-12-02 15:33:50,643 INFO L168 Benchmark]: Witness Printer took 106.25 ms. Allocated memory is still 6.4 GB. Free memory is still 2.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-02 15:33:50,644 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 173.78 ms. Allocated memory is still 1.0 GB. Free memory was 951.3 MB in the beginning and 935.2 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.38 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 935.2 MB in the beginning and 1.1 GB in the end (delta: -158.0 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 330.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 41.2 MB). Peak memory consumption was 41.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 694280.15 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 106.25 ms. Allocated memory is still 6.4 GB. Free memory is still 2.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 13]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L18] int c ; [L19] int c_t ; [L20] int c_req_up ; [L21] int p_in ; [L22] int p_out ; [L23] int wl_st ; [L24] int c1_st ; [L25] int c2_st ; [L26] int wb_st ; [L27] int r_st ; [L28] int wl_i ; [L29] int c1_i ; [L30] int c2_i ; [L31] int wb_i ; [L32] int r_i ; [L33] int wl_pc ; [L34] int c1_pc ; [L35] int c2_pc ; [L36] int wb_pc ; [L37] int e_e ; [L38] int e_f ; [L39] int e_g ; [L40] int e_c ; [L41] int e_p_in ; [L42] int e_wl ; [L48] int d ; [L49] int data ; [L50] int processed ; [L51] static int t_b ; VAL [\old(c)=17, \old(c1_i)=4, \old(c1_pc)=29, \old(c1_st)=24, \old(c2_i)=14, \old(c2_pc)=28, \old(c2_st)=25, \old(c_req_up)=30, \old(c_t)=20, \old(d)=23, \old(data)=18, \old(e_c)=11, \old(e_e)=31, \old(e_f)=21, \old(e_g)=10, \old(e_p_in)=8, \old(e_wl)=13, \old(p_in)=15, \old(p_out)=9, \old(processed)=16, \old(r_i)=26, \old(r_st)=7, \old(t_b)=12, \old(wb_i)=5, \old(wb_pc)=19, \old(wb_st)=3, \old(wl_i)=27, \old(wl_pc)=22, \old(wl_st)=6, c=0, c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L691] int __retres1 ; [L695] e_wl = 2 [L696] e_c = e_wl [L697] e_g = e_c [L698] e_f = e_g [L699] e_e = e_f [L700] wl_pc = 0 [L701] c1_pc = 0 [L702] c2_pc = 0 [L703] wb_pc = 0 [L704] wb_i = 1 [L705] c2_i = wb_i [L706] c1_i = c2_i [L707] wl_i = c1_i [L708] r_i = 0 [L709] c_req_up = 0 [L710] d = 0 [L711] c = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=0, \old(e_e)=0, \old(e_f)=0, \old(e_g)=0, \old(e_wl)=0, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L712] CALL start_simulation() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L402] int kernel_st ; [L405] kernel_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L406] COND FALSE !((int )c_req_up == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L417] COND TRUE (int )wl_i == 1 [L418] wl_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L422] COND TRUE (int )c1_i == 1 [L423] c1_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L427] COND TRUE (int )c2_i == 1 [L428] c2_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L432] COND TRUE (int )wb_i == 1 [L433] wb_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L437] COND FALSE !((int )r_i == 1) [L440] r_st = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L442] COND FALSE !((int )e_f == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L447] COND FALSE !((int )e_g == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L452] COND FALSE !((int )e_e == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L457] COND FALSE !((int )e_c == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L462] COND FALSE !((int )e_wl == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L467] COND FALSE !((int )wl_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L475] COND FALSE !((int )wl_pc == 2) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L485] COND FALSE !((int )c1_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L494] COND FALSE !((int )c2_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L503] COND FALSE !((int )wb_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L512] COND FALSE !((int )e_c == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L517] COND FALSE !((int )e_e == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L522] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L527] COND FALSE !((int )e_g == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L532] COND FALSE !((int )e_c == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L537] COND FALSE !((int )e_wl == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L543] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L546] kernel_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L547] CALL eval() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L326] CALL write_loop() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=1, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L53] int t ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=1, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L56] COND TRUE (int )wl_pc == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=1, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L70] wl_st = 2 [L71] wl_pc = 1 [L72] e_wl = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=1, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L326] RET write_loop() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L334] COND TRUE (int )c1_st == 0 [L336] tmp___0 = __VERIFIER_nondet_int() [L338] COND TRUE \read(tmp___0) [L340] c1_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L341] CALL compute1() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L139] COND TRUE (int )c1_pc == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L150] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L152] c1_st = 2 [L153] c1_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L341] RET compute1() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L349] COND TRUE (int )c2_st == 0 [L351] tmp___1 = __VERIFIER_nondet_int() [L353] COND TRUE \read(tmp___1) [L355] c2_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L356] CALL compute2() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L184] COND TRUE (int )c2_pc == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L195] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L197] c2_st = 2 [L198] c2_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L356] RET compute2() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L364] COND TRUE (int )wb_st == 0 [L366] tmp___2 = __VERIFIER_nondet_int() [L368] COND TRUE \read(tmp___2) [L370] wb_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L371] CALL write_back() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L229] COND TRUE (int )wb_pc == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L240] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L242] wb_st = 2 [L243] wb_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L371] RET write_back() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L379] COND FALSE !((int )r_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L310] COND FALSE !((int )r_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L547] RET eval() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L549] kernel_st = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L550] COND FALSE !((int )c_req_up == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L561] kernel_st = 3 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L562] COND FALSE !((int )e_f == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L567] COND FALSE !((int )e_g == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L572] COND FALSE !((int )e_e == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L577] COND FALSE !((int )e_c == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L582] COND TRUE (int )e_wl == 0 [L583] e_wl = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L587] COND TRUE (int )wl_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L588] COND TRUE (int )e_wl == 1 [L589] wl_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L605] COND TRUE (int )c1_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L606] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L614] COND TRUE (int )c2_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L615] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L623] COND TRUE (int )wb_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L624] COND FALSE !((int )e_g == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L632] COND FALSE !((int )e_c == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L637] COND FALSE !((int )e_e == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L642] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L647] COND FALSE !((int )e_g == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L652] COND FALSE !((int )e_c == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L657] COND TRUE (int )e_wl == 1 [L658] e_wl = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L662] COND TRUE (int )wl_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L543] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L546] kernel_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L547] CALL eval() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L326] CALL write_loop() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L53] int t ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L59] COND FALSE !((int )wl_pc == 2) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L62] COND TRUE (int )wl_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L77] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L79] t = d [L80] data = d [L81] processed = 0 [L82] e_f = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L83] COND TRUE (int )c1_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L84] COND TRUE (int )e_f == 1 [L85] c1_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L92] COND TRUE (int )c2_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )e_f == 1 [L94] c2_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L101] e_f = 2 [L102] wl_st = 2 [L103] wl_pc = 2 [L104] t_b = t VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=1, c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L326] RET write_loop() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L334] COND TRUE (int )c1_st == 0 [L336] tmp___0 = __VERIFIER_nondet_int() [L338] COND TRUE \read(tmp___0) [L340] c1_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L341] CALL compute1() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L139] COND FALSE !((int )c1_pc == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L142] COND TRUE (int )c1_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L157] COND TRUE ! processed [L158] data += 1 [L159] e_g = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L160] COND TRUE (int )wb_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L161] COND TRUE (int )e_g == 1 [L162] wb_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L169] e_g = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L150] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L152] c1_st = 2 [L153] c1_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=1, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L341] RET compute1() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L349] COND TRUE (int )c2_st == 0 [L351] tmp___1 = __VERIFIER_nondet_int() [L353] COND TRUE \read(tmp___1) [L355] c2_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L356] CALL compute2() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L184] COND FALSE !((int )c2_pc == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L187] COND TRUE (int )c2_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L202] COND TRUE ! processed [L203] data += 1 [L204] e_g = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L205] COND TRUE (int )wb_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L206] COND TRUE (int )e_g == 1 [L207] wb_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L214] e_g = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L195] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L197] c2_st = 2 [L198] c2_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=1, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=1, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L356] RET compute2() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L364] COND TRUE (int )wb_st == 0 [L366] tmp___2 = __VERIFIER_nondet_int() [L368] COND TRUE \read(tmp___2) [L370] wb_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L371] CALL write_back() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L229] COND FALSE !((int )wb_pc == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L232] COND TRUE (int )wb_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L247] c_t = data [L248] c_req_up = 1 [L249] processed = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L240] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L242] wb_st = 2 [L243] wb_pc = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=1, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L371] RET write_back() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L379] COND FALSE !((int )r_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L310] COND FALSE !((int )r_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=2, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=1, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L547] RET eval() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=1, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] kernel_st = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L550] COND TRUE (int )c_req_up == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L551] COND TRUE c != c_t [L552] c = c_t [L553] e_c = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L557] c_req_up = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L561] kernel_st = 3 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L562] COND FALSE !((int )e_f == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L567] COND FALSE !((int )e_g == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L572] COND FALSE !((int )e_e == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L577] COND TRUE (int )e_c == 0 [L578] e_c = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L582] COND FALSE !((int )e_wl == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L587] COND FALSE !((int )wl_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L595] COND TRUE (int )wl_pc == 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L596] COND FALSE !((int )e_e == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L605] COND TRUE (int )c1_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L606] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L614] COND TRUE (int )c2_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L615] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L623] COND TRUE (int )wb_pc == 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L624] COND FALSE !((int )e_g == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L632] COND TRUE (int )e_c == 1 [L633] r_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L637] COND FALSE !((int )e_e == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L642] COND FALSE !((int )e_f == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L647] COND FALSE !((int )e_g == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L652] COND TRUE (int )e_c == 1 [L653] e_c = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L657] COND FALSE !((int )e_wl == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L662] COND FALSE !((int )wl_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L665] COND FALSE !((int )c1_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L668] COND FALSE !((int )c2_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L671] COND FALSE !((int )wb_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L674] COND TRUE (int )r_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L543] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=3, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L546] kernel_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=0, \old(c1_st)=0, \old(c2_i)=0, \old(c2_pc)=0, \old(c2_st)=0, \old(c_req_up)=0, \old(c_t)=0, \old(d)=0, \old(data)=0, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=0, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=0, \old(wb_st)=0, \old(wl_i)=0, \old(wl_pc)=0, \old(wl_st)=0, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, kernel_st=1, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L547] CALL eval() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L310] COND TRUE (int )r_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L319] COND FALSE !((int )wl_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L334] COND FALSE !((int )c1_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L349] COND FALSE !((int )c2_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L364] COND FALSE !((int )wb_st == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L379] COND TRUE (int )r_st == 0 [L381] tmp___3 = __VERIFIER_nondet_int() [L383] COND TRUE \read(tmp___3) [L385] r_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, tmp___3=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L386] CALL read() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L261] d = c [L262] e_e = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L263] COND FALSE !((int )wl_pc == 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L271] COND TRUE (int )wl_pc == 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L272] COND TRUE (int )e_e == 1 [L273] wl_st = 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L281] e_e = 2 [L282] r_st = 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=1, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L386] RET read() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp___3=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L296] COND TRUE 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp___3=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp___3=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=2, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, tmp=1, tmp___3=1, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L326] CALL write_loop() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L53] int t ; VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L59] COND TRUE (int )wl_pc == 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L108] t = t_b VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L109] COND FALSE !(d == t + 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L112] COND TRUE d == t + 2 VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L120] COND FALSE !(d == t + 1) VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L124] CALL error() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L13] __VERIFIER_error() VAL [\old(c)=0, \old(c1_i)=0, \old(c1_pc)=1, \old(c1_st)=2, \old(c2_i)=0, \old(c2_pc)=1, \old(c2_st)=2, \old(c_req_up)=0, \old(c_t)=2, \old(d)=0, \old(data)=2, \old(e_c)=2, \old(e_e)=2, \old(e_f)=2, \old(e_g)=2, \old(e_wl)=2, \old(processed)=1, \old(r_i)=0, \old(r_st)=0, \old(t_b)=0, \old(wb_i)=0, \old(wb_pc)=1, \old(wb_st)=2, \old(wl_i)=0, \old(wl_pc)=2, \old(wl_st)=1, c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 161 locations, 1 error locations. UNSAFE Result, 694.2s OverallTime, 59 OverallIterations, 7 TraceHistogramMax, 560.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 20884 SDtfs, 142587 SDslu, 163459 SDs, 0 SdLazy, 163364 SolverSat, 31353 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 87.1s Time, PredicateUnifierStatistics: 54 DeclaredPredicates, 9207 GetRequests, 5047 SyntacticMatches, 27 SemanticMatches, 4133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 272566 ImplicationChecksByTransitivity, 64.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=70311occurred in iteration=45, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 11.8s AbstIntTime, 32 AbstIntIterations, 27 AbstIntStrong, 0.9915544081716086 AbsIntWeakeningRatio, 0.7465818010372466 AbsIntAvgWeakeningVarsNumRemoved, 27.18976897689769 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 99.4s AutomataMinimizationTime, 58 MinimizatonAttempts, 176631 StatesRemovedByMinimization, 55 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 9077 NumberOfCodeBlocks, 9077 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 9746 ConstructedInterpolants, 0 QuantifiedInterpolants, 3142679 SizeOfPredicates, 16 NumberOfNonLiveVariables, 5991 ConjunctsInSsa, 52 ConjunctsInUnsatCore, 68 InterpolantComputations, 31 PerfectInterpolantSequences, 3638/4020 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...