./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4867b1d8e60a05de2199d52aa990071fe8bd647c ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 21:25:44,465 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 21:25:44,466 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 21:25:44,472 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 21:25:44,473 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 21:25:44,473 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 21:25:44,474 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 21:25:44,475 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 21:25:44,476 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 21:25:44,476 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 21:25:44,477 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 21:25:44,477 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 21:25:44,477 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 21:25:44,478 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 21:25:44,479 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 21:25:44,479 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 21:25:44,480 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 21:25:44,481 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 21:25:44,482 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 21:25:44,482 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 21:25:44,483 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 21:25:44,484 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 21:25:44,485 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 21:25:44,485 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 21:25:44,485 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 21:25:44,486 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 21:25:44,486 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 21:25:44,487 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 21:25:44,487 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 21:25:44,488 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 21:25:44,488 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 21:25:44,488 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 21:25:44,488 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 21:25:44,488 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 21:25:44,489 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 21:25:44,489 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 21:25:44,490 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-08 21:25:44,498 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 21:25:44,498 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 21:25:44,498 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 21:25:44,498 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 21:25:44,499 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 21:25:44,499 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 21:25:44,499 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 21:25:44,499 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-08 21:25:44,499 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 21:25:44,499 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 21:25:44,500 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-08 21:25:44,500 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-08 21:25:44,500 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 21:25:44,500 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 21:25:44,501 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 21:25:44,501 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 21:25:44,502 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 21:25:44,502 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 21:25:44,503 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 21:25:44,503 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-08 21:25:44,521 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 21:25:44,528 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 21:25:44,530 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 21:25:44,531 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 21:25:44,531 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 21:25:44,531 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:25:44,567 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/c014f8dec/601b0aefd6cb414596e23f7e4ecbcac3/FLAG2f69e3010 [2018-12-08 21:25:45,029 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 21:25:45,030 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:25:45,037 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/c014f8dec/601b0aefd6cb414596e23f7e4ecbcac3/FLAG2f69e3010 [2018-12-08 21:25:45,045 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/c014f8dec/601b0aefd6cb414596e23f7e4ecbcac3 [2018-12-08 21:25:45,047 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 21:25:45,048 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 21:25:45,049 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 21:25:45,049 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 21:25:45,051 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 21:25:45,051 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,052 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@142c46d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45, skipping insertion in model container [2018-12-08 21:25:45,053 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,057 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 21:25:45,077 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 21:25:45,296 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 21:25:45,305 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 21:25:45,344 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 21:25:45,392 INFO L195 MainTranslator]: Completed translation [2018-12-08 21:25:45,393 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45 WrapperNode [2018-12-08 21:25:45,393 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 21:25:45,393 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 21:25:45,393 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 21:25:45,393 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 21:25:45,399 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,410 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,415 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 21:25:45,415 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 21:25:45,416 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 21:25:45,416 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 21:25:45,422 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,422 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,424 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,425 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,432 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,435 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,436 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... [2018-12-08 21:25:45,438 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 21:25:45,439 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 21:25:45,439 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 21:25:45,439 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 21:25:45,440 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 21:25:45,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 21:25:45,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 21:25:45,472 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 21:25:45,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 21:25:45,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 21:25:45,472 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 21:25:45,473 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 21:25:45,473 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 21:25:45,474 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 21:25:45,474 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 21:25:45,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 21:25:45,475 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 21:25:45,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 21:25:45,475 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 21:25:45,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 21:25:45,475 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 21:25:45,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 21:25:45,637 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 21:25:45,709 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 21:25:45,710 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 21:25:45,710 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 09:25:45 BoogieIcfgContainer [2018-12-08 21:25:45,710 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 21:25:45,710 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 21:25:45,710 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 21:25:45,713 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 21:25:45,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 09:25:45" (1/3) ... [2018-12-08 21:25:45,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45624553 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 09:25:45, skipping insertion in model container [2018-12-08 21:25:45,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:25:45" (2/3) ... [2018-12-08 21:25:45,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45624553 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 09:25:45, skipping insertion in model container [2018-12-08 21:25:45,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 09:25:45" (3/3) ... [2018-12-08 21:25:45,715 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:25:45,720 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 21:25:45,725 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-08 21:25:45,735 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-08 21:25:45,750 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 21:25:45,750 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 21:25:45,750 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 21:25:45,750 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 21:25:45,750 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 21:25:45,750 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 21:25:45,750 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 21:25:45,750 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 21:25:45,761 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-12-08 21:25:45,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:25:45,766 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:45,767 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:45,768 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:45,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:45,771 INFO L82 PathProgramCache]: Analyzing trace with hash -210168619, now seen corresponding path program 1 times [2018-12-08 21:25:45,773 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:45,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:45,804 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:45,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:45,804 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:45,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:45,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:45,894 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:45,894 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 21:25:45,894 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:45,897 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:25:45,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:25:45,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:45,906 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-12-08 21:25:46,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,011 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-08 21:25:46,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:25:46,012 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 21:25:46,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,021 INFO L225 Difference]: With dead ends: 153 [2018-12-08 21:25:46,021 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 21:25:46,022 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 21:25:46,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-12-08 21:25:46,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 21:25:46,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 155 transitions. [2018-12-08 21:25:46,050 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 155 transitions. Word has length 17 [2018-12-08 21:25:46,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,050 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 155 transitions. [2018-12-08 21:25:46,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:25:46,050 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 155 transitions. [2018-12-08 21:25:46,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:25:46,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,051 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,051 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,051 INFO L82 PathProgramCache]: Analyzing trace with hash -210168618, now seen corresponding path program 1 times [2018-12-08 21:25:46,051 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,053 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:25:46,111 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 21:25:46,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 21:25:46,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 21:25:46,112 INFO L87 Difference]: Start difference. First operand 144 states and 155 transitions. Second operand 6 states. [2018-12-08 21:25:46,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,201 INFO L93 Difference]: Finished difference Result 149 states and 160 transitions. [2018-12-08 21:25:46,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 21:25:46,201 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 21:25:46,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,203 INFO L225 Difference]: With dead ends: 149 [2018-12-08 21:25:46,203 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 21:25:46,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:25:46,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 21:25:46,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 144. [2018-12-08 21:25:46,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 21:25:46,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 154 transitions. [2018-12-08 21:25:46,211 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 154 transitions. Word has length 17 [2018-12-08 21:25:46,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,212 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 154 transitions. [2018-12-08 21:25:46,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 21:25:46,212 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 154 transitions. [2018-12-08 21:25:46,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:25:46,212 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,212 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,212 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,213 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,213 INFO L82 PathProgramCache]: Analyzing trace with hash -181539468, now seen corresponding path program 1 times [2018-12-08 21:25:46,213 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,214 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,250 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:25:46,251 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,251 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:25:46,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:25:46,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,251 INFO L87 Difference]: Start difference. First operand 144 states and 154 transitions. Second operand 5 states. [2018-12-08 21:25:46,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,263 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-12-08 21:25:46,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:25:46,263 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 21:25:46,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,264 INFO L225 Difference]: With dead ends: 143 [2018-12-08 21:25:46,264 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 21:25:46,264 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 21:25:46,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-08 21:25:46,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-08 21:25:46,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-12-08 21:25:46,272 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 17 [2018-12-08 21:25:46,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,273 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-12-08 21:25:46,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:25:46,273 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-12-08 21:25:46,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 21:25:46,274 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,274 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,274 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1863702628, now seen corresponding path program 1 times [2018-12-08 21:25:46,275 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,276 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,314 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:25:46,315 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,315 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:25:46,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:25:46,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,315 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 5 states. [2018-12-08 21:25:46,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,337 INFO L93 Difference]: Finished difference Result 143 states and 150 transitions. [2018-12-08 21:25:46,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:25:46,337 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-08 21:25:46,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,338 INFO L225 Difference]: With dead ends: 143 [2018-12-08 21:25:46,338 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 21:25:46,339 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 21:25:46,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-12-08 21:25:46,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-08 21:25:46,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 148 transitions. [2018-12-08 21:25:46,346 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 148 transitions. Word has length 27 [2018-12-08 21:25:46,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,346 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 148 transitions. [2018-12-08 21:25:46,346 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:25:46,346 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 148 transitions. [2018-12-08 21:25:46,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 21:25:46,347 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,347 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,348 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,348 INFO L82 PathProgramCache]: Analyzing trace with hash 1920730491, now seen corresponding path program 1 times [2018-12-08 21:25:46,348 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,349 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,349 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:25:46,423 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:25:46,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:25:46,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:25:46,424 INFO L87 Difference]: Start difference. First operand 141 states and 148 transitions. Second operand 7 states. [2018-12-08 21:25:46,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,457 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-12-08 21:25:46,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 21:25:46,457 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-08 21:25:46,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,458 INFO L225 Difference]: With dead ends: 157 [2018-12-08 21:25:46,458 INFO L226 Difference]: Without dead ends: 157 [2018-12-08 21:25:46,458 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:25:46,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-08 21:25:46,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-12-08 21:25:46,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 21:25:46,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 21:25:46,464 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 27 [2018-12-08 21:25:46,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,464 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 21:25:46,464 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:25:46,464 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 21:25:46,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 21:25:46,465 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,465 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,465 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,465 INFO L82 PathProgramCache]: Analyzing trace with hash 1565090870, now seen corresponding path program 1 times [2018-12-08 21:25:46,465 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,466 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,466 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:25:46,544 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 21:25:46,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 21:25:46,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 21:25:46,545 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 11 states. [2018-12-08 21:25:46,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,746 INFO L93 Difference]: Finished difference Result 149 states and 156 transitions. [2018-12-08 21:25:46,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 21:25:46,747 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-08 21:25:46,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,747 INFO L225 Difference]: With dead ends: 149 [2018-12-08 21:25:46,748 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 21:25:46,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 21:25:46,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 21:25:46,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-08 21:25:46,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-08 21:25:46,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-08 21:25:46,752 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 32 [2018-12-08 21:25:46,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,752 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-08 21:25:46,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 21:25:46,752 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-08 21:25:46,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 21:25:46,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,753 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,753 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1565090871, now seen corresponding path program 1 times [2018-12-08 21:25:46,753 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,754 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:46,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 21:25:46,773 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:46,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 21:25:46,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 21:25:46,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 21:25:46,774 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-08 21:25:46,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:46,783 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-08 21:25:46,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 21:25:46,783 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 21:25:46,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:46,784 INFO L225 Difference]: With dead ends: 152 [2018-12-08 21:25:46,784 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 21:25:46,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:25:46,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 21:25:46,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 21:25:46,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 21:25:46,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 21:25:46,788 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-08 21:25:46,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:46,788 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 21:25:46,788 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 21:25:46,788 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 21:25:46,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 21:25:46,788 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:46,789 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:46,789 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:46,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,789 INFO L82 PathProgramCache]: Analyzing trace with hash -606653436, now seen corresponding path program 1 times [2018-12-08 21:25:46,789 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:46,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:46,790 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:46,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,811 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:46,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:46,811 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:46,812 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-12-08 21:25:46,813 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [70], [72], [73], [77], [79], [80], [132], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [193], [194], [195] [2018-12-08 21:25:46,840 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:46,840 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:46,960 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:46,961 INFO L272 AbstractInterpreter]: Visited 33 different actions 41 times. Merged at 3 different actions 5 times. Never widened. Performed 352 root evaluator evaluations with a maximum evaluation depth of 4. Performed 352 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-08 21:25:46,966 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:46,967 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:46,967 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:46,967 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:46,973 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:46,973 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:46,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:46,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:47,028 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:47,028 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:47,076 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:47,090 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:47,090 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-08 21:25:47,090 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:47,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 21:25:47,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 21:25:47,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-08 21:25:47,091 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 6 states. [2018-12-08 21:25:47,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:47,110 INFO L93 Difference]: Finished difference Result 153 states and 160 transitions. [2018-12-08 21:25:47,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:25:47,110 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-08 21:25:47,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:47,112 INFO L225 Difference]: With dead ends: 153 [2018-12-08 21:25:47,112 INFO L226 Difference]: Without dead ends: 151 [2018-12-08 21:25:47,112 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-12-08 21:25:47,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-08 21:25:47,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-08 21:25:47,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 21:25:47,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 158 transitions. [2018-12-08 21:25:47,118 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 158 transitions. Word has length 33 [2018-12-08 21:25:47,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:47,118 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 158 transitions. [2018-12-08 21:25:47,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 21:25:47,119 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 158 transitions. [2018-12-08 21:25:47,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 21:25:47,120 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:47,120 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:47,120 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:47,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:47,120 INFO L82 PathProgramCache]: Analyzing trace with hash 788749783, now seen corresponding path program 2 times [2018-12-08 21:25:47,121 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:47,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:47,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,122 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:47,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:47,172 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:47,172 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:47,172 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:47,172 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:47,173 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:47,173 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:47,173 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:47,180 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:47,180 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:47,201 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:47,202 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:47,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:47,225 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:25:47,226 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:47,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:47,232 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 21:25:47,362 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 21:25:47,362 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:47,517 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 21:25:47,531 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:25:47,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [6] total 27 [2018-12-08 21:25:47,532 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:47,532 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 21:25:47,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 21:25:47,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=630, Unknown=0, NotChecked=0, Total=702 [2018-12-08 21:25:47,533 INFO L87 Difference]: Start difference. First operand 151 states and 158 transitions. Second operand 13 states. [2018-12-08 21:25:47,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:47,896 INFO L93 Difference]: Finished difference Result 210 states and 219 transitions. [2018-12-08 21:25:47,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 21:25:47,896 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-12-08 21:25:47,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:47,897 INFO L225 Difference]: With dead ends: 210 [2018-12-08 21:25:47,897 INFO L226 Difference]: Without dead ends: 210 [2018-12-08 21:25:47,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 46 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=99, Invalid=831, Unknown=0, NotChecked=0, Total=930 [2018-12-08 21:25:47,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-12-08 21:25:47,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 150. [2018-12-08 21:25:47,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 21:25:47,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 21:25:47,902 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 34 [2018-12-08 21:25:47,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:47,902 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 21:25:47,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 21:25:47,903 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 21:25:47,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 21:25:47,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:47,903 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:47,904 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:47,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:47,904 INFO L82 PathProgramCache]: Analyzing trace with hash 507350654, now seen corresponding path program 1 times [2018-12-08 21:25:47,904 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:47,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,905 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 21:25:47,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,906 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:47,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:47,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:47,951 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:47,951 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:25:47,951 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:47,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:25:47,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:25:47,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:25:47,952 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 7 states. [2018-12-08 21:25:47,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:47,973 INFO L93 Difference]: Finished difference Result 160 states and 167 transitions. [2018-12-08 21:25:47,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 21:25:47,973 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-08 21:25:47,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:47,974 INFO L225 Difference]: With dead ends: 160 [2018-12-08 21:25:47,974 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 21:25:47,974 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:25:47,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 21:25:47,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 156. [2018-12-08 21:25:47,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-12-08 21:25:47,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 163 transitions. [2018-12-08 21:25:47,978 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 163 transitions. Word has length 36 [2018-12-08 21:25:47,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:47,979 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 163 transitions. [2018-12-08 21:25:47,979 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:25:47,979 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 163 transitions. [2018-12-08 21:25:47,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 21:25:47,979 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:47,979 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:47,980 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:47,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:47,980 INFO L82 PathProgramCache]: Analyzing trace with hash -213733230, now seen corresponding path program 1 times [2018-12-08 21:25:47,980 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:47,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:47,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:47,981 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:47,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:47,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:47,997 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:47,997 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 21:25:47,997 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:47,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 21:25:47,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 21:25:47,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 21:25:47,998 INFO L87 Difference]: Start difference. First operand 156 states and 163 transitions. Second operand 3 states. [2018-12-08 21:25:48,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:48,059 INFO L93 Difference]: Finished difference Result 167 states and 173 transitions. [2018-12-08 21:25:48,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 21:25:48,059 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-08 21:25:48,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:48,060 INFO L225 Difference]: With dead ends: 167 [2018-12-08 21:25:48,060 INFO L226 Difference]: Without dead ends: 145 [2018-12-08 21:25:48,060 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 21:25:48,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-12-08 21:25:48,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 137. [2018-12-08 21:25:48,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-08 21:25:48,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-12-08 21:25:48,063 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 34 [2018-12-08 21:25:48,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:48,063 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-12-08 21:25:48,063 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 21:25:48,063 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-12-08 21:25:48,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-08 21:25:48,064 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:48,064 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:48,064 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:48,065 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:48,065 INFO L82 PathProgramCache]: Analyzing trace with hash -582742571, now seen corresponding path program 1 times [2018-12-08 21:25:48,065 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:48,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:48,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,066 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:48,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:48,129 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 21:25:48,130 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:48,130 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:25:48,130 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:48,130 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 21:25:48,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 21:25:48,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 21:25:48,131 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 11 states. [2018-12-08 21:25:48,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:48,286 INFO L93 Difference]: Finished difference Result 135 states and 141 transitions. [2018-12-08 21:25:48,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 21:25:48,286 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 39 [2018-12-08 21:25:48,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:48,287 INFO L225 Difference]: With dead ends: 135 [2018-12-08 21:25:48,287 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 21:25:48,288 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 21:25:48,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 21:25:48,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-08 21:25:48,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-08 21:25:48,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-12-08 21:25:48,290 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 39 [2018-12-08 21:25:48,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:48,291 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-12-08 21:25:48,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 21:25:48,291 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-12-08 21:25:48,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-08 21:25:48,291 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:48,291 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:48,292 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:48,292 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:48,292 INFO L82 PathProgramCache]: Analyzing trace with hash -582742570, now seen corresponding path program 1 times [2018-12-08 21:25:48,292 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:48,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:48,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,293 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:48,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:48,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:48,320 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:48,320 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:48,320 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-12-08 21:25:48,320 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [68], [71], [72], [73], [77], [79], [80], [124], [127], [132], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [180], [181], [193], [194], [195] [2018-12-08 21:25:48,321 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:48,322 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:48,368 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:48,368 INFO L272 AbstractInterpreter]: Visited 38 different actions 50 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 422 root evaluator evaluations with a maximum evaluation depth of 4. Performed 422 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-08 21:25:48,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:48,370 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:48,370 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:48,370 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:48,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:48,379 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:48,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:48,399 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:48,408 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:48,408 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:48,461 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:48,485 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:48,485 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-08 21:25:48,485 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:48,485 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:25:48,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:25:48,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-12-08 21:25:48,486 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 7 states. [2018-12-08 21:25:48,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:48,501 INFO L93 Difference]: Finished difference Result 138 states and 144 transitions. [2018-12-08 21:25:48,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 21:25:48,502 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2018-12-08 21:25:48,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:48,503 INFO L225 Difference]: With dead ends: 138 [2018-12-08 21:25:48,503 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 21:25:48,503 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-12-08 21:25:48,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 21:25:48,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 21:25:48,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 21:25:48,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-12-08 21:25:48,507 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 39 [2018-12-08 21:25:48,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:48,507 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-12-08 21:25:48,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:25:48,507 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-12-08 21:25:48,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 21:25:48,508 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:48,508 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:48,508 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:48,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:48,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1733276311, now seen corresponding path program 2 times [2018-12-08 21:25:48,509 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:48,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:48,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:48,510 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:48,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:48,573 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:48,573 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:48,574 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:48,574 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:48,574 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:48,574 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:48,574 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:48,581 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:48,581 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:48,599 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:48,599 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:48,601 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:48,609 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:25:48,609 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:48,613 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:48,614 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 21:25:48,762 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 21:25:48,762 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:48,927 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 21:25:48,941 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:25:48,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [7] total 28 [2018-12-08 21:25:48,942 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:48,942 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 21:25:48,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 21:25:48,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=679, Unknown=0, NotChecked=0, Total=756 [2018-12-08 21:25:48,942 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 13 states. [2018-12-08 21:25:49,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:49,241 INFO L93 Difference]: Finished difference Result 134 states and 140 transitions. [2018-12-08 21:25:49,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 21:25:49,241 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-12-08 21:25:49,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:49,242 INFO L225 Difference]: With dead ends: 134 [2018-12-08 21:25:49,242 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 21:25:49,242 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 56 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=888, Unknown=0, NotChecked=0, Total=992 [2018-12-08 21:25:49,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 21:25:49,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 21:25:49,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 21:25:49,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-12-08 21:25:49,244 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 40 [2018-12-08 21:25:49,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:49,244 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-12-08 21:25:49,245 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 21:25:49,245 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-12-08 21:25:49,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-08 21:25:49,245 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:49,245 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:49,245 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:49,246 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,246 INFO L82 PathProgramCache]: Analyzing trace with hash -682027113, now seen corresponding path program 1 times [2018-12-08 21:25:49,246 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:49,246 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,247 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 21:25:49,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,247 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:49,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:49,286 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 21:25:49,286 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:49,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:25:49,286 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:49,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:25:49,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:25:49,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:25:49,287 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 7 states. [2018-12-08 21:25:49,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:49,320 INFO L93 Difference]: Finished difference Result 136 states and 141 transitions. [2018-12-08 21:25:49,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 21:25:49,320 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 43 [2018-12-08 21:25:49,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:49,321 INFO L225 Difference]: With dead ends: 136 [2018-12-08 21:25:49,321 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 21:25:49,321 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:25:49,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 21:25:49,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 21:25:49,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 21:25:49,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 139 transitions. [2018-12-08 21:25:49,324 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 139 transitions. Word has length 43 [2018-12-08 21:25:49,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:49,324 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 139 transitions. [2018-12-08 21:25:49,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:25:49,324 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 139 transitions. [2018-12-08 21:25:49,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-08 21:25:49,324 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:49,325 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:49,325 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:49,325 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,325 INFO L82 PathProgramCache]: Analyzing trace with hash 2138129783, now seen corresponding path program 1 times [2018-12-08 21:25:49,325 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:49,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:49,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,326 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:49,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:49,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 21:25:49,365 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:49,365 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 21:25:49,365 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:49,365 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 21:25:49,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 21:25:49,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 21:25:49,366 INFO L87 Difference]: Start difference. First operand 134 states and 139 transitions. Second operand 9 states. [2018-12-08 21:25:49,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:49,399 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-12-08 21:25:49,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 21:25:49,399 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-12-08 21:25:49,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:49,400 INFO L225 Difference]: With dead ends: 138 [2018-12-08 21:25:49,400 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 21:25:49,400 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 21:25:49,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 21:25:49,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 21:25:49,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 21:25:49,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-12-08 21:25:49,404 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 48 [2018-12-08 21:25:49,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:49,404 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-12-08 21:25:49,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 21:25:49,404 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-12-08 21:25:49,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-08 21:25:49,404 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:49,405 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:49,405 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:49,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,405 INFO L82 PathProgramCache]: Analyzing trace with hash -498769646, now seen corresponding path program 1 times [2018-12-08 21:25:49,405 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:49,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:49,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,406 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:49,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:49,494 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 21:25:49,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:49,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 21:25:49,495 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:49,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 21:25:49,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 21:25:49,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-12-08 21:25:49,495 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 14 states. [2018-12-08 21:25:49,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:49,727 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2018-12-08 21:25:49,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 21:25:49,727 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 59 [2018-12-08 21:25:49,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:49,728 INFO L225 Difference]: With dead ends: 132 [2018-12-08 21:25:49,728 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 21:25:49,728 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2018-12-08 21:25:49,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 21:25:49,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-08 21:25:49,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 21:25:49,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-08 21:25:49,730 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 59 [2018-12-08 21:25:49,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:49,731 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-08 21:25:49,731 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 21:25:49,731 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-08 21:25:49,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-08 21:25:49,731 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:49,732 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:49,732 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:49,732 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,732 INFO L82 PathProgramCache]: Analyzing trace with hash -498769645, now seen corresponding path program 1 times [2018-12-08 21:25:49,732 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:49,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,733 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:49,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,733 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:49,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:49,759 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:49,759 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:49,759 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:49,759 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 60 with the following transitions: [2018-12-08 21:25:49,760 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [27], [31], [36], [38], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [91], [94], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [157], [158], [159], [160], [161], [162], [163], [167], [169], [170], [173], [174], [175], [179], [180], [181], [182], [189], [193], [194], [195] [2018-12-08 21:25:49,761 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:49,762 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:49,826 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:49,826 INFO L272 AbstractInterpreter]: Visited 57 different actions 69 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 545 root evaluator evaluations with a maximum evaluation depth of 4. Performed 545 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 26 variables. [2018-12-08 21:25:49,827 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,827 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:49,827 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:49,827 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:49,834 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:49,834 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:49,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:49,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:49,873 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:49,873 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:49,965 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:49,980 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:49,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-08 21:25:49,980 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:49,980 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 21:25:49,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 21:25:49,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-12-08 21:25:49,981 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 8 states. [2018-12-08 21:25:49,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:49,993 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2018-12-08 21:25:49,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 21:25:49,994 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 59 [2018-12-08 21:25:49,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:49,994 INFO L225 Difference]: With dead ends: 135 [2018-12-08 21:25:49,994 INFO L226 Difference]: Without dead ends: 133 [2018-12-08 21:25:49,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-12-08 21:25:49,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-08 21:25:49,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-12-08 21:25:49,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-08 21:25:49,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2018-12-08 21:25:49,996 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 59 [2018-12-08 21:25:49,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:49,996 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2018-12-08 21:25:49,996 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 21:25:49,996 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2018-12-08 21:25:49,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-12-08 21:25:49,997 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:49,997 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:49,997 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:49,997 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:49,997 INFO L82 PathProgramCache]: Analyzing trace with hash -1880024794, now seen corresponding path program 2 times [2018-12-08 21:25:49,997 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:49,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:49,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:49,998 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:50,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:50,030 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:50,030 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:50,031 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:50,031 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:50,031 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:50,031 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:50,031 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:50,037 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:50,038 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:50,064 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:50,064 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:50,068 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:50,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:25:50,076 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:50,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:50,080 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 21:25:50,276 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 21:25:50,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:50,591 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 21:25:50,605 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:25:50,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 14] imperfect sequences [8] total 35 [2018-12-08 21:25:50,606 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:50,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 21:25:50,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 21:25:50,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=1089, Unknown=0, NotChecked=0, Total=1190 [2018-12-08 21:25:50,606 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 16 states. [2018-12-08 21:25:51,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:51,097 INFO L93 Difference]: Finished difference Result 131 states and 135 transitions. [2018-12-08 21:25:51,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 21:25:51,097 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2018-12-08 21:25:51,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:51,099 INFO L225 Difference]: With dead ends: 131 [2018-12-08 21:25:51,099 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 21:25:51,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 90 SyntacticMatches, 4 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=135, Invalid=1425, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 21:25:51,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 21:25:51,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-08 21:25:51,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 21:25:51,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 135 transitions. [2018-12-08 21:25:51,105 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 135 transitions. Word has length 60 [2018-12-08 21:25:51,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:51,105 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 135 transitions. [2018-12-08 21:25:51,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 21:25:51,105 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 135 transitions. [2018-12-08 21:25:51,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-12-08 21:25:51,106 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:51,107 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:51,107 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:51,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:51,108 INFO L82 PathProgramCache]: Analyzing trace with hash 9632276, now seen corresponding path program 1 times [2018-12-08 21:25:51,108 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:51,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,109 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 21:25:51,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,110 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:51,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:51,159 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 21:25:51,160 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:51,160 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:25:51,160 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:51,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 21:25:51,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 21:25:51,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 21:25:51,160 INFO L87 Difference]: Start difference. First operand 131 states and 135 transitions. Second operand 10 states. [2018-12-08 21:25:51,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:51,196 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-12-08 21:25:51,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 21:25:51,196 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 69 [2018-12-08 21:25:51,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:51,197 INFO L225 Difference]: With dead ends: 134 [2018-12-08 21:25:51,197 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 21:25:51,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 21:25:51,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 21:25:51,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-08 21:25:51,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 21:25:51,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 134 transitions. [2018-12-08 21:25:51,199 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 134 transitions. Word has length 69 [2018-12-08 21:25:51,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:51,199 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 134 transitions. [2018-12-08 21:25:51,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 21:25:51,199 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 134 transitions. [2018-12-08 21:25:51,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-08 21:25:51,199 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:51,199 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:51,200 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:51,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:51,200 INFO L82 PathProgramCache]: Analyzing trace with hash -255714010, now seen corresponding path program 1 times [2018-12-08 21:25:51,200 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:51,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,200 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:51,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,201 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:51,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:51,310 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 21:25:51,310 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:51,310 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-08 21:25:51,310 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:51,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 21:25:51,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 21:25:51,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-08 21:25:51,311 INFO L87 Difference]: Start difference. First operand 131 states and 134 transitions. Second operand 16 states. [2018-12-08 21:25:51,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:51,558 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-08 21:25:51,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 21:25:51,558 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 82 [2018-12-08 21:25:51,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:51,559 INFO L225 Difference]: With dead ends: 138 [2018-12-08 21:25:51,559 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 21:25:51,559 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-08 21:25:51,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 21:25:51,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 129. [2018-12-08 21:25:51,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-08 21:25:51,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2018-12-08 21:25:51,562 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 132 transitions. Word has length 82 [2018-12-08 21:25:51,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:51,563 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 132 transitions. [2018-12-08 21:25:51,563 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 21:25:51,563 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 132 transitions. [2018-12-08 21:25:51,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-08 21:25:51,563 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:51,564 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:51,564 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:51,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:51,564 INFO L82 PathProgramCache]: Analyzing trace with hash -255714009, now seen corresponding path program 1 times [2018-12-08 21:25:51,564 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:51,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:51,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,565 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:51,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:51,612 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:51,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:51,612 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:51,612 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 83 with the following transitions: [2018-12-08 21:25:51,613 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [42], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [91], [92], [95], [96], [99], [100], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [189], [190], [191], [193], [194], [195] [2018-12-08 21:25:51,615 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:51,615 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:51,661 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:51,662 INFO L272 AbstractInterpreter]: Visited 79 different actions 87 times. Merged at 3 different actions 5 times. Never widened. Performed 684 root evaluator evaluations with a maximum evaluation depth of 4. Performed 684 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 30 variables. [2018-12-08 21:25:51,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:51,663 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:51,663 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:51,663 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:51,670 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:51,670 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:51,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:51,705 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:51,724 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:51,724 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:51,871 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:51,886 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:51,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2018-12-08 21:25:51,887 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:51,887 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 21:25:51,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 21:25:51,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-12-08 21:25:51,887 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. Second operand 9 states. [2018-12-08 21:25:51,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:51,901 INFO L93 Difference]: Finished difference Result 132 states and 135 transitions. [2018-12-08 21:25:51,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 21:25:51,902 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 82 [2018-12-08 21:25:51,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:51,902 INFO L225 Difference]: With dead ends: 132 [2018-12-08 21:25:51,902 INFO L226 Difference]: Without dead ends: 130 [2018-12-08 21:25:51,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 157 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-12-08 21:25:51,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-08 21:25:51,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-12-08 21:25:51,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-08 21:25:51,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-12-08 21:25:51,904 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 82 [2018-12-08 21:25:51,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:51,904 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-12-08 21:25:51,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 21:25:51,905 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-12-08 21:25:51,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-08 21:25:51,905 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:51,905 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:51,905 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:51,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:51,905 INFO L82 PathProgramCache]: Analyzing trace with hash -444268620, now seen corresponding path program 2 times [2018-12-08 21:25:51,905 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:51,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:51,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:51,906 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:51,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:51,944 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:51,944 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:51,944 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:51,944 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:51,945 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:51,945 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:51,945 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:51,952 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:51,952 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:51,987 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:51,987 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:51,990 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:52,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:25:52,006 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:52,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:52,012 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 21:25:52,266 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 21:25:52,266 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:52,690 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 21:25:52,705 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:25:52,705 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18, 18] imperfect sequences [9] total 43 [2018-12-08 21:25:52,705 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:52,705 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 21:25:52,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 21:25:52,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=1676, Unknown=0, NotChecked=0, Total=1806 [2018-12-08 21:25:52,706 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 19 states. [2018-12-08 21:25:53,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:53,148 INFO L93 Difference]: Finished difference Result 128 states and 131 transitions. [2018-12-08 21:25:53,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 21:25:53,148 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 83 [2018-12-08 21:25:53,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:53,148 INFO L225 Difference]: With dead ends: 128 [2018-12-08 21:25:53,148 INFO L226 Difference]: Without dead ends: 128 [2018-12-08 21:25:53,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 126 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=172, Invalid=2180, Unknown=0, NotChecked=0, Total=2352 [2018-12-08 21:25:53,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-08 21:25:53,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-12-08 21:25:53,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-08 21:25:53,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 131 transitions. [2018-12-08 21:25:53,151 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 131 transitions. Word has length 83 [2018-12-08 21:25:53,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:53,151 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 131 transitions. [2018-12-08 21:25:53,151 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 21:25:53,151 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 131 transitions. [2018-12-08 21:25:53,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 21:25:53,151 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:53,151 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:53,151 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:53,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:53,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1689185031, now seen corresponding path program 1 times [2018-12-08 21:25:53,152 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:53,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,152 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 21:25:53,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,152 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:53,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:53,197 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 21:25:53,198 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:53,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:25:53,198 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:53,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 21:25:53,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 21:25:53,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 21:25:53,198 INFO L87 Difference]: Start difference. First operand 128 states and 131 transitions. Second operand 10 states. [2018-12-08 21:25:53,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:53,233 INFO L93 Difference]: Finished difference Result 130 states and 132 transitions. [2018-12-08 21:25:53,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 21:25:53,234 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-08 21:25:53,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:53,234 INFO L225 Difference]: With dead ends: 130 [2018-12-08 21:25:53,234 INFO L226 Difference]: Without dead ends: 128 [2018-12-08 21:25:53,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 21:25:53,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-08 21:25:53,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-12-08 21:25:53,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-12-08 21:25:53,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 130 transitions. [2018-12-08 21:25:53,236 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 130 transitions. Word has length 81 [2018-12-08 21:25:53,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:53,236 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 130 transitions. [2018-12-08 21:25:53,236 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 21:25:53,236 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 130 transitions. [2018-12-08 21:25:53,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-08 21:25:53,236 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:53,237 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:53,237 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:53,237 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:53,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1600555844, now seen corresponding path program 1 times [2018-12-08 21:25:53,237 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:53,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:53,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,238 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:53,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:53,385 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 21:25:53,385 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:25:53,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 21:25:53,385 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:53,386 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 21:25:53,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 21:25:53,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-08 21:25:53,386 INFO L87 Difference]: Start difference. First operand 128 states and 130 transitions. Second operand 20 states. [2018-12-08 21:25:53,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:53,718 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2018-12-08 21:25:53,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 21:25:53,718 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 97 [2018-12-08 21:25:53,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:53,719 INFO L225 Difference]: With dead ends: 131 [2018-12-08 21:25:53,719 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 21:25:53,719 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-08 21:25:53,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 21:25:53,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 126. [2018-12-08 21:25:53,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-12-08 21:25:53,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-12-08 21:25:53,721 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 97 [2018-12-08 21:25:53,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:53,722 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-12-08 21:25:53,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 21:25:53,722 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-12-08 21:25:53,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-08 21:25:53,722 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:53,722 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:53,723 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:53,723 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:53,723 INFO L82 PathProgramCache]: Analyzing trace with hash 1600555845, now seen corresponding path program 1 times [2018-12-08 21:25:53,723 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:53,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:53,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:53,724 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:53,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:53,782 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:53,782 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:53,783 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:53,783 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 98 with the following transitions: [2018-12-08 21:25:53,783 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [107], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [190], [191], [193], [194], [195] [2018-12-08 21:25:53,785 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:53,786 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:53,874 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:53,874 INFO L272 AbstractInterpreter]: Visited 93 different actions 105 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 836 root evaluator evaluations with a maximum evaluation depth of 6. Performed 836 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-08 21:25:53,875 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:53,876 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:53,876 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:53,876 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:53,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:53,882 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:53,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:53,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:53,949 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:53,949 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:54,076 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:54,102 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:54,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2018-12-08 21:25:54,102 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:54,103 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 21:25:54,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 21:25:54,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-12-08 21:25:54,103 INFO L87 Difference]: Start difference. First operand 126 states and 128 transitions. Second operand 10 states. [2018-12-08 21:25:54,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:54,120 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2018-12-08 21:25:54,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 21:25:54,120 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 97 [2018-12-08 21:25:54,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:54,120 INFO L225 Difference]: With dead ends: 129 [2018-12-08 21:25:54,121 INFO L226 Difference]: Without dead ends: 127 [2018-12-08 21:25:54,121 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 186 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-12-08 21:25:54,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-08 21:25:54,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-12-08 21:25:54,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-12-08 21:25:54,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2018-12-08 21:25:54,122 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 97 [2018-12-08 21:25:54,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:54,123 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2018-12-08 21:25:54,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 21:25:54,123 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2018-12-08 21:25:54,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 21:25:54,123 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:54,123 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:54,123 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:54,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:54,123 INFO L82 PathProgramCache]: Analyzing trace with hash 295345432, now seen corresponding path program 2 times [2018-12-08 21:25:54,123 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:54,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:54,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:54,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:54,124 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:54,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:54,177 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:54,177 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:54,177 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:54,178 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:54,178 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:54,178 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:54,178 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:54,186 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:54,186 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:54,225 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:54,225 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:54,229 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:54,237 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:25:54,237 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:54,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:54,240 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 21:25:54,595 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 21:25:54,595 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:55,124 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 21:25:55,140 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:25:55,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 22] imperfect sequences [10] total 52 [2018-12-08 21:25:55,140 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 21:25:55,140 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-08 21:25:55,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-08 21:25:55,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=2490, Unknown=0, NotChecked=0, Total=2652 [2018-12-08 21:25:55,141 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand 23 states. [2018-12-08 21:25:55,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:55,730 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2018-12-08 21:25:55,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 21:25:55,730 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 98 [2018-12-08 21:25:55,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:55,731 INFO L225 Difference]: With dead ends: 125 [2018-12-08 21:25:55,731 INFO L226 Difference]: Without dead ends: 125 [2018-12-08 21:25:55,731 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 146 SyntacticMatches, 9 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 947 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=218, Invalid=3322, Unknown=0, NotChecked=0, Total=3540 [2018-12-08 21:25:55,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-12-08 21:25:55,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-12-08 21:25:55,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-12-08 21:25:55,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 127 transitions. [2018-12-08 21:25:55,733 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 127 transitions. Word has length 98 [2018-12-08 21:25:55,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:55,733 INFO L480 AbstractCegarLoop]: Abstraction has 125 states and 127 transitions. [2018-12-08 21:25:55,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-08 21:25:55,733 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2018-12-08 21:25:55,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-12-08 21:25:55,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:55,734 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:55,734 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:55,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:55,734 INFO L82 PathProgramCache]: Analyzing trace with hash -214974791, now seen corresponding path program 1 times [2018-12-08 21:25:55,734 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:55,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:55,735 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 21:25:55,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:55,735 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:55,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:55,780 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:55,780 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:55,780 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:55,780 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 104 with the following transitions: [2018-12-08 21:25:55,780 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [105], [108], [110], [112], [115], [116], [124], [125], [128], [131], [132], [135], [137], [138], [139], [140], [143], [148], [149], [150], [157], [158], [159], [160], [161], [162], [163], [165], [167], [168], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [190], [191], [193], [194], [195] [2018-12-08 21:25:55,782 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 21:25:55,782 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 21:25:55,841 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 21:25:55,841 INFO L272 AbstractInterpreter]: Visited 98 different actions 110 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 863 root evaluator evaluations with a maximum evaluation depth of 6. Performed 863 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-08 21:25:55,842 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:55,843 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 21:25:55,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:55,843 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:55,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:55,849 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 21:25:55,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:55,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:55,912 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:55,912 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:56,068 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:56,094 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 21:25:56,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2018-12-08 21:25:56,094 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 21:25:56,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 21:25:56,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 21:25:56,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-08 21:25:56,095 INFO L87 Difference]: Start difference. First operand 125 states and 127 transitions. Second operand 11 states. [2018-12-08 21:25:56,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:25:56,110 INFO L93 Difference]: Finished difference Result 128 states and 130 transitions. [2018-12-08 21:25:56,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 21:25:56,110 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 103 [2018-12-08 21:25:56,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:25:56,110 INFO L225 Difference]: With dead ends: 128 [2018-12-08 21:25:56,110 INFO L226 Difference]: Without dead ends: 126 [2018-12-08 21:25:56,111 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 197 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-12-08 21:25:56,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-08 21:25:56,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-12-08 21:25:56,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-12-08 21:25:56,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-12-08 21:25:56,112 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 103 [2018-12-08 21:25:56,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:25:56,112 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-12-08 21:25:56,112 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 21:25:56,112 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-12-08 21:25:56,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-12-08 21:25:56,113 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:25:56,113 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:25:56,113 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION]=== [2018-12-08 21:25:56,113 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:25:56,113 INFO L82 PathProgramCache]: Analyzing trace with hash 303425100, now seen corresponding path program 2 times [2018-12-08 21:25:56,113 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 21:25:56,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:56,114 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:25:56,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 21:25:56,114 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 21:25:56,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:25:56,160 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:25:56,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:56,161 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 21:25:56,161 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 21:25:56,161 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 21:25:56,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:25:56,161 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:56,169 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 21:25:56,169 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 21:25:56,205 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 21:25:56,205 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 21:25:56,210 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:25:56,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 21:25:56,255 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 21:25:56,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,256 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-08 21:25:56,314 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:25:56,316 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:25:56,320 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 21:25:56,320 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-08 21:25:56,952 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-08 21:25:56,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-08 21:25:56,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:25:56,961 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-08 21:25:56,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:25:56,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:25:56,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-08 21:25:56,966 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,971 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:56,977 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-08 21:25:57,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:25:57,212 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-08 21:25:57,213 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 21:25:57,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:25:57,214 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-08 21:25:57,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,217 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,219 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,219 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-08 21:25:57,478 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-08 21:25:57,479 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-08 21:25:57,480 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,480 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:57,482 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-08 21:25:57,513 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 21:25:57,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:25:58,516 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-08 21:25:58,518 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-08 21:25:58,518 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:25:58,519 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:25:58,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 21:25:58,522 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-12-08 21:25:58,737 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 21:25:58,751 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 89 [2018-12-08 21:25:58,953 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:25:58,954 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:214) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-12-08 21:25:58,958 INFO L168 Benchmark]: Toolchain (without parser) took 13910.71 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 479.7 MB). Free memory was 952.3 MB in the beginning and 1.3 GB in the end (delta: -355.1 MB). Peak memory consumption was 124.6 MB. Max. memory is 11.5 GB. [2018-12-08 21:25:58,960 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:25:58,960 INFO L168 Benchmark]: CACSL2BoogieTranslator took 344.50 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 154.7 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -173.0 MB). Peak memory consumption was 30.8 MB. Max. memory is 11.5 GB. [2018-12-08 21:25:58,961 INFO L168 Benchmark]: Boogie Procedure Inliner took 22.01 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:25:58,961 INFO L168 Benchmark]: Boogie Preprocessor took 23.11 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:25:58,961 INFO L168 Benchmark]: RCFGBuilder took 271.26 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 11.5 GB. [2018-12-08 21:25:58,962 INFO L168 Benchmark]: TraceAbstraction took 13247.21 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 325.1 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -230.6 MB). Peak memory consumption was 94.4 MB. Max. memory is 11.5 GB. [2018-12-08 21:25:58,964 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 344.50 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 154.7 MB). Free memory was 952.3 MB in the beginning and 1.1 GB in the end (delta: -173.0 MB). Peak memory consumption was 30.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 22.01 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.11 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 271.26 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13247.21 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 325.1 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -230.6 MB). Peak memory consumption was 94.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 21:26:00,252 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 21:26:00,253 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 21:26:00,261 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 21:26:00,261 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 21:26:00,262 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 21:26:00,263 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 21:26:00,264 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 21:26:00,265 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 21:26:00,265 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 21:26:00,265 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 21:26:00,266 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 21:26:00,266 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 21:26:00,267 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 21:26:00,267 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 21:26:00,267 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 21:26:00,268 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 21:26:00,269 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 21:26:00,270 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 21:26:00,270 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 21:26:00,271 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 21:26:00,271 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 21:26:00,273 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 21:26:00,273 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 21:26:00,273 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 21:26:00,273 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 21:26:00,274 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 21:26:00,274 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 21:26:00,275 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 21:26:00,275 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 21:26:00,275 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 21:26:00,276 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 21:26:00,276 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 21:26:00,276 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 21:26:00,276 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 21:26:00,277 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 21:26:00,277 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-12-08 21:26:00,284 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 21:26:00,285 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 21:26:00,285 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 21:26:00,285 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 21:26:00,285 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 21:26:00,285 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 21:26:00,286 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 21:26:00,286 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 21:26:00,286 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 21:26:00,286 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 21:26:00,286 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 21:26:00,286 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 21:26:00,287 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 21:26:00,287 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 21:26:00,288 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 21:26:00,288 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 21:26:00,289 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 21:26:00,289 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4867b1d8e60a05de2199d52aa990071fe8bd647c [2018-12-08 21:26:00,308 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 21:26:00,316 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 21:26:00,318 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 21:26:00,319 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 21:26:00,319 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 21:26:00,320 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:26:00,356 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/7fdfd18d6/2270b6519a6147c384aa25db3ffd9924/FLAG0962f66e7 [2018-12-08 21:26:00,800 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 21:26:00,801 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/sv-benchmarks/c/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:26:00,808 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/7fdfd18d6/2270b6519a6147c384aa25db3ffd9924/FLAG0962f66e7 [2018-12-08 21:26:00,816 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/data/7fdfd18d6/2270b6519a6147c384aa25db3ffd9924 [2018-12-08 21:26:00,818 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 21:26:00,819 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 21:26:00,819 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 21:26:00,820 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 21:26:00,822 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 21:26:00,822 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 09:26:00" (1/1) ... [2018-12-08 21:26:00,824 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d255691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:00, skipping insertion in model container [2018-12-08 21:26:00,824 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 09:26:00" (1/1) ... [2018-12-08 21:26:00,828 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 21:26:00,850 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 21:26:01,045 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 21:26:01,058 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 21:26:01,126 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 21:26:01,160 INFO L195 MainTranslator]: Completed translation [2018-12-08 21:26:01,160 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01 WrapperNode [2018-12-08 21:26:01,160 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 21:26:01,161 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 21:26:01,161 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 21:26:01,161 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 21:26:01,166 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,178 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,183 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 21:26:01,183 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 21:26:01,183 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 21:26:01,183 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 21:26:01,189 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,189 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,191 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,192 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,200 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,203 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,204 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... [2018-12-08 21:26:01,207 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 21:26:01,207 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 21:26:01,207 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 21:26:01,207 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 21:26:01,208 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 21:26:01,237 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 21:26:01,237 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-08 21:26:01,237 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 21:26:01,237 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 21:26:01,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 21:26:01,238 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 21:26:01,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 21:26:01,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 21:26:01,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 21:26:01,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 21:26:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 21:26:01,239 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 21:26:01,240 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 21:26:01,240 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 21:26:01,240 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 21:26:01,240 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 21:26:01,240 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 21:26:01,241 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 21:26:01,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 21:26:01,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 21:26:01,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 21:26:01,241 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 21:26:01,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 21:26:01,426 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 21:26:01,538 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 21:26:01,538 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 21:26:01,538 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 09:26:01 BoogieIcfgContainer [2018-12-08 21:26:01,538 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 21:26:01,539 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 21:26:01,539 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 21:26:01,541 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 21:26:01,541 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 09:26:00" (1/3) ... [2018-12-08 21:26:01,541 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b500382 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 09:26:01, skipping insertion in model container [2018-12-08 21:26:01,542 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 09:26:01" (2/3) ... [2018-12-08 21:26:01,542 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b500382 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 09:26:01, skipping insertion in model container [2018-12-08 21:26:01,542 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 09:26:01" (3/3) ... [2018-12-08 21:26:01,543 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-12-08 21:26:01,548 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 21:26:01,555 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-08 21:26:01,566 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-08 21:26:01,580 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 21:26:01,581 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 21:26:01,581 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 21:26:01,581 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 21:26:01,581 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 21:26:01,581 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 21:26:01,581 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 21:26:01,581 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 21:26:01,582 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 21:26:01,592 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states. [2018-12-08 21:26:01,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:26:01,598 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:01,598 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:01,599 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:01,603 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:01,603 INFO L82 PathProgramCache]: Analyzing trace with hash -59032713, now seen corresponding path program 1 times [2018-12-08 21:26:01,606 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:01,607 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:01,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:01,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:01,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:01,706 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:01,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:01,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:01,711 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:01,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:01,731 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:01,734 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:01,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 21:26:01,737 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:26:01,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:26:01,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:01,748 INFO L87 Difference]: Start difference. First operand 141 states. Second operand 5 states. [2018-12-08 21:26:01,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:01,953 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-08 21:26:01,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:26:01,954 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 21:26:01,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:01,963 INFO L225 Difference]: With dead ends: 152 [2018-12-08 21:26:01,963 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 21:26:01,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:01,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 21:26:01,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 143. [2018-12-08 21:26:01,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 21:26:01,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 154 transitions. [2018-12-08 21:26:01,995 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 154 transitions. Word has length 17 [2018-12-08 21:26:01,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:01,996 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 154 transitions. [2018-12-08 21:26:01,996 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:26:01,996 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 154 transitions. [2018-12-08 21:26:01,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:26:01,997 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:01,997 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:01,997 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:01,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:01,998 INFO L82 PathProgramCache]: Analyzing trace with hash -59032712, now seen corresponding path program 1 times [2018-12-08 21:26:01,998 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:01,998 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:02,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:02,088 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:02,088 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:02,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,119 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:02,120 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:02,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:26:02,121 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 21:26:02,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 21:26:02,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 21:26:02,122 INFO L87 Difference]: Start difference. First operand 143 states and 154 transitions. Second operand 6 states. [2018-12-08 21:26:02,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:02,325 INFO L93 Difference]: Finished difference Result 148 states and 159 transitions. [2018-12-08 21:26:02,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 21:26:02,325 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 21:26:02,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:02,326 INFO L225 Difference]: With dead ends: 148 [2018-12-08 21:26:02,327 INFO L226 Difference]: Without dead ends: 148 [2018-12-08 21:26:02,327 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:26:02,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-08 21:26:02,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-12-08 21:26:02,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 21:26:02,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-12-08 21:26:02,334 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 17 [2018-12-08 21:26:02,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:02,334 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-12-08 21:26:02,334 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 21:26:02,334 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-12-08 21:26:02,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 21:26:02,335 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:02,335 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:02,335 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:02,335 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:02,335 INFO L82 PathProgramCache]: Analyzing trace with hash -30403562, now seen corresponding path program 1 times [2018-12-08 21:26:02,336 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:02,336 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,378 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,397 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:02,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:02,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:26:02,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:26:02,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:26:02,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:02,398 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 5 states. [2018-12-08 21:26:02,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:02,414 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-12-08 21:26:02,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:26:02,415 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 21:26:02,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:02,416 INFO L225 Difference]: With dead ends: 142 [2018-12-08 21:26:02,417 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 21:26:02,417 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:02,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 21:26:02,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-08 21:26:02,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 21:26:02,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 148 transitions. [2018-12-08 21:26:02,425 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 148 transitions. Word has length 17 [2018-12-08 21:26:02,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:02,425 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 148 transitions. [2018-12-08 21:26:02,426 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:26:02,426 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 148 transitions. [2018-12-08 21:26:02,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 21:26:02,426 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:02,427 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:02,427 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:02,427 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:02,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1473912446, now seen corresponding path program 1 times [2018-12-08 21:26:02,428 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:02,428 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,492 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:02,493 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:02,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 21:26:02,493 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 21:26:02,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 21:26:02,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:02,494 INFO L87 Difference]: Start difference. First operand 140 states and 148 transitions. Second operand 5 states. [2018-12-08 21:26:02,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:02,513 INFO L93 Difference]: Finished difference Result 142 states and 149 transitions. [2018-12-08 21:26:02,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 21:26:02,514 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-08 21:26:02,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:02,515 INFO L225 Difference]: With dead ends: 142 [2018-12-08 21:26:02,515 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 21:26:02,515 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:02,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 21:26:02,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-12-08 21:26:02,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 21:26:02,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-12-08 21:26:02,523 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 27 [2018-12-08 21:26:02,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:02,523 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-12-08 21:26:02,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 21:26:02,523 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-12-08 21:26:02,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 21:26:02,524 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:02,524 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:02,524 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:02,524 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:02,525 INFO L82 PathProgramCache]: Analyzing trace with hash 963378269, now seen corresponding path program 1 times [2018-12-08 21:26:02,525 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:02,525 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,539 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,591 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,628 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:02,630 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:02,630 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:26:02,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:26:02,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:26:02,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:26:02,631 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 7 states. [2018-12-08 21:26:02,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:02,669 INFO L93 Difference]: Finished difference Result 156 states and 164 transitions. [2018-12-08 21:26:02,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 21:26:02,670 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-12-08 21:26:02,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:02,671 INFO L225 Difference]: With dead ends: 156 [2018-12-08 21:26:02,671 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 21:26:02,671 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:26:02,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 21:26:02,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-12-08 21:26:02,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-08 21:26:02,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-12-08 21:26:02,678 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 27 [2018-12-08 21:26:02,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:02,678 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-12-08 21:26:02,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:26:02,679 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-12-08 21:26:02,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 21:26:02,679 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:02,680 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:02,680 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:02,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:02,680 INFO L82 PathProgramCache]: Analyzing trace with hash 1221921107, now seen corresponding path program 1 times [2018-12-08 21:26:02,680 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:02,680 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,761 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:02,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:02,763 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 21:26:02,763 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 21:26:02,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 21:26:02,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 21:26:02,764 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 4 states. [2018-12-08 21:26:02,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:02,789 INFO L93 Difference]: Finished difference Result 152 states and 159 transitions. [2018-12-08 21:26:02,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 21:26:02,789 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 21:26:02,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:02,790 INFO L225 Difference]: With dead ends: 152 [2018-12-08 21:26:02,790 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 21:26:02,790 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 21:26:02,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 21:26:02,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 21:26:02,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 21:26:02,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 157 transitions. [2018-12-08 21:26:02,794 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 157 transitions. Word has length 32 [2018-12-08 21:26:02,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:02,794 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 157 transitions. [2018-12-08 21:26:02,794 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 21:26:02,794 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 157 transitions. [2018-12-08 21:26:02,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 21:26:02,795 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:02,795 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:02,795 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:02,795 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:02,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1740896898, now seen corresponding path program 1 times [2018-12-08 21:26:02,795 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:02,795 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:02,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,863 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,876 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:26:02,929 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:02,930 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:26:02,930 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:26:02,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:02,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:02,957 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:02,960 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:02,960 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:02,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:02,962 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:03,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 21:26:03,103 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:03,118 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 21:26:03,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [5, 5] total 18 [2018-12-08 21:26:03,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 21:26:03,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 21:26:03,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2018-12-08 21:26:03,119 INFO L87 Difference]: Start difference. First operand 150 states and 157 transitions. Second operand 18 states. [2018-12-08 21:26:04,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:04,426 INFO L93 Difference]: Finished difference Result 168 states and 175 transitions. [2018-12-08 21:26:04,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 21:26:04,427 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 33 [2018-12-08 21:26:04,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:04,429 INFO L225 Difference]: With dead ends: 168 [2018-12-08 21:26:04,429 INFO L226 Difference]: Without dead ends: 164 [2018-12-08 21:26:04,430 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=112, Invalid=590, Unknown=0, NotChecked=0, Total=702 [2018-12-08 21:26:04,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-08 21:26:04,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 152. [2018-12-08 21:26:04,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-08 21:26:04,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 159 transitions. [2018-12-08 21:26:04,437 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 159 transitions. Word has length 33 [2018-12-08 21:26:04,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:04,437 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 159 transitions. [2018-12-08 21:26:04,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 21:26:04,438 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 159 transitions. [2018-12-08 21:26:04,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 21:26:04,439 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:04,439 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:04,440 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:04,440 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:04,441 INFO L82 PathProgramCache]: Analyzing trace with hash 1601221370, now seen corresponding path program 1 times [2018-12-08 21:26:04,441 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:04,441 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:04,469 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:04,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:04,565 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:04,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:04,605 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:04,607 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:04,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:26:04,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:26:04,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:26:04,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:26:04,607 INFO L87 Difference]: Start difference. First operand 152 states and 159 transitions. Second operand 7 states. [2018-12-08 21:26:04,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:04,635 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-12-08 21:26:04,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 21:26:04,635 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-12-08 21:26:04,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:04,636 INFO L225 Difference]: With dead ends: 162 [2018-12-08 21:26:04,636 INFO L226 Difference]: Without dead ends: 162 [2018-12-08 21:26:04,637 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:26:04,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-08 21:26:04,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 158. [2018-12-08 21:26:04,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-08 21:26:04,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-08 21:26:04,640 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 36 [2018-12-08 21:26:04,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:04,640 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-08 21:26:04,640 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:26:04,640 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-08 21:26:04,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 21:26:04,641 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:04,641 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:04,641 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:04,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:04,641 INFO L82 PathProgramCache]: Analyzing trace with hash 94330132, now seen corresponding path program 1 times [2018-12-08 21:26:04,641 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:04,642 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:04,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:04,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:04,723 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:04,748 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:04,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:26:04,876 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:04,878 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:26:04,878 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:26:04,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:04,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:04,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:04,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:04,923 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:04,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:04,927 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:05,197 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 21:26:05,197 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:05,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 21:26:05,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8, 8] total 25 [2018-12-08 21:26:05,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-08 21:26:05,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-08 21:26:05,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=509, Unknown=0, NotChecked=0, Total=600 [2018-12-08 21:26:05,213 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 25 states. [2018-12-08 21:26:07,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:07,635 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-12-08 21:26:07,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 21:26:07,636 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 36 [2018-12-08 21:26:07,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:07,637 INFO L225 Difference]: With dead ends: 171 [2018-12-08 21:26:07,637 INFO L226 Difference]: Without dead ends: 167 [2018-12-08 21:26:07,638 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=252, Invalid=1388, Unknown=0, NotChecked=0, Total=1640 [2018-12-08 21:26:07,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-12-08 21:26:07,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 163. [2018-12-08 21:26:07,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-08 21:26:07,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-12-08 21:26:07,644 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 36 [2018-12-08 21:26:07,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:07,645 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-12-08 21:26:07,645 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-08 21:26:07,645 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-12-08 21:26:07,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 21:26:07,646 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:07,646 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:07,646 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:07,647 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:07,647 INFO L82 PathProgramCache]: Analyzing trace with hash 1723522866, now seen corresponding path program 1 times [2018-12-08 21:26:07,647 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:07,647 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:07,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:07,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:07,732 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:07,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:07,743 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:07,745 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:07,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 21:26:07,746 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 21:26:07,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 21:26:07,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 21:26:07,747 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 3 states. [2018-12-08 21:26:07,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:07,868 INFO L93 Difference]: Finished difference Result 174 states and 180 transitions. [2018-12-08 21:26:07,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 21:26:07,868 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-12-08 21:26:07,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:07,869 INFO L225 Difference]: With dead ends: 174 [2018-12-08 21:26:07,869 INFO L226 Difference]: Without dead ends: 152 [2018-12-08 21:26:07,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 21:26:07,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-08 21:26:07,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 144. [2018-12-08 21:26:07,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 21:26:07,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 150 transitions. [2018-12-08 21:26:07,871 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 150 transitions. Word has length 34 [2018-12-08 21:26:07,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:07,871 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 150 transitions. [2018-12-08 21:26:07,871 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 21:26:07,871 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 150 transitions. [2018-12-08 21:26:07,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 21:26:07,872 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:07,872 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:07,872 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:07,872 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:07,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1404362456, now seen corresponding path program 1 times [2018-12-08 21:26:07,872 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:07,872 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:07,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:07,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:07,976 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:08,041 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:08,041 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:26:08,635 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:26:08,639 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:26:08,639 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:26:08,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:08,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:08,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:08,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:08,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:08,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:08,716 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:09,107 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-08 21:26:09,107 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:09,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 21:26:09,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [14, 14] total 36 [2018-12-08 21:26:09,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-08 21:26:09,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-08 21:26:09,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=1053, Unknown=0, NotChecked=0, Total=1260 [2018-12-08 21:26:09,123 INFO L87 Difference]: Start difference. First operand 144 states and 150 transitions. Second operand 36 states. [2018-12-08 21:26:12,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:12,728 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-12-08 21:26:12,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-08 21:26:12,728 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 47 [2018-12-08 21:26:12,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:12,729 INFO L225 Difference]: With dead ends: 164 [2018-12-08 21:26:12,729 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 21:26:12,730 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=511, Invalid=2681, Unknown=0, NotChecked=0, Total=3192 [2018-12-08 21:26:12,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 21:26:12,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-08 21:26:12,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 21:26:12,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-08 21:26:12,733 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 47 [2018-12-08 21:26:12,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:12,734 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-08 21:26:12,734 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-08 21:26:12,734 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-08 21:26:12,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-08 21:26:12,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:12,734 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:12,735 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:12,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:12,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1661345479, now seen corresponding path program 1 times [2018-12-08 21:26:12,735 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:12,735 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:12,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:12,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:12,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:12,920 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:12,920 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:12,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:12,924 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:13,089 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:13,089 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:13,092 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:13,092 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 21:26:13,092 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 21:26:13,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 21:26:13,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-08 21:26:13,093 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 13 states. [2018-12-08 21:26:13,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:13,864 INFO L93 Difference]: Finished difference Result 146 states and 152 transitions. [2018-12-08 21:26:13,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 21:26:13,864 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-08 21:26:13,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:13,865 INFO L225 Difference]: With dead ends: 146 [2018-12-08 21:26:13,865 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 21:26:13,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-08 21:26:13,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 21:26:13,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 21:26:13,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 21:26:13,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 152 transitions. [2018-12-08 21:26:13,869 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 152 transitions. Word has length 53 [2018-12-08 21:26:13,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:13,869 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 152 transitions. [2018-12-08 21:26:13,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 21:26:13,869 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 152 transitions. [2018-12-08 21:26:13,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-08 21:26:13,869 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:13,870 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:13,870 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:13,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:13,870 INFO L82 PathProgramCache]: Analyzing trace with hash -239699418, now seen corresponding path program 1 times [2018-12-08 21:26:13,870 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:13,870 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:13,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:13,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:13,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:13,954 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:13,954 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:13,956 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:13,956 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 21:26:13,956 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 21:26:13,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 21:26:13,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 21:26:13,956 INFO L87 Difference]: Start difference. First operand 146 states and 152 transitions. Second operand 7 states. [2018-12-08 21:26:13,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:13,984 INFO L93 Difference]: Finished difference Result 148 states and 153 transitions. [2018-12-08 21:26:13,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 21:26:13,985 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2018-12-08 21:26:13,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:13,985 INFO L225 Difference]: With dead ends: 148 [2018-12-08 21:26:13,985 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 21:26:13,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 21:26:13,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 21:26:13,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 21:26:13,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 21:26:13,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 151 transitions. [2018-12-08 21:26:13,988 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 151 transitions. Word has length 56 [2018-12-08 21:26:13,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:13,988 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 151 transitions. [2018-12-08 21:26:13,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 21:26:13,988 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 151 transitions. [2018-12-08 21:26:13,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 21:26:13,988 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:13,988 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:13,988 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:13,989 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:13,989 INFO L82 PathProgramCache]: Analyzing trace with hash 429252964, now seen corresponding path program 1 times [2018-12-08 21:26:13,989 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:13,989 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:14,002 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:14,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:14,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:14,109 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:14,109 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:14,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:14,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 21:26:14,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 21:26:14,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 21:26:14,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 21:26:14,112 INFO L87 Difference]: Start difference. First operand 146 states and 151 transitions. Second operand 9 states. [2018-12-08 21:26:14,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:14,164 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2018-12-08 21:26:14,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 21:26:14,165 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 61 [2018-12-08 21:26:14,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:14,165 INFO L225 Difference]: With dead ends: 150 [2018-12-08 21:26:14,165 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 21:26:14,165 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 21:26:14,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 21:26:14,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 21:26:14,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 21:26:14,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-08 21:26:14,167 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 61 [2018-12-08 21:26:14,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:14,168 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-08 21:26:14,168 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 21:26:14,168 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-08 21:26:14,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 21:26:14,168 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:14,168 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:14,168 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:14,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:14,168 INFO L82 PathProgramCache]: Analyzing trace with hash -488981665, now seen corresponding path program 1 times [2018-12-08 21:26:14,169 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:14,169 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:14,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:14,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:14,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:14,335 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:14,335 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:14,336 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:14,337 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:14,529 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:14,529 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:14,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:14,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-08 21:26:14,532 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 21:26:14,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 21:26:14,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-12-08 21:26:14,533 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 18 states. [2018-12-08 21:26:15,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:15,850 INFO L93 Difference]: Finished difference Result 156 states and 159 transitions. [2018-12-08 21:26:15,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 21:26:15,851 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-08 21:26:15,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:15,851 INFO L225 Difference]: With dead ends: 156 [2018-12-08 21:26:15,851 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 21:26:15,852 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2018-12-08 21:26:15,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 21:26:15,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-12-08 21:26:15,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 21:26:15,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 148 transitions. [2018-12-08 21:26:15,853 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 148 transitions. Word has length 72 [2018-12-08 21:26:15,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:15,854 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 148 transitions. [2018-12-08 21:26:15,854 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 21:26:15,854 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 148 transitions. [2018-12-08 21:26:15,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 21:26:15,854 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:15,854 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:15,854 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:15,855 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:15,855 INFO L82 PathProgramCache]: Analyzing trace with hash -488981664, now seen corresponding path program 1 times [2018-12-08 21:26:15,855 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:15,855 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:15,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:16,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:16,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:16,056 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:16,057 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:16,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:16,061 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:16,344 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:16,344 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:16,347 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:16,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-08 21:26:16,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 21:26:16,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 21:26:16,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-12-08 21:26:16,348 INFO L87 Difference]: Start difference. First operand 144 states and 148 transitions. Second operand 18 states. [2018-12-08 21:26:17,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:17,668 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-08 21:26:17,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 21:26:17,669 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2018-12-08 21:26:17,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:17,669 INFO L225 Difference]: With dead ends: 142 [2018-12-08 21:26:17,669 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 21:26:17,670 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=436, Unknown=0, NotChecked=0, Total=506 [2018-12-08 21:26:17,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 21:26:17,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 21:26:17,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 21:26:17,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-08 21:26:17,673 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 72 [2018-12-08 21:26:17,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:17,673 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-08 21:26:17,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 21:26:17,673 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-08 21:26:17,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 21:26:17,674 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:17,674 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:17,674 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:17,675 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:17,675 INFO L82 PathProgramCache]: Analyzing trace with hash 633058872, now seen corresponding path program 1 times [2018-12-08 21:26:17,675 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:17,675 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:17,692 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:17,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:17,760 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:17,800 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:17,800 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:17,801 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:17,801 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:26:17,802 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 21:26:17,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 21:26:17,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 21:26:17,802 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 10 states. [2018-12-08 21:26:17,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:17,859 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-08 21:26:17,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 21:26:17,859 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 81 [2018-12-08 21:26:17,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:17,860 INFO L225 Difference]: With dead ends: 145 [2018-12-08 21:26:17,860 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 21:26:17,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 21:26:17,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 21:26:17,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 21:26:17,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 21:26:17,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-08 21:26:17,862 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 81 [2018-12-08 21:26:17,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:17,862 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-08 21:26:17,862 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 21:26:17,862 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-08 21:26:17,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-08 21:26:17,863 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:17,863 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:17,863 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:17,863 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:17,863 INFO L82 PathProgramCache]: Analyzing trace with hash 122006912, now seen corresponding path program 1 times [2018-12-08 21:26:17,863 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:17,863 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:17,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:18,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:18,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:18,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:18,062 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:18,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:18,063 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:18,339 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:18,339 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:18,341 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:18,341 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 21:26:18,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 21:26:18,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 21:26:18,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-08 21:26:18,342 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 20 states. [2018-12-08 21:26:19,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:19,824 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-12-08 21:26:19,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 21:26:19,824 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-08 21:26:19,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:19,825 INFO L225 Difference]: With dead ends: 156 [2018-12-08 21:26:19,825 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 21:26:19,825 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-08 21:26:19,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 21:26:19,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 140. [2018-12-08 21:26:19,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 21:26:19,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 143 transitions. [2018-12-08 21:26:19,828 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 143 transitions. Word has length 94 [2018-12-08 21:26:19,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:19,829 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 143 transitions. [2018-12-08 21:26:19,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 21:26:19,829 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 143 transitions. [2018-12-08 21:26:19,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-08 21:26:19,829 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:19,830 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:19,830 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:19,830 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:19,830 INFO L82 PathProgramCache]: Analyzing trace with hash 122006913, now seen corresponding path program 1 times [2018-12-08 21:26:19,830 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:19,831 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:19,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:20,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:20,074 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:20,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:20,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:20,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:20,084 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:20,444 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:20,444 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:20,447 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:20,447 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 21:26:20,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 21:26:20,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 21:26:20,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-08 21:26:20,448 INFO L87 Difference]: Start difference. First operand 140 states and 143 transitions. Second operand 20 states. [2018-12-08 21:26:21,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:21,876 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-08 21:26:21,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 21:26:21,876 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-12-08 21:26:21,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:21,877 INFO L225 Difference]: With dead ends: 138 [2018-12-08 21:26:21,877 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 21:26:21,877 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 70 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-08 21:26:21,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 21:26:21,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 21:26:21,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 21:26:21,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-08 21:26:21,880 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 94 [2018-12-08 21:26:21,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:21,880 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-08 21:26:21,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 21:26:21,880 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-08 21:26:21,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-08 21:26:21,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:21,881 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:21,881 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:21,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:21,881 INFO L82 PathProgramCache]: Analyzing trace with hash 108577592, now seen corresponding path program 1 times [2018-12-08 21:26:21,881 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:21,881 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:21,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:21,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:21,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:22,054 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:22,054 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:22,056 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:22,056 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 21:26:22,057 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 21:26:22,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 21:26:22,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 21:26:22,057 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 10 states. [2018-12-08 21:26:22,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:22,147 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2018-12-08 21:26:22,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 21:26:22,147 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-08 21:26:22,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:22,148 INFO L225 Difference]: With dead ends: 140 [2018-12-08 21:26:22,148 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 21:26:22,148 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 21:26:22,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 21:26:22,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 21:26:22,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 21:26:22,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-08 21:26:22,151 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 92 [2018-12-08 21:26:22,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:22,151 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-08 21:26:22,151 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 21:26:22,151 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-08 21:26:22,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-08 21:26:22,152 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:22,152 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:22,152 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:22,152 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:22,152 INFO L82 PathProgramCache]: Analyzing trace with hash 46278890, now seen corresponding path program 1 times [2018-12-08 21:26:22,153 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:22,153 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:22,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:22,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:22,398 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:22,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:22,400 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:22,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:22,402 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 21:26:22,790 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:22,790 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:22,793 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:22,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 21:26:22,793 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 21:26:22,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 21:26:22,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-08 21:26:22,794 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 24 states. [2018-12-08 21:26:24,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:24,741 INFO L93 Difference]: Finished difference Result 148 states and 149 transitions. [2018-12-08 21:26:24,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 21:26:24,741 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-08 21:26:24,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:24,742 INFO L225 Difference]: With dead ends: 148 [2018-12-08 21:26:24,742 INFO L226 Difference]: Without dead ends: 148 [2018-12-08 21:26:24,742 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-08 21:26:24,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-08 21:26:24,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 136. [2018-12-08 21:26:24,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 21:26:24,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-08 21:26:24,745 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 107 [2018-12-08 21:26:24,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:24,745 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-08 21:26:24,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 21:26:24,745 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-08 21:26:24,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-08 21:26:24,746 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:24,746 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:24,746 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:24,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:24,747 INFO L82 PathProgramCache]: Analyzing trace with hash 46278891, now seen corresponding path program 1 times [2018-12-08 21:26:24,747 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:24,747 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:24,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:25,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:25,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:25,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 21:26:25,067 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:25,071 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:25,071 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 21:26:25,574 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:26:25,574 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:26:25,577 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 21:26:25,577 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 21:26:25,577 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 21:26:25,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 21:26:25,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-08 21:26:25,578 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-12-08 21:26:27,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:26:27,426 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-08 21:26:27,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 21:26:27,426 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-12-08 21:26:27,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:26:27,427 INFO L225 Difference]: With dead ends: 134 [2018-12-08 21:26:27,427 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 21:26:27,427 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 77 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-08 21:26:27,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 21:26:27,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 21:26:27,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 21:26:27,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-08 21:26:27,429 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-12-08 21:26:27,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:26:27,429 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-08 21:26:27,429 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 21:26:27,429 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-08 21:26:27,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-08 21:26:27,429 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:26:27,430 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:26:27,430 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:26:27,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:26:27,430 INFO L82 PathProgramCache]: Analyzing trace with hash 1007095557, now seen corresponding path program 1 times [2018-12-08 21:26:27,430 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:26:27,431 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:26:27,446 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:26:27,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:26:27,872 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:26:27,888 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-08 21:26:27,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-08 21:26:27,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,892 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,896 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,896 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-08 21:26:27,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-08 21:26:27,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:27,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-08 21:26:27,917 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,925 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-08 21:26:27,966 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-08 21:26:27,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:27,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:27,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:27,975 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-08 21:26:27,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:27,993 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,008 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,008 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-08 21:26:28,054 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-08 21:26:28,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-08 21:26:28,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,095 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,116 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-08 21:26:28,176 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-08 21:26:28,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-08 21:26:28,199 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,251 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,279 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,279 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-08 21:26:28,356 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-08 21:26:28,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-08 21:26:28,391 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,460 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,495 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,495 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-08 21:26:28,586 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-08 21:26:28,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,633 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-08 21:26:28,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,735 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:28,784 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-08 21:26:28,911 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-08 21:26:28,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,971 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:28,977 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-08 21:26:28,977 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,133 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,187 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-08 21:26:29,320 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-08 21:26:29,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,407 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-08 21:26:29,408 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,609 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:29,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-08 21:26:29,835 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-08 21:26:29,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:29,952 INFO L303 Elim1Store]: Index analysis took 116 ms [2018-12-08 21:26:29,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-08 21:26:29,954 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:30,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:30,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:30,302 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-08 21:26:30,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-08 21:26:30,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,524 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:30,671 INFO L303 Elim1Store]: Index analysis took 164 ms [2018-12-08 21:26:30,673 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-08 21:26:30,674 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:31,041 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:31,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:31,129 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-08 21:26:31,352 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-08 21:26:31,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:31,553 INFO L303 Elim1Store]: Index analysis took 199 ms [2018-12-08 21:26:31,554 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-08 21:26:31,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:32,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:32,114 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:32,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-08 21:26:32,355 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-08 21:26:32,372 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-08 21:26:32,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:32,674 INFO L303 Elim1Store]: Index analysis took 299 ms [2018-12-08 21:26:32,675 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-08 21:26:32,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:33,306 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:33,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:33,425 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-08 21:26:33,701 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 21:26:33,740 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-08 21:26:33,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:33,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:34,789 INFO L303 Elim1Store]: Index analysis took 1048 ms [2018-12-08 21:26:34,791 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-08 21:26:34,792 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:35,470 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:35,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:35,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-08 21:26:35,899 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-08 21:26:35,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-08 21:26:35,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:35,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,114 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:36,306 INFO L303 Elim1Store]: Index analysis took 381 ms [2018-12-08 21:26:36,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-08 21:26:36,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:37,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:37,290 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:37,290 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-08 21:26:37,653 WARN L180 SmtUtils]: Spent 164.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-08 21:26:37,701 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-08 21:26:37,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:37,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:38,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:39,440 INFO L303 Elim1Store]: Index analysis took 1737 ms [2018-12-08 21:26:39,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-08 21:26:39,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:26:40,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:40,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:26:40,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-08 21:26:41,011 WARN L180 SmtUtils]: Spent 176.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-08 21:26:42,882 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:26:42,888 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:26:42,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:26:42,895 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-08 21:26:44,901 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-08 21:26:46,908 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-08 21:26:47,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,057 INFO L303 Elim1Store]: Index analysis took 145 ms [2018-12-08 21:26:47,057 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-08 21:26:47,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:47,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:48,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,056 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:49,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:50,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,677 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:51,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:52,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:53,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:54,419 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 21:26:56,154 INFO L303 Elim1Store]: Index analysis took 9094 ms [2018-12-08 21:26:56,363 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-08 21:26:56,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:56,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,550 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:57,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:58,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:26:59,288 INFO L303 Elim1Store]: Index analysis took 2877 ms [2018-12-08 21:26:59,290 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-08 21:27:00,028 WARN L180 SmtUtils]: Spent 733.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-08 21:27:00,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,207 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,468 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,702 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,796 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:00,894 INFO L303 Elim1Store]: Index analysis took 863 ms [2018-12-08 21:27:00,896 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-08 21:27:00,897 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:01,302 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:02,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:02,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,338 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:03,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:04,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:05,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,250 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:06,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:07,087 INFO L303 Elim1Store]: Index analysis took 4489 ms [2018-12-08 21:27:07,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-08 21:27:08,915 WARN L180 SmtUtils]: Spent 1.74 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-08 21:27:08,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:08,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,028 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,243 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:09,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,163 INFO L303 Elim1Store]: Index analysis took 1245 ms [2018-12-08 21:27:10,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-08 21:27:10,166 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:10,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,796 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:10,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,024 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,747 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:11,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:12,050 INFO L303 Elim1Store]: Index analysis took 1297 ms [2018-12-08 21:27:12,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-08 21:27:12,053 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:12,488 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-08 21:27:12,626 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 21:27:12,701 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:12,772 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:12,772 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-08 21:27:15,866 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 124 [2018-12-08 21:27:15,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,948 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,951 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:15,980 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-12-08 21:27:15,982 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 1068 [2018-12-08 21:27:15,984 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:16,311 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:16,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:16,366 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:141 [2018-12-08 21:27:18,914 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 92 [2018-12-08 21:27:19,144 INFO L303 Elim1Store]: Index analysis took 228 ms [2018-12-08 21:27:19,145 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 110 [2018-12-08 21:27:19,146 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:19,173 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:19,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:19,200 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:125, output treesize:110 [2018-12-08 21:27:21,348 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-08 21:27:21,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-08 21:27:21,436 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-08 21:27:21,437 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-08 21:27:21,501 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 21:27:21,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-08 21:27:21,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-08 21:27:22,485 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 21:27:22,486 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 21:27:24,570 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:24,572 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:24,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:24,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-08 21:27:24,884 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 21:27:24,884 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 21:27:24,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:27:24,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 21:27:24,957 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 21:27:25,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 21:27:25,716 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 21:27:25,716 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:25,717 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:25,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:25,720 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-08 21:27:27,130 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:27,135 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:27,153 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 21:27:27,153 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-08 21:27:29,662 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-08 21:27:29,677 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-08 21:27:29,682 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:29,684 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-08 21:27:29,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:29,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:29,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:29,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-08 21:27:29,696 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:29,706 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:29,712 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:29,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:29,731 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-08 21:27:34,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:34,386 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-08 21:27:34,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 21:27:34,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-12-08 21:27:34,390 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:34,391 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:34,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:34,396 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-08 21:27:38,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-12-08 21:27:38,155 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-12-08 21:27:38,155 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 21:27:38,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:38,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 21:27:38,157 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:5 [2018-12-08 21:27:38,458 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 21:27:38,458 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 21:27:38,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 21:27:38,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [40] imperfect sequences [61] total 97 [2018-12-08 21:27:38,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 97 states [2018-12-08 21:27:38,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2018-12-08 21:27:38,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=10631, Unknown=2, NotChecked=414, Total=11342 [2018-12-08 21:27:38,482 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 97 states. [2018-12-08 21:28:27,406 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-08 21:28:32,773 WARN L180 SmtUtils]: Spent 4.20 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-08 21:28:37,259 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-08 21:28:45,975 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-08 21:28:55,148 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 103 [2018-12-08 21:28:57,639 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 108 [2018-12-08 21:29:06,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 21:29:06,375 INFO L93 Difference]: Finished difference Result 112 states and 112 transitions. [2018-12-08 21:29:06,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-12-08 21:29:06,376 INFO L78 Accepts]: Start accepts. Automaton has 97 states. Word has length 112 [2018-12-08 21:29:06,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 21:29:06,377 INFO L225 Difference]: With dead ends: 112 [2018-12-08 21:29:06,377 INFO L226 Difference]: Without dead ends: 112 [2018-12-08 21:29:06,380 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 146 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3132 ImplicationChecksByTransitivity, 55.7s TimeCoverageRelationStatistics Valid=677, Invalid=20498, Unknown=3, NotChecked=578, Total=21756 [2018-12-08 21:29:06,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-08 21:29:06,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-12-08 21:29:06,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-08 21:29:06,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-12-08 21:29:06,382 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 112 [2018-12-08 21:29:06,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 21:29:06,382 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-12-08 21:29:06,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 97 states. [2018-12-08 21:29:06,383 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-12-08 21:29:06,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-08 21:29:06,383 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 21:29:06,383 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 21:29:06,384 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 21:29:06,384 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 21:29:06,384 INFO L82 PathProgramCache]: Analyzing trace with hash -1664575082, now seen corresponding path program 1 times [2018-12-08 21:29:06,384 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 21:29:06,384 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c11dec96-d7e7-463d-94d6-29822424ae58/bin-2019/utaipan/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 21:29:06,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 21:29:10,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 21:29:15,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 21:29:15,118 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 21:29:15,133 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 21:29:15,142 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-08 21:29:15,152 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 21:29:15,153 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 21:29:15,166 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 09:29:15 BoogieIcfgContainer [2018-12-08 21:29:15,166 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 21:29:15,166 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 21:29:15,166 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 21:29:15,166 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 21:29:15,167 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 09:26:01" (3/4) ... [2018-12-08 21:29:15,169 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 21:29:15,169 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 21:29:15,169 INFO L168 Benchmark]: Toolchain (without parser) took 194350.80 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 266.9 MB). Free memory was 939.3 MB in the beginning and 1.2 GB in the end (delta: -268.5 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,169 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: CACSL2BoogieTranslator took 341.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -167.6 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: Boogie Preprocessor took 23.79 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: RCFGBuilder took 331.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 52.4 MB). Peak memory consumption was 52.4 MB. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: TraceAbstraction took 193626.76 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 126.4 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -153.3 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,170 INFO L168 Benchmark]: Witness Printer took 2.66 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 21:29:15,171 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 341.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -167.6 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 21.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.79 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 331.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 52.4 MB). Peak memory consumption was 52.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 193626.76 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 126.4 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -153.3 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 2.66 ms. Allocated memory is still 1.3 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1444] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1436] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1437] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1438] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1444] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 141 locations, 23 error locations. UNSAFE Result, 193.5s OverallTime, 24 OverallIterations, 16 TraceHistogramMax, 106.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2646 SDtfs, 1320 SDslu, 21582 SDs, 0 SdLazy, 16733 SolverSat, 382 SolverUnsat, 3 SolverUnknown, 0 SolverNotchecked, 74.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1793 GetRequests, 1259 SyntacticMatches, 42 SemanticMatches, 492 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 4165 ImplicationChecksByTransitivity, 62.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=163occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 23 MinimizatonAttempts, 102 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.5s SatisfiabilityAnalysisTime, 74.9s InterpolantComputationTime, 1663 NumberOfCodeBlocks, 1663 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1638 ConstructedInterpolants, 337 QuantifiedInterpolants, 1209961 SizeOfPredicates, 226 NumberOfNonLiveVariables, 6392 ConjunctsInSsa, 640 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1698/1966 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...