./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a69112b8d023c6203418abb04301ebe890b3a5f5 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i -s /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a69112b8d023c6203418abb04301ebe890b3a5f5 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 14:42:51,586 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 14:42:51,587 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 14:42:51,593 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 14:42:51,594 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 14:42:51,594 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 14:42:51,595 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 14:42:51,596 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 14:42:51,597 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 14:42:51,598 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 14:42:51,598 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 14:42:51,599 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 14:42:51,599 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 14:42:51,600 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 14:42:51,600 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 14:42:51,601 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 14:42:51,601 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 14:42:51,602 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 14:42:51,603 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 14:42:51,603 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 14:42:51,604 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 14:42:51,604 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 14:42:51,605 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 14:42:51,605 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 14:42:51,605 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 14:42:51,606 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 14:42:51,606 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 14:42:51,606 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 14:42:51,607 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 14:42:51,607 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 14:42:51,607 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 14:42:51,608 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 14:42:51,608 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 14:42:51,608 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 14:42:51,608 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 14:42:51,609 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 14:42:51,609 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-09 14:42:51,616 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 14:42:51,616 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 14:42:51,617 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 14:42:51,617 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 14:42:51,617 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 14:42:51,617 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 14:42:51,617 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 14:42:51,618 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 14:42:51,619 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 14:42:51,619 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 14:42:51,619 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 14:42:51,619 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 14:42:51,619 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 14:42:51,620 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 14:42:51,621 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 14:42:51,621 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 14:42:51,621 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 14:42:51,622 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 14:42:51,622 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 14:42:51,622 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 14:42:51,622 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-09 14:42:51,622 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a69112b8d023c6203418abb04301ebe890b3a5f5 [2018-12-09 14:42:51,645 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 14:42:51,654 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 14:42:51,656 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 14:42:51,657 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 14:42:51,657 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 14:42:51,658 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:42:51,697 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/9d282c921/13f43d9e9a3940f688230ce6f9f4687c/FLAG166c2f65e [2018-12-09 14:42:51,993 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 14:42:51,993 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:42:51,997 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/9d282c921/13f43d9e9a3940f688230ce6f9f4687c/FLAG166c2f65e [2018-12-09 14:42:52,428 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/9d282c921/13f43d9e9a3940f688230ce6f9f4687c [2018-12-09 14:42:52,432 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 14:42:52,433 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 14:42:52,434 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 14:42:52,434 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 14:42:52,436 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 14:42:52,437 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,440 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b4b7748 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52, skipping insertion in model container [2018-12-09 14:42:52,440 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,447 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 14:42:52,458 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 14:42:52,547 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 14:42:52,549 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 14:42:52,561 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 14:42:52,569 INFO L195 MainTranslator]: Completed translation [2018-12-09 14:42:52,569 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52 WrapperNode [2018-12-09 14:42:52,569 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 14:42:52,570 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 14:42:52,570 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 14:42:52,570 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 14:42:52,575 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,579 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,582 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 14:42:52,582 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 14:42:52,582 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 14:42:52,582 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 14:42:52,615 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,615 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,616 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,616 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,620 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,624 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,625 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... [2018-12-09 14:42:52,626 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 14:42:52,627 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 14:42:52,627 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 14:42:52,627 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 14:42:52,628 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 14:42:52,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 14:42:52,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 14:42:52,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 14:42:52,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 14:42:52,661 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 14:42:52,661 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 14:42:52,661 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-09 14:42:52,661 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-09 14:42:52,747 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 14:42:52,747 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 14:42:52,747 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:42:52 BoogieIcfgContainer [2018-12-09 14:42:52,747 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 14:42:52,748 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 14:42:52,748 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 14:42:52,750 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 14:42:52,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 02:42:52" (1/3) ... [2018-12-09 14:42:52,750 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d901c16 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 02:42:52, skipping insertion in model container [2018-12-09 14:42:52,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:42:52" (2/3) ... [2018-12-09 14:42:52,750 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d901c16 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 02:42:52, skipping insertion in model container [2018-12-09 14:42:52,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:42:52" (3/3) ... [2018-12-09 14:42:52,751 INFO L112 eAbstractionObserver]: Analyzing ICFG interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:42:52,757 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 14:42:52,761 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-09 14:42:52,775 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-09 14:42:52,799 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 14:42:52,799 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 14:42:52,799 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 14:42:52,799 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 14:42:52,799 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 14:42:52,799 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 14:42:52,799 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 14:42:52,799 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 14:42:52,811 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-12-09 14:42:52,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-12-09 14:42:52,814 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:52,814 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:52,815 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:52,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:52,819 INFO L82 PathProgramCache]: Analyzing trace with hash -480905734, now seen corresponding path program 1 times [2018-12-09 14:42:52,820 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:52,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:52,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:52,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:52,850 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:52,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:52,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:52,930 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 14:42:52,930 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 14:42:52,930 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 14:42:52,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 14:42:52,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 14:42:52,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 14:42:52,941 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 3 states. [2018-12-09 14:42:52,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:52,958 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2018-12-09 14:42:52,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 14:42:52,959 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-12-09 14:42:52,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:52,963 INFO L225 Difference]: With dead ends: 31 [2018-12-09 14:42:52,963 INFO L226 Difference]: Without dead ends: 13 [2018-12-09 14:42:52,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 14:42:52,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-12-09 14:42:52,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-12-09 14:42:52,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-12-09 14:42:52,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-12-09 14:42:52,985 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2018-12-09 14:42:52,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:52,985 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-12-09 14:42:52,985 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 14:42:52,985 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-12-09 14:42:52,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 14:42:52,985 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:52,986 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:52,986 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:52,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:52,986 INFO L82 PathProgramCache]: Analyzing trace with hash -436122843, now seen corresponding path program 1 times [2018-12-09 14:42:52,986 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:52,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:52,987 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:52,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:52,987 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:52,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,036 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,036 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,036 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:53,037 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-12-09 14:42:53,038 INFO L205 CegarAbsIntRunner]: [0], [4], [11], [13], [17], [20], [23], [25], [31], [32], [33], [35] [2018-12-09 14:42:53,056 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 14:42:53,056 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 14:42:53,133 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 14:42:53,133 INFO L272 AbstractInterpreter]: Visited 12 different actions 16 times. Merged at 1 different actions 2 times. Never widened. Performed 40 root evaluator evaluations with a maximum evaluation depth of 5. Performed 40 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 1 fixpoints after 1 different actions. Largest state had 9 variables. [2018-12-09 14:42:53,139 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:53,140 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 14:42:53,140 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,140 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:53,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:53,147 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 14:42:53,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,162 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:53,182 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,182 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:53,205 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,220 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:53,220 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-09 14:42:53,220 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:53,220 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 14:42:53,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 14:42:53,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-12-09 14:42:53,221 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 5 states. [2018-12-09 14:42:53,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:53,231 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-12-09 14:42:53,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 14:42:53,231 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2018-12-09 14:42:53,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:53,231 INFO L225 Difference]: With dead ends: 20 [2018-12-09 14:42:53,232 INFO L226 Difference]: Without dead ends: 14 [2018-12-09 14:42:53,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-12-09 14:42:53,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-12-09 14:42:53,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-12-09 14:42:53,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-12-09 14:42:53,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-12-09 14:42:53,234 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 12 [2018-12-09 14:42:53,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:53,235 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-12-09 14:42:53,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 14:42:53,235 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-12-09 14:42:53,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-09 14:42:53,235 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:53,235 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:53,235 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:53,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:53,236 INFO L82 PathProgramCache]: Analyzing trace with hash 952146778, now seen corresponding path program 2 times [2018-12-09 14:42:53,236 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:53,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:53,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,237 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:53,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,273 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,273 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,273 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:53,274 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:53,274 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:53,274 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,274 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:53,282 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:42:53,282 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 14:42:53,289 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-09 14:42:53,289 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:53,290 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:53,307 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:53,332 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,355 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:53,355 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-09 14:42:53,356 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:53,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 14:42:53,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 14:42:53,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-09 14:42:53,356 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 6 states. [2018-12-09 14:42:53,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:53,369 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-12-09 14:42:53,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 14:42:53,369 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 13 [2018-12-09 14:42:53,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:53,370 INFO L225 Difference]: With dead ends: 21 [2018-12-09 14:42:53,370 INFO L226 Difference]: Without dead ends: 15 [2018-12-09 14:42:53,370 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-09 14:42:53,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-12-09 14:42:53,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-12-09 14:42:53,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-12-09 14:42:53,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-12-09 14:42:53,372 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 13 [2018-12-09 14:42:53,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:53,373 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-12-09 14:42:53,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 14:42:53,373 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-12-09 14:42:53,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-12-09 14:42:53,373 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:53,373 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:53,373 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:53,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:53,373 INFO L82 PathProgramCache]: Analyzing trace with hash 1038832069, now seen corresponding path program 3 times [2018-12-09 14:42:53,374 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:53,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,374 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:53,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,374 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:53,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,442 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,442 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,442 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:53,442 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:53,442 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:53,443 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,443 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:53,451 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:42:53,451 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 14:42:53,457 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:42:53,457 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:53,458 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:53,470 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,470 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:53,517 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,535 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:53,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-09 14:42:53,535 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:53,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 14:42:53,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 14:42:53,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=67, Unknown=0, NotChecked=0, Total=110 [2018-12-09 14:42:53,535 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 7 states. [2018-12-09 14:42:53,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:53,550 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-12-09 14:42:53,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 14:42:53,550 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-12-09 14:42:53,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:53,550 INFO L225 Difference]: With dead ends: 22 [2018-12-09 14:42:53,550 INFO L226 Difference]: Without dead ends: 16 [2018-12-09 14:42:53,551 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=67, Unknown=0, NotChecked=0, Total=110 [2018-12-09 14:42:53,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-12-09 14:42:53,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-12-09 14:42:53,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-12-09 14:42:53,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-12-09 14:42:53,552 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 14 [2018-12-09 14:42:53,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:53,553 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-12-09 14:42:53,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 14:42:53,553 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-12-09 14:42:53,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 14:42:53,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:53,553 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:53,553 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:53,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:53,553 INFO L82 PathProgramCache]: Analyzing trace with hash -568891206, now seen corresponding path program 4 times [2018-12-09 14:42:53,553 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:53,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,554 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:53,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,554 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:53,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,606 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,606 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,606 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:53,606 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:53,606 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:53,606 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,607 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:53,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:53,614 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 14:42:53,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:53,635 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,636 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:53,703 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,726 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:53,726 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-09 14:42:53,726 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:53,726 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 14:42:53,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 14:42:53,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2018-12-09 14:42:53,727 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 8 states. [2018-12-09 14:42:53,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:53,746 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-12-09 14:42:53,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 14:42:53,747 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-12-09 14:42:53,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:53,747 INFO L225 Difference]: With dead ends: 23 [2018-12-09 14:42:53,747 INFO L226 Difference]: Without dead ends: 17 [2018-12-09 14:42:53,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2018-12-09 14:42:53,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-12-09 14:42:53,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-12-09 14:42:53,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-12-09 14:42:53,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-12-09 14:42:53,750 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 15 [2018-12-09 14:42:53,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:53,750 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-12-09 14:42:53,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 14:42:53,750 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-12-09 14:42:53,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 14:42:53,751 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:53,751 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:53,751 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:53,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:53,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1131294821, now seen corresponding path program 5 times [2018-12-09 14:42:53,752 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:53,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:53,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:53,753 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:53,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:53,817 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,817 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,817 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:53,817 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:53,817 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:53,817 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:53,817 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:53,826 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:42:53,826 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 14:42:53,837 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-12-09 14:42:53,837 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:53,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:53,857 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,857 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:53,956 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:53,970 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:53,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2018-12-09 14:42:53,970 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:53,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 14:42:53,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 14:42:53,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-12-09 14:42:53,971 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand 9 states. [2018-12-09 14:42:53,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:53,999 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-12-09 14:42:53,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 14:42:53,999 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 16 [2018-12-09 14:42:53,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:54,000 INFO L225 Difference]: With dead ends: 24 [2018-12-09 14:42:54,000 INFO L226 Difference]: Without dead ends: 18 [2018-12-09 14:42:54,000 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-12-09 14:42:54,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-12-09 14:42:54,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-12-09 14:42:54,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-12-09 14:42:54,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-12-09 14:42:54,002 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 16 [2018-12-09 14:42:54,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:54,002 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-12-09 14:42:54,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 14:42:54,003 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-12-09 14:42:54,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 14:42:54,003 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:54,003 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:54,003 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:54,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:54,003 INFO L82 PathProgramCache]: Analyzing trace with hash -1997513190, now seen corresponding path program 6 times [2018-12-09 14:42:54,003 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:54,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,004 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:54,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,004 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:54,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:54,092 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,093 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,093 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:54,093 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:54,093 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:54,093 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,093 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:54,101 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:42:54,101 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 14:42:54,108 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:42:54,108 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:54,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:54,121 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,121 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:54,242 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,266 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:54,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2018-12-09 14:42:54,267 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:54,267 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 14:42:54,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 14:42:54,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=178, Unknown=0, NotChecked=0, Total=272 [2018-12-09 14:42:54,268 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 10 states. [2018-12-09 14:42:54,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:54,299 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-12-09 14:42:54,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 14:42:54,300 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 17 [2018-12-09 14:42:54,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:54,300 INFO L225 Difference]: With dead ends: 25 [2018-12-09 14:42:54,300 INFO L226 Difference]: Without dead ends: 19 [2018-12-09 14:42:54,301 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=94, Invalid=178, Unknown=0, NotChecked=0, Total=272 [2018-12-09 14:42:54,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-12-09 14:42:54,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-12-09 14:42:54,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-12-09 14:42:54,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-12-09 14:42:54,303 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-12-09 14:42:54,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:54,303 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-12-09 14:42:54,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 14:42:54,303 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-12-09 14:42:54,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-12-09 14:42:54,303 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:54,304 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:54,304 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:54,304 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:54,304 INFO L82 PathProgramCache]: Analyzing trace with hash -206313723, now seen corresponding path program 7 times [2018-12-09 14:42:54,304 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:54,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,305 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:54,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,305 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:54,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:54,370 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,370 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,370 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:54,370 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:54,370 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:54,370 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,370 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:54,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:54,379 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 14:42:54,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:54,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:54,416 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,416 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:54,566 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,580 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:54,580 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2018-12-09 14:42:54,580 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:54,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 14:42:54,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 14:42:54,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-12-09 14:42:54,581 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 11 states. [2018-12-09 14:42:54,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:54,620 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-12-09 14:42:54,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 14:42:54,620 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 18 [2018-12-09 14:42:54,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:54,621 INFO L225 Difference]: With dead ends: 26 [2018-12-09 14:42:54,621 INFO L226 Difference]: Without dead ends: 20 [2018-12-09 14:42:54,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-12-09 14:42:54,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-12-09 14:42:54,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-12-09 14:42:54,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-12-09 14:42:54,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-12-09 14:42:54,625 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-12-09 14:42:54,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:54,625 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-12-09 14:42:54,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 14:42:54,625 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-12-09 14:42:54,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-12-09 14:42:54,626 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:54,626 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:54,626 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:54,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:54,626 INFO L82 PathProgramCache]: Analyzing trace with hash -513705094, now seen corresponding path program 8 times [2018-12-09 14:42:54,627 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:54,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:54,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,628 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:54,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:54,714 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,714 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,714 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:54,714 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:54,721 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:54,721 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:54,721 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:54,728 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:42:54,728 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 14:42:54,742 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-12-09 14:42:54,742 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:54,743 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:54,758 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:54,907 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:54,921 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:54,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 21 [2018-12-09 14:42:54,922 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:54,922 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 14:42:54,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 14:42:54,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=284, Unknown=0, NotChecked=0, Total=420 [2018-12-09 14:42:54,923 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 12 states. [2018-12-09 14:42:54,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:54,963 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-12-09 14:42:54,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 14:42:54,963 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2018-12-09 14:42:54,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:54,964 INFO L225 Difference]: With dead ends: 27 [2018-12-09 14:42:54,964 INFO L226 Difference]: Without dead ends: 21 [2018-12-09 14:42:54,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=284, Unknown=0, NotChecked=0, Total=420 [2018-12-09 14:42:54,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-12-09 14:42:54,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-12-09 14:42:54,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-12-09 14:42:54,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-12-09 14:42:54,966 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-12-09 14:42:54,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:54,966 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-12-09 14:42:54,966 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 14:42:54,966 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-12-09 14:42:54,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-12-09 14:42:54,967 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:54,967 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:54,967 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:54,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:54,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1452903003, now seen corresponding path program 9 times [2018-12-09 14:42:54,967 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,968 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:54,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:54,968 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:54,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:55,038 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,038 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,038 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:55,038 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:55,038 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:55,038 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,038 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:55,044 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:42:55,044 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 14:42:55,051 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:42:55,051 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:55,052 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:55,069 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,069 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:55,228 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,243 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:55,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 23 [2018-12-09 14:42:55,243 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:55,243 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 14:42:55,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 14:42:55,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=352, Unknown=0, NotChecked=0, Total=506 [2018-12-09 14:42:55,244 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 13 states. [2018-12-09 14:42:55,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:55,285 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-12-09 14:42:55,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 14:42:55,285 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 20 [2018-12-09 14:42:55,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:55,285 INFO L225 Difference]: With dead ends: 28 [2018-12-09 14:42:55,285 INFO L226 Difference]: Without dead ends: 22 [2018-12-09 14:42:55,286 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=352, Unknown=0, NotChecked=0, Total=506 [2018-12-09 14:42:55,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-12-09 14:42:55,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-12-09 14:42:55,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-12-09 14:42:55,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-12-09 14:42:55,288 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-12-09 14:42:55,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:55,288 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-12-09 14:42:55,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 14:42:55,288 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-12-09 14:42:55,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 14:42:55,288 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:55,288 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:55,289 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:55,289 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:55,289 INFO L82 PathProgramCache]: Analyzing trace with hash -503267110, now seen corresponding path program 10 times [2018-12-09 14:42:55,289 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:55,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:55,290 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:55,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:55,290 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:55,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:55,382 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,383 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,383 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:55,383 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:55,383 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:55,383 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,383 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:55,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:55,392 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 14:42:55,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:55,400 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:55,413 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,413 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:55,588 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,607 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:55,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2018-12-09 14:42:55,607 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:55,608 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-09 14:42:55,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-09 14:42:55,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=430, Unknown=0, NotChecked=0, Total=600 [2018-12-09 14:42:55,609 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-12-09 14:42:55,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:55,667 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-12-09 14:42:55,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 14:42:55,667 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-12-09 14:42:55,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:55,668 INFO L225 Difference]: With dead ends: 29 [2018-12-09 14:42:55,668 INFO L226 Difference]: Without dead ends: 23 [2018-12-09 14:42:55,668 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=430, Unknown=0, NotChecked=0, Total=600 [2018-12-09 14:42:55,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-12-09 14:42:55,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-12-09 14:42:55,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-12-09 14:42:55,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-12-09 14:42:55,671 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-12-09 14:42:55,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:55,671 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-12-09 14:42:55,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-09 14:42:55,671 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-12-09 14:42:55,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-09 14:42:55,672 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:55,672 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:55,672 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:55,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:55,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1129325499, now seen corresponding path program 11 times [2018-12-09 14:42:55,672 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:55,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:55,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:55,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:55,673 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:55,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:55,770 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,770 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,770 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:55,770 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:55,770 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:55,770 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:55,770 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:55,777 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:42:55,777 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 14:42:55,796 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-09 14:42:55,797 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:55,798 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:55,810 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:55,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:55,992 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,006 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:56,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 27 [2018-12-09 14:42:56,006 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:56,006 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 14:42:56,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 14:42:56,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=518, Unknown=0, NotChecked=0, Total=702 [2018-12-09 14:42:56,007 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 15 states. [2018-12-09 14:42:56,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:56,069 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-12-09 14:42:56,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 14:42:56,070 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 22 [2018-12-09 14:42:56,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:56,070 INFO L225 Difference]: With dead ends: 30 [2018-12-09 14:42:56,070 INFO L226 Difference]: Without dead ends: 24 [2018-12-09 14:42:56,071 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=184, Invalid=518, Unknown=0, NotChecked=0, Total=702 [2018-12-09 14:42:56,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-12-09 14:42:56,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-12-09 14:42:56,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-12-09 14:42:56,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-12-09 14:42:56,073 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-12-09 14:42:56,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:56,073 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-12-09 14:42:56,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 14:42:56,074 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-12-09 14:42:56,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-12-09 14:42:56,074 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:56,074 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:56,074 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:56,074 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:56,074 INFO L82 PathProgramCache]: Analyzing trace with hash 937700922, now seen corresponding path program 12 times [2018-12-09 14:42:56,074 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:56,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:56,075 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:56,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:56,075 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:56,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:56,184 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,184 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:56,184 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:56,185 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:56,185 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:56,185 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:56,185 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:56,191 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:42:56,191 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 14:42:56,199 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:42:56,199 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:56,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:56,230 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,230 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:56,453 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,467 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:56,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 29 [2018-12-09 14:42:56,468 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:56,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 14:42:56,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 14:42:56,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=616, Unknown=0, NotChecked=0, Total=812 [2018-12-09 14:42:56,468 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 16 states. [2018-12-09 14:42:56,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:56,560 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-12-09 14:42:56,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 14:42:56,560 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 23 [2018-12-09 14:42:56,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:56,560 INFO L225 Difference]: With dead ends: 31 [2018-12-09 14:42:56,560 INFO L226 Difference]: Without dead ends: 25 [2018-12-09 14:42:56,561 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=196, Invalid=616, Unknown=0, NotChecked=0, Total=812 [2018-12-09 14:42:56,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-12-09 14:42:56,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-12-09 14:42:56,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-12-09 14:42:56,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-12-09 14:42:56,563 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-12-09 14:42:56,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:56,563 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-12-09 14:42:56,563 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 14:42:56,563 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-12-09 14:42:56,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-12-09 14:42:56,563 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:56,563 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:56,564 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:56,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:56,564 INFO L82 PathProgramCache]: Analyzing trace with hash 591010533, now seen corresponding path program 13 times [2018-12-09 14:42:56,564 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:56,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:56,564 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:56,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:56,565 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:56,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:56,676 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:56,677 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:56,677 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:56,677 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:56,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:56,677 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:56,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:56,683 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 14:42:56,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:56,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:56,711 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,711 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:56,932 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:56,948 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:56,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 31 [2018-12-09 14:42:56,948 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:56,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-09 14:42:56,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-09 14:42:56,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=724, Unknown=0, NotChecked=0, Total=930 [2018-12-09 14:42:56,949 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 17 states. [2018-12-09 14:42:57,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:57,033 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-12-09 14:42:57,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 14:42:57,033 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 24 [2018-12-09 14:42:57,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:57,034 INFO L225 Difference]: With dead ends: 32 [2018-12-09 14:42:57,034 INFO L226 Difference]: Without dead ends: 26 [2018-12-09 14:42:57,035 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=206, Invalid=724, Unknown=0, NotChecked=0, Total=930 [2018-12-09 14:42:57,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-12-09 14:42:57,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-12-09 14:42:57,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-12-09 14:42:57,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-12-09 14:42:57,037 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-12-09 14:42:57,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:57,037 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-12-09 14:42:57,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-09 14:42:57,037 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-12-09 14:42:57,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 14:42:57,038 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:57,038 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:57,038 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:57,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:57,038 INFO L82 PathProgramCache]: Analyzing trace with hash -1566456934, now seen corresponding path program 14 times [2018-12-09 14:42:57,038 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:57,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:57,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:42:57,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:57,039 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:57,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:57,152 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:57,153 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:57,153 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:57,153 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:57,153 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:57,153 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:57,153 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:57,161 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:42:57,161 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 14:42:57,307 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-12-09 14:42:57,307 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:57,310 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:57,332 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:57,332 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:57,585 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:57,600 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:57,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 33 [2018-12-09 14:42:57,600 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:57,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-09 14:42:57,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-09 14:42:57,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-12-09 14:42:57,601 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 18 states. [2018-12-09 14:42:57,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:57,686 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-12-09 14:42:57,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 14:42:57,686 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 25 [2018-12-09 14:42:57,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:57,687 INFO L225 Difference]: With dead ends: 33 [2018-12-09 14:42:57,687 INFO L226 Difference]: Without dead ends: 27 [2018-12-09 14:42:57,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-12-09 14:42:57,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-12-09 14:42:57,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-12-09 14:42:57,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-12-09 14:42:57,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-12-09 14:42:57,690 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-12-09 14:42:57,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:57,690 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-12-09 14:42:57,690 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-09 14:42:57,690 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-12-09 14:42:57,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 14:42:57,690 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:57,691 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:57,691 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:57,691 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:57,691 INFO L82 PathProgramCache]: Analyzing trace with hash 271528325, now seen corresponding path program 15 times [2018-12-09 14:42:57,691 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:57,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:57,692 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:57,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:57,692 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:57,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:42:57,838 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:57,838 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:57,838 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 14:42:57,838 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 14:42:57,839 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 14:42:57,839 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:42:57,839 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:42:57,844 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:42:57,845 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 14:42:57,853 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:42:57,853 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:42:57,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:42:57,870 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:57,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:42:58,166 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:42:58,183 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 14:42:58,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 35 [2018-12-09 14:42:58,183 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 14:42:58,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 14:42:58,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 14:42:58,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-12-09 14:42:58,184 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 19 states. [2018-12-09 14:42:58,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:42:58,280 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-12-09 14:42:58,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 14:42:58,281 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 26 [2018-12-09 14:42:58,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:42:58,281 INFO L225 Difference]: With dead ends: 34 [2018-12-09 14:42:58,281 INFO L226 Difference]: Without dead ends: 28 [2018-12-09 14:42:58,281 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-12-09 14:42:58,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-12-09 14:42:58,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-12-09 14:42:58,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-12-09 14:42:58,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-12-09 14:42:58,284 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-12-09 14:42:58,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:42:58,284 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-12-09 14:42:58,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 14:42:58,284 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-12-09 14:42:58,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-09 14:42:58,285 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:42:58,285 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:42:58,285 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:42:58,285 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:42:58,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1414496506, now seen corresponding path program 16 times [2018-12-09 14:42:58,285 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 14:42:58,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:58,286 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 14:42:58,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 14:42:58,286 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 14:42:58,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 14:42:58,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 14:42:58,307 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 14:42:58,325 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 02:42:58 BoogieIcfgContainer [2018-12-09 14:42:58,325 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 14:42:58,325 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 14:42:58,325 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 14:42:58,325 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 14:42:58,326 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:42:52" (3/4) ... [2018-12-09 14:42:58,328 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-09 14:42:58,328 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 14:42:58,328 INFO L168 Benchmark]: Toolchain (without parser) took 5896.03 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 295.2 MB). Free memory was 949.7 MB in the beginning and 880.4 MB in the end (delta: 69.3 MB). Peak memory consumption was 364.5 MB. Max. memory is 11.5 GB. [2018-12-09 14:42:58,329 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 14:42:58,329 INFO L168 Benchmark]: CACSL2BoogieTranslator took 136.07 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 939.0 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-09 14:42:58,330 INFO L168 Benchmark]: Boogie Procedure Inliner took 12.33 ms. Allocated memory is still 1.0 GB. Free memory is still 939.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 14:42:58,330 INFO L168 Benchmark]: Boogie Preprocessor took 44.20 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.7 MB). Free memory was 939.0 MB in the beginning and 1.1 GB in the end (delta: -169.0 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. [2018-12-09 14:42:58,330 INFO L168 Benchmark]: RCFGBuilder took 120.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. [2018-12-09 14:42:58,331 INFO L168 Benchmark]: TraceAbstraction took 5577.27 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 182.5 MB). Free memory was 1.1 GB in the beginning and 880.4 MB in the end (delta: 214.7 MB). Peak memory consumption was 397.2 MB. Max. memory is 11.5 GB. [2018-12-09 14:42:58,331 INFO L168 Benchmark]: Witness Printer took 2.58 ms. Allocated memory is still 1.3 GB. Free memory is still 880.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 14:42:58,333 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 136.07 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 939.0 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 12.33 ms. Allocated memory is still 1.0 GB. Free memory is still 939.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.20 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.7 MB). Free memory was 939.0 MB in the beginning and 1.1 GB in the end (delta: -169.0 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 120.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 12.8 MB). Peak memory consumption was 12.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 5577.27 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 182.5 MB). Free memory was 1.1 GB in the beginning and 880.4 MB in the end (delta: 214.7 MB). Peak memory consumption was 397.2 MB. Max. memory is 11.5 GB. * Witness Printer took 2.58 ms. Allocated memory is still 1.3 GB. Free memory is still 880.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 6]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 45, overapproximation of bitwiseAnd at line 36. Possible FailurePath: [L23] unsigned short x = __VERIFIER_nondet_ushort(); [L24] unsigned short y = __VERIFIER_nondet_ushort(); [L25] unsigned int xx; [L26] unsigned int yy; [L27] unsigned int zz; [L28] unsigned int z = 0; [L29] unsigned int i = 0; VAL [i=0, x=3, y=2, z=0] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=1, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=2, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=3, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=4, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=5, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=6, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=7, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=8, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=9, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=10, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=11, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=12, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=13, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=14, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=15, x=3, y=2] [L30] COND TRUE i < sizeof(x) * 8 [L31] z |= ((x & (1U << i)) << i) | ((y & (1U << i)) << (i + 1)) [L32] i += 1U VAL [i=16, x=3, y=2] [L30] COND FALSE !(i < sizeof(x) * 8) VAL [i=16, x=3, y=2] [L34] xx = x [L35] yy = y [L36] xx = (xx | (xx << 8u)) & 16711935U [L37] xx = (xx | (xx << 4u)) & 252645135U [L38] xx = (xx | (xx << 2u)) & 858993459U [L39] xx = (xx | (xx << 1u)) & 1431655765U [L40] yy = (yy | (yy << 8u)) & 16711935U [L41] yy = (yy | (yy << 4u)) & 252645135U [L42] yy = (yy | (yy << 2u)) & 858993459U [L43] yy = (yy | (yy << 1u)) & 1431655765U [L45] zz = xx | (yy << 1U) VAL [i=16, x=3, y=2] [L47] CALL __VERIFIER_assert(z == zz) VAL [\old(cond)=0] [L5] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L6] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 18 locations, 1 error locations. UNSAFE Result, 5.5s OverallTime, 17 OverallIterations, 16 TraceHistogramMax, 0.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 182 SDtfs, 0 SDslu, 1032 SDs, 0 SdLazy, 1724 SolverSat, 120 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 723 GetRequests, 422 SyntacticMatches, 15 SemanticMatches, 286 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=28occurred in iteration=16, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 16 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.6s InterpolantComputationTime, 608 NumberOfCodeBlocks, 608 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 820 ConstructedInterpolants, 0 QuantifiedInterpolants, 64940 SizeOfPredicates, 15 NumberOfNonLiveVariables, 795 ConjunctsInSsa, 285 ConjunctsInUnsatCore, 46 InterpolantComputations, 1 PerfectInterpolantSequences, 0/2040 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-09 14:42:59,663 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 14:42:59,664 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 14:42:59,671 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-12-09 14:42:59,676 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 14:42:59,676 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 14:42:59,677 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 14:42:59,678 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 14:42:59,678 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 14:42:59,679 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 14:42:59,680 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 14:42:59,681 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 14:42:59,682 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 14:42:59,683 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 14:42:59,684 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 14:42:59,685 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 14:42:59,685 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 14:42:59,686 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 14:42:59,686 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 14:42:59,687 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 14:42:59,687 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 14:42:59,688 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 14:42:59,688 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 14:42:59,689 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 14:42:59,689 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 14:42:59,689 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 14:42:59,690 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 14:42:59,690 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 14:42:59,691 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 14:42:59,691 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-12-09 14:42:59,701 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 14:42:59,701 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 14:42:59,702 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 14:42:59,702 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 14:42:59,702 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 14:42:59,702 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 14:42:59,702 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 14:42:59,703 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 14:42:59,703 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 14:42:59,703 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 14:42:59,703 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 14:42:59,704 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-09 14:42:59,705 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-09 14:42:59,705 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 14:42:59,705 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 14:42:59,705 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 14:42:59,705 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 14:42:59,705 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 14:42:59,706 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 14:42:59,706 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 14:42:59,707 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-09 14:42:59,707 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 14:42:59,707 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-09 14:42:59,707 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-09 14:42:59,707 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a69112b8d023c6203418abb04301ebe890b3a5f5 [2018-12-09 14:42:59,731 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 14:42:59,739 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 14:42:59,741 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 14:42:59,742 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 14:42:59,742 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 14:42:59,743 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:42:59,780 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/d84dede80/b3240e804ffc432abc8cb28acbdd6e28/FLAGe7f9514b9 [2018-12-09 14:43:00,220 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 14:43:00,220 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/sv-benchmarks/c/bitvector/interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:43:00,224 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/d84dede80/b3240e804ffc432abc8cb28acbdd6e28/FLAGe7f9514b9 [2018-12-09 14:43:00,232 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/data/d84dede80/b3240e804ffc432abc8cb28acbdd6e28 [2018-12-09 14:43:00,234 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 14:43:00,235 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 14:43:00,235 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 14:43:00,235 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 14:43:00,237 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 14:43:00,238 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,239 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f98f186 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00, skipping insertion in model container [2018-12-09 14:43:00,239 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,243 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 14:43:00,254 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 14:43:00,343 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 14:43:00,345 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 14:43:00,358 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 14:43:00,366 INFO L195 MainTranslator]: Completed translation [2018-12-09 14:43:00,366 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00 WrapperNode [2018-12-09 14:43:00,367 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 14:43:00,367 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 14:43:00,367 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 14:43:00,367 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 14:43:00,372 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,376 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,380 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 14:43:00,380 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 14:43:00,381 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 14:43:00,381 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 14:43:00,386 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,386 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,387 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,387 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,390 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,393 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,394 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... [2018-12-09 14:43:00,395 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 14:43:00,395 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 14:43:00,395 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 14:43:00,395 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 14:43:00,396 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 14:43:00,457 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 14:43:00,457 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 14:43:00,457 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 14:43:00,457 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 14:43:00,457 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 14:43:00,457 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 14:43:00,457 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-09 14:43:00,457 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-09 14:43:00,552 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 14:43:00,552 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 14:43:00,552 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:43:00 BoogieIcfgContainer [2018-12-09 14:43:00,552 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 14:43:00,553 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 14:43:00,553 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 14:43:00,554 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 14:43:00,554 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 02:43:00" (1/3) ... [2018-12-09 14:43:00,555 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b0c69f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 02:43:00, skipping insertion in model container [2018-12-09 14:43:00,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 02:43:00" (2/3) ... [2018-12-09 14:43:00,555 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b0c69f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 02:43:00, skipping insertion in model container [2018-12-09 14:43:00,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:43:00" (3/3) ... [2018-12-09 14:43:00,556 INFO L112 eAbstractionObserver]: Analyzing ICFG interleave_bits_true-unreach-call_true-no-overflow.i [2018-12-09 14:43:00,562 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 14:43:00,566 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-09 14:43:00,575 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-09 14:43:00,591 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 14:43:00,592 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 14:43:00,592 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 14:43:00,592 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 14:43:00,592 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 14:43:00,592 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 14:43:00,592 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 14:43:00,592 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 14:43:00,592 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 14:43:00,601 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-12-09 14:43:00,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-12-09 14:43:00,604 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:43:00,605 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:43:00,606 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:43:00,609 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:43:00,609 INFO L82 PathProgramCache]: Analyzing trace with hash -480905734, now seen corresponding path program 1 times [2018-12-09 14:43:00,611 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 14:43:00,611 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 14:43:00,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:43:00,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:43:00,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:00,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:00,673 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 14:43:00,675 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 14:43:00,675 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 14:43:00,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 14:43:00,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 14:43:00,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 14:43:00,687 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 3 states. [2018-12-09 14:43:00,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:43:00,708 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2018-12-09 14:43:00,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 14:43:00,709 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-12-09 14:43:00,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:43:00,713 INFO L225 Difference]: With dead ends: 31 [2018-12-09 14:43:00,714 INFO L226 Difference]: Without dead ends: 13 [2018-12-09 14:43:00,715 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 14:43:00,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-12-09 14:43:00,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-12-09 14:43:00,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-12-09 14:43:00,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-12-09 14:43:00,736 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2018-12-09 14:43:00,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:43:00,736 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-12-09 14:43:00,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 14:43:00,736 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-12-09 14:43:00,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 14:43:00,737 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:43:00,737 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:43:00,738 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:43:00,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:43:00,738 INFO L82 PathProgramCache]: Analyzing trace with hash -436122843, now seen corresponding path program 1 times [2018-12-09 14:43:00,738 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 14:43:00,738 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 14:43:00,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:43:00,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:43:00,786 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:00,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:00,798 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:00,823 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:00,824 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:43:00,824 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:43:00,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 14:43:00,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 14:43:00,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:00,844 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:00,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:00,869 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:00,884 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 14:43:00,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4] total 7 [2018-12-09 14:43:00,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 14:43:00,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 14:43:00,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 14:43:00,885 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 7 states. [2018-12-09 14:43:00,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:43:00,927 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2018-12-09 14:43:00,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 14:43:00,928 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-12-09 14:43:00,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:43:00,928 INFO L225 Difference]: With dead ends: 22 [2018-12-09 14:43:00,928 INFO L226 Difference]: Without dead ends: 16 [2018-12-09 14:43:00,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2018-12-09 14:43:00,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-12-09 14:43:00,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-12-09 14:43:00,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-12-09 14:43:00,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-12-09 14:43:00,932 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2018-12-09 14:43:00,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:43:00,933 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-12-09 14:43:00,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 14:43:00,933 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-12-09 14:43:00,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 14:43:00,933 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:43:00,933 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:43:00,934 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:43:00,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:43:00,934 INFO L82 PathProgramCache]: Analyzing trace with hash -568891206, now seen corresponding path program 2 times [2018-12-09 14:43:00,934 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 14:43:00,934 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 14:43:00,947 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-09 14:43:00,999 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 14:43:00,999 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:43:01,001 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:01,025 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:01,026 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:01,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:01,115 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:43:01,115 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:43:01,121 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 14:43:01,137 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 14:43:01,138 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:43:01,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:01,159 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:01,159 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:01,331 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:01,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 14:43:01,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7] total 16 [2018-12-09 14:43:01,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 14:43:01,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 14:43:01,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=156, Unknown=0, NotChecked=0, Total=240 [2018-12-09 14:43:01,347 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 16 states. [2018-12-09 14:43:01,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:43:01,669 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2018-12-09 14:43:01,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 14:43:01,670 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 15 [2018-12-09 14:43:01,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:43:01,670 INFO L225 Difference]: With dead ends: 28 [2018-12-09 14:43:01,670 INFO L226 Difference]: Without dead ends: 22 [2018-12-09 14:43:01,671 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=155, Invalid=265, Unknown=0, NotChecked=0, Total=420 [2018-12-09 14:43:01,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-12-09 14:43:01,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-12-09 14:43:01,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-12-09 14:43:01,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-12-09 14:43:01,674 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 15 [2018-12-09 14:43:01,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:43:01,674 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-12-09 14:43:01,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 14:43:01,674 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-12-09 14:43:01,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 14:43:01,675 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:43:01,675 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:43:01,675 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:43:01,675 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:43:01,675 INFO L82 PathProgramCache]: Analyzing trace with hash -503267110, now seen corresponding path program 3 times [2018-12-09 14:43:01,675 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 14:43:01,676 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 14:43:01,689 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-12-09 14:43:01,790 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-09 14:43:01,790 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:43:01,793 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:01,868 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:01,868 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:02,326 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:02,328 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 14:43:02,328 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 14:43:02,340 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 14:43:02,388 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-12-09 14:43:02,388 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:43:02,392 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:02,412 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:02,412 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:43:02,419 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:02,444 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 14:43:02,445 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-09 14:43:02,445 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-09 14:43:02,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-09 14:43:02,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=391, Unknown=0, NotChecked=0, Total=552 [2018-12-09 14:43:02,445 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 24 states. [2018-12-09 14:43:03,035 WARN L180 SmtUtils]: Spent 322.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 35 [2018-12-09 14:43:03,353 WARN L180 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 35 [2018-12-09 14:43:03,611 WARN L180 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 35 [2018-12-09 14:43:03,893 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 35 [2018-12-09 14:43:04,543 WARN L180 SmtUtils]: Spent 244.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-12-09 14:43:05,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:43:05,017 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2018-12-09 14:43:05,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 14:43:05,018 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 21 [2018-12-09 14:43:05,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:43:05,018 INFO L225 Difference]: With dead ends: 40 [2018-12-09 14:43:05,018 INFO L226 Difference]: Without dead ends: 34 [2018-12-09 14:43:05,019 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 58 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 137 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=370, Invalid=820, Unknown=0, NotChecked=0, Total=1190 [2018-12-09 14:43:05,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-12-09 14:43:05,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-12-09 14:43:05,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-12-09 14:43:05,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2018-12-09 14:43:05,025 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 35 transitions. Word has length 21 [2018-12-09 14:43:05,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:43:05,025 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 35 transitions. [2018-12-09 14:43:05,025 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-09 14:43:05,025 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 35 transitions. [2018-12-09 14:43:05,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-09 14:43:05,026 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 14:43:05,026 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 14:43:05,026 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 14:43:05,026 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 14:43:05,026 INFO L82 PathProgramCache]: Analyzing trace with hash 1414496506, now seen corresponding path program 4 times [2018-12-09 14:43:05,026 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 14:43:05,026 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 14:43:05,039 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 14:43:05,203 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 14:43:05,203 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 14:43:05,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 14:43:06,459 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:43:06,459 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 14:44:47,796 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 136 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 14:44:47,799 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 14:44:47,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [22] total 41 [2018-12-09 14:44:47,799 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-12-09 14:44:47,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-12-09 14:44:47,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=354, Invalid=1285, Unknown=1, NotChecked=0, Total=1640 [2018-12-09 14:44:47,800 INFO L87 Difference]: Start difference. First operand 34 states and 35 transitions. Second operand 41 states. [2018-12-09 14:44:54,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 14:44:54,016 INFO L93 Difference]: Finished difference Result 34 states and 35 transitions. [2018-12-09 14:44:54,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-09 14:44:54,016 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 27 [2018-12-09 14:44:54,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 14:44:54,016 INFO L225 Difference]: With dead ends: 34 [2018-12-09 14:44:54,017 INFO L226 Difference]: Without dead ends: 0 [2018-12-09 14:44:54,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 103.0s TimeCoverageRelationStatistics Valid=381, Invalid=1424, Unknown=1, NotChecked=0, Total=1806 [2018-12-09 14:44:54,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-12-09 14:44:54,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-12-09 14:44:54,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-12-09 14:44:54,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-12-09 14:44:54,018 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 27 [2018-12-09 14:44:54,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 14:44:54,018 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-12-09 14:44:54,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-12-09 14:44:54,018 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-12-09 14:44:54,018 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-12-09 14:44:54,021 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-12-09 14:44:55,670 WARN L180 SmtUtils]: Spent 1.56 s on a formula simplification. DAG size of input: 269 DAG size of output: 223 [2018-12-09 14:44:55,918 WARN L180 SmtUtils]: Spent 246.00 ms on a formula simplification that was a NOOP. DAG size: 207 [2018-12-09 14:44:55,920 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-12-09 14:44:55,920 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-12-09 14:44:55,920 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-12-09 14:44:55,920 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-12-09 14:44:55,920 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-12-09 14:44:55,920 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-12-09 14:44:55,921 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 21 48) the Hoare annotation is: true [2018-12-09 14:44:55,921 INFO L444 ceAbstractionStarter]: At program point L30-2(lines 30 33) the Hoare annotation is: (let ((.cse3 ((_ zero_extend 16) main_~x~0)) (.cse4 ((_ zero_extend 16) main_~y~0))) (let ((.cse9 (bvor (_ bv0 32) (bvor (bvshl (bvand .cse3 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse4 (_ bv1 32)) (_ bv1 32)))))) (let ((.cse6 (bvor .cse9 (bvor (bvshl (bvand .cse3 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse4 (_ bv2 32)) (_ bv2 32)))))) (let ((.cse8 (bvor (bvor .cse6 (bvor (bvshl (bvand .cse3 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse4 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse3 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse4 (_ bv8 32)) (_ bv4 32)))))) (let ((.cse11 (bvor (bvor (bvor .cse8 (bvor (bvshl (bvand .cse3 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse4 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse3 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse4 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse3 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse4 (_ bv64 32)) (_ bv7 32)))))) (let ((.cse12 (bvor (bvor .cse11 (bvor (bvshl (bvand .cse3 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse4 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse3 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse4 (_ bv256 32)) (_ bv9 32)))))) (let ((.cse0 (bvor .cse12 (bvor (bvshl (bvand .cse3 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse4 (_ bv512 32)) (_ bv10 32)))))) (let ((.cse5 (bvor .cse0 (bvor (bvshl (bvand .cse3 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse4 (_ bv1024 32)) (_ bv11 32)))))) (let ((.cse10 (bvadd main_~i~0 (_ bv4294967295 32))) (.cse1 (bvor (bvor .cse5 (bvor (bvshl (bvand .cse3 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse4 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse3 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse4 (_ bv4096 32)) (_ bv13 32)))))) (let ((.cse2 (bvor .cse1 (bvor (bvshl (bvand .cse3 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse4 (_ bv8192 32)) (_ bv14 32))))) (.cse7 (let ((.cse15 (bvshl (_ bv1 32) .cse10))) (bvor (bvshl (bvand .cse3 .cse15) .cse10) (bvshl (bvand .cse4 .cse15) main_~i~0))))) (or (and (= (bvadd main_~i~0 (_ bv4294967286 32)) (_ bv0 32)) (= main_~z~0 .cse0)) (and (= .cse1 main_~z~0) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))) (and (= main_~z~0 .cse2) (= (bvadd main_~i~0 (_ bv4294967282 32)) (_ bv0 32))) (= (bvor (bvor .cse2 (bvor (bvshl (bvand .cse3 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse4 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse3 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse4 (_ bv32768 32)) (_ bv16 32)))) main_~z~0) (and (= .cse5 main_~z~0) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))) (and (= main_~z~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32))) (and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~z~0 (bvor .cse6 .cse7))) (and (= main_~z~0 (bvor .cse5 .cse7)) (= (_ bv12 32) main_~i~0)) (and (= main_~z~0 .cse8) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))) (and (= main_~z~0 .cse9) (= .cse10 (_ bv0 32))) (and (= main_~z~0 .cse11) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))) (and (= (bvor .cse2 .cse7) main_~z~0) (= (_ bv15 32) main_~i~0)) (and (= (bvor .cse11 .cse7) main_~z~0) (= (_ bv8 32) main_~i~0)) (and (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (= (bvor .cse8 .cse7) main_~z~0)) (and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= main_~z~0 .cse12)) (and (= main_~z~0 .cse6) (= (_ bv2 32) main_~i~0)) (and (= main_~z~0 (bvor (bvor .cse8 (let ((.cse14 (bvadd main_~i~0 (_ bv4294967294 32)))) (let ((.cse13 (bvshl (_ bv1 32) .cse14))) (bvor (bvshl (bvand .cse3 .cse13) .cse14) (bvshl (bvand .cse4 .cse13) .cse10))))) .cse7)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))))))))))) [2018-12-09 14:44:55,921 INFO L448 ceAbstractionStarter]: For program point L30-3(lines 30 33) no Hoare annotation was computed. [2018-12-09 14:44:55,921 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 21 48) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L444 ceAbstractionStarter]: At program point L47(line 47) the Hoare annotation is: (let ((.cse1 (bvult (bvadd main_~i~0 (_ bv7 32)) (_ bv16 32))) (.cse2 (bvult (bvadd main_~i~0 (_ bv8 32)) (_ bv16 32))) (.cse0 (bvult (bvadd main_~i~0 (_ bv6 32)) (_ bv16 32))) (.cse8 (bvult (bvadd main_~i~0 (_ bv5 32)) (_ bv16 32))) (.cse17 (bvult (bvadd main_~i~0 (_ bv4 32)) (_ bv16 32))) (.cse7 (bvult (bvadd main_~i~0 (_ bv1 32)) (_ bv16 32))) (.cse3 (bvult (bvadd main_~i~0 (_ bv9 32)) (_ bv16 32))) (.cse6 (bvult (bvadd main_~i~0 (_ bv2 32)) (_ bv16 32))) (.cse18 (bvult (bvadd main_~i~0 (_ bv3 32)) (_ bv16 32)))) (and (or (not .cse0) .cse1) (or (not .cse1) .cse2) (or .cse3 (not .cse2)) (= (let ((.cse4 ((_ zero_extend 16) main_~x~0)) (.cse5 ((_ zero_extend 16) main_~y~0))) (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (_ bv0 32) (bvor (bvshl (bvand .cse4 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse5 (_ bv1 32)) (_ bv1 32)))) (bvor (bvshl (bvand .cse4 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse5 (_ bv2 32)) (_ bv2 32)))) (bvor (bvshl (bvand .cse4 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse5 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse4 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse5 (_ bv8 32)) (_ bv4 32)))) (bvor (bvshl (bvand .cse4 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse5 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse4 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse5 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse4 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse5 (_ bv64 32)) (_ bv7 32)))) (bvor (bvshl (bvand .cse4 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse5 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse4 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse5 (_ bv256 32)) (_ bv9 32)))) (bvor (bvshl (bvand .cse4 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse5 (_ bv512 32)) (_ bv10 32)))) (bvor (bvshl (bvand .cse4 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse5 (_ bv1024 32)) (_ bv11 32)))) (bvor (bvshl (bvand .cse4 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse5 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse4 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse5 (_ bv4096 32)) (_ bv13 32)))) (bvor (bvshl (bvand .cse4 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse5 (_ bv8192 32)) (_ bv14 32)))) (bvor (bvshl (bvand .cse4 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse5 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse4 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse5 (_ bv32768 32)) (_ bv16 32))))) main_~z~0) (or .cse6 (not .cse7)) (or .cse0 (not .cse8)) (exists ((main_~y~0 (_ BitVec 16)) (main_~x~0 (_ BitVec 16))) (let ((.cse12 ((_ zero_extend 16) main_~x~0)) (.cse16 ((_ zero_extend 16) main_~y~0))) (and (= (bvor (bvand (_ bv1431655765 32) (let ((.cse9 (bvand (_ bv858993459 32) (let ((.cse10 (bvand (_ bv252645135 32) (let ((.cse11 (bvand (_ bv16711935 32) (bvor .cse12 (bvshl .cse12 (_ bv8 32)))))) (bvor .cse11 (bvshl .cse11 (_ bv4 32))))))) (bvor .cse10 (bvshl .cse10 (_ bv2 32))))))) (bvor .cse9 (bvshl .cse9 (_ bv1 32))))) (bvshl (bvand (_ bv1431655765 32) (let ((.cse13 (bvand (_ bv858993459 32) (let ((.cse14 (bvand (_ bv252645135 32) (let ((.cse15 (bvand (_ bv16711935 32) (bvor .cse16 (bvshl .cse16 (_ bv8 32)))))) (bvor .cse15 (bvshl .cse15 (_ bv4 32))))))) (bvor .cse14 (bvshl .cse14 (_ bv2 32))))))) (bvor .cse13 (bvshl .cse13 (_ bv1 32))))) (_ bv1 32))) main_~zz~0) (= (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (bvor (_ bv0 32) (bvor (bvshl (bvand .cse12 (_ bv1 32)) (_ bv0 32)) (bvshl (bvand .cse16 (_ bv1 32)) (_ bv1 32)))) (bvor (bvshl (bvand .cse12 (_ bv2 32)) (_ bv1 32)) (bvshl (bvand .cse16 (_ bv2 32)) (_ bv2 32)))) (bvor (bvshl (bvand .cse12 (_ bv4 32)) (_ bv2 32)) (bvshl (bvand .cse16 (_ bv4 32)) (_ bv3 32)))) (bvor (bvshl (bvand .cse12 (_ bv8 32)) (_ bv3 32)) (bvshl (bvand .cse16 (_ bv8 32)) (_ bv4 32)))) (bvor (bvshl (bvand .cse12 (_ bv16 32)) (_ bv4 32)) (bvshl (bvand .cse16 (_ bv16 32)) (_ bv5 32)))) (bvor (bvshl (bvand .cse12 (_ bv32 32)) (_ bv5 32)) (bvshl (bvand .cse16 (_ bv32 32)) (_ bv6 32)))) (bvor (bvshl (bvand .cse12 (_ bv64 32)) (_ bv6 32)) (bvshl (bvand .cse16 (_ bv64 32)) (_ bv7 32)))) (bvor (bvshl (bvand .cse12 (_ bv128 32)) (_ bv7 32)) (bvshl (bvand .cse16 (_ bv128 32)) (_ bv8 32)))) (bvor (bvshl (bvand .cse12 (_ bv256 32)) (_ bv8 32)) (bvshl (bvand .cse16 (_ bv256 32)) (_ bv9 32)))) (bvor (bvshl (bvand .cse12 (_ bv512 32)) (_ bv9 32)) (bvshl (bvand .cse16 (_ bv512 32)) (_ bv10 32)))) (bvor (bvshl (bvand .cse12 (_ bv1024 32)) (_ bv10 32)) (bvshl (bvand .cse16 (_ bv1024 32)) (_ bv11 32)))) (bvor (bvshl (bvand .cse12 (_ bv2048 32)) (_ bv11 32)) (bvshl (bvand .cse16 (_ bv2048 32)) (_ bv12 32)))) (bvor (bvshl (bvand .cse12 (_ bv4096 32)) (_ bv12 32)) (bvshl (bvand .cse16 (_ bv4096 32)) (_ bv13 32)))) (bvor (bvshl (bvand .cse12 (_ bv8192 32)) (_ bv13 32)) (bvshl (bvand .cse16 (_ bv8192 32)) (_ bv14 32)))) (bvor (bvshl (bvand .cse12 (_ bv16384 32)) (_ bv14 32)) (bvshl (bvand .cse16 (_ bv16384 32)) (_ bv15 32)))) (bvor (bvshl (bvand .cse12 (_ bv32768 32)) (_ bv15 32)) (bvshl (bvand .cse16 (_ bv32768 32)) (_ bv16 32)))) main_~z~0)))) (or .cse8 (not .cse17)) (or (not .cse18) .cse17) (or .cse7 (not (bvult main_~i~0 (_ bv16 32)))) (or (bvult (bvadd main_~i~0 (_ bv10 32)) (_ bv16 32)) (not .cse3)) (or (not .cse6) .cse18))) [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 21 48) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 4 9) the Hoare annotation is: true [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 4 9) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point L6(line 6) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point L5(lines 5 7) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 6) no Hoare annotation was computed. [2018-12-09 14:44:55,922 INFO L448 ceAbstractionStarter]: For program point L5-2(lines 4 9) no Hoare annotation was computed. [2018-12-09 14:44:55,942 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 02:44:55 BoogieIcfgContainer [2018-12-09 14:44:55,943 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 14:44:55,943 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 14:44:55,943 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 14:44:55,943 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 14:44:55,943 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 02:43:00" (3/4) ... [2018-12-09 14:44:55,946 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-12-09 14:44:55,950 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-12-09 14:44:55,950 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-12-09 14:44:55,950 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-12-09 14:44:55,952 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 7 nodes and edges [2018-12-09 14:44:55,952 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 2 nodes and edges [2018-12-09 14:44:55,952 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-12-09 14:44:55,984 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_c1850af5-e223-4259-b0e1-64571ee9cd31/bin-2019/utaipan/witness.graphml [2018-12-09 14:44:55,984 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 14:44:55,984 INFO L168 Benchmark]: Toolchain (without parser) took 115750.44 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 256.9 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -107.3 MB). Peak memory consumption was 149.6 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,985 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 14:44:55,985 INFO L168 Benchmark]: CACSL2BoogieTranslator took 131.71 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 934.0 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,985 INFO L168 Benchmark]: Boogie Procedure Inliner took 13.41 ms. Allocated memory is still 1.0 GB. Free memory is still 934.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 14:44:55,985 INFO L168 Benchmark]: Boogie Preprocessor took 14.42 ms. Allocated memory is still 1.0 GB. Free memory was 934.0 MB in the beginning and 928.6 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,986 INFO L168 Benchmark]: RCFGBuilder took 157.06 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.0 MB). Free memory was 928.6 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,986 INFO L168 Benchmark]: TraceAbstraction took 115390.05 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 126.9 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.7 MB). Peak memory consumption was 172.6 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,986 INFO L168 Benchmark]: Witness Printer took 41.22 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 9.0 MB). Peak memory consumption was 9.0 MB. Max. memory is 11.5 GB. [2018-12-09 14:44:55,988 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 131.71 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 934.0 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 13.41 ms. Allocated memory is still 1.0 GB. Free memory is still 934.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 14.42 ms. Allocated memory is still 1.0 GB. Free memory was 934.0 MB in the beginning and 928.6 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 157.06 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.0 MB). Free memory was 928.6 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 115390.05 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 126.9 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.7 MB). Peak memory consumption was 172.6 MB. Max. memory is 11.5 GB. * Witness Printer took 41.22 ms. Allocated memory is still 1.3 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 9.0 MB). Peak memory consumption was 9.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 6]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 30]: Loop Invariant Derived loop invariant: ((((((((((((((((~bvadd64(i, 4294967286bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32)))) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))) == z && ~bvadd64(i, 4294967283bv32) == 0bv32)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))) && ~bvadd64(i, 4294967282bv32) == 0bv32)) || ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16384bv32), 14bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16384bv32), 15bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32768bv32), 15bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32768bv32), 16bv32))) == z) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))) == z && ~bvadd64(i, 4294967285bv32) == 0bv32)) || (z == 0bv32 && i == 0bv32)) || (~bvadd64(i, 4294967293bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))))) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) && 12bv32 == i)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))) && ~bvadd64(i, 4294967292bv32) == 0bv32)) || (z == ~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))) && ~bvadd64(i, 4294967295bv32) == 0bv32)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))) && ~bvadd64(i, 4294967289bv32) == 0bv32)) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 512bv32), 9bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 512bv32), 10bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1024bv32), 10bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1024bv32), 11bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2048bv32), 11bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2048bv32), 12bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4096bv32), 12bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4096bv32), 13bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8192bv32), 13bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8192bv32), 14bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z && 15bv32 == i)) || (~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z && 8bv32 == i)) || (~bvadd64(i, 4294967291bv32) == 0bv32 && ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) == z)) || (~bvadd64(i, 4294967287bv32) == 0bv32 && z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 16bv32), 4bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 16bv32), 5bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 32bv32), 5bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 32bv32), 6bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 64bv32), 6bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 64bv32), 7bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 128bv32), 7bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 128bv32), 8bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 256bv32), 8bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 256bv32), 9bv32))))) || (z == ~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))) && 2bv32 == i)) || (z == ~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(~bvor32(0bv32, ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 1bv32), 0bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 1bv32), 1bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 2bv32), 1bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 2bv32), 2bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 4bv32), 2bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 4bv32), 3bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), 8bv32), 3bv32), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), 8bv32), 4bv32))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967294bv32))), ~bvadd64(i, 4294967294bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967294bv32))), ~bvadd64(i, 4294967295bv32)))), ~bvor32(~bvshl32(~bvand32(~zero_extendFrom16To32(x), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), ~bvadd64(i, 4294967295bv32)), ~bvshl32(~bvand32(~zero_extendFrom16To32(y), ~bvshl32(1bv32, ~bvadd64(i, 4294967295bv32))), i))) && ~bvadd64(i, 4294967290bv32) == 0bv32) - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 18 locations, 1 error locations. SAFE Result, 115.3s OverallTime, 5 OverallIterations, 16 TraceHistogramMax, 9.1s AutomataDifference, 0.0s DeadEndRemovalTime, 1.8s HoareAnnotationTime, HoareTripleCheckerStatistics: 56 SDtfs, 26 SDslu, 262 SDs, 0 SdLazy, 651 SolverSat, 79 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 268 GetRequests, 164 SyntacticMatches, 4 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 106.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=34occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 5 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 7 LocationsWithAnnotation, 11 PreInvPairs, 34 NumberOfFragments, 2913 HoareAnnotationTreeSize, 11 FomulaSimplifications, 1461 FormulaSimplificationTreeSizeReduction, 0.0s HoareSimplificationTime, 7 FomulaSimplificationsInter, 400 FormulaSimplificationTreeSizeReductionInter, 1.8s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 103.5s InterpolantComputationTime, 134 NumberOfCodeBlocks, 134 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 242 ConstructedInterpolants, 1 QuantifiedInterpolants, 279489 SizeOfPredicates, 15 NumberOfNonLiveVariables, 330 ConjunctsInSsa, 89 ConjunctsInUnsatCore, 15 InterpolantComputations, 2 PerfectInterpolantSequences, 136/536 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...