./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_pso.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_pso.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 08bc1f8a13d0042f6e36f207172f32d81bf0e164 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 18:56:05,888 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 18:56:05,889 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 18:56:05,898 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 18:56:05,898 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 18:56:05,899 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 18:56:05,900 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 18:56:05,901 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 18:56:05,902 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 18:56:05,903 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 18:56:05,903 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 18:56:05,904 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 18:56:05,904 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 18:56:05,905 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 18:56:05,906 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 18:56:05,906 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 18:56:05,907 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 18:56:05,908 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 18:56:05,909 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 18:56:05,911 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 18:56:05,911 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 18:56:05,912 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 18:56:05,914 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 18:56:05,914 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 18:56:05,914 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 18:56:05,915 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 18:56:05,916 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 18:56:05,916 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 18:56:05,917 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 18:56:05,918 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 18:56:05,918 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 18:56:05,918 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 18:56:05,918 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 18:56:05,918 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 18:56:05,919 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 18:56:05,920 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 18:56:05,920 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-09 18:56:05,930 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 18:56:05,930 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 18:56:05,931 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 18:56:05,931 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 18:56:05,931 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 18:56:05,932 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 18:56:05,932 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 18:56:05,933 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 18:56:05,933 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 18:56:05,933 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 18:56:05,933 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 18:56:05,933 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 18:56:05,934 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 18:56:05,934 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 18:56:05,935 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 18:56:05,935 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-09 18:56:05,936 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 08bc1f8a13d0042f6e36f207172f32d81bf0e164 [2018-12-09 18:56:05,958 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 18:56:05,967 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 18:56:05,969 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 18:56:05,971 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 18:56:05,971 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 18:56:05,971 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/mix041_pso.oepc_false-unreach-call.i [2018-12-09 18:56:06,011 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/data/7188fa290/1e453af0eb564ecaaaf63544a7b75e4e/FLAG16e243f22 [2018-12-09 18:56:06,388 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 18:56:06,388 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/sv-benchmarks/c/pthread-wmm/mix041_pso.oepc_false-unreach-call.i [2018-12-09 18:56:06,395 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/data/7188fa290/1e453af0eb564ecaaaf63544a7b75e4e/FLAG16e243f22 [2018-12-09 18:56:06,404 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/data/7188fa290/1e453af0eb564ecaaaf63544a7b75e4e [2018-12-09 18:56:06,406 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 18:56:06,407 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 18:56:06,407 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 18:56:06,407 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 18:56:06,409 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 18:56:06,410 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,411 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ca176b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06, skipping insertion in model container [2018-12-09 18:56:06,411 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,416 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 18:56:06,440 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 18:56:06,631 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 18:56:06,639 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 18:56:06,711 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 18:56:06,741 INFO L195 MainTranslator]: Completed translation [2018-12-09 18:56:06,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06 WrapperNode [2018-12-09 18:56:06,741 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 18:56:06,742 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 18:56:06,742 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 18:56:06,742 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 18:56:06,748 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,757 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,772 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 18:56:06,773 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 18:56:06,773 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 18:56:06,773 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 18:56:06,779 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,779 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,781 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,781 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,787 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,790 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,791 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... [2018-12-09 18:56:06,794 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 18:56:06,794 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 18:56:06,794 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 18:56:06,794 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 18:56:06,795 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-09 18:56:06,831 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-09 18:56:06,831 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-09 18:56:06,832 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-09 18:56:06,832 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-09 18:56:06,832 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 18:56:06,832 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 18:56:06,833 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-09 18:56:07,141 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 18:56:07,142 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-09 18:56:07,142 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 06:56:07 BoogieIcfgContainer [2018-12-09 18:56:07,142 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 18:56:07,142 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 18:56:07,142 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 18:56:07,145 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 18:56:07,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 06:56:06" (1/3) ... [2018-12-09 18:56:07,145 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5e1086 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 06:56:07, skipping insertion in model container [2018-12-09 18:56:07,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 06:56:06" (2/3) ... [2018-12-09 18:56:07,146 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f5e1086 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 06:56:07, skipping insertion in model container [2018-12-09 18:56:07,146 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 06:56:07" (3/3) ... [2018-12-09 18:56:07,147 INFO L112 eAbstractionObserver]: Analyzing ICFG mix041_pso.oepc_false-unreach-call.i [2018-12-09 18:56:07,174 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,174 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,175 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,176 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,177 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,178 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,179 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,179 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,179 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,179 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,180 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,181 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,182 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,183 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,184 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,185 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,186 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,187 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,188 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,189 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,190 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,191 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,192 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,193 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,194 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,195 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 18:56:07,202 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-09 18:56:07,202 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 18:56:07,208 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-09 18:56:07,219 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-09 18:56:07,236 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 18:56:07,237 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 18:56:07,237 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 18:56:07,237 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 18:56:07,237 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 18:56:07,237 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 18:56:07,237 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 18:56:07,237 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 18:56:07,245 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 143places, 181 transitions [2018-12-09 18:56:08,640 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34807 states. [2018-12-09 18:56:08,641 INFO L276 IsEmpty]: Start isEmpty. Operand 34807 states. [2018-12-09 18:56:08,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 18:56:08,646 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:08,646 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:08,648 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:08,652 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:08,652 INFO L82 PathProgramCache]: Analyzing trace with hash 375373260, now seen corresponding path program 1 times [2018-12-09 18:56:08,653 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:08,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:08,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:08,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:08,688 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:08,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:08,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:08,794 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:08,794 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:08,794 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:08,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:08,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:08,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:08,807 INFO L87 Difference]: Start difference. First operand 34807 states. Second operand 4 states. [2018-12-09 18:56:09,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:09,332 INFO L93 Difference]: Finished difference Result 60791 states and 234494 transitions. [2018-12-09 18:56:09,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 18:56:09,334 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-12-09 18:56:09,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:09,478 INFO L225 Difference]: With dead ends: 60791 [2018-12-09 18:56:09,478 INFO L226 Difference]: Without dead ends: 44271 [2018-12-09 18:56:09,480 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:09,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44271 states. [2018-12-09 18:56:10,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44271 to 27339. [2018-12-09 18:56:10,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27339 states. [2018-12-09 18:56:10,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27339 states to 27339 states and 105500 transitions. [2018-12-09 18:56:10,205 INFO L78 Accepts]: Start accepts. Automaton has 27339 states and 105500 transitions. Word has length 34 [2018-12-09 18:56:10,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:10,205 INFO L480 AbstractCegarLoop]: Abstraction has 27339 states and 105500 transitions. [2018-12-09 18:56:10,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:10,206 INFO L276 IsEmpty]: Start isEmpty. Operand 27339 states and 105500 transitions. [2018-12-09 18:56:10,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-12-09 18:56:10,209 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:10,209 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:10,210 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:10,210 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:10,210 INFO L82 PathProgramCache]: Analyzing trace with hash 510140563, now seen corresponding path program 1 times [2018-12-09 18:56:10,210 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:10,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:10,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:10,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:10,213 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:10,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:10,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:10,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:10,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:10,259 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:10,260 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:10,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:10,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:10,260 INFO L87 Difference]: Start difference. First operand 27339 states and 105500 transitions. Second operand 5 states. [2018-12-09 18:56:10,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:10,899 INFO L93 Difference]: Finished difference Result 64005 states and 235335 transitions. [2018-12-09 18:56:10,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:10,900 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-12-09 18:56:10,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:11,052 INFO L225 Difference]: With dead ends: 64005 [2018-12-09 18:56:11,052 INFO L226 Difference]: Without dead ends: 63453 [2018-12-09 18:56:11,052 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:11,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63453 states. [2018-12-09 18:56:11,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63453 to 41421. [2018-12-09 18:56:11,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41421 states. [2018-12-09 18:56:11,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41421 states to 41421 states and 152330 transitions. [2018-12-09 18:56:11,843 INFO L78 Accepts]: Start accepts. Automaton has 41421 states and 152330 transitions. Word has length 46 [2018-12-09 18:56:11,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:11,844 INFO L480 AbstractCegarLoop]: Abstraction has 41421 states and 152330 transitions. [2018-12-09 18:56:11,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:11,844 INFO L276 IsEmpty]: Start isEmpty. Operand 41421 states and 152330 transitions. [2018-12-09 18:56:11,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 18:56:11,848 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:11,848 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:11,848 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:11,849 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:11,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1974914378, now seen corresponding path program 1 times [2018-12-09 18:56:11,849 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:11,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:11,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:11,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:11,852 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:11,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:11,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:11,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:11,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:11,909 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:11,909 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:11,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:11,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:11,909 INFO L87 Difference]: Start difference. First operand 41421 states and 152330 transitions. Second operand 5 states. [2018-12-09 18:56:12,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:12,353 INFO L93 Difference]: Finished difference Result 81367 states and 298048 transitions. [2018-12-09 18:56:12,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:12,354 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-09 18:56:12,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:12,496 INFO L225 Difference]: With dead ends: 81367 [2018-12-09 18:56:12,496 INFO L226 Difference]: Without dead ends: 80855 [2018-12-09 18:56:12,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:12,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80855 states. [2018-12-09 18:56:13,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80855 to 45375. [2018-12-09 18:56:13,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45375 states. [2018-12-09 18:56:13,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45375 states to 45375 states and 166018 transitions. [2018-12-09 18:56:13,462 INFO L78 Accepts]: Start accepts. Automaton has 45375 states and 166018 transitions. Word has length 47 [2018-12-09 18:56:13,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:13,462 INFO L480 AbstractCegarLoop]: Abstraction has 45375 states and 166018 transitions. [2018-12-09 18:56:13,462 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:13,462 INFO L276 IsEmpty]: Start isEmpty. Operand 45375 states and 166018 transitions. [2018-12-09 18:56:13,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-09 18:56:13,468 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:13,468 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:13,468 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:13,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:13,469 INFO L82 PathProgramCache]: Analyzing trace with hash 489356304, now seen corresponding path program 1 times [2018-12-09 18:56:13,469 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:13,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:13,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:13,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:13,471 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:13,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:13,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:13,505 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:13,505 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 18:56:13,505 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:13,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 18:56:13,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 18:56:13,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:13,506 INFO L87 Difference]: Start difference. First operand 45375 states and 166018 transitions. Second operand 3 states. [2018-12-09 18:56:13,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:13,715 INFO L93 Difference]: Finished difference Result 65251 states and 235814 transitions. [2018-12-09 18:56:13,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 18:56:13,715 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2018-12-09 18:56:13,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:13,827 INFO L225 Difference]: With dead ends: 65251 [2018-12-09 18:56:13,828 INFO L226 Difference]: Without dead ends: 65251 [2018-12-09 18:56:13,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:14,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65251 states. [2018-12-09 18:56:14,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65251 to 50945. [2018-12-09 18:56:14,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50945 states. [2018-12-09 18:56:14,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50945 states to 50945 states and 184325 transitions. [2018-12-09 18:56:14,735 INFO L78 Accepts]: Start accepts. Automaton has 50945 states and 184325 transitions. Word has length 49 [2018-12-09 18:56:14,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:14,736 INFO L480 AbstractCegarLoop]: Abstraction has 50945 states and 184325 transitions. [2018-12-09 18:56:14,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 18:56:14,736 INFO L276 IsEmpty]: Start isEmpty. Operand 50945 states and 184325 transitions. [2018-12-09 18:56:14,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 18:56:14,743 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:14,743 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:14,743 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:14,743 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:14,744 INFO L82 PathProgramCache]: Analyzing trace with hash -1592139769, now seen corresponding path program 1 times [2018-12-09 18:56:14,744 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:14,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:14,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:14,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:14,745 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:14,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:14,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:14,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:14,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:14,812 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:14,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:14,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:14,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:14,812 INFO L87 Difference]: Start difference. First operand 50945 states and 184325 transitions. Second operand 6 states. [2018-12-09 18:56:15,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:15,349 INFO L93 Difference]: Finished difference Result 67511 states and 242185 transitions. [2018-12-09 18:56:15,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:15,349 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-12-09 18:56:15,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:15,464 INFO L225 Difference]: With dead ends: 67511 [2018-12-09 18:56:15,465 INFO L226 Difference]: Without dead ends: 67511 [2018-12-09 18:56:15,465 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:15,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67511 states. [2018-12-09 18:56:16,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67511 to 63436. [2018-12-09 18:56:16,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63436 states. [2018-12-09 18:56:16,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63436 states to 63436 states and 227584 transitions. [2018-12-09 18:56:16,496 INFO L78 Accepts]: Start accepts. Automaton has 63436 states and 227584 transitions. Word has length 53 [2018-12-09 18:56:16,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:16,496 INFO L480 AbstractCegarLoop]: Abstraction has 63436 states and 227584 transitions. [2018-12-09 18:56:16,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:16,496 INFO L276 IsEmpty]: Start isEmpty. Operand 63436 states and 227584 transitions. [2018-12-09 18:56:16,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 18:56:16,504 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:16,505 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:16,505 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:16,505 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:16,505 INFO L82 PathProgramCache]: Analyzing trace with hash 905876168, now seen corresponding path program 1 times [2018-12-09 18:56:16,505 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:16,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:16,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:16,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:16,508 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:16,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:16,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:16,572 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:16,572 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:16,572 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:16,572 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:16,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:16,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:16,573 INFO L87 Difference]: Start difference. First operand 63436 states and 227584 transitions. Second operand 7 states. [2018-12-09 18:56:17,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:17,430 INFO L93 Difference]: Finished difference Result 88528 states and 306201 transitions. [2018-12-09 18:56:17,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 18:56:17,431 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2018-12-09 18:56:17,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:17,576 INFO L225 Difference]: With dead ends: 88528 [2018-12-09 18:56:17,576 INFO L226 Difference]: Without dead ends: 88528 [2018-12-09 18:56:17,577 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-12-09 18:56:17,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88528 states. [2018-12-09 18:56:18,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88528 to 74881. [2018-12-09 18:56:18,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74881 states. [2018-12-09 18:56:18,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74881 states to 74881 states and 262987 transitions. [2018-12-09 18:56:18,799 INFO L78 Accepts]: Start accepts. Automaton has 74881 states and 262987 transitions. Word has length 53 [2018-12-09 18:56:18,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:18,799 INFO L480 AbstractCegarLoop]: Abstraction has 74881 states and 262987 transitions. [2018-12-09 18:56:18,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:18,799 INFO L276 IsEmpty]: Start isEmpty. Operand 74881 states and 262987 transitions. [2018-12-09 18:56:18,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 18:56:18,808 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:18,808 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:18,808 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:18,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:18,808 INFO L82 PathProgramCache]: Analyzing trace with hash 1793379849, now seen corresponding path program 1 times [2018-12-09 18:56:18,808 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:18,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:18,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:18,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:18,810 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:18,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:18,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:18,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:18,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:18,869 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:18,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:18,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:18,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:18,869 INFO L87 Difference]: Start difference. First operand 74881 states and 262987 transitions. Second operand 5 states. [2018-12-09 18:56:18,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:18,929 INFO L93 Difference]: Finished difference Result 15375 states and 48826 transitions. [2018-12-09 18:56:18,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 18:56:18,930 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-12-09 18:56:18,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:18,946 INFO L225 Difference]: With dead ends: 15375 [2018-12-09 18:56:18,946 INFO L226 Difference]: Without dead ends: 13789 [2018-12-09 18:56:18,946 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:18,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13789 states. [2018-12-09 18:56:19,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13789 to 13740. [2018-12-09 18:56:19,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13740 states. [2018-12-09 18:56:19,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13740 states to 13740 states and 43352 transitions. [2018-12-09 18:56:19,087 INFO L78 Accepts]: Start accepts. Automaton has 13740 states and 43352 transitions. Word has length 53 [2018-12-09 18:56:19,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:19,087 INFO L480 AbstractCegarLoop]: Abstraction has 13740 states and 43352 transitions. [2018-12-09 18:56:19,087 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:19,087 INFO L276 IsEmpty]: Start isEmpty. Operand 13740 states and 43352 transitions. [2018-12-09 18:56:19,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 18:56:19,088 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:19,088 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:19,088 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:19,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:19,089 INFO L82 PathProgramCache]: Analyzing trace with hash 35134875, now seen corresponding path program 1 times [2018-12-09 18:56:19,089 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:19,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,090 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:19,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,091 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:19,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:19,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:19,152 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:19,152 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:19,152 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:19,152 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:19,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:19,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:19,153 INFO L87 Difference]: Start difference. First operand 13740 states and 43352 transitions. Second operand 6 states. [2018-12-09 18:56:19,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:19,422 INFO L93 Difference]: Finished difference Result 19970 states and 62589 transitions. [2018-12-09 18:56:19,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:19,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-12-09 18:56:19,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:19,446 INFO L225 Difference]: With dead ends: 19970 [2018-12-09 18:56:19,446 INFO L226 Difference]: Without dead ends: 19898 [2018-12-09 18:56:19,446 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-12-09 18:56:19,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19898 states. [2018-12-09 18:56:19,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19898 to 14314. [2018-12-09 18:56:19,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14314 states. [2018-12-09 18:56:19,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14314 states to 14314 states and 45049 transitions. [2018-12-09 18:56:19,623 INFO L78 Accepts]: Start accepts. Automaton has 14314 states and 45049 transitions. Word has length 53 [2018-12-09 18:56:19,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:19,624 INFO L480 AbstractCegarLoop]: Abstraction has 14314 states and 45049 transitions. [2018-12-09 18:56:19,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:19,624 INFO L276 IsEmpty]: Start isEmpty. Operand 14314 states and 45049 transitions. [2018-12-09 18:56:19,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-09 18:56:19,626 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:19,627 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:19,627 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:19,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:19,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1993804535, now seen corresponding path program 1 times [2018-12-09 18:56:19,627 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:19,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:19,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,628 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:19,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:19,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:19,659 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:19,659 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:19,659 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:19,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:19,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:19,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:19,660 INFO L87 Difference]: Start difference. First operand 14314 states and 45049 transitions. Second operand 4 states. [2018-12-09 18:56:19,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:19,759 INFO L93 Difference]: Finished difference Result 16617 states and 52377 transitions. [2018-12-09 18:56:19,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 18:56:19,760 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 61 [2018-12-09 18:56:19,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:19,780 INFO L225 Difference]: With dead ends: 16617 [2018-12-09 18:56:19,780 INFO L226 Difference]: Without dead ends: 16617 [2018-12-09 18:56:19,780 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:19,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16617 states. [2018-12-09 18:56:19,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16617 to 15134. [2018-12-09 18:56:19,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15134 states. [2018-12-09 18:56:19,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15134 states to 15134 states and 47639 transitions. [2018-12-09 18:56:19,940 INFO L78 Accepts]: Start accepts. Automaton has 15134 states and 47639 transitions. Word has length 61 [2018-12-09 18:56:19,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:19,940 INFO L480 AbstractCegarLoop]: Abstraction has 15134 states and 47639 transitions. [2018-12-09 18:56:19,940 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:19,940 INFO L276 IsEmpty]: Start isEmpty. Operand 15134 states and 47639 transitions. [2018-12-09 18:56:19,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-09 18:56:19,943 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:19,943 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:19,943 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:19,943 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:19,943 INFO L82 PathProgramCache]: Analyzing trace with hash -558352426, now seen corresponding path program 1 times [2018-12-09 18:56:19,943 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:19,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:19,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:19,945 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:19,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:19,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:19,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:19,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:19,989 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:19,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:19,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:19,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:19,989 INFO L87 Difference]: Start difference. First operand 15134 states and 47639 transitions. Second operand 6 states. [2018-12-09 18:56:20,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:20,265 INFO L93 Difference]: Finished difference Result 28106 states and 88147 transitions. [2018-12-09 18:56:20,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:20,265 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 61 [2018-12-09 18:56:20,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:20,304 INFO L225 Difference]: With dead ends: 28106 [2018-12-09 18:56:20,304 INFO L226 Difference]: Without dead ends: 28035 [2018-12-09 18:56:20,304 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-12-09 18:56:20,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28035 states. [2018-12-09 18:56:20,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28035 to 17412. [2018-12-09 18:56:20,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17412 states. [2018-12-09 18:56:20,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17412 states to 17412 states and 54313 transitions. [2018-12-09 18:56:20,569 INFO L78 Accepts]: Start accepts. Automaton has 17412 states and 54313 transitions. Word has length 61 [2018-12-09 18:56:20,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:20,570 INFO L480 AbstractCegarLoop]: Abstraction has 17412 states and 54313 transitions. [2018-12-09 18:56:20,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:20,570 INFO L276 IsEmpty]: Start isEmpty. Operand 17412 states and 54313 transitions. [2018-12-09 18:56:20,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-09 18:56:20,574 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:20,574 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:20,574 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:20,574 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:20,574 INFO L82 PathProgramCache]: Analyzing trace with hash 962407834, now seen corresponding path program 1 times [2018-12-09 18:56:20,574 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:20,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:20,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:20,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:20,576 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:20,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:20,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:20,592 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:20,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 18:56:20,592 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:20,592 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 18:56:20,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 18:56:20,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:20,593 INFO L87 Difference]: Start difference. First operand 17412 states and 54313 transitions. Second operand 3 states. [2018-12-09 18:56:20,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:20,720 INFO L93 Difference]: Finished difference Result 18092 states and 56145 transitions. [2018-12-09 18:56:20,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 18:56:20,721 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2018-12-09 18:56:20,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:20,740 INFO L225 Difference]: With dead ends: 18092 [2018-12-09 18:56:20,740 INFO L226 Difference]: Without dead ends: 18092 [2018-12-09 18:56:20,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:20,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18092 states. [2018-12-09 18:56:20,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18092 to 17752. [2018-12-09 18:56:20,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17752 states. [2018-12-09 18:56:20,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17752 states to 17752 states and 55229 transitions. [2018-12-09 18:56:20,915 INFO L78 Accepts]: Start accepts. Automaton has 17752 states and 55229 transitions. Word has length 65 [2018-12-09 18:56:20,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:20,916 INFO L480 AbstractCegarLoop]: Abstraction has 17752 states and 55229 transitions. [2018-12-09 18:56:20,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 18:56:20,916 INFO L276 IsEmpty]: Start isEmpty. Operand 17752 states and 55229 transitions. [2018-12-09 18:56:20,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-09 18:56:20,920 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:20,920 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:20,920 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:20,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:20,920 INFO L82 PathProgramCache]: Analyzing trace with hash -901897063, now seen corresponding path program 1 times [2018-12-09 18:56:20,920 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:20,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:20,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:20,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:20,922 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:20,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:20,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:20,952 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:20,952 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:20,952 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:20,952 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:20,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:20,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:20,952 INFO L87 Difference]: Start difference. First operand 17752 states and 55229 transitions. Second operand 4 states. [2018-12-09 18:56:21,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:21,132 INFO L93 Difference]: Finished difference Result 21696 states and 66718 transitions. [2018-12-09 18:56:21,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 18:56:21,133 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2018-12-09 18:56:21,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:21,155 INFO L225 Difference]: With dead ends: 21696 [2018-12-09 18:56:21,155 INFO L226 Difference]: Without dead ends: 21696 [2018-12-09 18:56:21,156 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:21,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21696 states. [2018-12-09 18:56:21,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21696 to 19646. [2018-12-09 18:56:21,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19646 states. [2018-12-09 18:56:21,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19646 states to 19646 states and 60608 transitions. [2018-12-09 18:56:21,347 INFO L78 Accepts]: Start accepts. Automaton has 19646 states and 60608 transitions. Word has length 65 [2018-12-09 18:56:21,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:21,347 INFO L480 AbstractCegarLoop]: Abstraction has 19646 states and 60608 transitions. [2018-12-09 18:56:21,347 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:21,347 INFO L276 IsEmpty]: Start isEmpty. Operand 19646 states and 60608 transitions. [2018-12-09 18:56:21,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:21,352 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:21,352 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:21,353 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:21,353 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:21,353 INFO L82 PathProgramCache]: Analyzing trace with hash -987757598, now seen corresponding path program 1 times [2018-12-09 18:56:21,353 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:21,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:21,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:21,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:21,354 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:21,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:21,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:21,405 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:21,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:21,405 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:21,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:21,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:21,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:21,406 INFO L87 Difference]: Start difference. First operand 19646 states and 60608 transitions. Second operand 6 states. [2018-12-09 18:56:22,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:22,005 INFO L93 Difference]: Finished difference Result 23814 states and 72326 transitions. [2018-12-09 18:56:22,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 18:56:22,006 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2018-12-09 18:56:22,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:22,030 INFO L225 Difference]: With dead ends: 23814 [2018-12-09 18:56:22,030 INFO L226 Difference]: Without dead ends: 23814 [2018-12-09 18:56:22,030 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:22,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23814 states. [2018-12-09 18:56:22,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23814 to 22474. [2018-12-09 18:56:22,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22474 states. [2018-12-09 18:56:22,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22474 states to 22474 states and 68748 transitions. [2018-12-09 18:56:22,256 INFO L78 Accepts]: Start accepts. Automaton has 22474 states and 68748 transitions. Word has length 67 [2018-12-09 18:56:22,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:22,256 INFO L480 AbstractCegarLoop]: Abstraction has 22474 states and 68748 transitions. [2018-12-09 18:56:22,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:22,256 INFO L276 IsEmpty]: Start isEmpty. Operand 22474 states and 68748 transitions. [2018-12-09 18:56:22,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:22,263 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:22,263 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:22,263 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:22,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:22,264 INFO L82 PathProgramCache]: Analyzing trace with hash 1230000355, now seen corresponding path program 1 times [2018-12-09 18:56:22,264 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:22,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:22,265 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:22,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:22,265 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:22,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:22,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:22,337 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:22,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:22,337 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:22,337 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:22,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:22,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:22,338 INFO L87 Difference]: Start difference. First operand 22474 states and 68748 transitions. Second operand 6 states. [2018-12-09 18:56:22,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:22,615 INFO L93 Difference]: Finished difference Result 25702 states and 76208 transitions. [2018-12-09 18:56:22,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 18:56:22,615 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2018-12-09 18:56:22,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:22,644 INFO L225 Difference]: With dead ends: 25702 [2018-12-09 18:56:22,644 INFO L226 Difference]: Without dead ends: 25702 [2018-12-09 18:56:22,644 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-09 18:56:22,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25702 states. [2018-12-09 18:56:22,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25702 to 22858. [2018-12-09 18:56:22,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22858 states. [2018-12-09 18:56:22,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22858 states to 22858 states and 68854 transitions. [2018-12-09 18:56:22,881 INFO L78 Accepts]: Start accepts. Automaton has 22858 states and 68854 transitions. Word has length 67 [2018-12-09 18:56:22,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:22,881 INFO L480 AbstractCegarLoop]: Abstraction has 22858 states and 68854 transitions. [2018-12-09 18:56:22,881 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:22,881 INFO L276 IsEmpty]: Start isEmpty. Operand 22858 states and 68854 transitions. [2018-12-09 18:56:22,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:22,888 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:22,888 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:22,888 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:22,888 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:22,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1441351268, now seen corresponding path program 1 times [2018-12-09 18:56:22,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:22,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:22,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:22,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:22,889 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:22,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:22,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:22,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:22,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:22,921 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:22,922 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:22,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:22,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:22,922 INFO L87 Difference]: Start difference. First operand 22858 states and 68854 transitions. Second operand 5 states. [2018-12-09 18:56:23,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:23,162 INFO L93 Difference]: Finished difference Result 29793 states and 89419 transitions. [2018-12-09 18:56:23,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 18:56:23,163 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-09 18:56:23,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:23,196 INFO L225 Difference]: With dead ends: 29793 [2018-12-09 18:56:23,196 INFO L226 Difference]: Without dead ends: 29793 [2018-12-09 18:56:23,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:23,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29793 states. [2018-12-09 18:56:23,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29793 to 26814. [2018-12-09 18:56:23,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26814 states. [2018-12-09 18:56:23,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26814 states to 26814 states and 80363 transitions. [2018-12-09 18:56:23,506 INFO L78 Accepts]: Start accepts. Automaton has 26814 states and 80363 transitions. Word has length 67 [2018-12-09 18:56:23,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:23,506 INFO L480 AbstractCegarLoop]: Abstraction has 26814 states and 80363 transitions. [2018-12-09 18:56:23,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:23,506 INFO L276 IsEmpty]: Start isEmpty. Operand 26814 states and 80363 transitions. [2018-12-09 18:56:23,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:23,515 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:23,515 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:23,516 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:23,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:23,516 INFO L82 PathProgramCache]: Analyzing trace with hash 930817091, now seen corresponding path program 1 times [2018-12-09 18:56:23,516 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:23,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:23,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:23,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:23,517 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:23,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:23,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:23,552 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:23,552 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:23,552 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:23,552 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:23,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:23,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:23,553 INFO L87 Difference]: Start difference. First operand 26814 states and 80363 transitions. Second operand 5 states. [2018-12-09 18:56:23,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:23,857 INFO L93 Difference]: Finished difference Result 36420 states and 108433 transitions. [2018-12-09 18:56:23,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:23,858 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-09 18:56:23,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:23,899 INFO L225 Difference]: With dead ends: 36420 [2018-12-09 18:56:23,899 INFO L226 Difference]: Without dead ends: 36420 [2018-12-09 18:56:23,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:23,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36420 states. [2018-12-09 18:56:24,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36420 to 29428. [2018-12-09 18:56:24,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29428 states. [2018-12-09 18:56:24,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29428 states to 29428 states and 87839 transitions. [2018-12-09 18:56:24,250 INFO L78 Accepts]: Start accepts. Automaton has 29428 states and 87839 transitions. Word has length 67 [2018-12-09 18:56:24,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:24,250 INFO L480 AbstractCegarLoop]: Abstraction has 29428 states and 87839 transitions. [2018-12-09 18:56:24,251 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:24,251 INFO L276 IsEmpty]: Start isEmpty. Operand 29428 states and 87839 transitions. [2018-12-09 18:56:24,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:24,258 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:24,258 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:24,258 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:24,258 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:24,258 INFO L82 PathProgramCache]: Analyzing trace with hash -876637372, now seen corresponding path program 1 times [2018-12-09 18:56:24,258 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:24,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:24,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,259 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:24,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:24,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:24,304 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:24,304 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:24,304 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:24,304 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:24,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:24,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:24,305 INFO L87 Difference]: Start difference. First operand 29428 states and 87839 transitions. Second operand 5 states. [2018-12-09 18:56:24,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:24,347 INFO L93 Difference]: Finished difference Result 9076 states and 21915 transitions. [2018-12-09 18:56:24,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 18:56:24,347 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-09 18:56:24,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:24,352 INFO L225 Difference]: With dead ends: 9076 [2018-12-09 18:56:24,352 INFO L226 Difference]: Without dead ends: 7224 [2018-12-09 18:56:24,353 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:24,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7224 states. [2018-12-09 18:56:24,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7224 to 6121. [2018-12-09 18:56:24,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6121 states. [2018-12-09 18:56:24,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6121 states to 6121 states and 14386 transitions. [2018-12-09 18:56:24,399 INFO L78 Accepts]: Start accepts. Automaton has 6121 states and 14386 transitions. Word has length 67 [2018-12-09 18:56:24,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:24,399 INFO L480 AbstractCegarLoop]: Abstraction has 6121 states and 14386 transitions. [2018-12-09 18:56:24,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:24,399 INFO L276 IsEmpty]: Start isEmpty. Operand 6121 states and 14386 transitions. [2018-12-09 18:56:24,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 18:56:24,402 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:24,402 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:24,402 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:24,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:24,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1392892313, now seen corresponding path program 1 times [2018-12-09 18:56:24,402 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:24,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:24,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,403 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:24,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:24,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:24,416 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:24,416 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 18:56:24,416 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:24,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 18:56:24,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 18:56:24,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:24,416 INFO L87 Difference]: Start difference. First operand 6121 states and 14386 transitions. Second operand 3 states. [2018-12-09 18:56:24,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:24,439 INFO L93 Difference]: Finished difference Result 8340 states and 19493 transitions. [2018-12-09 18:56:24,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 18:56:24,439 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2018-12-09 18:56:24,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:24,444 INFO L225 Difference]: With dead ends: 8340 [2018-12-09 18:56:24,444 INFO L226 Difference]: Without dead ends: 8340 [2018-12-09 18:56:24,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:24,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8340 states. [2018-12-09 18:56:24,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8340 to 6060. [2018-12-09 18:56:24,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6060 states. [2018-12-09 18:56:24,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6060 states to 6060 states and 13926 transitions. [2018-12-09 18:56:24,490 INFO L78 Accepts]: Start accepts. Automaton has 6060 states and 13926 transitions. Word has length 67 [2018-12-09 18:56:24,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:24,490 INFO L480 AbstractCegarLoop]: Abstraction has 6060 states and 13926 transitions. [2018-12-09 18:56:24,490 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 18:56:24,490 INFO L276 IsEmpty]: Start isEmpty. Operand 6060 states and 13926 transitions. [2018-12-09 18:56:24,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 18:56:24,493 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:24,493 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:24,493 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:24,493 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:24,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1912290010, now seen corresponding path program 1 times [2018-12-09 18:56:24,494 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:24,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:24,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,495 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:24,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:24,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:24,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:24,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:24,522 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:24,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:24,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:24,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:24,523 INFO L87 Difference]: Start difference. First operand 6060 states and 13926 transitions. Second operand 5 states. [2018-12-09 18:56:24,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:24,628 INFO L93 Difference]: Finished difference Result 7230 states and 16567 transitions. [2018-12-09 18:56:24,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 18:56:24,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-09 18:56:24,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:24,633 INFO L225 Difference]: With dead ends: 7230 [2018-12-09 18:56:24,633 INFO L226 Difference]: Without dead ends: 7230 [2018-12-09 18:56:24,634 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-09 18:56:24,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7230 states. [2018-12-09 18:56:24,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7230 to 6504. [2018-12-09 18:56:24,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6504 states. [2018-12-09 18:56:24,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6504 states to 6504 states and 14930 transitions. [2018-12-09 18:56:24,678 INFO L78 Accepts]: Start accepts. Automaton has 6504 states and 14930 transitions. Word has length 73 [2018-12-09 18:56:24,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:24,678 INFO L480 AbstractCegarLoop]: Abstraction has 6504 states and 14930 transitions. [2018-12-09 18:56:24,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:24,679 INFO L276 IsEmpty]: Start isEmpty. Operand 6504 states and 14930 transitions. [2018-12-09 18:56:24,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 18:56:24,682 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:24,682 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:24,683 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:24,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:24,683 INFO L82 PathProgramCache]: Analyzing trace with hash -639866951, now seen corresponding path program 1 times [2018-12-09 18:56:24,683 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:24,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,684 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:24,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:24,684 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:24,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:24,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:24,716 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:24,716 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:24,716 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:24,716 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:24,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:24,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:24,717 INFO L87 Difference]: Start difference. First operand 6504 states and 14930 transitions. Second operand 7 states. [2018-12-09 18:56:24,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:24,960 INFO L93 Difference]: Finished difference Result 7577 states and 17192 transitions. [2018-12-09 18:56:24,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 18:56:24,960 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 73 [2018-12-09 18:56:24,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:24,965 INFO L225 Difference]: With dead ends: 7577 [2018-12-09 18:56:24,965 INFO L226 Difference]: Without dead ends: 7458 [2018-12-09 18:56:24,966 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=211, Unknown=0, NotChecked=0, Total=272 [2018-12-09 18:56:24,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7458 states. [2018-12-09 18:56:25,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7458 to 6601. [2018-12-09 18:56:25,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6601 states. [2018-12-09 18:56:25,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6601 states to 6601 states and 15023 transitions. [2018-12-09 18:56:25,014 INFO L78 Accepts]: Start accepts. Automaton has 6601 states and 15023 transitions. Word has length 73 [2018-12-09 18:56:25,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:25,015 INFO L480 AbstractCegarLoop]: Abstraction has 6601 states and 15023 transitions. [2018-12-09 18:56:25,015 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:25,015 INFO L276 IsEmpty]: Start isEmpty. Operand 6601 states and 15023 transitions. [2018-12-09 18:56:25,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-09 18:56:25,019 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:25,019 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:25,019 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:25,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:25,019 INFO L82 PathProgramCache]: Analyzing trace with hash -1900952980, now seen corresponding path program 1 times [2018-12-09 18:56:25,020 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:25,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:25,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,021 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:25,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:25,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:25,054 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:25,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:25,055 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:25,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:25,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:25,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:25,055 INFO L87 Difference]: Start difference. First operand 6601 states and 15023 transitions. Second operand 4 states. [2018-12-09 18:56:25,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:25,227 INFO L93 Difference]: Finished difference Result 10288 states and 23294 transitions. [2018-12-09 18:56:25,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 18:56:25,228 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2018-12-09 18:56:25,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:25,234 INFO L225 Difference]: With dead ends: 10288 [2018-12-09 18:56:25,234 INFO L226 Difference]: Without dead ends: 10288 [2018-12-09 18:56:25,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:25,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10288 states. [2018-12-09 18:56:25,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10288 to 7721. [2018-12-09 18:56:25,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7721 states. [2018-12-09 18:56:25,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7721 states to 7721 states and 17357 transitions. [2018-12-09 18:56:25,298 INFO L78 Accepts]: Start accepts. Automaton has 7721 states and 17357 transitions. Word has length 92 [2018-12-09 18:56:25,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:25,298 INFO L480 AbstractCegarLoop]: Abstraction has 7721 states and 17357 transitions. [2018-12-09 18:56:25,298 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:25,298 INFO L276 IsEmpty]: Start isEmpty. Operand 7721 states and 17357 transitions. [2018-12-09 18:56:25,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-09 18:56:25,303 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:25,303 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:25,303 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:25,303 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:25,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1260790235, now seen corresponding path program 1 times [2018-12-09 18:56:25,303 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:25,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:25,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,304 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:25,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:25,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:25,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:25,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:25,343 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:25,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:25,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:25,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:25,344 INFO L87 Difference]: Start difference. First operand 7721 states and 17357 transitions. Second operand 4 states. [2018-12-09 18:56:25,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:25,406 INFO L93 Difference]: Finished difference Result 8286 states and 18650 transitions. [2018-12-09 18:56:25,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 18:56:25,406 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2018-12-09 18:56:25,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:25,414 INFO L225 Difference]: With dead ends: 8286 [2018-12-09 18:56:25,414 INFO L226 Difference]: Without dead ends: 8286 [2018-12-09 18:56:25,414 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:25,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8286 states. [2018-12-09 18:56:25,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8286 to 7627. [2018-12-09 18:56:25,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7627 states. [2018-12-09 18:56:25,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7627 states to 7627 states and 17252 transitions. [2018-12-09 18:56:25,477 INFO L78 Accepts]: Start accepts. Automaton has 7627 states and 17252 transitions. Word has length 92 [2018-12-09 18:56:25,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:25,477 INFO L480 AbstractCegarLoop]: Abstraction has 7627 states and 17252 transitions. [2018-12-09 18:56:25,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:25,477 INFO L276 IsEmpty]: Start isEmpty. Operand 7627 states and 17252 transitions. [2018-12-09 18:56:25,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:25,482 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:25,483 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:25,483 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:25,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:25,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1344279218, now seen corresponding path program 1 times [2018-12-09 18:56:25,483 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:25,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:25,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,484 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:25,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:25,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:25,521 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:25,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:25,522 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:25,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:25,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:25,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:25,522 INFO L87 Difference]: Start difference. First operand 7627 states and 17252 transitions. Second operand 5 states. [2018-12-09 18:56:25,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:25,743 INFO L93 Difference]: Finished difference Result 7193 states and 16104 transitions. [2018-12-09 18:56:25,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 18:56:25,743 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2018-12-09 18:56:25,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:25,748 INFO L225 Difference]: With dead ends: 7193 [2018-12-09 18:56:25,748 INFO L226 Difference]: Without dead ends: 7193 [2018-12-09 18:56:25,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:25,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7193 states. [2018-12-09 18:56:25,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7193 to 6761. [2018-12-09 18:56:25,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6761 states. [2018-12-09 18:56:25,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6761 states to 6761 states and 15167 transitions. [2018-12-09 18:56:25,794 INFO L78 Accepts]: Start accepts. Automaton has 6761 states and 15167 transitions. Word has length 94 [2018-12-09 18:56:25,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:25,794 INFO L480 AbstractCegarLoop]: Abstraction has 6761 states and 15167 transitions. [2018-12-09 18:56:25,794 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:25,794 INFO L276 IsEmpty]: Start isEmpty. Operand 6761 states and 15167 transitions. [2018-12-09 18:56:25,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:25,798 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:25,798 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:25,799 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:25,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:25,799 INFO L82 PathProgramCache]: Analyzing trace with hash 895526994, now seen corresponding path program 1 times [2018-12-09 18:56:25,799 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:25,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:25,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:25,800 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:25,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:25,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:25,876 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:25,876 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 18:56:25,876 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:25,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 18:56:25,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 18:56:25,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-12-09 18:56:25,877 INFO L87 Difference]: Start difference. First operand 6761 states and 15167 transitions. Second operand 9 states. [2018-12-09 18:56:27,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:27,871 INFO L93 Difference]: Finished difference Result 18736 states and 41902 transitions. [2018-12-09 18:56:27,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-12-09 18:56:27,871 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2018-12-09 18:56:27,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:27,888 INFO L225 Difference]: With dead ends: 18736 [2018-12-09 18:56:27,888 INFO L226 Difference]: Without dead ends: 18617 [2018-12-09 18:56:27,889 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 448 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=354, Invalid=1206, Unknown=0, NotChecked=0, Total=1560 [2018-12-09 18:56:27,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18617 states. [2018-12-09 18:56:28,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18617 to 10167. [2018-12-09 18:56:28,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10167 states. [2018-12-09 18:56:28,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10167 states to 10167 states and 23043 transitions. [2018-12-09 18:56:28,031 INFO L78 Accepts]: Start accepts. Automaton has 10167 states and 23043 transitions. Word has length 94 [2018-12-09 18:56:28,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:28,031 INFO L480 AbstractCegarLoop]: Abstraction has 10167 states and 23043 transitions. [2018-12-09 18:56:28,032 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 18:56:28,032 INFO L276 IsEmpty]: Start isEmpty. Operand 10167 states and 23043 transitions. [2018-12-09 18:56:28,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:28,044 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:28,044 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:28,044 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:28,044 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:28,045 INFO L82 PathProgramCache]: Analyzing trace with hash 2140291475, now seen corresponding path program 1 times [2018-12-09 18:56:28,045 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:28,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:28,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,046 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:28,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:28,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:28,114 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:28,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:28,114 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:28,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:28,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:28,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:28,115 INFO L87 Difference]: Start difference. First operand 10167 states and 23043 transitions. Second operand 6 states. [2018-12-09 18:56:28,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:28,254 INFO L93 Difference]: Finished difference Result 10856 states and 24055 transitions. [2018-12-09 18:56:28,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 18:56:28,255 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2018-12-09 18:56:28,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:28,263 INFO L225 Difference]: With dead ends: 10856 [2018-12-09 18:56:28,263 INFO L226 Difference]: Without dead ends: 10816 [2018-12-09 18:56:28,263 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:28,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10816 states. [2018-12-09 18:56:28,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10816 to 9286. [2018-12-09 18:56:28,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9286 states. [2018-12-09 18:56:28,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9286 states to 9286 states and 20765 transitions. [2018-12-09 18:56:28,350 INFO L78 Accepts]: Start accepts. Automaton has 9286 states and 20765 transitions. Word has length 94 [2018-12-09 18:56:28,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:28,350 INFO L480 AbstractCegarLoop]: Abstraction has 9286 states and 20765 transitions. [2018-12-09 18:56:28,350 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:28,350 INFO L276 IsEmpty]: Start isEmpty. Operand 9286 states and 20765 transitions. [2018-12-09 18:56:28,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:28,357 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:28,357 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:28,357 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:28,357 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:28,357 INFO L82 PathProgramCache]: Analyzing trace with hash -538468846, now seen corresponding path program 1 times [2018-12-09 18:56:28,357 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:28,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:28,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,359 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:28,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:28,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:28,431 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:28,431 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:28,431 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:28,431 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:28,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:28,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:28,431 INFO L87 Difference]: Start difference. First operand 9286 states and 20765 transitions. Second operand 5 states. [2018-12-09 18:56:28,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:28,619 INFO L93 Difference]: Finished difference Result 11493 states and 25484 transitions. [2018-12-09 18:56:28,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 18:56:28,619 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2018-12-09 18:56:28,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:28,627 INFO L225 Difference]: With dead ends: 11493 [2018-12-09 18:56:28,627 INFO L226 Difference]: Without dead ends: 11313 [2018-12-09 18:56:28,627 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:28,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11313 states. [2018-12-09 18:56:28,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11313 to 10119. [2018-12-09 18:56:28,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10119 states. [2018-12-09 18:56:28,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10119 states to 10119 states and 22559 transitions. [2018-12-09 18:56:28,711 INFO L78 Accepts]: Start accepts. Automaton has 10119 states and 22559 transitions. Word has length 94 [2018-12-09 18:56:28,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:28,711 INFO L480 AbstractCegarLoop]: Abstraction has 10119 states and 22559 transitions. [2018-12-09 18:56:28,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:28,711 INFO L276 IsEmpty]: Start isEmpty. Operand 10119 states and 22559 transitions. [2018-12-09 18:56:28,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:28,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:28,734 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:28,734 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:28,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:28,734 INFO L82 PathProgramCache]: Analyzing trace with hash -713260941, now seen corresponding path program 1 times [2018-12-09 18:56:28,734 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:28,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:28,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:28,735 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:28,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:28,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:28,769 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:28,769 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:28,769 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:28,769 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:28,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:28,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:28,769 INFO L87 Difference]: Start difference. First operand 10119 states and 22559 transitions. Second operand 5 states. [2018-12-09 18:56:28,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:28,950 INFO L93 Difference]: Finished difference Result 12637 states and 27963 transitions. [2018-12-09 18:56:28,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:28,951 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2018-12-09 18:56:28,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:28,959 INFO L225 Difference]: With dead ends: 12637 [2018-12-09 18:56:28,959 INFO L226 Difference]: Without dead ends: 12504 [2018-12-09 18:56:28,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:28,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12504 states. [2018-12-09 18:56:29,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12504 to 10284. [2018-12-09 18:56:29,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10284 states. [2018-12-09 18:56:29,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10284 states to 10284 states and 22897 transitions. [2018-12-09 18:56:29,039 INFO L78 Accepts]: Start accepts. Automaton has 10284 states and 22897 transitions. Word has length 94 [2018-12-09 18:56:29,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:29,039 INFO L480 AbstractCegarLoop]: Abstraction has 10284 states and 22897 transitions. [2018-12-09 18:56:29,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:29,039 INFO L276 IsEmpty]: Start isEmpty. Operand 10284 states and 22897 transitions. [2018-12-09 18:56:29,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:29,045 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:29,045 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:29,045 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:29,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:29,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1759786015, now seen corresponding path program 1 times [2018-12-09 18:56:29,046 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:29,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:29,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,046 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:29,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:29,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:29,081 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:29,081 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:29,081 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:29,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:29,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:29,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:29,082 INFO L87 Difference]: Start difference. First operand 10284 states and 22897 transitions. Second operand 5 states. [2018-12-09 18:56:29,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:29,157 INFO L93 Difference]: Finished difference Result 8323 states and 18531 transitions. [2018-12-09 18:56:29,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 18:56:29,158 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2018-12-09 18:56:29,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:29,163 INFO L225 Difference]: With dead ends: 8323 [2018-12-09 18:56:29,163 INFO L226 Difference]: Without dead ends: 8323 [2018-12-09 18:56:29,163 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:29,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8323 states. [2018-12-09 18:56:29,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8323 to 6728. [2018-12-09 18:56:29,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6728 states. [2018-12-09 18:56:29,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6728 states to 6728 states and 15087 transitions. [2018-12-09 18:56:29,216 INFO L78 Accepts]: Start accepts. Automaton has 6728 states and 15087 transitions. Word has length 94 [2018-12-09 18:56:29,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:29,217 INFO L480 AbstractCegarLoop]: Abstraction has 6728 states and 15087 transitions. [2018-12-09 18:56:29,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:29,217 INFO L276 IsEmpty]: Start isEmpty. Operand 6728 states and 15087 transitions. [2018-12-09 18:56:29,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:29,221 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:29,221 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:29,221 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:29,221 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:29,221 INFO L82 PathProgramCache]: Analyzing trace with hash -809700384, now seen corresponding path program 2 times [2018-12-09 18:56:29,221 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:29,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:29,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,222 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:29,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:29,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:29,295 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:29,295 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:29,295 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:29,295 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:29,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:29,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:29,295 INFO L87 Difference]: Start difference. First operand 6728 states and 15087 transitions. Second operand 7 states. [2018-12-09 18:56:29,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:29,530 INFO L93 Difference]: Finished difference Result 8442 states and 18687 transitions. [2018-12-09 18:56:29,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:29,530 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2018-12-09 18:56:29,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:29,536 INFO L225 Difference]: With dead ends: 8442 [2018-12-09 18:56:29,536 INFO L226 Difference]: Without dead ends: 8442 [2018-12-09 18:56:29,536 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-09 18:56:29,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8442 states. [2018-12-09 18:56:29,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8442 to 6841. [2018-12-09 18:56:29,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6841 states. [2018-12-09 18:56:29,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6841 states to 6841 states and 15326 transitions. [2018-12-09 18:56:29,587 INFO L78 Accepts]: Start accepts. Automaton has 6841 states and 15326 transitions. Word has length 94 [2018-12-09 18:56:29,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:29,587 INFO L480 AbstractCegarLoop]: Abstraction has 6841 states and 15326 transitions. [2018-12-09 18:56:29,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:29,587 INFO L276 IsEmpty]: Start isEmpty. Operand 6841 states and 15326 transitions. [2018-12-09 18:56:29,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:29,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:29,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:29,592 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:29,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:29,592 INFO L82 PathProgramCache]: Analyzing trace with hash -984492479, now seen corresponding path program 2 times [2018-12-09 18:56:29,592 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:29,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,593 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 18:56:29,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,593 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:29,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:29,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:29,663 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:29,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:29,663 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:29,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:29,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:29,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:29,664 INFO L87 Difference]: Start difference. First operand 6841 states and 15326 transitions. Second operand 7 states. [2018-12-09 18:56:29,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:29,882 INFO L93 Difference]: Finished difference Result 9658 states and 21670 transitions. [2018-12-09 18:56:29,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:29,882 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2018-12-09 18:56:29,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:29,889 INFO L225 Difference]: With dead ends: 9658 [2018-12-09 18:56:29,889 INFO L226 Difference]: Without dead ends: 9626 [2018-12-09 18:56:29,889 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-12-09 18:56:29,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9626 states. [2018-12-09 18:56:29,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9626 to 8903. [2018-12-09 18:56:29,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8903 states. [2018-12-09 18:56:29,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8903 states to 8903 states and 19928 transitions. [2018-12-09 18:56:29,956 INFO L78 Accepts]: Start accepts. Automaton has 8903 states and 19928 transitions. Word has length 94 [2018-12-09 18:56:29,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:29,956 INFO L480 AbstractCegarLoop]: Abstraction has 8903 states and 19928 transitions. [2018-12-09 18:56:29,956 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:29,956 INFO L276 IsEmpty]: Start isEmpty. Operand 8903 states and 19928 transitions. [2018-12-09 18:56:29,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:29,961 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:29,962 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:29,962 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:29,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:29,962 INFO L82 PathProgramCache]: Analyzing trace with hash 1513523458, now seen corresponding path program 1 times [2018-12-09 18:56:29,962 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:29,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,963 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 18:56:29,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:29,963 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:29,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:30,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:30,030 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:30,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 18:56:30,030 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:30,030 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 18:56:30,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 18:56:30,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:30,031 INFO L87 Difference]: Start difference. First operand 8903 states and 19928 transitions. Second operand 8 states. [2018-12-09 18:56:30,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:30,473 INFO L93 Difference]: Finished difference Result 14507 states and 33306 transitions. [2018-12-09 18:56:30,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 18:56:30,474 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2018-12-09 18:56:30,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:30,490 INFO L225 Difference]: With dead ends: 14507 [2018-12-09 18:56:30,490 INFO L226 Difference]: Without dead ends: 14507 [2018-12-09 18:56:30,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-09 18:56:30,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14507 states. [2018-12-09 18:56:30,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14507 to 9598. [2018-12-09 18:56:30,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9598 states. [2018-12-09 18:56:30,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9598 states to 9598 states and 21764 transitions. [2018-12-09 18:56:30,584 INFO L78 Accepts]: Start accepts. Automaton has 9598 states and 21764 transitions. Word has length 94 [2018-12-09 18:56:30,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:30,584 INFO L480 AbstractCegarLoop]: Abstraction has 9598 states and 21764 transitions. [2018-12-09 18:56:30,584 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 18:56:30,584 INFO L276 IsEmpty]: Start isEmpty. Operand 9598 states and 21764 transitions. [2018-12-09 18:56:30,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-09 18:56:30,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:30,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:30,591 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:30,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:30,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1893940157, now seen corresponding path program 1 times [2018-12-09 18:56:30,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:30,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:30,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:30,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:30,592 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:30,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:30,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:30,620 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:30,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 18:56:30,621 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:30,621 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 18:56:30,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 18:56:30,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:30,621 INFO L87 Difference]: Start difference. First operand 9598 states and 21764 transitions. Second operand 3 states. [2018-12-09 18:56:30,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:30,645 INFO L93 Difference]: Finished difference Result 9342 states and 20916 transitions. [2018-12-09 18:56:30,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 18:56:30,645 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 94 [2018-12-09 18:56:30,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:30,651 INFO L225 Difference]: With dead ends: 9342 [2018-12-09 18:56:30,651 INFO L226 Difference]: Without dead ends: 9310 [2018-12-09 18:56:30,651 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 18:56:30,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9310 states. [2018-12-09 18:56:30,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9310 to 7507. [2018-12-09 18:56:30,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7507 states. [2018-12-09 18:56:30,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7507 states to 7507 states and 16564 transitions. [2018-12-09 18:56:30,709 INFO L78 Accepts]: Start accepts. Automaton has 7507 states and 16564 transitions. Word has length 94 [2018-12-09 18:56:30,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:30,709 INFO L480 AbstractCegarLoop]: Abstraction has 7507 states and 16564 transitions. [2018-12-09 18:56:30,709 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 18:56:30,709 INFO L276 IsEmpty]: Start isEmpty. Operand 7507 states and 16564 transitions. [2018-12-09 18:56:30,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:30,714 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:30,714 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:30,714 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:30,714 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:30,714 INFO L82 PathProgramCache]: Analyzing trace with hash 995406300, now seen corresponding path program 1 times [2018-12-09 18:56:30,714 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:30,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:30,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:30,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:30,715 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:30,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:30,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:30,784 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:30,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:30,785 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:30,785 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:30,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:30,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:30,785 INFO L87 Difference]: Start difference. First operand 7507 states and 16564 transitions. Second operand 7 states. [2018-12-09 18:56:31,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:31,033 INFO L93 Difference]: Finished difference Result 9374 states and 20471 transitions. [2018-12-09 18:56:31,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 18:56:31,034 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-12-09 18:56:31,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:31,040 INFO L225 Difference]: With dead ends: 9374 [2018-12-09 18:56:31,040 INFO L226 Difference]: Without dead ends: 9374 [2018-12-09 18:56:31,040 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=125, Unknown=0, NotChecked=0, Total=182 [2018-12-09 18:56:31,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9374 states. [2018-12-09 18:56:31,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9374 to 8142. [2018-12-09 18:56:31,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8142 states. [2018-12-09 18:56:31,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8142 states to 8142 states and 17942 transitions. [2018-12-09 18:56:31,098 INFO L78 Accepts]: Start accepts. Automaton has 8142 states and 17942 transitions. Word has length 96 [2018-12-09 18:56:31,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:31,098 INFO L480 AbstractCegarLoop]: Abstraction has 8142 states and 17942 transitions. [2018-12-09 18:56:31,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:31,099 INFO L276 IsEmpty]: Start isEmpty. Operand 8142 states and 17942 transitions. [2018-12-09 18:56:31,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:31,103 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:31,104 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:31,104 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:31,104 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:31,104 INFO L82 PathProgramCache]: Analyzing trace with hash 1206757213, now seen corresponding path program 1 times [2018-12-09 18:56:31,104 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:31,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:31,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,105 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:31,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:31,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:31,161 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:31,161 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:31,162 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:31,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:31,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:31,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:31,162 INFO L87 Difference]: Start difference. First operand 8142 states and 17942 transitions. Second operand 7 states. [2018-12-09 18:56:31,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:31,326 INFO L93 Difference]: Finished difference Result 9530 states and 20907 transitions. [2018-12-09 18:56:31,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:31,326 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-12-09 18:56:31,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:31,332 INFO L225 Difference]: With dead ends: 9530 [2018-12-09 18:56:31,332 INFO L226 Difference]: Without dead ends: 9530 [2018-12-09 18:56:31,332 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-09 18:56:31,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9530 states. [2018-12-09 18:56:31,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9530 to 7916. [2018-12-09 18:56:31,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7916 states. [2018-12-09 18:56:31,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7916 states to 7916 states and 17454 transitions. [2018-12-09 18:56:31,389 INFO L78 Accepts]: Start accepts. Automaton has 7916 states and 17454 transitions. Word has length 96 [2018-12-09 18:56:31,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:31,389 INFO L480 AbstractCegarLoop]: Abstraction has 7916 states and 17454 transitions. [2018-12-09 18:56:31,389 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:31,389 INFO L276 IsEmpty]: Start isEmpty. Operand 7916 states and 17454 transitions. [2018-12-09 18:56:31,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:31,394 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:31,394 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:31,394 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:31,394 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:31,394 INFO L82 PathProgramCache]: Analyzing trace with hash 1284754205, now seen corresponding path program 1 times [2018-12-09 18:56:31,394 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:31,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:31,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,395 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:31,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:31,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:31,444 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:31,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:31,444 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:31,445 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:31,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:31,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:31,445 INFO L87 Difference]: Start difference. First operand 7916 states and 17454 transitions. Second operand 7 states. [2018-12-09 18:56:31,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:31,654 INFO L93 Difference]: Finished difference Result 9601 states and 21137 transitions. [2018-12-09 18:56:31,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 18:56:31,655 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-12-09 18:56:31,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:31,661 INFO L225 Difference]: With dead ends: 9601 [2018-12-09 18:56:31,661 INFO L226 Difference]: Without dead ends: 9601 [2018-12-09 18:56:31,661 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-09 18:56:31,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9601 states. [2018-12-09 18:56:31,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9601 to 8798. [2018-12-09 18:56:31,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8798 states. [2018-12-09 18:56:31,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8798 states to 8798 states and 19345 transitions. [2018-12-09 18:56:31,721 INFO L78 Accepts]: Start accepts. Automaton has 8798 states and 19345 transitions. Word has length 96 [2018-12-09 18:56:31,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:31,721 INFO L480 AbstractCegarLoop]: Abstraction has 8798 states and 19345 transitions. [2018-12-09 18:56:31,721 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:31,721 INFO L276 IsEmpty]: Start isEmpty. Operand 8798 states and 19345 transitions. [2018-12-09 18:56:31,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:31,727 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:31,727 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:31,727 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:31,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:31,727 INFO L82 PathProgramCache]: Analyzing trace with hash 774220028, now seen corresponding path program 1 times [2018-12-09 18:56:31,727 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:31,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:31,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,728 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:31,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:31,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:31,760 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:31,760 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 18:56:31,760 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:31,760 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 18:56:31,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 18:56:31,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 18:56:31,760 INFO L87 Difference]: Start difference. First operand 8798 states and 19345 transitions. Second operand 4 states. [2018-12-09 18:56:31,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:31,844 INFO L93 Difference]: Finished difference Result 8942 states and 19705 transitions. [2018-12-09 18:56:31,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 18:56:31,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2018-12-09 18:56:31,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:31,850 INFO L225 Difference]: With dead ends: 8942 [2018-12-09 18:56:31,850 INFO L226 Difference]: Without dead ends: 8910 [2018-12-09 18:56:31,850 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:31,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8910 states. [2018-12-09 18:56:31,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8910 to 7828. [2018-12-09 18:56:31,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7828 states. [2018-12-09 18:56:31,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7828 states to 7828 states and 17206 transitions. [2018-12-09 18:56:31,905 INFO L78 Accepts]: Start accepts. Automaton has 7828 states and 17206 transitions. Word has length 96 [2018-12-09 18:56:31,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:31,905 INFO L480 AbstractCegarLoop]: Abstraction has 7828 states and 17206 transitions. [2018-12-09 18:56:31,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 18:56:31,905 INFO L276 IsEmpty]: Start isEmpty. Operand 7828 states and 17206 transitions. [2018-12-09 18:56:31,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:31,910 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:31,910 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:31,910 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:31,910 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:31,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1022731331, now seen corresponding path program 1 times [2018-12-09 18:56:31,910 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:31,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,911 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:31,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:31,911 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:31,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:32,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:32,022 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:32,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-09 18:56:32,023 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:32,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 18:56:32,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 18:56:32,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-12-09 18:56:32,023 INFO L87 Difference]: Start difference. First operand 7828 states and 17206 transitions. Second operand 11 states. [2018-12-09 18:56:33,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:33,025 INFO L93 Difference]: Finished difference Result 10188 states and 22197 transitions. [2018-12-09 18:56:33,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 18:56:33,026 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 96 [2018-12-09 18:56:33,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:33,037 INFO L225 Difference]: With dead ends: 10188 [2018-12-09 18:56:33,038 INFO L226 Difference]: Without dead ends: 10188 [2018-12-09 18:56:33,038 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2018-12-09 18:56:33,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10188 states. [2018-12-09 18:56:33,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10188 to 6280. [2018-12-09 18:56:33,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6280 states. [2018-12-09 18:56:33,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6280 states to 6280 states and 13769 transitions. [2018-12-09 18:56:33,108 INFO L78 Accepts]: Start accepts. Automaton has 6280 states and 13769 transitions. Word has length 96 [2018-12-09 18:56:33,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:33,108 INFO L480 AbstractCegarLoop]: Abstraction has 6280 states and 13769 transitions. [2018-12-09 18:56:33,108 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 18:56:33,109 INFO L276 IsEmpty]: Start isEmpty. Operand 6280 states and 13769 transitions. [2018-12-09 18:56:33,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:33,113 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:33,113 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:33,114 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:33,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:33,114 INFO L82 PathProgramCache]: Analyzing trace with hash -135227650, now seen corresponding path program 1 times [2018-12-09 18:56:33,114 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:33,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:33,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:33,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:33,115 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:33,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:33,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:33,236 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:33,236 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 18:56:33,236 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:33,236 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 18:56:33,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 18:56:33,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:33,237 INFO L87 Difference]: Start difference. First operand 6280 states and 13769 transitions. Second operand 8 states. [2018-12-09 18:56:33,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:33,449 INFO L93 Difference]: Finished difference Result 7241 states and 15697 transitions. [2018-12-09 18:56:33,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 18:56:33,449 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96 [2018-12-09 18:56:33,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:33,454 INFO L225 Difference]: With dead ends: 7241 [2018-12-09 18:56:33,454 INFO L226 Difference]: Without dead ends: 7241 [2018-12-09 18:56:33,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2018-12-09 18:56:33,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7241 states. [2018-12-09 18:56:33,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7241 to 6472. [2018-12-09 18:56:33,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6472 states. [2018-12-09 18:56:33,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6472 states to 6472 states and 14157 transitions. [2018-12-09 18:56:33,501 INFO L78 Accepts]: Start accepts. Automaton has 6472 states and 14157 transitions. Word has length 96 [2018-12-09 18:56:33,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:33,502 INFO L480 AbstractCegarLoop]: Abstraction has 6472 states and 14157 transitions. [2018-12-09 18:56:33,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 18:56:33,502 INFO L276 IsEmpty]: Start isEmpty. Operand 6472 states and 14157 transitions. [2018-12-09 18:56:33,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:33,506 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:33,506 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:33,506 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:33,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:33,506 INFO L82 PathProgramCache]: Analyzing trace with hash 76123263, now seen corresponding path program 1 times [2018-12-09 18:56:33,506 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:33,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:33,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:33,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:33,507 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:33,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:33,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:33,584 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:33,584 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-09 18:56:33,584 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:33,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 18:56:33,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 18:56:33,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-09 18:56:33,584 INFO L87 Difference]: Start difference. First operand 6472 states and 14157 transitions. Second operand 11 states. [2018-12-09 18:56:34,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:34,348 INFO L93 Difference]: Finished difference Result 11719 states and 25776 transitions. [2018-12-09 18:56:34,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 18:56:34,348 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 96 [2018-12-09 18:56:34,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:34,353 INFO L225 Difference]: With dead ends: 11719 [2018-12-09 18:56:34,353 INFO L226 Difference]: Without dead ends: 8067 [2018-12-09 18:56:34,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-12-09 18:56:34,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8067 states. [2018-12-09 18:56:34,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8067 to 6296. [2018-12-09 18:56:34,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6296 states. [2018-12-09 18:56:34,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6296 states to 6296 states and 13669 transitions. [2018-12-09 18:56:34,416 INFO L78 Accepts]: Start accepts. Automaton has 6296 states and 13669 transitions. Word has length 96 [2018-12-09 18:56:34,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:34,416 INFO L480 AbstractCegarLoop]: Abstraction has 6296 states and 13669 transitions. [2018-12-09 18:56:34,416 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 18:56:34,417 INFO L276 IsEmpty]: Start isEmpty. Operand 6296 states and 13669 transitions. [2018-12-09 18:56:34,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:34,420 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:34,420 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:34,420 INFO L423 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:34,420 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:34,420 INFO L82 PathProgramCache]: Analyzing trace with hash -442591593, now seen corresponding path program 1 times [2018-12-09 18:56:34,421 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:34,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:34,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:34,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:34,421 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:34,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:34,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:34,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:34,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:34,496 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:34,496 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:34,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:34,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:34,496 INFO L87 Difference]: Start difference. First operand 6296 states and 13669 transitions. Second operand 7 states. [2018-12-09 18:56:34,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:34,686 INFO L93 Difference]: Finished difference Result 7848 states and 16946 transitions. [2018-12-09 18:56:34,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 18:56:34,686 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-12-09 18:56:34,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:34,692 INFO L225 Difference]: With dead ends: 7848 [2018-12-09 18:56:34,692 INFO L226 Difference]: Without dead ends: 7806 [2018-12-09 18:56:34,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2018-12-09 18:56:34,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7806 states. [2018-12-09 18:56:34,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7806 to 6520. [2018-12-09 18:56:34,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6520 states. [2018-12-09 18:56:34,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6520 states to 6520 states and 14166 transitions. [2018-12-09 18:56:34,745 INFO L78 Accepts]: Start accepts. Automaton has 6520 states and 14166 transitions. Word has length 96 [2018-12-09 18:56:34,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:34,746 INFO L480 AbstractCegarLoop]: Abstraction has 6520 states and 14166 transitions. [2018-12-09 18:56:34,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:34,746 INFO L276 IsEmpty]: Start isEmpty. Operand 6520 states and 14166 transitions. [2018-12-09 18:56:34,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:34,750 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:34,750 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:34,750 INFO L423 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:34,750 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:34,750 INFO L82 PathProgramCache]: Analyzing trace with hash -914070344, now seen corresponding path program 1 times [2018-12-09 18:56:34,750 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:34,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:34,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:34,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:34,751 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:34,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:34,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:34,799 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:34,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 18:56:34,799 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:34,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 18:56:34,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 18:56:34,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 18:56:34,800 INFO L87 Difference]: Start difference. First operand 6520 states and 14166 transitions. Second operand 6 states. [2018-12-09 18:56:34,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:34,985 INFO L93 Difference]: Finished difference Result 7462 states and 16259 transitions. [2018-12-09 18:56:34,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 18:56:34,985 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2018-12-09 18:56:34,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:34,990 INFO L225 Difference]: With dead ends: 7462 [2018-12-09 18:56:34,990 INFO L226 Difference]: Without dead ends: 7462 [2018-12-09 18:56:34,990 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-09 18:56:34,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7462 states. [2018-12-09 18:56:35,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7462 to 6770. [2018-12-09 18:56:35,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6770 states. [2018-12-09 18:56:35,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6770 states to 6770 states and 14705 transitions. [2018-12-09 18:56:35,036 INFO L78 Accepts]: Start accepts. Automaton has 6770 states and 14705 transitions. Word has length 96 [2018-12-09 18:56:35,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:35,036 INFO L480 AbstractCegarLoop]: Abstraction has 6770 states and 14705 transitions. [2018-12-09 18:56:35,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 18:56:35,037 INFO L276 IsEmpty]: Start isEmpty. Operand 6770 states and 14705 transitions. [2018-12-09 18:56:35,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:35,041 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:35,041 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:35,041 INFO L423 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:35,041 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:35,041 INFO L82 PathProgramCache]: Analyzing trace with hash 379743640, now seen corresponding path program 1 times [2018-12-09 18:56:35,041 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:35,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:35,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,042 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:35,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:35,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:35,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:35,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 18:56:35,098 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:35,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 18:56:35,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 18:56:35,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 18:56:35,098 INFO L87 Difference]: Start difference. First operand 6770 states and 14705 transitions. Second operand 5 states. [2018-12-09 18:56:35,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:35,192 INFO L93 Difference]: Finished difference Result 7705 states and 16659 transitions. [2018-12-09 18:56:35,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 18:56:35,192 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2018-12-09 18:56:35,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:35,197 INFO L225 Difference]: With dead ends: 7705 [2018-12-09 18:56:35,197 INFO L226 Difference]: Without dead ends: 7705 [2018-12-09 18:56:35,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:35,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7705 states. [2018-12-09 18:56:35,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7705 to 6398. [2018-12-09 18:56:35,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6398 states. [2018-12-09 18:56:35,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6398 states to 6398 states and 13897 transitions. [2018-12-09 18:56:35,241 INFO L78 Accepts]: Start accepts. Automaton has 6398 states and 13897 transitions. Word has length 96 [2018-12-09 18:56:35,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:35,242 INFO L480 AbstractCegarLoop]: Abstraction has 6398 states and 13897 transitions. [2018-12-09 18:56:35,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 18:56:35,242 INFO L276 IsEmpty]: Start isEmpty. Operand 6398 states and 13897 transitions. [2018-12-09 18:56:35,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:35,246 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:35,246 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:35,246 INFO L423 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:35,246 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:35,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1335866392, now seen corresponding path program 2 times [2018-12-09 18:56:35,246 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:35,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 18:56:35,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,247 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:35,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 18:56:35,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 18:56:35,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 18:56:35,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 18:56:35,308 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 18:56:35,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 18:56:35,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 18:56:35,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 18:56:35,309 INFO L87 Difference]: Start difference. First operand 6398 states and 13897 transitions. Second operand 7 states. [2018-12-09 18:56:35,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 18:56:35,401 INFO L93 Difference]: Finished difference Result 7621 states and 16586 transitions. [2018-12-09 18:56:35,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 18:56:35,401 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-12-09 18:56:35,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 18:56:35,406 INFO L225 Difference]: With dead ends: 7621 [2018-12-09 18:56:35,406 INFO L226 Difference]: Without dead ends: 7621 [2018-12-09 18:56:35,406 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-09 18:56:35,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7621 states. [2018-12-09 18:56:35,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7621 to 5515. [2018-12-09 18:56:35,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5515 states. [2018-12-09 18:56:35,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5515 states to 5515 states and 11967 transitions. [2018-12-09 18:56:35,446 INFO L78 Accepts]: Start accepts. Automaton has 5515 states and 11967 transitions. Word has length 96 [2018-12-09 18:56:35,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 18:56:35,447 INFO L480 AbstractCegarLoop]: Abstraction has 5515 states and 11967 transitions. [2018-12-09 18:56:35,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 18:56:35,447 INFO L276 IsEmpty]: Start isEmpty. Operand 5515 states and 11967 transitions. [2018-12-09 18:56:35,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 18:56:35,451 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 18:56:35,451 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 18:56:35,451 INFO L423 AbstractCegarLoop]: === Iteration 44 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 18:56:35,451 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 18:56:35,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1130643175, now seen corresponding path program 2 times [2018-12-09 18:56:35,452 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 18:56:35,452 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,453 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 18:56:35,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 18:56:35,453 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 18:56:35,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 18:56:35,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 18:56:35,487 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 18:56:35,550 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-09 18:56:35,551 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 06:56:35 BasicIcfg [2018-12-09 18:56:35,551 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 18:56:35,551 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 18:56:35,551 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 18:56:35,552 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 18:56:35,552 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 06:56:07" (3/4) ... [2018-12-09 18:56:35,554 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 18:56:35,619 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_96b8350f-eb5d-4946-878d-46bbd9dcee08/bin-2019/utaipan/witness.graphml [2018-12-09 18:56:35,619 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 18:56:35,620 INFO L168 Benchmark]: Toolchain (without parser) took 29213.14 ms. Allocated memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: 3.3 GB). Free memory was 956.0 MB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,621 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 18:56:35,621 INFO L168 Benchmark]: CACSL2BoogieTranslator took 334.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 74.4 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -96.4 MB). Peak memory consumption was 31.4 MB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,621 INFO L168 Benchmark]: Boogie Procedure Inliner took 30.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,621 INFO L168 Benchmark]: Boogie Preprocessor took 21.09 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 18:56:35,621 INFO L168 Benchmark]: RCFGBuilder took 348.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 999.4 MB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,622 INFO L168 Benchmark]: TraceAbstraction took 28408.59 ms. Allocated memory was 1.1 GB in the beginning and 4.3 GB in the end (delta: 3.2 GB). Free memory was 999.4 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 918.9 MB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,622 INFO L168 Benchmark]: Witness Printer took 67.64 ms. Allocated memory is still 4.3 GB. Free memory was 3.3 GB in the beginning and 3.2 GB in the end (delta: 63.2 MB). Peak memory consumption was 63.2 MB. Max. memory is 11.5 GB. [2018-12-09 18:56:35,623 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 334.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 74.4 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -96.4 MB). Peak memory consumption was 31.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 30.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.09 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 348.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 999.4 MB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 28408.59 ms. Allocated memory was 1.1 GB in the beginning and 4.3 GB in the end (delta: 3.2 GB). Free memory was 999.4 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 918.9 MB. Max. memory is 11.5 GB. * Witness Printer took 67.64 ms. Allocated memory is still 4.3 GB. Free memory was 3.3 GB in the beginning and 3.2 GB in the end (delta: 63.2 MB). Peak memory consumption was 63.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L675] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L676] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L677] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L679] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L681] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L683] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0] [L684] -1 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0] [L685] -1 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0] [L686] -1 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L687] -1 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L688] -1 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L689] -1 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0] [L690] -1 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L691] -1 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L692] -1 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0] [L693] -1 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L694] -1 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L695] -1 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L696] -1 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L697] -1 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L698] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L699] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L778] -1 pthread_t t1095; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] FCALL, FORK -1 pthread_create(&t1095, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L703] 0 z$w_buff1 = z$w_buff0 [L704] 0 z$w_buff0 = 1 [L705] 0 z$w_buff1_used = z$w_buff0_used [L706] 0 z$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L708] 0 z$r_buff1_thd0 = z$r_buff0_thd0 [L709] 0 z$r_buff1_thd1 = z$r_buff0_thd1 [L710] 0 z$r_buff1_thd2 = z$r_buff0_thd2 [L711] 0 z$r_buff0_thd1 = (_Bool)1 [L714] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L717] EXPR 0 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] -1 pthread_t t1096; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L781] FCALL, FORK -1 pthread_create(&t1096, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 x = 2 [L734] 1 y = 1 [L737] 1 __unbuffered_p1_EAX = y [L740] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L741] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L742] 1 z$flush_delayed = weak$$choice2 [L743] 1 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) [L745] EXPR 1 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L745] 1 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) [L746] EXPR 1 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) [L747] EXPR 1 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L747] 1 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) [L748] EXPR 1 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L749] EXPR 1 weak$$choice2 ? z$r_buff0_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff0_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff0_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 z$r_buff0_thd2 = weak$$choice2 ? z$r_buff0_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff0_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2)) [L750] EXPR 1 weak$$choice2 ? z$r_buff1_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff1_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff1_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z$r_buff1_thd2 = weak$$choice2 ? z$r_buff1_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff1_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L751] 1 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L752] EXPR 1 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L717] 0 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L752] 1 z = z$flush_delayed ? z$mem_tmp : z [L753] 1 z$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] EXPR 1 z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L756] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z)=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L756] 1 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L757] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L758] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L758] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L759] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L759] 1 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L718] EXPR 0 z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L718] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L719] EXPR 0 z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L719] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L720] EXPR 0 z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L720] 0 z$r_buff0_thd1 = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1 [L721] EXPR 0 z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L721] 0 z$r_buff1_thd1 = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$r_buff1_thd1 [L724] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L760] EXPR 1 z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$r_buff1_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L760] 1 z$r_buff1_thd2 = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$r_buff1_thd2 [L763] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L783] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR -1 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] -1 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L788] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] -1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L789] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L789] -1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L790] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L790] -1 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L791] EXPR -1 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L791] -1 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L794] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 223 locations, 3 error locations. UNSAFE Result, 28.3s OverallTime, 44 OverallIterations, 1 TraceHistogramMax, 14.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11406 SDtfs, 14107 SDslu, 27418 SDs, 0 SdLazy, 12858 SolverSat, 829 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 490 GetRequests, 110 SyntacticMatches, 53 SemanticMatches, 327 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 779 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=74881occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 9.5s AutomataMinimizationTime, 43 MinimizatonAttempts, 189975 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 3464 NumberOfCodeBlocks, 3464 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 3325 ConstructedInterpolants, 0 QuantifiedInterpolants, 818993 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 43 InterpolantComputations, 43 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...