./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 567c779f4de19a2058420c225a74f6c179939efc .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 16:15:35,835 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 16:15:35,836 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 16:15:35,844 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 16:15:35,844 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 16:15:35,845 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 16:15:35,846 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 16:15:35,847 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 16:15:35,848 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 16:15:35,848 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 16:15:35,849 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 16:15:35,849 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 16:15:35,850 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 16:15:35,850 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 16:15:35,851 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 16:15:35,851 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 16:15:35,852 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 16:15:35,853 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 16:15:35,855 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 16:15:35,856 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 16:15:35,856 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 16:15:35,857 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 16:15:35,859 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 16:15:35,859 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 16:15:35,859 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 16:15:35,860 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 16:15:35,860 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 16:15:35,861 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 16:15:35,862 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 16:15:35,862 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 16:15:35,863 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 16:15:35,863 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 16:15:35,863 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 16:15:35,863 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 16:15:35,864 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 16:15:35,864 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 16:15:35,864 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-09 16:15:35,875 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 16:15:35,875 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 16:15:35,875 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 16:15:35,876 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 16:15:35,876 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 16:15:35,877 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 16:15:35,877 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 16:15:35,877 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 16:15:35,877 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 16:15:35,877 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 16:15:35,877 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 16:15:35,878 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 16:15:35,878 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:15:35,879 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-09 16:15:35,879 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 567c779f4de19a2058420c225a74f6c179939efc [2018-12-09 16:15:35,901 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 16:15:35,908 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 16:15:35,910 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 16:15:35,911 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 16:15:35,911 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 16:15:35,912 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-09 16:15:35,946 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/data/21f29a7d1/0a0f68715a3a463f9bdc3e69cf4703ba/FLAGbf01e9a35 [2018-12-09 16:15:36,349 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 16:15:36,350 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-09 16:15:36,357 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/data/21f29a7d1/0a0f68715a3a463f9bdc3e69cf4703ba/FLAGbf01e9a35 [2018-12-09 16:15:36,365 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/data/21f29a7d1/0a0f68715a3a463f9bdc3e69cf4703ba [2018-12-09 16:15:36,367 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 16:15:36,368 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 16:15:36,369 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 16:15:36,369 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 16:15:36,371 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 16:15:36,371 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,373 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@628262cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36, skipping insertion in model container [2018-12-09 16:15:36,373 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,377 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 16:15:36,399 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 16:15:36,583 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:15:36,591 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 16:15:36,670 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:15:36,704 INFO L195 MainTranslator]: Completed translation [2018-12-09 16:15:36,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36 WrapperNode [2018-12-09 16:15:36,705 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 16:15:36,705 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 16:15:36,705 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 16:15:36,705 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 16:15:36,711 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,722 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,736 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 16:15:36,736 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 16:15:36,736 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 16:15:36,736 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 16:15:36,742 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,742 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,746 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,747 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,755 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,758 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... [2018-12-09 16:15:36,760 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 16:15:36,760 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 16:15:36,760 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 16:15:36,761 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 16:15:36,761 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-09 16:15:36,794 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-09 16:15:36,794 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-09 16:15:36,794 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-09 16:15:36,795 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-09 16:15:36,795 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-09 16:15:36,795 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-09 16:15:36,795 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 16:15:36,795 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 16:15:36,796 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-09 16:15:37,166 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 16:15:37,166 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-09 16:15:37,166 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:15:37 BoogieIcfgContainer [2018-12-09 16:15:37,166 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 16:15:37,167 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 16:15:37,167 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 16:15:37,169 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 16:15:37,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 04:15:36" (1/3) ... [2018-12-09 16:15:37,169 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1dbc4d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:15:37, skipping insertion in model container [2018-12-09 16:15:37,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:15:36" (2/3) ... [2018-12-09 16:15:37,169 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1dbc4d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:15:37, skipping insertion in model container [2018-12-09 16:15:37,170 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:15:37" (3/3) ... [2018-12-09 16:15:37,171 INFO L112 eAbstractionObserver]: Analyzing ICFG safe007_power.opt_false-unreach-call.i [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,198 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,199 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,200 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,201 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,202 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,203 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,203 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,203 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,203 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,204 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,205 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,206 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,207 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,208 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,209 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,210 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,211 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,212 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,213 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,214 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,215 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,216 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,217 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,218 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,219 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,220 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,221 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,222 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,223 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,223 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,223 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,223 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,223 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 16:15:37,227 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-09 16:15:37,227 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 16:15:37,233 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-09 16:15:37,242 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-09 16:15:37,258 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 16:15:37,258 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 16:15:37,258 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 16:15:37,258 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 16:15:37,258 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 16:15:37,258 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 16:15:37,258 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 16:15:37,258 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 16:15:37,265 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-12-09 16:17:13,437 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-12-09 16:17:13,439 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-12-09 16:17:13,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-09 16:17:13,444 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:13,445 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:13,446 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:13,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:13,449 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-12-09 16:17:13,451 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:13,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:13,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:13,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:13,486 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:13,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:13,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:13,597 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:13,597 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:17:13,597 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:13,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:17:13,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:17:13,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:17:13,615 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-12-09 16:17:20,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:20,141 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-12-09 16:17:20,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 16:17:20,143 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-12-09 16:17:20,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:21,649 INFO L225 Difference]: With dead ends: 604682 [2018-12-09 16:17:21,649 INFO L226 Difference]: Without dead ends: 434932 [2018-12-09 16:17:21,650 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:17:25,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-12-09 16:17:29,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-12-09 16:17:29,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-12-09 16:17:30,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-12-09 16:17:30,394 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-12-09 16:17:30,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:30,394 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-12-09 16:17:30,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:17:30,394 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-12-09 16:17:30,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-09 16:17:30,407 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:30,407 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:30,408 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:30,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:30,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-12-09 16:17:30,408 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:30,411 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:30,412 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:30,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:30,412 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:30,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:30,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:30,477 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:30,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:17:30,477 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:30,478 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:17:30,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:17:30,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:17:30,478 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-12-09 16:17:34,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:34,625 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-12-09 16:17:34,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:17:34,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-12-09 16:17:34,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:35,257 INFO L225 Difference]: With dead ends: 237806 [2018-12-09 16:17:35,257 INFO L226 Difference]: Without dead ends: 229076 [2018-12-09 16:17:35,258 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:17:37,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-12-09 16:17:40,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-12-09 16:17:40,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-12-09 16:17:41,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-12-09 16:17:41,200 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-12-09 16:17:41,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:41,201 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-12-09 16:17:41,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:17:41,201 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-12-09 16:17:41,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 16:17:41,209 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:41,209 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:41,209 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:41,209 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:41,210 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-12-09 16:17:41,210 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:41,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:41,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:41,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:41,212 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:41,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:41,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:41,276 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:41,276 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:17:41,276 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:41,276 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:17:41,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:17:41,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:17:41,277 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-12-09 16:17:41,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:41,539 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-12-09 16:17:41,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:17:41,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-09 16:17:41,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:41,698 INFO L225 Difference]: With dead ends: 62964 [2018-12-09 16:17:41,698 INFO L226 Difference]: Without dead ends: 55536 [2018-12-09 16:17:41,698 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:17:41,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-12-09 16:17:42,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-12-09 16:17:42,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-12-09 16:17:42,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-12-09 16:17:42,521 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-12-09 16:17:42,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:42,521 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-12-09 16:17:42,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:17:42,521 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-12-09 16:17:42,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 16:17:42,524 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:42,524 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:42,524 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:42,524 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:42,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-12-09 16:17:42,525 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:42,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:42,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:42,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:42,527 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:42,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:42,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:42,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:42,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:17:42,613 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:42,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:17:42,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:17:42,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:17:42,614 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-12-09 16:17:44,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:44,591 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-12-09 16:17:44,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 16:17:44,591 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-09 16:17:44,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:44,843 INFO L225 Difference]: With dead ends: 117028 [2018-12-09 16:17:44,843 INFO L226 Difference]: Without dead ends: 116528 [2018-12-09 16:17:44,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-09 16:17:45,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-12-09 16:17:46,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-12-09 16:17:46,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-12-09 16:17:46,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-12-09 16:17:46,407 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-12-09 16:17:46,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:46,408 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-12-09 16:17:46,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:17:46,408 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-12-09 16:17:46,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 16:17:46,412 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:46,412 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:46,412 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:46,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:46,412 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-12-09 16:17:46,412 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:46,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:46,414 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:46,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:46,414 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:46,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:46,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:46,436 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:46,436 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 16:17:46,436 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:46,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:17:46,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:17:46,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:17:46,437 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-12-09 16:17:46,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:46,838 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-12-09 16:17:46,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:17:46,839 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-12-09 16:17:46,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:47,053 INFO L225 Difference]: With dead ends: 99897 [2018-12-09 16:17:47,053 INFO L226 Difference]: Without dead ends: 99897 [2018-12-09 16:17:47,054 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:17:47,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-12-09 16:17:48,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-12-09 16:17:48,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-12-09 16:17:48,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-12-09 16:17:48,697 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-12-09 16:17:48,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:48,697 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-12-09 16:17:48,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:17:48,697 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-12-09 16:17:48,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-09 16:17:48,703 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:48,703 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:48,703 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:48,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:48,704 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-12-09 16:17:48,704 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:48,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:48,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:48,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:48,705 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:48,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:48,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:48,799 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:48,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:17:48,800 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:48,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 16:17:48,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 16:17:48,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:17:48,800 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-12-09 16:17:49,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:49,629 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-12-09 16:17:49,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 16:17:49,630 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-12-09 16:17:49,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:49,858 INFO L225 Difference]: With dead ends: 104973 [2018-12-09 16:17:49,858 INFO L226 Difference]: Without dead ends: 104443 [2018-12-09 16:17:49,859 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-12-09 16:17:50,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-12-09 16:17:51,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-12-09 16:17:51,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-12-09 16:17:51,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-12-09 16:17:51,402 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-12-09 16:17:51,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:51,402 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-12-09 16:17:51,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 16:17:51,402 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-12-09 16:17:51,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-09 16:17:51,421 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:51,421 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:51,421 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:51,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:51,421 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-12-09 16:17:51,421 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:51,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:51,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:51,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:51,424 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:51,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:51,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:51,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:51,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:17:51,473 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:51,474 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:17:51,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:17:51,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:17:51,474 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-12-09 16:17:51,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:51,852 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-12-09 16:17:51,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:17:51,852 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-12-09 16:17:51,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:52,025 INFO L225 Difference]: With dead ends: 85627 [2018-12-09 16:17:52,025 INFO L226 Difference]: Without dead ends: 85627 [2018-12-09 16:17:52,025 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:17:52,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-12-09 16:17:53,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-12-09 16:17:53,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-12-09 16:17:53,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-12-09 16:17:53,447 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-12-09 16:17:53,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:53,447 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-12-09 16:17:53,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:17:53,448 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-12-09 16:17:53,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-09 16:17:53,467 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:53,467 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:53,467 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:53,467 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:53,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-12-09 16:17:53,467 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:53,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:53,468 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:53,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:53,469 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:53,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:53,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:53,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:53,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 16:17:53,616 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:53,616 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:17:53,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:17:53,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-09 16:17:53,617 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-12-09 16:17:54,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:54,606 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-12-09 16:17:54,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 16:17:54,606 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-12-09 16:17:54,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:54,842 INFO L225 Difference]: With dead ends: 111736 [2018-12-09 16:17:54,843 INFO L226 Difference]: Without dead ends: 111381 [2018-12-09 16:17:54,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-12-09 16:17:55,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-12-09 16:17:56,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-12-09 16:17:56,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-12-09 16:17:56,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-12-09 16:17:56,572 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-12-09 16:17:56,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:56,573 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-12-09 16:17:56,573 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:17:56,573 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-12-09 16:17:56,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-09 16:17:56,612 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:56,612 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:56,612 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:56,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:56,612 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-12-09 16:17:56,612 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:56,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:56,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:56,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:56,614 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:56,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:56,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:56,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:56,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 16:17:56,635 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:56,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:17:56,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:17:56,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:17:56,636 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-12-09 16:17:57,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:57,066 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-12-09 16:17:57,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:17:57,066 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-12-09 16:17:57,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:57,298 INFO L225 Difference]: With dead ends: 110538 [2018-12-09 16:17:57,298 INFO L226 Difference]: Without dead ends: 110538 [2018-12-09 16:17:57,299 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:17:57,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-12-09 16:17:58,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-12-09 16:17:58,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-12-09 16:17:58,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-12-09 16:17:58,919 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-12-09 16:17:58,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:17:58,920 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-12-09 16:17:58,920 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:17:58,920 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-12-09 16:17:58,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-09 16:17:58,957 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:17:58,957 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:17:58,957 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:17:58,957 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:17:58,957 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-12-09 16:17:58,957 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:17:58,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:58,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:17:58,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:17:58,959 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:17:58,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:17:59,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:17:59,003 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:17:59,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:17:59,004 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:17:59,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:17:59,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:17:59,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:17:59,004 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-12-09 16:17:59,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:17:59,647 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-12-09 16:17:59,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 16:17:59,648 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-09 16:17:59,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:17:59,899 INFO L225 Difference]: With dead ends: 119085 [2018-12-09 16:17:59,900 INFO L226 Difference]: Without dead ends: 119085 [2018-12-09 16:17:59,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:18:00,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-12-09 16:18:01,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-12-09 16:18:01,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-12-09 16:18:01,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-12-09 16:18:01,713 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-12-09 16:18:01,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:01,713 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-12-09 16:18:01,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:18:01,713 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-12-09 16:18:01,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-09 16:18:01,764 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:01,764 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:01,764 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:01,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:01,765 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-12-09 16:18:01,765 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:01,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:01,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:01,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:01,767 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:01,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:01,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:01,795 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:01,795 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 16:18:01,795 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:01,795 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:18:01,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:18:01,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:18:01,796 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-12-09 16:18:02,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:02,309 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-12-09 16:18:02,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:18:02,309 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-12-09 16:18:02,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:02,526 INFO L225 Difference]: With dead ends: 107236 [2018-12-09 16:18:02,526 INFO L226 Difference]: Without dead ends: 107236 [2018-12-09 16:18:02,526 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:18:02,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-12-09 16:18:04,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-12-09 16:18:04,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-12-09 16:18:04,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-12-09 16:18:04,275 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-12-09 16:18:04,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:04,275 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-12-09 16:18:04,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:18:04,275 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-12-09 16:18:04,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:04,326 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:04,326 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:04,327 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:04,327 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:04,327 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-12-09 16:18:04,327 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:04,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:04,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:04,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:04,328 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:04,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:04,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:04,377 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:04,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:04,378 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:04,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:04,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:04,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:04,378 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-12-09 16:18:05,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:05,547 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-12-09 16:18:05,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:05,548 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-09 16:18:05,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:06,071 INFO L225 Difference]: With dead ends: 138332 [2018-12-09 16:18:06,072 INFO L226 Difference]: Without dead ends: 137832 [2018-12-09 16:18:06,072 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:06,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-12-09 16:18:07,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-12-09 16:18:07,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-12-09 16:18:07,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-12-09 16:18:07,885 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-12-09 16:18:07,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:07,885 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-12-09 16:18:07,885 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:07,885 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-12-09 16:18:07,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:07,941 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:07,941 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:07,941 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:07,942 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:07,942 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-12-09 16:18:07,942 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:07,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:07,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:07,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:07,943 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:07,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:08,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:08,017 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:08,017 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:08,017 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:08,018 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:08,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:08,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:08,018 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-12-09 16:18:09,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:09,089 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-12-09 16:18:09,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 16:18:09,089 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-09 16:18:09,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:09,338 INFO L225 Difference]: With dead ends: 133218 [2018-12-09 16:18:09,338 INFO L226 Difference]: Without dead ends: 133218 [2018-12-09 16:18:09,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-09 16:18:09,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-12-09 16:18:10,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-12-09 16:18:10,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-12-09 16:18:11,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-12-09 16:18:11,205 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-12-09 16:18:11,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:11,206 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-12-09 16:18:11,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:11,206 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-12-09 16:18:11,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:11,262 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:11,262 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:11,262 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:11,263 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:11,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-12-09 16:18:11,263 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:11,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:11,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:11,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:11,264 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:11,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:11,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:11,323 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:11,323 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:11,323 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:11,324 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:11,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:11,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:11,324 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-12-09 16:18:12,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:12,301 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-12-09 16:18:12,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:12,302 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-09 16:18:12,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:12,593 INFO L225 Difference]: With dead ends: 151316 [2018-12-09 16:18:12,593 INFO L226 Difference]: Without dead ends: 151316 [2018-12-09 16:18:12,594 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:12,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-12-09 16:18:14,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-12-09 16:18:14,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-12-09 16:18:14,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-12-09 16:18:14,747 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-12-09 16:18:14,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:14,748 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-12-09 16:18:14,748 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:14,748 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-12-09 16:18:14,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:14,814 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:14,814 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:14,814 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:14,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:14,814 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-12-09 16:18:14,815 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:14,815 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:14,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:14,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:14,816 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:14,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:14,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:14,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:14,865 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:14,865 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:14,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:14,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:14,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:14,866 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-12-09 16:18:16,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:16,111 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-12-09 16:18:16,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:18:16,112 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-09 16:18:16,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:16,549 INFO L225 Difference]: With dead ends: 206315 [2018-12-09 16:18:16,549 INFO L226 Difference]: Without dead ends: 206315 [2018-12-09 16:18:16,549 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 16:18:16,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-12-09 16:18:19,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-12-09 16:18:19,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-12-09 16:18:19,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-12-09 16:18:19,619 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-12-09 16:18:19,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:19,619 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-12-09 16:18:19,619 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:19,619 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-12-09 16:18:19,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:19,696 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:19,696 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:19,697 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:19,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:19,697 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-12-09 16:18:19,697 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:19,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:19,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:19,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:19,698 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:19,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:19,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:19,742 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:19,742 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:18:19,742 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:19,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:18:19,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:18:19,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:18:19,743 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 4 states. [2018-12-09 16:18:21,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:21,013 INFO L93 Difference]: Finished difference Result 229302 states and 852725 transitions. [2018-12-09 16:18:21,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:18:21,013 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-09 16:18:21,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:21,511 INFO L225 Difference]: With dead ends: 229302 [2018-12-09 16:18:21,511 INFO L226 Difference]: Without dead ends: 226678 [2018-12-09 16:18:21,511 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:21,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226678 states. [2018-12-09 16:18:26,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226678 to 213350. [2018-12-09 16:18:26,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213350 states. [2018-12-09 16:18:27,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213350 states to 213350 states and 794333 transitions. [2018-12-09 16:18:27,271 INFO L78 Accepts]: Start accepts. Automaton has 213350 states and 794333 transitions. Word has length 95 [2018-12-09 16:18:27,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:27,272 INFO L480 AbstractCegarLoop]: Abstraction has 213350 states and 794333 transitions. [2018-12-09 16:18:27,272 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:18:27,272 INFO L276 IsEmpty]: Start isEmpty. Operand 213350 states and 794333 transitions. [2018-12-09 16:18:27,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:27,657 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:27,657 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:27,657 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:27,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:27,658 INFO L82 PathProgramCache]: Analyzing trace with hash -312731950, now seen corresponding path program 1 times [2018-12-09 16:18:27,658 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:27,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:27,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:27,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:27,659 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:27,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:27,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:27,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:27,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:18:27,731 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:27,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 16:18:27,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 16:18:27,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:27,731 INFO L87 Difference]: Start difference. First operand 213350 states and 794333 transitions. Second operand 7 states. [2018-12-09 16:18:28,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:28,794 INFO L93 Difference]: Finished difference Result 189931 states and 685766 transitions. [2018-12-09 16:18:28,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 16:18:28,794 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-12-09 16:18:28,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:29,169 INFO L225 Difference]: With dead ends: 189931 [2018-12-09 16:18:29,169 INFO L226 Difference]: Without dead ends: 189931 [2018-12-09 16:18:29,169 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-12-09 16:18:29,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189931 states. [2018-12-09 16:18:31,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189931 to 162086. [2018-12-09 16:18:31,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162086 states. [2018-12-09 16:18:31,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162086 states to 162086 states and 586268 transitions. [2018-12-09 16:18:31,967 INFO L78 Accepts]: Start accepts. Automaton has 162086 states and 586268 transitions. Word has length 95 [2018-12-09 16:18:31,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:31,967 INFO L480 AbstractCegarLoop]: Abstraction has 162086 states and 586268 transitions. [2018-12-09 16:18:31,967 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 16:18:31,967 INFO L276 IsEmpty]: Start isEmpty. Operand 162086 states and 586268 transitions. [2018-12-09 16:18:32,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-09 16:18:32,037 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:32,037 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:32,037 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:32,037 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:32,037 INFO L82 PathProgramCache]: Analyzing trace with hash -2120186413, now seen corresponding path program 1 times [2018-12-09 16:18:32,037 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:32,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:32,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:32,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:32,038 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:32,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:32,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:32,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:32,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:32,077 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:32,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:32,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:32,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:32,078 INFO L87 Difference]: Start difference. First operand 162086 states and 586268 transitions. Second operand 6 states. [2018-12-09 16:18:32,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:32,234 INFO L93 Difference]: Finished difference Result 46438 states and 144284 transitions. [2018-12-09 16:18:32,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:32,234 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-09 16:18:32,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:32,285 INFO L225 Difference]: With dead ends: 46438 [2018-12-09 16:18:32,286 INFO L226 Difference]: Without dead ends: 39377 [2018-12-09 16:18:32,286 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-09 16:18:32,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39377 states. [2018-12-09 16:18:32,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39377 to 35862. [2018-12-09 16:18:32,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35862 states. [2018-12-09 16:18:32,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35862 states to 35862 states and 109114 transitions. [2018-12-09 16:18:32,711 INFO L78 Accepts]: Start accepts. Automaton has 35862 states and 109114 transitions. Word has length 95 [2018-12-09 16:18:32,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:32,711 INFO L480 AbstractCegarLoop]: Abstraction has 35862 states and 109114 transitions. [2018-12-09 16:18:32,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:32,711 INFO L276 IsEmpty]: Start isEmpty. Operand 35862 states and 109114 transitions. [2018-12-09 16:18:32,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 16:18:32,739 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:32,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:32,739 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:32,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:32,739 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-12-09 16:18:32,739 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:32,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:32,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:32,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:32,740 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:32,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:32,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:32,772 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:32,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:32,772 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:32,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:32,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:32,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:32,773 INFO L87 Difference]: Start difference. First operand 35862 states and 109114 transitions. Second operand 5 states. [2018-12-09 16:18:33,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:33,004 INFO L93 Difference]: Finished difference Result 40412 states and 123284 transitions. [2018-12-09 16:18:33,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 16:18:33,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-09 16:18:33,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:33,046 INFO L225 Difference]: With dead ends: 40412 [2018-12-09 16:18:33,046 INFO L226 Difference]: Without dead ends: 40412 [2018-12-09 16:18:33,046 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-09 16:18:33,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40412 states. [2018-12-09 16:18:33,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40412 to 35977. [2018-12-09 16:18:33,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35977 states. [2018-12-09 16:18:33,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35977 states to 35977 states and 109436 transitions. [2018-12-09 16:18:33,427 INFO L78 Accepts]: Start accepts. Automaton has 35977 states and 109436 transitions. Word has length 98 [2018-12-09 16:18:33,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:33,427 INFO L480 AbstractCegarLoop]: Abstraction has 35977 states and 109436 transitions. [2018-12-09 16:18:33,427 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:33,428 INFO L276 IsEmpty]: Start isEmpty. Operand 35977 states and 109436 transitions. [2018-12-09 16:18:33,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 16:18:33,457 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:33,457 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:33,457 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:33,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:33,458 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-12-09 16:18:33,458 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:33,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:33,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:33,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:33,459 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:33,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:33,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:33,528 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:33,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:33,528 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:33,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:33,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:33,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:33,529 INFO L87 Difference]: Start difference. First operand 35977 states and 109436 transitions. Second operand 5 states. [2018-12-09 16:18:33,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:33,659 INFO L93 Difference]: Finished difference Result 44527 states and 136285 transitions. [2018-12-09 16:18:33,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:18:33,659 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-09 16:18:33,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:33,709 INFO L225 Difference]: With dead ends: 44527 [2018-12-09 16:18:33,709 INFO L226 Difference]: Without dead ends: 44527 [2018-12-09 16:18:33,710 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:33,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44527 states. [2018-12-09 16:18:34,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44527 to 36847. [2018-12-09 16:18:34,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36847 states. [2018-12-09 16:18:34,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36847 states to 36847 states and 111882 transitions. [2018-12-09 16:18:34,152 INFO L78 Accepts]: Start accepts. Automaton has 36847 states and 111882 transitions. Word has length 98 [2018-12-09 16:18:34,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:34,153 INFO L480 AbstractCegarLoop]: Abstraction has 36847 states and 111882 transitions. [2018-12-09 16:18:34,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:34,153 INFO L276 IsEmpty]: Start isEmpty. Operand 36847 states and 111882 transitions. [2018-12-09 16:18:34,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 16:18:34,183 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:34,183 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:34,183 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:34,183 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:34,183 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-12-09 16:18:34,183 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:34,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:34,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:34,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:34,184 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:34,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:34,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:34,264 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:34,264 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:34,264 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:34,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:34,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:34,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:34,265 INFO L87 Difference]: Start difference. First operand 36847 states and 111882 transitions. Second operand 6 states. [2018-12-09 16:18:34,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:34,749 INFO L93 Difference]: Finished difference Result 69663 states and 211622 transitions. [2018-12-09 16:18:34,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 16:18:34,750 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-12-09 16:18:34,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:34,832 INFO L225 Difference]: With dead ends: 69663 [2018-12-09 16:18:34,833 INFO L226 Difference]: Without dead ends: 69153 [2018-12-09 16:18:34,833 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-09 16:18:34,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-12-09 16:18:35,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 40017. [2018-12-09 16:18:35,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40017 states. [2018-12-09 16:18:35,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40017 states to 40017 states and 121143 transitions. [2018-12-09 16:18:35,559 INFO L78 Accepts]: Start accepts. Automaton has 40017 states and 121143 transitions. Word has length 98 [2018-12-09 16:18:35,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:35,559 INFO L480 AbstractCegarLoop]: Abstraction has 40017 states and 121143 transitions. [2018-12-09 16:18:35,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:35,560 INFO L276 IsEmpty]: Start isEmpty. Operand 40017 states and 121143 transitions. [2018-12-09 16:18:35,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-09 16:18:35,594 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:35,594 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:35,594 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:35,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:35,594 INFO L82 PathProgramCache]: Analyzing trace with hash -805434949, now seen corresponding path program 1 times [2018-12-09 16:18:35,594 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:35,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:35,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:35,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:35,595 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:35,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:35,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:35,658 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:35,658 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:18:35,658 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:35,659 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 16:18:35,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 16:18:35,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:35,659 INFO L87 Difference]: Start difference. First operand 40017 states and 121143 transitions. Second operand 7 states. [2018-12-09 16:18:36,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:36,216 INFO L93 Difference]: Finished difference Result 54150 states and 162666 transitions. [2018-12-09 16:18:36,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:36,216 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-09 16:18:36,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:36,278 INFO L225 Difference]: With dead ends: 54150 [2018-12-09 16:18:36,278 INFO L226 Difference]: Without dead ends: 54150 [2018-12-09 16:18:36,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:36,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54150 states. [2018-12-09 16:18:36,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54150 to 42062. [2018-12-09 16:18:36,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42062 states. [2018-12-09 16:18:36,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42062 states to 42062 states and 127579 transitions. [2018-12-09 16:18:36,806 INFO L78 Accepts]: Start accepts. Automaton has 42062 states and 127579 transitions. Word has length 122 [2018-12-09 16:18:36,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:36,806 INFO L480 AbstractCegarLoop]: Abstraction has 42062 states and 127579 transitions. [2018-12-09 16:18:36,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 16:18:36,806 INFO L276 IsEmpty]: Start isEmpty. Operand 42062 states and 127579 transitions. [2018-12-09 16:18:36,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-09 16:18:36,844 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:36,845 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:36,845 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:36,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:36,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1292235455, now seen corresponding path program 1 times [2018-12-09 16:18:36,845 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:36,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:36,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:36,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:36,846 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:36,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:36,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:36,951 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:36,951 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:18:36,951 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:36,952 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 16:18:36,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 16:18:36,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:36,952 INFO L87 Difference]: Start difference. First operand 42062 states and 127579 transitions. Second operand 7 states. [2018-12-09 16:18:37,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:37,422 INFO L93 Difference]: Finished difference Result 73252 states and 218676 transitions. [2018-12-09 16:18:37,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 16:18:37,422 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-09 16:18:37,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:37,507 INFO L225 Difference]: With dead ends: 73252 [2018-12-09 16:18:37,507 INFO L226 Difference]: Without dead ends: 71947 [2018-12-09 16:18:37,508 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-12-09 16:18:37,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71947 states. [2018-12-09 16:18:38,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71947 to 53737. [2018-12-09 16:18:38,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53737 states. [2018-12-09 16:18:38,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53737 states to 53737 states and 163699 transitions. [2018-12-09 16:18:38,257 INFO L78 Accepts]: Start accepts. Automaton has 53737 states and 163699 transitions. Word has length 122 [2018-12-09 16:18:38,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:38,258 INFO L480 AbstractCegarLoop]: Abstraction has 53737 states and 163699 transitions. [2018-12-09 16:18:38,258 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 16:18:38,258 INFO L276 IsEmpty]: Start isEmpty. Operand 53737 states and 163699 transitions. [2018-12-09 16:18:38,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-09 16:18:38,314 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:38,314 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:38,315 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:38,315 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:38,315 INFO L82 PathProgramCache]: Analyzing trace with hash -47470974, now seen corresponding path program 1 times [2018-12-09 16:18:38,315 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:38,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:38,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:38,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:38,317 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:38,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:38,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:38,461 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:38,461 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:18:38,461 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:38,461 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:18:38,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:18:38,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:18:38,462 INFO L87 Difference]: Start difference. First operand 53737 states and 163699 transitions. Second operand 4 states. [2018-12-09 16:18:38,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:38,652 INFO L93 Difference]: Finished difference Result 50897 states and 153592 transitions. [2018-12-09 16:18:38,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 16:18:38,652 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 122 [2018-12-09 16:18:38,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:38,713 INFO L225 Difference]: With dead ends: 50897 [2018-12-09 16:18:38,713 INFO L226 Difference]: Without dead ends: 50897 [2018-12-09 16:18:38,713 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:38,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50897 states. [2018-12-09 16:18:39,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50897 to 47142. [2018-12-09 16:18:39,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47142 states. [2018-12-09 16:18:39,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47142 states to 47142 states and 142668 transitions. [2018-12-09 16:18:39,271 INFO L78 Accepts]: Start accepts. Automaton has 47142 states and 142668 transitions. Word has length 122 [2018-12-09 16:18:39,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:39,272 INFO L480 AbstractCegarLoop]: Abstraction has 47142 states and 142668 transitions. [2018-12-09 16:18:39,272 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:18:39,272 INFO L276 IsEmpty]: Start isEmpty. Operand 47142 states and 142668 transitions. [2018-12-09 16:18:39,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-09 16:18:39,315 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:39,315 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:39,315 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:39,315 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:39,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1143872236, now seen corresponding path program 1 times [2018-12-09 16:18:39,316 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:39,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:39,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:39,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:39,317 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:39,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:39,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:39,370 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:39,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:39,370 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:39,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:39,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:39,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:39,371 INFO L87 Difference]: Start difference. First operand 47142 states and 142668 transitions. Second operand 5 states. [2018-12-09 16:18:39,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:39,566 INFO L93 Difference]: Finished difference Result 55437 states and 167459 transitions. [2018-12-09 16:18:39,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:39,567 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-09 16:18:39,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:39,632 INFO L225 Difference]: With dead ends: 55437 [2018-12-09 16:18:39,632 INFO L226 Difference]: Without dead ends: 55437 [2018-12-09 16:18:39,633 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:39,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55437 states. [2018-12-09 16:18:40,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55437 to 47447. [2018-12-09 16:18:40,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47447 states. [2018-12-09 16:18:40,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47447 states to 47447 states and 143362 transitions. [2018-12-09 16:18:40,199 INFO L78 Accepts]: Start accepts. Automaton has 47447 states and 143362 transitions. Word has length 124 [2018-12-09 16:18:40,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:40,199 INFO L480 AbstractCegarLoop]: Abstraction has 47447 states and 143362 transitions. [2018-12-09 16:18:40,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:40,199 INFO L276 IsEmpty]: Start isEmpty. Operand 47447 states and 143362 transitions. [2018-12-09 16:18:40,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-09 16:18:40,241 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:40,241 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:40,241 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:40,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:40,242 INFO L82 PathProgramCache]: Analyzing trace with hash -866231605, now seen corresponding path program 1 times [2018-12-09 16:18:40,242 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:40,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:40,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:40,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:40,243 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:40,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:40,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:40,274 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:40,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:18:40,274 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:40,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 16:18:40,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 16:18:40,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 16:18:40,275 INFO L87 Difference]: Start difference. First operand 47447 states and 143362 transitions. Second operand 4 states. [2018-12-09 16:18:40,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:40,594 INFO L93 Difference]: Finished difference Result 57857 states and 174005 transitions. [2018-12-09 16:18:40,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:18:40,594 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-09 16:18:40,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:40,660 INFO L225 Difference]: With dead ends: 57857 [2018-12-09 16:18:40,660 INFO L226 Difference]: Without dead ends: 57482 [2018-12-09 16:18:40,661 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:40,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57482 states. [2018-12-09 16:18:41,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57482 to 50807. [2018-12-09 16:18:41,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50807 states. [2018-12-09 16:18:41,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50807 states to 50807 states and 152980 transitions. [2018-12-09 16:18:41,320 INFO L78 Accepts]: Start accepts. Automaton has 50807 states and 152980 transitions. Word has length 124 [2018-12-09 16:18:41,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:41,320 INFO L480 AbstractCegarLoop]: Abstraction has 50807 states and 152980 transitions. [2018-12-09 16:18:41,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 16:18:41,321 INFO L276 IsEmpty]: Start isEmpty. Operand 50807 states and 152980 transitions. [2018-12-09 16:18:41,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-09 16:18:41,371 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:41,371 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:41,371 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:41,371 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:41,371 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-12-09 16:18:41,372 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:41,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:41,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:41,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:41,373 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:41,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:41,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:41,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:41,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 16:18:41,473 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:41,473 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:18:41,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:18:41,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-09 16:18:41,473 INFO L87 Difference]: Start difference. First operand 50807 states and 152980 transitions. Second operand 10 states. [2018-12-09 16:18:42,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:42,160 INFO L93 Difference]: Finished difference Result 65964 states and 198865 transitions. [2018-12-09 16:18:42,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 16:18:42,161 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-12-09 16:18:42,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:42,238 INFO L225 Difference]: With dead ends: 65964 [2018-12-09 16:18:42,238 INFO L226 Difference]: Without dead ends: 65964 [2018-12-09 16:18:42,238 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-12-09 16:18:42,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65964 states. [2018-12-09 16:18:42,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65964 to 56467. [2018-12-09 16:18:42,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56467 states. [2018-12-09 16:18:42,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56467 states to 56467 states and 170268 transitions. [2018-12-09 16:18:42,953 INFO L78 Accepts]: Start accepts. Automaton has 56467 states and 170268 transitions. Word has length 124 [2018-12-09 16:18:42,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:42,954 INFO L480 AbstractCegarLoop]: Abstraction has 56467 states and 170268 transitions. [2018-12-09 16:18:42,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:18:42,954 INFO L276 IsEmpty]: Start isEmpty. Operand 56467 states and 170268 transitions. [2018-12-09 16:18:43,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-09 16:18:43,009 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:43,009 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:43,009 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:43,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:43,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-12-09 16:18:43,010 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:43,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:43,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:43,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:43,011 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:43,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:43,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:43,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:43,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:43,077 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:43,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:43,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:43,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:43,077 INFO L87 Difference]: Start difference. First operand 56467 states and 170268 transitions. Second operand 5 states. [2018-12-09 16:18:43,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:43,237 INFO L93 Difference]: Finished difference Result 56467 states and 170204 transitions. [2018-12-09 16:18:43,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:18:43,238 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-09 16:18:43,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:43,303 INFO L225 Difference]: With dead ends: 56467 [2018-12-09 16:18:43,303 INFO L226 Difference]: Without dead ends: 56467 [2018-12-09 16:18:43,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:43,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56467 states. [2018-12-09 16:18:43,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56467 to 54744. [2018-12-09 16:18:43,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54744 states. [2018-12-09 16:18:43,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54744 states to 54744 states and 164820 transitions. [2018-12-09 16:18:43,987 INFO L78 Accepts]: Start accepts. Automaton has 54744 states and 164820 transitions. Word has length 124 [2018-12-09 16:18:43,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:43,988 INFO L480 AbstractCegarLoop]: Abstraction has 54744 states and 164820 transitions. [2018-12-09 16:18:43,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:43,988 INFO L276 IsEmpty]: Start isEmpty. Operand 54744 states and 164820 transitions. [2018-12-09 16:18:44,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-09 16:18:44,041 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:44,041 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:44,042 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:44,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:44,042 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-12-09 16:18:44,042 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:44,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:44,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:44,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:44,043 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:44,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:44,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:44,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:44,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 16:18:44,070 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:44,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:18:44,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:18:44,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:18:44,071 INFO L87 Difference]: Start difference. First operand 54744 states and 164820 transitions. Second operand 3 states. [2018-12-09 16:18:44,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:44,202 INFO L93 Difference]: Finished difference Result 54744 states and 164756 transitions. [2018-12-09 16:18:44,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:18:44,202 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-12-09 16:18:44,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:44,270 INFO L225 Difference]: With dead ends: 54744 [2018-12-09 16:18:44,270 INFO L226 Difference]: Without dead ends: 54744 [2018-12-09 16:18:44,271 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:18:44,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54744 states. [2018-12-09 16:18:44,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54744 to 54744. [2018-12-09 16:18:44,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54744 states. [2018-12-09 16:18:44,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54744 states to 54744 states and 164756 transitions. [2018-12-09 16:18:44,877 INFO L78 Accepts]: Start accepts. Automaton has 54744 states and 164756 transitions. Word has length 124 [2018-12-09 16:18:44,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:44,877 INFO L480 AbstractCegarLoop]: Abstraction has 54744 states and 164756 transitions. [2018-12-09 16:18:44,877 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:18:44,878 INFO L276 IsEmpty]: Start isEmpty. Operand 54744 states and 164756 transitions. [2018-12-09 16:18:44,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:44,932 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:44,932 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:44,932 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:44,932 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:44,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-12-09 16:18:44,932 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:44,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:44,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:44,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:44,934 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:44,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:45,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:45,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:45,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 16:18:45,042 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:45,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:18:45,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:18:45,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-09 16:18:45,043 INFO L87 Difference]: Start difference. First operand 54744 states and 164756 transitions. Second operand 10 states. [2018-12-09 16:18:45,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:45,541 INFO L93 Difference]: Finished difference Result 72689 states and 218731 transitions. [2018-12-09 16:18:45,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 16:18:45,542 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-12-09 16:18:45,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:45,569 INFO L225 Difference]: With dead ends: 72689 [2018-12-09 16:18:45,569 INFO L226 Difference]: Without dead ends: 26397 [2018-12-09 16:18:45,570 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-12-09 16:18:45,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26397 states. [2018-12-09 16:18:45,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26397 to 25804. [2018-12-09 16:18:45,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25804 states. [2018-12-09 16:18:45,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25804 states to 25804 states and 72836 transitions. [2018-12-09 16:18:45,841 INFO L78 Accepts]: Start accepts. Automaton has 25804 states and 72836 transitions. Word has length 126 [2018-12-09 16:18:45,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:45,841 INFO L480 AbstractCegarLoop]: Abstraction has 25804 states and 72836 transitions. [2018-12-09 16:18:45,841 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:18:45,842 INFO L276 IsEmpty]: Start isEmpty. Operand 25804 states and 72836 transitions. [2018-12-09 16:18:45,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:45,868 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:45,868 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:45,868 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:45,868 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:45,868 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-12-09 16:18:45,868 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:45,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:45,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:45,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:45,869 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:45,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:45,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:45,973 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:45,973 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 16:18:45,973 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:45,973 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 16:18:45,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 16:18:45,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-09 16:18:45,973 INFO L87 Difference]: Start difference. First operand 25804 states and 72836 transitions. Second operand 9 states. [2018-12-09 16:18:46,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:46,384 INFO L93 Difference]: Finished difference Result 36737 states and 105701 transitions. [2018-12-09 16:18:46,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 16:18:46,385 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-12-09 16:18:46,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:46,394 INFO L225 Difference]: With dead ends: 36737 [2018-12-09 16:18:46,394 INFO L226 Difference]: Without dead ends: 9443 [2018-12-09 16:18:46,394 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-09 16:18:46,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9443 states. [2018-12-09 16:18:46,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9443 to 9443. [2018-12-09 16:18:46,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9443 states. [2018-12-09 16:18:46,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9443 states to 9443 states and 28650 transitions. [2018-12-09 16:18:46,476 INFO L78 Accepts]: Start accepts. Automaton has 9443 states and 28650 transitions. Word has length 126 [2018-12-09 16:18:46,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:46,476 INFO L480 AbstractCegarLoop]: Abstraction has 9443 states and 28650 transitions. [2018-12-09 16:18:46,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 16:18:46,476 INFO L276 IsEmpty]: Start isEmpty. Operand 9443 states and 28650 transitions. [2018-12-09 16:18:46,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:46,485 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:46,485 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:46,485 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:46,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:46,485 INFO L82 PathProgramCache]: Analyzing trace with hash 893671918, now seen corresponding path program 1 times [2018-12-09 16:18:46,485 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:46,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:46,486 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 16:18:46,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:46,486 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:46,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:46,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:46,521 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:46,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:46,522 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:46,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:46,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:46,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:46,522 INFO L87 Difference]: Start difference. First operand 9443 states and 28650 transitions. Second operand 6 states. [2018-12-09 16:18:46,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:46,732 INFO L93 Difference]: Finished difference Result 16883 states and 51202 transitions. [2018-12-09 16:18:46,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 16:18:46,733 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-09 16:18:46,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:46,749 INFO L225 Difference]: With dead ends: 16883 [2018-12-09 16:18:46,749 INFO L226 Difference]: Without dead ends: 16751 [2018-12-09 16:18:46,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2018-12-09 16:18:46,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16751 states. [2018-12-09 16:18:46,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16751 to 11083. [2018-12-09 16:18:46,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11083 states. [2018-12-09 16:18:46,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11083 states to 11083 states and 33804 transitions. [2018-12-09 16:18:46,891 INFO L78 Accepts]: Start accepts. Automaton has 11083 states and 33804 transitions. Word has length 126 [2018-12-09 16:18:46,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:46,892 INFO L480 AbstractCegarLoop]: Abstraction has 11083 states and 33804 transitions. [2018-12-09 16:18:46,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:46,892 INFO L276 IsEmpty]: Start isEmpty. Operand 11083 states and 33804 transitions. [2018-12-09 16:18:46,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:46,902 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:46,902 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:46,902 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:46,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:46,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1586773615, now seen corresponding path program 1 times [2018-12-09 16:18:46,903 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:46,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:46,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:46,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:46,904 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:46,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:46,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:46,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:46,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:18:46,944 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:46,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:18:46,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:18:46,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:18:46,945 INFO L87 Difference]: Start difference. First operand 11083 states and 33804 transitions. Second operand 5 states. [2018-12-09 16:18:47,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:47,006 INFO L93 Difference]: Finished difference Result 10963 states and 33150 transitions. [2018-12-09 16:18:47,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:18:47,006 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-12-09 16:18:47,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:47,016 INFO L225 Difference]: With dead ends: 10963 [2018-12-09 16:18:47,016 INFO L226 Difference]: Without dead ends: 10963 [2018-12-09 16:18:47,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:47,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10963 states. [2018-12-09 16:18:47,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10963 to 9743. [2018-12-09 16:18:47,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9743 states. [2018-12-09 16:18:47,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9743 states to 9743 states and 29531 transitions. [2018-12-09 16:18:47,115 INFO L78 Accepts]: Start accepts. Automaton has 9743 states and 29531 transitions. Word has length 126 [2018-12-09 16:18:47,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:47,115 INFO L480 AbstractCegarLoop]: Abstraction has 9743 states and 29531 transitions. [2018-12-09 16:18:47,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:18:47,115 INFO L276 IsEmpty]: Start isEmpty. Operand 9743 states and 29531 transitions. [2018-12-09 16:18:47,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:47,124 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:47,124 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:47,124 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:47,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:47,124 INFO L82 PathProgramCache]: Analyzing trace with hash 1515780813, now seen corresponding path program 1 times [2018-12-09 16:18:47,124 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:47,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:47,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,125 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:47,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:47,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:47,184 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:47,184 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:47,185 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:47,185 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:47,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:47,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:47,185 INFO L87 Difference]: Start difference. First operand 9743 states and 29531 transitions. Second operand 6 states. [2018-12-09 16:18:47,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:47,264 INFO L93 Difference]: Finished difference Result 11159 states and 33421 transitions. [2018-12-09 16:18:47,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:18:47,264 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-09 16:18:47,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:47,274 INFO L225 Difference]: With dead ends: 11159 [2018-12-09 16:18:47,274 INFO L226 Difference]: Without dead ends: 11011 [2018-12-09 16:18:47,275 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:18:47,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11011 states. [2018-12-09 16:18:47,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11011 to 8267. [2018-12-09 16:18:47,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8267 states. [2018-12-09 16:18:47,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8267 states to 8267 states and 24812 transitions. [2018-12-09 16:18:47,365 INFO L78 Accepts]: Start accepts. Automaton has 8267 states and 24812 transitions. Word has length 126 [2018-12-09 16:18:47,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:47,365 INFO L480 AbstractCegarLoop]: Abstraction has 8267 states and 24812 transitions. [2018-12-09 16:18:47,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:47,365 INFO L276 IsEmpty]: Start isEmpty. Operand 8267 states and 24812 transitions. [2018-12-09 16:18:47,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:47,372 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:47,372 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:47,373 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:47,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:47,373 INFO L82 PathProgramCache]: Analyzing trace with hash -2086084786, now seen corresponding path program 1 times [2018-12-09 16:18:47,373 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:47,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:47,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,374 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:47,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:18:47,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:18:47,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:18:47,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 16:18:47,427 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:18:47,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:18:47,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:18:47,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:18:47,428 INFO L87 Difference]: Start difference. First operand 8267 states and 24812 transitions. Second operand 6 states. [2018-12-09 16:18:47,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:18:47,497 INFO L93 Difference]: Finished difference Result 11167 states and 33603 transitions. [2018-12-09 16:18:47,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:18:47,497 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-09 16:18:47,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:18:47,507 INFO L225 Difference]: With dead ends: 11167 [2018-12-09 16:18:47,508 INFO L226 Difference]: Without dead ends: 11167 [2018-12-09 16:18:47,508 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-09 16:18:47,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11167 states. [2018-12-09 16:18:47,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11167 to 8051. [2018-12-09 16:18:47,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8051 states. [2018-12-09 16:18:47,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8051 states to 8051 states and 24210 transitions. [2018-12-09 16:18:47,601 INFO L78 Accepts]: Start accepts. Automaton has 8051 states and 24210 transitions. Word has length 126 [2018-12-09 16:18:47,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:18:47,601 INFO L480 AbstractCegarLoop]: Abstraction has 8051 states and 24210 transitions. [2018-12-09 16:18:47,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:18:47,601 INFO L276 IsEmpty]: Start isEmpty. Operand 8051 states and 24210 transitions. [2018-12-09 16:18:47,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-09 16:18:47,608 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:18:47,608 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:18:47,608 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 16:18:47,609 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:18:47,609 INFO L82 PathProgramCache]: Analyzing trace with hash -360603889, now seen corresponding path program 3 times [2018-12-09 16:18:47,609 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:18:47,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:18:47,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:18:47,610 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:18:47,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 16:18:47,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 16:18:47,663 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 16:18:47,769 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-09 16:18:47,770 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 04:18:47 BasicIcfg [2018-12-09 16:18:47,770 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 16:18:47,770 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 16:18:47,771 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 16:18:47,771 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 16:18:47,771 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:15:37" (3/4) ... [2018-12-09 16:18:47,773 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 16:18:47,902 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_cc692139-511c-41ec-b51f-bce1bc8bb88d/bin-2019/utaipan/witness.graphml [2018-12-09 16:18:47,902 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 16:18:47,903 INFO L168 Benchmark]: Toolchain (without parser) took 191535.29 ms. Allocated memory was 1.0 GB in the beginning and 7.4 GB in the end (delta: 6.4 GB). Free memory was 947.0 MB in the beginning and 3.3 GB in the end (delta: -2.4 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: CACSL2BoogieTranslator took 336.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -156.1 MB). Peak memory consumption was 37.3 MB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: Boogie Procedure Inliner took 30.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: Boogie Preprocessor took 23.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: RCFGBuilder took 406.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 64.0 MB). Peak memory consumption was 64.0 MB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,904 INFO L168 Benchmark]: TraceAbstraction took 190603.49 ms. Allocated memory was 1.2 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,905 INFO L168 Benchmark]: Witness Printer took 131.96 ms. Allocated memory is still 7.4 GB. Free memory was 3.5 GB in the beginning and 3.3 GB in the end (delta: 108.4 MB). Peak memory consumption was 108.4 MB. Max. memory is 11.5 GB. [2018-12-09 16:18:47,906 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 336.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -156.1 MB). Peak memory consumption was 37.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 30.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 406.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 64.0 MB). Peak memory consumption was 64.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 190603.49 ms. Allocated memory was 1.2 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 131.96 ms. Allocated memory is still 7.4 GB. Free memory was 3.5 GB in the beginning and 3.3 GB in the end (delta: 108.4 MB). Peak memory consumption was 108.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t1942; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t1942, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t1943; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t1943, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t1944; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t1944, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 190.5s OverallTime, 36 OverallIterations, 1 TraceHistogramMax, 36.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12529 SDtfs, 18874 SDslu, 25734 SDs, 0 SdLazy, 10220 SolverSat, 791 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 346 GetRequests, 83 SyntacticMatches, 31 SemanticMatches, 232 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 308 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 53.8s AutomataMinimizationTime, 35 MinimizatonAttempts, 554051 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 3703 NumberOfCodeBlocks, 3703 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 3542 ConstructedInterpolants, 0 QuantifiedInterpolants, 895672 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...