./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ae89a5f69c33bb2aef4adfeda449249d64c64d36 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 14:23:40,610 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 14:23:40,611 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 14:23:40,617 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 14:23:40,618 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 14:23:40,618 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 14:23:40,619 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 14:23:40,619 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 14:23:40,620 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 14:23:40,621 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 14:23:40,621 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 14:23:40,621 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 14:23:40,622 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 14:23:40,622 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 14:23:40,623 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 14:23:40,623 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 14:23:40,623 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 14:23:40,624 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 14:23:40,625 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 14:23:40,626 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 14:23:40,626 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 14:23:40,627 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 14:23:40,628 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 14:23:40,628 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 14:23:40,628 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 14:23:40,629 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 14:23:40,629 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 14:23:40,629 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 14:23:40,630 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 14:23:40,630 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 14:23:40,630 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 14:23:40,631 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 14:23:40,631 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 14:23:40,631 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 14:23:40,632 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 14:23:40,632 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 14:23:40,632 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-08 14:23:40,639 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 14:23:40,639 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 14:23:40,640 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 14:23:40,640 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 14:23:40,640 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 14:23:40,641 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 14:23:40,641 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 14:23:40,642 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 14:23:40,642 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 14:23:40,642 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-08 14:23:40,643 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ae89a5f69c33bb2aef4adfeda449249d64c64d36 [2018-12-08 14:23:40,660 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 14:23:40,667 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 14:23:40,669 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 14:23:40,670 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 14:23:40,670 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 14:23:40,670 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/safe031_rmo.opt_false-unreach-call.i [2018-12-08 14:23:40,704 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/data/7cf6c0f2a/dfae7c4d275f4771ac6a190ed3f88d5a/FLAG5faf16900 [2018-12-08 14:23:41,152 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 14:23:41,153 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/sv-benchmarks/c/pthread-wmm/safe031_rmo.opt_false-unreach-call.i [2018-12-08 14:23:41,161 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/data/7cf6c0f2a/dfae7c4d275f4771ac6a190ed3f88d5a/FLAG5faf16900 [2018-12-08 14:23:41,169 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/data/7cf6c0f2a/dfae7c4d275f4771ac6a190ed3f88d5a [2018-12-08 14:23:41,171 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 14:23:41,171 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 14:23:41,172 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 14:23:41,172 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 14:23:41,175 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 14:23:41,175 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,177 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ab2707f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41, skipping insertion in model container [2018-12-08 14:23:41,177 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,182 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 14:23:41,209 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 14:23:41,413 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 14:23:41,423 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 14:23:41,502 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 14:23:41,540 INFO L195 MainTranslator]: Completed translation [2018-12-08 14:23:41,540 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41 WrapperNode [2018-12-08 14:23:41,540 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 14:23:41,541 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 14:23:41,541 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 14:23:41,541 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 14:23:41,546 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,559 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,577 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 14:23:41,578 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 14:23:41,578 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 14:23:41,578 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 14:23:41,584 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,584 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,586 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,587 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,593 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,595 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,596 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... [2018-12-08 14:23:41,599 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 14:23:41,599 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 14:23:41,599 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 14:23:41,599 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 14:23:41,600 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 14:23:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 14:23:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 14:23:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-08 14:23:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-08 14:23:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-08 14:23:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-08 14:23:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 14:23:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 14:23:41,633 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-08 14:23:41,982 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 14:23:41,982 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-08 14:23:41,982 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 02:23:41 BoogieIcfgContainer [2018-12-08 14:23:41,983 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 14:23:41,983 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 14:23:41,983 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 14:23:41,986 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 14:23:41,986 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 02:23:41" (1/3) ... [2018-12-08 14:23:41,986 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b9657a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 02:23:41, skipping insertion in model container [2018-12-08 14:23:41,987 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 02:23:41" (2/3) ... [2018-12-08 14:23:41,987 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b9657a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 02:23:41, skipping insertion in model container [2018-12-08 14:23:41,987 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 02:23:41" (3/3) ... [2018-12-08 14:23:41,988 INFO L112 eAbstractionObserver]: Analyzing ICFG safe031_rmo.opt_false-unreach-call.i [2018-12-08 14:23:42,015 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,016 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,016 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,016 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,016 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,016 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,017 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,018 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,019 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,020 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,020 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,020 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,020 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,020 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,021 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,022 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,023 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,024 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,025 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,026 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,027 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,028 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 14:23:42,033 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-08 14:23:42,034 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 14:23:42,041 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-08 14:23:42,052 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-08 14:23:42,067 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 14:23:42,067 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 14:23:42,067 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 14:23:42,067 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 14:23:42,067 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 14:23:42,067 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 14:23:42,067 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 14:23:42,067 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 14:23:42,077 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 155places, 192 transitions [2018-12-08 14:23:55,717 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 128912 states. [2018-12-08 14:23:55,719 INFO L276 IsEmpty]: Start isEmpty. Operand 128912 states. [2018-12-08 14:23:55,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-08 14:23:55,726 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:23:55,726 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:23:55,728 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:23:55,731 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:23:55,731 INFO L82 PathProgramCache]: Analyzing trace with hash 961127934, now seen corresponding path program 1 times [2018-12-08 14:23:55,733 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:23:55,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:23:55,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:23:55,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:23:55,768 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:23:55,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:23:55,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:23:55,880 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:23:55,880 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:23:55,880 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:23:55,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:23:55,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:23:55,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:23:55,893 INFO L87 Difference]: Start difference. First operand 128912 states. Second operand 4 states. [2018-12-08 14:23:58,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:23:58,498 INFO L93 Difference]: Finished difference Result 233472 states and 1098324 transitions. [2018-12-08 14:23:58,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 14:23:58,499 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2018-12-08 14:23:58,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:23:59,215 INFO L225 Difference]: With dead ends: 233472 [2018-12-08 14:23:59,216 INFO L226 Difference]: Without dead ends: 203722 [2018-12-08 14:23:59,217 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:00,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203722 states. [2018-12-08 14:24:02,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203722 to 118892. [2018-12-08 14:24:02,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-12-08 14:24:02,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 559775 transitions. [2018-12-08 14:24:02,605 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 559775 transitions. Word has length 43 [2018-12-08 14:24:02,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:02,605 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 559775 transitions. [2018-12-08 14:24:02,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:02,606 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 559775 transitions. [2018-12-08 14:24:02,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 14:24:02,612 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:02,612 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:02,613 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:02,613 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:02,613 INFO L82 PathProgramCache]: Analyzing trace with hash -94457539, now seen corresponding path program 1 times [2018-12-08 14:24:02,613 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:02,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:02,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:02,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:02,616 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:02,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:02,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:02,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:02,960 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 14:24:02,960 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:02,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 14:24:02,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 14:24:02,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 14:24:02,961 INFO L87 Difference]: Start difference. First operand 118892 states and 559775 transitions. Second operand 3 states. [2018-12-08 14:24:03,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:03,511 INFO L93 Difference]: Finished difference Result 118892 states and 557815 transitions. [2018-12-08 14:24:03,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 14:24:03,512 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2018-12-08 14:24:03,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:03,826 INFO L225 Difference]: With dead ends: 118892 [2018-12-08 14:24:03,826 INFO L226 Difference]: Without dead ends: 118892 [2018-12-08 14:24:03,827 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 14:24:04,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118892 states. [2018-12-08 14:24:06,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118892 to 118892. [2018-12-08 14:24:06,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-12-08 14:24:06,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 557815 transitions. [2018-12-08 14:24:06,407 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 557815 transitions. Word has length 50 [2018-12-08 14:24:06,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:06,407 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 557815 transitions. [2018-12-08 14:24:06,407 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 14:24:06,407 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 557815 transitions. [2018-12-08 14:24:06,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 14:24:06,411 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:06,411 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:06,411 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:06,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:06,411 INFO L82 PathProgramCache]: Analyzing trace with hash -1901912002, now seen corresponding path program 1 times [2018-12-08 14:24:06,411 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:06,413 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:06,413 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:06,413 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:06,413 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:06,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:06,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:06,460 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:06,460 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:06,460 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:06,460 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:06,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:06,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:06,460 INFO L87 Difference]: Start difference. First operand 118892 states and 557815 transitions. Second operand 5 states. [2018-12-08 14:24:10,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:10,299 INFO L93 Difference]: Finished difference Result 325272 states and 1468249 transitions. [2018-12-08 14:24:10,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 14:24:10,300 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-12-08 14:24:10,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:11,170 INFO L225 Difference]: With dead ends: 325272 [2018-12-08 14:24:11,171 INFO L226 Difference]: Without dead ends: 324272 [2018-12-08 14:24:11,171 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-08 14:24:12,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324272 states. [2018-12-08 14:24:15,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324272 to 186422. [2018-12-08 14:24:15,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186422 states. [2018-12-08 14:24:15,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186422 states to 186422 states and 840914 transitions. [2018-12-08 14:24:15,838 INFO L78 Accepts]: Start accepts. Automaton has 186422 states and 840914 transitions. Word has length 50 [2018-12-08 14:24:15,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:15,838 INFO L480 AbstractCegarLoop]: Abstraction has 186422 states and 840914 transitions. [2018-12-08 14:24:15,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:15,839 INFO L276 IsEmpty]: Start isEmpty. Operand 186422 states and 840914 transitions. [2018-12-08 14:24:15,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 14:24:15,847 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:15,847 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:15,847 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:15,847 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:15,848 INFO L82 PathProgramCache]: Analyzing trace with hash 945118259, now seen corresponding path program 1 times [2018-12-08 14:24:15,848 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:15,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:15,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:15,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:15,850 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:15,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:15,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:15,892 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:15,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:24:15,892 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:15,892 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:24:15,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:24:15,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:15,893 INFO L87 Difference]: Start difference. First operand 186422 states and 840914 transitions. Second operand 4 states. [2018-12-08 14:24:17,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:17,069 INFO L93 Difference]: Finished difference Result 163598 states and 725472 transitions. [2018-12-08 14:24:17,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 14:24:17,070 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2018-12-08 14:24:17,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:17,461 INFO L225 Difference]: With dead ends: 163598 [2018-12-08 14:24:17,461 INFO L226 Difference]: Without dead ends: 160993 [2018-12-08 14:24:17,461 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:18,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160993 states. [2018-12-08 14:24:19,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160993 to 160993. [2018-12-08 14:24:19,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160993 states. [2018-12-08 14:24:23,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160993 states to 160993 states and 716800 transitions. [2018-12-08 14:24:23,378 INFO L78 Accepts]: Start accepts. Automaton has 160993 states and 716800 transitions. Word has length 51 [2018-12-08 14:24:23,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:23,379 INFO L480 AbstractCegarLoop]: Abstraction has 160993 states and 716800 transitions. [2018-12-08 14:24:23,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:23,379 INFO L276 IsEmpty]: Start isEmpty. Operand 160993 states and 716800 transitions. [2018-12-08 14:24:23,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-08 14:24:23,383 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:23,383 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:23,383 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:23,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:23,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1724507505, now seen corresponding path program 1 times [2018-12-08 14:24:23,383 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:23,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:23,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:23,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:23,385 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:23,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:23,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:23,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:23,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:23,427 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:23,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:23,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:23,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:23,428 INFO L87 Difference]: Start difference. First operand 160993 states and 716800 transitions. Second operand 5 states. [2018-12-08 14:24:23,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:23,621 INFO L93 Difference]: Finished difference Result 51405 states and 209121 transitions. [2018-12-08 14:24:23,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 14:24:23,621 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2018-12-08 14:24:23,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:23,714 INFO L225 Difference]: With dead ends: 51405 [2018-12-08 14:24:23,714 INFO L226 Difference]: Without dead ends: 49093 [2018-12-08 14:24:23,715 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:23,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49093 states. [2018-12-08 14:24:24,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49093 to 49093. [2018-12-08 14:24:24,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49093 states. [2018-12-08 14:24:24,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49093 states to 49093 states and 200467 transitions. [2018-12-08 14:24:24,389 INFO L78 Accepts]: Start accepts. Automaton has 49093 states and 200467 transitions. Word has length 52 [2018-12-08 14:24:24,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:24,389 INFO L480 AbstractCegarLoop]: Abstraction has 49093 states and 200467 transitions. [2018-12-08 14:24:24,389 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:24,389 INFO L276 IsEmpty]: Start isEmpty. Operand 49093 states and 200467 transitions. [2018-12-08 14:24:24,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-08 14:24:24,397 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:24,397 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:24,397 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:24,397 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:24,397 INFO L82 PathProgramCache]: Analyzing trace with hash 206449116, now seen corresponding path program 1 times [2018-12-08 14:24:24,397 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:24,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:24,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:24,398 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:24,398 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:24,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:24,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:24,438 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:24,438 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:24:24,438 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:24,438 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:24:24,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:24:24,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:24,439 INFO L87 Difference]: Start difference. First operand 49093 states and 200467 transitions. Second operand 4 states. [2018-12-08 14:24:24,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:24,772 INFO L93 Difference]: Finished difference Result 70361 states and 282256 transitions. [2018-12-08 14:24:24,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 14:24:24,773 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2018-12-08 14:24:24,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:24,905 INFO L225 Difference]: With dead ends: 70361 [2018-12-08 14:24:24,905 INFO L226 Difference]: Without dead ends: 70361 [2018-12-08 14:24:24,905 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:25,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70361 states. [2018-12-08 14:24:25,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70361 to 53657. [2018-12-08 14:24:25,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53657 states. [2018-12-08 14:24:25,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53657 states to 53657 states and 217408 transitions. [2018-12-08 14:24:25,917 INFO L78 Accepts]: Start accepts. Automaton has 53657 states and 217408 transitions. Word has length 65 [2018-12-08 14:24:25,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:25,917 INFO L480 AbstractCegarLoop]: Abstraction has 53657 states and 217408 transitions. [2018-12-08 14:24:25,917 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:25,917 INFO L276 IsEmpty]: Start isEmpty. Operand 53657 states and 217408 transitions. [2018-12-08 14:24:25,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-08 14:24:25,929 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:25,929 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:25,929 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:25,929 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:25,929 INFO L82 PathProgramCache]: Analyzing trace with hash 1949259451, now seen corresponding path program 1 times [2018-12-08 14:24:25,929 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:25,931 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:25,931 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:25,931 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:25,931 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:25,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:25,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:25,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:25,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:25,977 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:25,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:25,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:25,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:25,977 INFO L87 Difference]: Start difference. First operand 53657 states and 217408 transitions. Second operand 6 states. [2018-12-08 14:24:26,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:26,037 INFO L93 Difference]: Finished difference Result 11001 states and 37616 transitions. [2018-12-08 14:24:26,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 14:24:26,037 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-12-08 14:24:26,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:26,048 INFO L225 Difference]: With dead ends: 11001 [2018-12-08 14:24:26,048 INFO L226 Difference]: Without dead ends: 9289 [2018-12-08 14:24:26,048 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-08 14:24:26,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9289 states. [2018-12-08 14:24:26,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9289 to 8774. [2018-12-08 14:24:26,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8774 states. [2018-12-08 14:24:26,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8774 states to 8774 states and 29920 transitions. [2018-12-08 14:24:26,135 INFO L78 Accepts]: Start accepts. Automaton has 8774 states and 29920 transitions. Word has length 65 [2018-12-08 14:24:26,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:26,136 INFO L480 AbstractCegarLoop]: Abstraction has 8774 states and 29920 transitions. [2018-12-08 14:24:26,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:26,136 INFO L276 IsEmpty]: Start isEmpty. Operand 8774 states and 29920 transitions. [2018-12-08 14:24:26,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 14:24:26,144 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:26,144 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:26,144 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:26,144 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:26,144 INFO L82 PathProgramCache]: Analyzing trace with hash 542257541, now seen corresponding path program 1 times [2018-12-08 14:24:26,144 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:26,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:26,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,145 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:26,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:26,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:26,173 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:26,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 14:24:26,173 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:26,173 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 14:24:26,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 14:24:26,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 14:24:26,173 INFO L87 Difference]: Start difference. First operand 8774 states and 29920 transitions. Second operand 3 states. [2018-12-08 14:24:26,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:26,273 INFO L93 Difference]: Finished difference Result 9194 states and 31201 transitions. [2018-12-08 14:24:26,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 14:24:26,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-12-08 14:24:26,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:26,283 INFO L225 Difference]: With dead ends: 9194 [2018-12-08 14:24:26,283 INFO L226 Difference]: Without dead ends: 9194 [2018-12-08 14:24:26,284 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 14:24:26,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9194 states. [2018-12-08 14:24:26,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9194 to 8964. [2018-12-08 14:24:26,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8964 states. [2018-12-08 14:24:26,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8964 states to 8964 states and 30502 transitions. [2018-12-08 14:24:26,369 INFO L78 Accepts]: Start accepts. Automaton has 8964 states and 30502 transitions. Word has length 98 [2018-12-08 14:24:26,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:26,369 INFO L480 AbstractCegarLoop]: Abstraction has 8964 states and 30502 transitions. [2018-12-08 14:24:26,369 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 14:24:26,369 INFO L276 IsEmpty]: Start isEmpty. Operand 8964 states and 30502 transitions. [2018-12-08 14:24:26,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 14:24:26,378 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:26,378 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:26,378 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:26,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:26,379 INFO L82 PathProgramCache]: Analyzing trace with hash 1281844710, now seen corresponding path program 1 times [2018-12-08 14:24:26,379 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:26,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:26,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,380 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:26,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:26,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:26,441 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:26,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:26,441 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:26,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:26,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:26,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:26,441 INFO L87 Difference]: Start difference. First operand 8964 states and 30502 transitions. Second operand 5 states. [2018-12-08 14:24:26,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:26,587 INFO L93 Difference]: Finished difference Result 11109 states and 37218 transitions. [2018-12-08 14:24:26,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 14:24:26,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-08 14:24:26,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:26,599 INFO L225 Difference]: With dead ends: 11109 [2018-12-08 14:24:26,599 INFO L226 Difference]: Without dead ends: 11109 [2018-12-08 14:24:26,599 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-08 14:24:26,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11109 states. [2018-12-08 14:24:26,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11109 to 9409. [2018-12-08 14:24:26,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9409 states. [2018-12-08 14:24:26,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9409 states to 9409 states and 31868 transitions. [2018-12-08 14:24:26,696 INFO L78 Accepts]: Start accepts. Automaton has 9409 states and 31868 transitions. Word has length 98 [2018-12-08 14:24:26,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:26,696 INFO L480 AbstractCegarLoop]: Abstraction has 9409 states and 31868 transitions. [2018-12-08 14:24:26,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:26,696 INFO L276 IsEmpty]: Start isEmpty. Operand 9409 states and 31868 transitions. [2018-12-08 14:24:26,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 14:24:26,705 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:26,705 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:26,706 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:26,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:26,706 INFO L82 PathProgramCache]: Analyzing trace with hash 1274085351, now seen corresponding path program 2 times [2018-12-08 14:24:26,706 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:26,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:26,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:26,707 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:26,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:26,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:26,729 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:26,729 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:24:26,729 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:26,730 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:24:26,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:24:26,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:26,730 INFO L87 Difference]: Start difference. First operand 9409 states and 31868 transitions. Second operand 4 states. [2018-12-08 14:24:26,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:26,894 INFO L93 Difference]: Finished difference Result 14489 states and 49265 transitions. [2018-12-08 14:24:26,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 14:24:26,895 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-12-08 14:24:26,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:26,911 INFO L225 Difference]: With dead ends: 14489 [2018-12-08 14:24:26,911 INFO L226 Difference]: Without dead ends: 14489 [2018-12-08 14:24:26,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:26,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14489 states. [2018-12-08 14:24:27,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14489 to 9619. [2018-12-08 14:24:27,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9619 states. [2018-12-08 14:24:27,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9619 states to 9619 states and 32506 transitions. [2018-12-08 14:24:27,028 INFO L78 Accepts]: Start accepts. Automaton has 9619 states and 32506 transitions. Word has length 98 [2018-12-08 14:24:27,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:27,029 INFO L480 AbstractCegarLoop]: Abstraction has 9619 states and 32506 transitions. [2018-12-08 14:24:27,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:27,029 INFO L276 IsEmpty]: Start isEmpty. Operand 9619 states and 32506 transitions. [2018-12-08 14:24:27,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:27,039 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:27,039 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:27,039 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:27,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:27,039 INFO L82 PathProgramCache]: Analyzing trace with hash 2027533343, now seen corresponding path program 1 times [2018-12-08 14:24:27,039 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:27,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 14:24:27,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,040 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:27,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:27,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:27,075 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:27,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:24:27,075 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:27,075 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:24:27,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:24:27,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:27,075 INFO L87 Difference]: Start difference. First operand 9619 states and 32506 transitions. Second operand 4 states. [2018-12-08 14:24:27,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:27,179 INFO L93 Difference]: Finished difference Result 17455 states and 58925 transitions. [2018-12-08 14:24:27,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 14:24:27,180 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-12-08 14:24:27,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:27,199 INFO L225 Difference]: With dead ends: 17455 [2018-12-08 14:24:27,199 INFO L226 Difference]: Without dead ends: 17455 [2018-12-08 14:24:27,199 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:27,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17455 states. [2018-12-08 14:24:27,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17455 to 9369. [2018-12-08 14:24:27,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9369 states. [2018-12-08 14:24:27,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9369 states to 9369 states and 31371 transitions. [2018-12-08 14:24:27,326 INFO L78 Accepts]: Start accepts. Automaton has 9369 states and 31371 transitions. Word has length 100 [2018-12-08 14:24:27,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:27,326 INFO L480 AbstractCegarLoop]: Abstraction has 9369 states and 31371 transitions. [2018-12-08 14:24:27,326 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:27,326 INFO L276 IsEmpty]: Start isEmpty. Operand 9369 states and 31371 transitions. [2018-12-08 14:24:27,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:27,336 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:27,336 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:27,336 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:27,336 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:27,336 INFO L82 PathProgramCache]: Analyzing trace with hash 844186046, now seen corresponding path program 1 times [2018-12-08 14:24:27,337 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:27,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:27,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,338 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:27,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:27,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:27,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:27,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:27,398 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:27,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:27,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:27,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:27,399 INFO L87 Difference]: Start difference. First operand 9369 states and 31371 transitions. Second operand 6 states. [2018-12-08 14:24:27,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:27,561 INFO L93 Difference]: Finished difference Result 11429 states and 37784 transitions. [2018-12-08 14:24:27,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 14:24:27,562 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-12-08 14:24:27,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:27,574 INFO L225 Difference]: With dead ends: 11429 [2018-12-08 14:24:27,574 INFO L226 Difference]: Without dead ends: 11429 [2018-12-08 14:24:27,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:27,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11429 states. [2018-12-08 14:24:27,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11429 to 9714. [2018-12-08 14:24:27,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9714 states. [2018-12-08 14:24:27,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9714 states to 9714 states and 32482 transitions. [2018-12-08 14:24:27,674 INFO L78 Accepts]: Start accepts. Automaton has 9714 states and 32482 transitions. Word has length 100 [2018-12-08 14:24:27,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:27,674 INFO L480 AbstractCegarLoop]: Abstraction has 9714 states and 32482 transitions. [2018-12-08 14:24:27,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:27,674 INFO L276 IsEmpty]: Start isEmpty. Operand 9714 states and 32482 transitions. [2018-12-08 14:24:27,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:27,683 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:27,683 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:27,684 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:27,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:27,684 INFO L82 PathProgramCache]: Analyzing trace with hash 1813767069, now seen corresponding path program 1 times [2018-12-08 14:24:27,684 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:27,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:27,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:27,685 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:27,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:27,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:27,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:27,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:27,730 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:27,730 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:27,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:27,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:27,731 INFO L87 Difference]: Start difference. First operand 9714 states and 32482 transitions. Second operand 6 states. [2018-12-08 14:24:27,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:27,945 INFO L93 Difference]: Finished difference Result 8993 states and 29747 transitions. [2018-12-08 14:24:27,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 14:24:27,945 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-12-08 14:24:27,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:27,954 INFO L225 Difference]: With dead ends: 8993 [2018-12-08 14:24:27,954 INFO L226 Difference]: Without dead ends: 8993 [2018-12-08 14:24:27,955 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 14:24:27,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8993 states. [2018-12-08 14:24:28,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8993 to 8644. [2018-12-08 14:24:28,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8644 states. [2018-12-08 14:24:28,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8644 states to 8644 states and 28726 transitions. [2018-12-08 14:24:28,036 INFO L78 Accepts]: Start accepts. Automaton has 8644 states and 28726 transitions. Word has length 100 [2018-12-08 14:24:28,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:28,036 INFO L480 AbstractCegarLoop]: Abstraction has 8644 states and 28726 transitions. [2018-12-08 14:24:28,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:28,037 INFO L276 IsEmpty]: Start isEmpty. Operand 8644 states and 28726 transitions. [2018-12-08 14:24:28,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:28,044 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:28,044 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:28,044 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:28,044 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:28,044 INFO L82 PathProgramCache]: Analyzing trace with hash -1185259041, now seen corresponding path program 1 times [2018-12-08 14:24:28,044 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:28,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,045 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:28,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,045 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:28,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:28,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:28,099 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:28,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 14:24:28,099 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:28,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 14:24:28,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 14:24:28,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:28,099 INFO L87 Difference]: Start difference. First operand 8644 states and 28726 transitions. Second operand 7 states. [2018-12-08 14:24:28,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:28,291 INFO L93 Difference]: Finished difference Result 10137 states and 33281 transitions. [2018-12-08 14:24:28,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 14:24:28,292 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-12-08 14:24:28,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:28,302 INFO L225 Difference]: With dead ends: 10137 [2018-12-08 14:24:28,302 INFO L226 Difference]: Without dead ends: 10137 [2018-12-08 14:24:28,302 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:28,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10137 states. [2018-12-08 14:24:28,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10137 to 9044. [2018-12-08 14:24:28,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9044 states. [2018-12-08 14:24:28,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9044 states to 9044 states and 29776 transitions. [2018-12-08 14:24:28,390 INFO L78 Accepts]: Start accepts. Automaton has 9044 states and 29776 transitions. Word has length 100 [2018-12-08 14:24:28,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:28,390 INFO L480 AbstractCegarLoop]: Abstraction has 9044 states and 29776 transitions. [2018-12-08 14:24:28,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 14:24:28,390 INFO L276 IsEmpty]: Start isEmpty. Operand 9044 states and 29776 transitions. [2018-12-08 14:24:28,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:28,398 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:28,398 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:28,398 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:28,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:28,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1926360958, now seen corresponding path program 1 times [2018-12-08 14:24:28,398 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:28,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:28,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,399 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:28,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:28,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:28,471 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:28,471 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:28,471 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:28,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:28,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:28,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:28,472 INFO L87 Difference]: Start difference. First operand 9044 states and 29776 transitions. Second operand 5 states. [2018-12-08 14:24:28,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:28,578 INFO L93 Difference]: Finished difference Result 8252 states and 27064 transitions. [2018-12-08 14:24:28,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 14:24:28,578 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 100 [2018-12-08 14:24:28,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:28,588 INFO L225 Difference]: With dead ends: 8252 [2018-12-08 14:24:28,588 INFO L226 Difference]: Without dead ends: 8252 [2018-12-08 14:24:28,588 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:28,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8252 states. [2018-12-08 14:24:28,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8252 to 8012. [2018-12-08 14:24:28,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8012 states. [2018-12-08 14:24:28,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8012 states to 8012 states and 26387 transitions. [2018-12-08 14:24:28,673 INFO L78 Accepts]: Start accepts. Automaton has 8012 states and 26387 transitions. Word has length 100 [2018-12-08 14:24:28,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:28,673 INFO L480 AbstractCegarLoop]: Abstraction has 8012 states and 26387 transitions. [2018-12-08 14:24:28,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:28,673 INFO L276 IsEmpty]: Start isEmpty. Operand 8012 states and 26387 transitions. [2018-12-08 14:24:28,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:28,681 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:28,681 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:28,681 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:28,682 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:28,682 INFO L82 PathProgramCache]: Analyzing trace with hash 1477664319, now seen corresponding path program 1 times [2018-12-08 14:24:28,682 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:28,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:28,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,683 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:28,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:28,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:28,744 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:28,744 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 14:24:28,744 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:28,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 14:24:28,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 14:24:28,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:28,745 INFO L87 Difference]: Start difference. First operand 8012 states and 26387 transitions. Second operand 4 states. [2018-12-08 14:24:28,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:28,829 INFO L93 Difference]: Finished difference Result 9356 states and 31075 transitions. [2018-12-08 14:24:28,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 14:24:28,830 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-12-08 14:24:28,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:28,840 INFO L225 Difference]: With dead ends: 9356 [2018-12-08 14:24:28,840 INFO L226 Difference]: Without dead ends: 9356 [2018-12-08 14:24:28,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 14:24:28,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9356 states. [2018-12-08 14:24:28,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9356 to 9228. [2018-12-08 14:24:28,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9228 states. [2018-12-08 14:24:28,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9228 states to 9228 states and 30659 transitions. [2018-12-08 14:24:28,925 INFO L78 Accepts]: Start accepts. Automaton has 9228 states and 30659 transitions. Word has length 100 [2018-12-08 14:24:28,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:28,925 INFO L480 AbstractCegarLoop]: Abstraction has 9228 states and 30659 transitions. [2018-12-08 14:24:28,925 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 14:24:28,925 INFO L276 IsEmpty]: Start isEmpty. Operand 9228 states and 30659 transitions. [2018-12-08 14:24:28,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-08 14:24:28,933 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:28,933 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:28,933 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:28,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:28,934 INFO L82 PathProgramCache]: Analyzing trace with hash -599545024, now seen corresponding path program 1 times [2018-12-08 14:24:28,934 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:28,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:28,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:28,935 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:28,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:29,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:29,028 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:29,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:29,028 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:29,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:29,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:29,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:29,028 INFO L87 Difference]: Start difference. First operand 9228 states and 30659 transitions. Second operand 6 states. [2018-12-08 14:24:29,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:29,102 INFO L93 Difference]: Finished difference Result 8076 states and 26211 transitions. [2018-12-08 14:24:29,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 14:24:29,102 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-12-08 14:24:29,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:29,110 INFO L225 Difference]: With dead ends: 8076 [2018-12-08 14:24:29,110 INFO L226 Difference]: Without dead ends: 8076 [2018-12-08 14:24:29,111 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:29,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8076 states. [2018-12-08 14:24:29,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8076 to 6651. [2018-12-08 14:24:29,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6651 states. [2018-12-08 14:24:29,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6651 states to 6651 states and 21805 transitions. [2018-12-08 14:24:29,177 INFO L78 Accepts]: Start accepts. Automaton has 6651 states and 21805 transitions. Word has length 100 [2018-12-08 14:24:29,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:29,177 INFO L480 AbstractCegarLoop]: Abstraction has 6651 states and 21805 transitions. [2018-12-08 14:24:29,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:29,178 INFO L276 IsEmpty]: Start isEmpty. Operand 6651 states and 21805 transitions. [2018-12-08 14:24:29,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:29,183 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:29,183 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:29,183 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:29,183 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:29,184 INFO L82 PathProgramCache]: Analyzing trace with hash -986687851, now seen corresponding path program 1 times [2018-12-08 14:24:29,184 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:29,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:29,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,185 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:29,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:29,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:29,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:29,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 14:24:29,230 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:29,230 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 14:24:29,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 14:24:29,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:29,230 INFO L87 Difference]: Start difference. First operand 6651 states and 21805 transitions. Second operand 7 states. [2018-12-08 14:24:29,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:29,521 INFO L93 Difference]: Finished difference Result 12208 states and 39612 transitions. [2018-12-08 14:24:29,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 14:24:29,522 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-08 14:24:29,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:29,534 INFO L225 Difference]: With dead ends: 12208 [2018-12-08 14:24:29,534 INFO L226 Difference]: Without dead ends: 12208 [2018-12-08 14:24:29,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-08 14:24:29,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12208 states. [2018-12-08 14:24:29,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12208 to 9633. [2018-12-08 14:24:29,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9633 states. [2018-12-08 14:24:29,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9633 states to 9633 states and 31663 transitions. [2018-12-08 14:24:29,639 INFO L78 Accepts]: Start accepts. Automaton has 9633 states and 31663 transitions. Word has length 102 [2018-12-08 14:24:29,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:29,639 INFO L480 AbstractCegarLoop]: Abstraction has 9633 states and 31663 transitions. [2018-12-08 14:24:29,639 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 14:24:29,639 INFO L276 IsEmpty]: Start isEmpty. Operand 9633 states and 31663 transitions. [2018-12-08 14:24:29,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:29,648 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:29,648 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:29,648 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:29,649 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:29,649 INFO L82 PathProgramCache]: Analyzing trace with hash 258076630, now seen corresponding path program 1 times [2018-12-08 14:24:29,649 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:29,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:29,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,650 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:29,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:29,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:29,727 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:29,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:29,727 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:29,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:29,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:29,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:29,728 INFO L87 Difference]: Start difference. First operand 9633 states and 31663 transitions. Second operand 6 states. [2018-12-08 14:24:29,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:29,856 INFO L93 Difference]: Finished difference Result 9833 states and 32038 transitions. [2018-12-08 14:24:29,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 14:24:29,856 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-12-08 14:24:29,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:29,866 INFO L225 Difference]: With dead ends: 9833 [2018-12-08 14:24:29,866 INFO L226 Difference]: Without dead ends: 9833 [2018-12-08 14:24:29,867 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-08 14:24:29,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9833 states. [2018-12-08 14:24:29,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9833 to 9558. [2018-12-08 14:24:29,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9558 states. [2018-12-08 14:24:29,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9558 states to 9558 states and 31283 transitions. [2018-12-08 14:24:29,959 INFO L78 Accepts]: Start accepts. Automaton has 9558 states and 31283 transitions. Word has length 102 [2018-12-08 14:24:29,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:29,959 INFO L480 AbstractCegarLoop]: Abstraction has 9558 states and 31283 transitions. [2018-12-08 14:24:29,960 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:29,960 INFO L276 IsEmpty]: Start isEmpty. Operand 9558 states and 31283 transitions. [2018-12-08 14:24:29,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:29,968 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:29,968 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:29,968 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:29,968 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:29,968 INFO L82 PathProgramCache]: Analyzing trace with hash -656922090, now seen corresponding path program 1 times [2018-12-08 14:24:29,968 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:29,969 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:29,969 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:29,970 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:29,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:30,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:30,029 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:30,029 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 14:24:30,029 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:30,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 14:24:30,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 14:24:30,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:30,030 INFO L87 Difference]: Start difference. First operand 9558 states and 31283 transitions. Second operand 6 states. [2018-12-08 14:24:30,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:30,223 INFO L93 Difference]: Finished difference Result 12102 states and 38933 transitions. [2018-12-08 14:24:30,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 14:24:30,223 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-12-08 14:24:30,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:30,235 INFO L225 Difference]: With dead ends: 12102 [2018-12-08 14:24:30,236 INFO L226 Difference]: Without dead ends: 12102 [2018-12-08 14:24:30,236 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-12-08 14:24:30,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12102 states. [2018-12-08 14:24:30,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12102 to 9808. [2018-12-08 14:24:30,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9808 states. [2018-12-08 14:24:30,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9808 states to 9808 states and 31903 transitions. [2018-12-08 14:24:30,338 INFO L78 Accepts]: Start accepts. Automaton has 9808 states and 31903 transitions. Word has length 102 [2018-12-08 14:24:30,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:30,338 INFO L480 AbstractCegarLoop]: Abstraction has 9808 states and 31903 transitions. [2018-12-08 14:24:30,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 14:24:30,338 INFO L276 IsEmpty]: Start isEmpty. Operand 9808 states and 31903 transitions. [2018-12-08 14:24:30,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:30,347 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:30,347 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:30,347 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:30,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:30,348 INFO L82 PathProgramCache]: Analyzing trace with hash 547613462, now seen corresponding path program 2 times [2018-12-08 14:24:30,348 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:30,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:30,349 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:30,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:30,349 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:30,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:30,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:30,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:30,436 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 14:24:30,436 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:30,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 14:24:30,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 14:24:30,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:30,436 INFO L87 Difference]: Start difference. First operand 9808 states and 31903 transitions. Second operand 7 states. [2018-12-08 14:24:30,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:30,638 INFO L93 Difference]: Finished difference Result 9948 states and 32280 transitions. [2018-12-08 14:24:30,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 14:24:30,638 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-08 14:24:30,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:30,648 INFO L225 Difference]: With dead ends: 9948 [2018-12-08 14:24:30,649 INFO L226 Difference]: Without dead ends: 9948 [2018-12-08 14:24:30,649 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2018-12-08 14:24:30,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9948 states. [2018-12-08 14:24:30,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9948 to 9808. [2018-12-08 14:24:30,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9808 states. [2018-12-08 14:24:30,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9808 states to 9808 states and 31888 transitions. [2018-12-08 14:24:30,740 INFO L78 Accepts]: Start accepts. Automaton has 9808 states and 31888 transitions. Word has length 102 [2018-12-08 14:24:30,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:30,740 INFO L480 AbstractCegarLoop]: Abstraction has 9808 states and 31888 transitions. [2018-12-08 14:24:30,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 14:24:30,740 INFO L276 IsEmpty]: Start isEmpty. Operand 9808 states and 31888 transitions. [2018-12-08 14:24:30,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:30,748 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:30,749 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:30,749 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:30,749 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:30,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1153127017, now seen corresponding path program 1 times [2018-12-08 14:24:30,749 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:30,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:30,750 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 14:24:30,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:30,750 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:30,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:30,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:30,807 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:30,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:30,808 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:30,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:30,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:30,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:30,808 INFO L87 Difference]: Start difference. First operand 9808 states and 31888 transitions. Second operand 5 states. [2018-12-08 14:24:30,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:30,950 INFO L93 Difference]: Finished difference Result 11088 states and 36048 transitions. [2018-12-08 14:24:30,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 14:24:30,950 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-12-08 14:24:30,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:30,961 INFO L225 Difference]: With dead ends: 11088 [2018-12-08 14:24:30,961 INFO L226 Difference]: Without dead ends: 11088 [2018-12-08 14:24:30,961 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:30,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11088 states. [2018-12-08 14:24:31,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11088 to 8640. [2018-12-08 14:24:31,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8640 states. [2018-12-08 14:24:31,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8640 states to 8640 states and 28199 transitions. [2018-12-08 14:24:31,050 INFO L78 Accepts]: Start accepts. Automaton has 8640 states and 28199 transitions. Word has length 102 [2018-12-08 14:24:31,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:31,051 INFO L480 AbstractCegarLoop]: Abstraction has 8640 states and 28199 transitions. [2018-12-08 14:24:31,051 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:31,051 INFO L276 IsEmpty]: Start isEmpty. Operand 8640 states and 28199 transitions. [2018-12-08 14:24:31,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:31,058 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:31,058 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:31,058 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:31,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:31,058 INFO L82 PathProgramCache]: Analyzing trace with hash 91637464, now seen corresponding path program 1 times [2018-12-08 14:24:31,058 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:31,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:31,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,059 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:31,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:31,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:31,126 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:31,126 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 14:24:31,126 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:31,127 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 14:24:31,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 14:24:31,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:31,127 INFO L87 Difference]: Start difference. First operand 8640 states and 28199 transitions. Second operand 7 states. [2018-12-08 14:24:31,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:31,316 INFO L93 Difference]: Finished difference Result 15906 states and 52526 transitions. [2018-12-08 14:24:31,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 14:24:31,316 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-08 14:24:31,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:31,325 INFO L225 Difference]: With dead ends: 15906 [2018-12-08 14:24:31,325 INFO L226 Difference]: Without dead ends: 8010 [2018-12-08 14:24:31,325 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-12-08 14:24:31,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8010 states. [2018-12-08 14:24:31,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8010 to 7980. [2018-12-08 14:24:31,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7980 states. [2018-12-08 14:24:31,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7980 states to 7980 states and 26263 transitions. [2018-12-08 14:24:31,405 INFO L78 Accepts]: Start accepts. Automaton has 7980 states and 26263 transitions. Word has length 102 [2018-12-08 14:24:31,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:31,405 INFO L480 AbstractCegarLoop]: Abstraction has 7980 states and 26263 transitions. [2018-12-08 14:24:31,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 14:24:31,405 INFO L276 IsEmpty]: Start isEmpty. Operand 7980 states and 26263 transitions. [2018-12-08 14:24:31,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:31,413 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:31,413 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:31,414 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:31,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:31,414 INFO L82 PathProgramCache]: Analyzing trace with hash -1179786124, now seen corresponding path program 2 times [2018-12-08 14:24:31,414 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:31,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:31,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,415 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:31,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:31,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:31,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:31,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 14:24:31,513 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:31,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 14:24:31,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 14:24:31,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-08 14:24:31,514 INFO L87 Difference]: Start difference. First operand 7980 states and 26263 transitions. Second operand 10 states. [2018-12-08 14:24:31,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:31,760 INFO L93 Difference]: Finished difference Result 14722 states and 49202 transitions. [2018-12-08 14:24:31,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 14:24:31,760 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 102 [2018-12-08 14:24:31,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:31,768 INFO L225 Difference]: With dead ends: 14722 [2018-12-08 14:24:31,768 INFO L226 Difference]: Without dead ends: 6821 [2018-12-08 14:24:31,769 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=169, Unknown=0, NotChecked=0, Total=240 [2018-12-08 14:24:31,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6821 states. [2018-12-08 14:24:31,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6821 to 6821. [2018-12-08 14:24:31,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6821 states. [2018-12-08 14:24:31,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6821 states to 6821 states and 23131 transitions. [2018-12-08 14:24:31,837 INFO L78 Accepts]: Start accepts. Automaton has 6821 states and 23131 transitions. Word has length 102 [2018-12-08 14:24:31,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:31,837 INFO L480 AbstractCegarLoop]: Abstraction has 6821 states and 23131 transitions. [2018-12-08 14:24:31,837 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 14:24:31,837 INFO L276 IsEmpty]: Start isEmpty. Operand 6821 states and 23131 transitions. [2018-12-08 14:24:31,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:31,843 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:31,843 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:31,843 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:31,844 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:31,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1181090854, now seen corresponding path program 1 times [2018-12-08 14:24:31,844 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:31,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,845 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 14:24:31,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:31,845 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:31,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:31,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:31,924 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:31,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 14:24:31,924 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:31,924 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 14:24:31,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 14:24:31,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-08 14:24:31,924 INFO L87 Difference]: Start difference. First operand 6821 states and 23131 transitions. Second operand 7 states. [2018-12-08 14:24:32,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:32,131 INFO L93 Difference]: Finished difference Result 8957 states and 29585 transitions. [2018-12-08 14:24:32,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 14:24:32,132 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-08 14:24:32,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:32,141 INFO L225 Difference]: With dead ends: 8957 [2018-12-08 14:24:32,141 INFO L226 Difference]: Without dead ends: 8821 [2018-12-08 14:24:32,141 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-12-08 14:24:32,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8821 states. [2018-12-08 14:24:32,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8821 to 6805. [2018-12-08 14:24:32,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6805 states. [2018-12-08 14:24:32,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6805 states to 6805 states and 23039 transitions. [2018-12-08 14:24:32,212 INFO L78 Accepts]: Start accepts. Automaton has 6805 states and 23039 transitions. Word has length 102 [2018-12-08 14:24:32,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:32,213 INFO L480 AbstractCegarLoop]: Abstraction has 6805 states and 23039 transitions. [2018-12-08 14:24:32,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 14:24:32,213 INFO L276 IsEmpty]: Start isEmpty. Operand 6805 states and 23039 transitions. [2018-12-08 14:24:32,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:32,219 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:32,219 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:32,219 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:32,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:32,219 INFO L82 PathProgramCache]: Analyzing trace with hash 1178216155, now seen corresponding path program 1 times [2018-12-08 14:24:32,219 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:32,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:32,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,220 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:32,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:32,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:32,287 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:32,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 14:24:32,287 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:32,287 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 14:24:32,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 14:24:32,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 14:24:32,288 INFO L87 Difference]: Start difference. First operand 6805 states and 23039 transitions. Second operand 5 states. [2018-12-08 14:24:32,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:32,314 INFO L93 Difference]: Finished difference Result 6805 states and 22971 transitions. [2018-12-08 14:24:32,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 14:24:32,314 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-12-08 14:24:32,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:32,322 INFO L225 Difference]: With dead ends: 6805 [2018-12-08 14:24:32,322 INFO L226 Difference]: Without dead ends: 6805 [2018-12-08 14:24:32,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-08 14:24:32,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6805 states. [2018-12-08 14:24:32,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6805 to 6789. [2018-12-08 14:24:32,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6789 states. [2018-12-08 14:24:32,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6789 states to 6789 states and 22927 transitions. [2018-12-08 14:24:32,384 INFO L78 Accepts]: Start accepts. Automaton has 6789 states and 22927 transitions. Word has length 102 [2018-12-08 14:24:32,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:32,384 INFO L480 AbstractCegarLoop]: Abstraction has 6789 states and 22927 transitions. [2018-12-08 14:24:32,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 14:24:32,384 INFO L276 IsEmpty]: Start isEmpty. Operand 6789 states and 22927 transitions. [2018-12-08 14:24:32,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:32,390 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:32,390 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:32,390 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:32,390 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:32,390 INFO L82 PathProgramCache]: Analyzing trace with hash -522524324, now seen corresponding path program 3 times [2018-12-08 14:24:32,390 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:32,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,391 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 14:24:32,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,391 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:32,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 14:24:32,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 14:24:32,485 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 14:24:32,485 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 14:24:32,486 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 14:24:32,486 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 14:24:32,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 14:24:32,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-08 14:24:32,486 INFO L87 Difference]: Start difference. First operand 6789 states and 22927 transitions. Second operand 12 states. [2018-12-08 14:24:32,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 14:24:32,816 INFO L93 Difference]: Finished difference Result 13177 states and 44650 transitions. [2018-12-08 14:24:32,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 14:24:32,816 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 102 [2018-12-08 14:24:32,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 14:24:32,826 INFO L225 Difference]: With dead ends: 13177 [2018-12-08 14:24:32,826 INFO L226 Difference]: Without dead ends: 9273 [2018-12-08 14:24:32,827 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-12-08 14:24:32,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9273 states. [2018-12-08 14:24:32,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9273 to 8665. [2018-12-08 14:24:32,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8665 states. [2018-12-08 14:24:32,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8665 states to 8665 states and 28570 transitions. [2018-12-08 14:24:32,911 INFO L78 Accepts]: Start accepts. Automaton has 8665 states and 28570 transitions. Word has length 102 [2018-12-08 14:24:32,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 14:24:32,911 INFO L480 AbstractCegarLoop]: Abstraction has 8665 states and 28570 transitions. [2018-12-08 14:24:32,911 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 14:24:32,911 INFO L276 IsEmpty]: Start isEmpty. Operand 8665 states and 28570 transitions. [2018-12-08 14:24:32,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 14:24:32,919 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 14:24:32,919 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 14:24:32,919 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 14:24:32,919 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 14:24:32,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1889908770, now seen corresponding path program 4 times [2018-12-08 14:24:32,919 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 14:24:32,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,920 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 14:24:32,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 14:24:32,920 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 14:24:32,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 14:24:32,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 14:24:32,969 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 14:24:33,066 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-08 14:24:33,068 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 02:24:33 BasicIcfg [2018-12-08 14:24:33,068 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 14:24:33,068 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 14:24:33,068 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 14:24:33,068 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 14:24:33,069 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 02:23:41" (3/4) ... [2018-12-08 14:24:33,071 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-08 14:24:33,152 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_5032d823-2b8c-479a-854a-6c9b392774e9/bin-2019/utaipan/witness.graphml [2018-12-08 14:24:33,152 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 14:24:33,152 INFO L168 Benchmark]: Toolchain (without parser) took 51981.55 ms. Allocated memory was 1.0 GB in the beginning and 7.6 GB in the end (delta: 6.6 GB). Free memory was 951.7 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,153 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 14:24:33,153 INFO L168 Benchmark]: CACSL2BoogieTranslator took 367.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 114.8 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -141.1 MB). Peak memory consumption was 32.5 MB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,154 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,154 INFO L168 Benchmark]: Boogie Preprocessor took 21.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 14:24:33,154 INFO L168 Benchmark]: RCFGBuilder took 383.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,154 INFO L168 Benchmark]: TraceAbstraction took 51084.52 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,154 INFO L168 Benchmark]: Witness Printer took 83.90 ms. Allocated memory is still 7.6 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 11.5 GB. [2018-12-08 14:24:33,155 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 367.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 114.8 MB). Free memory was 951.7 MB in the beginning and 1.1 GB in the end (delta: -141.1 MB). Peak memory consumption was 32.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 383.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 51084.52 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 83.90 ms. Allocated memory is still 7.6 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0] [L676] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L678] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L681] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L682] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L683] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L684] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L685] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L686] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L691] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L692] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L693] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L694] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L695] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L696] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L698] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t2530; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t2530, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t2531; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t2531, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L782] -1 pthread_t t2532; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L783] FCALL, FORK -1 pthread_create(&t2532, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$w_buff1 = y$w_buff0 [L742] 0 y$w_buff0 = 2 [L743] 0 y$w_buff1_used = y$w_buff0_used [L744] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L747] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L748] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L749] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L750] 0 y$r_buff0_thd3 = (_Bool)1 [L753] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L704] 1 z = 2 [L709] 1 __unbuffered_p0_EAX = x [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L721] 2 x = 1 [L724] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=2] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=2] [L727] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L728] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L729] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L756] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L730] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L731] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L734] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L758] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L759] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L760] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L760] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L763] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L790] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L791] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L792] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L792] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L793] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L793] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L796] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L797] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L798] -1 y$flush_delayed = weak$$choice2 [L799] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L801] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L801] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L802] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L802] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L803] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L803] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L804] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L805] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L806] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L806] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L807] -1 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] -1 y = y$flush_delayed ? y$mem_tmp : y [L809] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 198 locations, 3 error locations. UNSAFE Result, 51.0s OverallTime, 28 OverallIterations, 1 TraceHistogramMax, 14.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5911 SDtfs, 6070 SDslu, 13463 SDs, 0 SdLazy, 4176 SolverSat, 255 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 264 GetRequests, 79 SyntacticMatches, 20 SemanticMatches, 165 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=186422occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 20.0s AutomataMinimizationTime, 27 MinimizatonAttempts, 270137 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 2492 NumberOfCodeBlocks, 2492 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 2363 ConstructedInterpolants, 0 QuantifiedInterpolants, 503315 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...