./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c -s /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 440325a953e10d2173456ab8f8c8fc1313a6b958 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 12:08:55,701 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 12:08:55,702 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 12:08:55,708 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 12:08:55,708 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 12:08:55,709 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 12:08:55,709 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 12:08:55,710 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 12:08:55,711 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 12:08:55,711 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 12:08:55,712 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 12:08:55,712 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 12:08:55,712 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 12:08:55,713 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 12:08:55,713 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 12:08:55,714 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 12:08:55,714 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 12:08:55,715 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 12:08:55,716 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 12:08:55,716 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 12:08:55,717 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 12:08:55,717 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 12:08:55,718 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 12:08:55,719 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 12:08:55,719 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 12:08:55,719 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 12:08:55,720 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 12:08:55,720 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 12:08:55,720 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 12:08:55,721 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 12:08:55,721 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 12:08:55,721 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 12:08:55,721 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 12:08:55,721 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 12:08:55,722 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 12:08:55,722 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 12:08:55,722 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-09 12:08:55,730 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 12:08:55,730 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 12:08:55,730 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 12:08:55,730 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 12:08:55,731 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 12:08:55,731 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 12:08:55,731 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 12:08:55,732 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 12:08:55,732 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 12:08:55,733 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 12:08:55,733 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 12:08:55,733 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440325a953e10d2173456ab8f8c8fc1313a6b958 [2018-12-09 12:08:55,751 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 12:08:55,757 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 12:08:55,759 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 12:08:55,760 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 12:08:55,760 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 12:08:55,761 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-09 12:08:55,800 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/data/9d1231f04/50ec539c432f480f8266bf5a0c9f3a0d/FLAG13e39614a [2018-12-09 12:08:56,195 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 12:08:56,195 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-09 12:08:56,199 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/data/9d1231f04/50ec539c432f480f8266bf5a0c9f3a0d/FLAG13e39614a [2018-12-09 12:08:56,209 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/data/9d1231f04/50ec539c432f480f8266bf5a0c9f3a0d [2018-12-09 12:08:56,212 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 12:08:56,212 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 12:08:56,213 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 12:08:56,213 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 12:08:56,215 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 12:08:56,216 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,217 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c7a2c36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56, skipping insertion in model container [2018-12-09 12:08:56,218 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,222 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 12:08:56,232 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 12:08:56,343 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 12:08:56,355 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 12:08:56,367 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 12:08:56,380 INFO L195 MainTranslator]: Completed translation [2018-12-09 12:08:56,380 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56 WrapperNode [2018-12-09 12:08:56,380 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 12:08:56,380 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 12:08:56,380 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 12:08:56,381 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 12:08:56,385 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,391 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,395 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 12:08:56,395 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 12:08:56,395 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 12:08:56,395 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 12:08:56,432 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,432 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,435 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,435 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,441 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,445 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,446 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... [2018-12-09 12:08:56,448 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 12:08:56,448 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 12:08:56,448 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 12:08:56,448 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 12:08:56,449 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers4 [2018-12-09 12:08:56,481 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers4 [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 12:08:56,481 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 12:08:56,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 12:08:56,481 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers3 [2018-12-09 12:08:56,482 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers3 [2018-12-09 12:08:56,482 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers2 [2018-12-09 12:08:56,482 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers2 [2018-12-09 12:08:56,482 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 12:08:56,482 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 12:08:56,482 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 12:08:56,482 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers [2018-12-09 12:08:56,482 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers [2018-12-09 12:08:56,482 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 12:08:56,686 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 12:08:56,686 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-12-09 12:08:56,687 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:08:56 BoogieIcfgContainer [2018-12-09 12:08:56,687 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 12:08:56,687 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 12:08:56,687 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 12:08:56,689 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 12:08:56,689 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 12:08:56" (1/3) ... [2018-12-09 12:08:56,690 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f262b87 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 12:08:56, skipping insertion in model container [2018-12-09 12:08:56,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 12:08:56" (2/3) ... [2018-12-09 12:08:56,690 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f262b87 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 12:08:56, skipping insertion in model container [2018-12-09 12:08:56,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:08:56" (3/3) ... [2018-12-09 12:08:56,691 INFO L112 eAbstractionObserver]: Analyzing ICFG getNumbers4_false-valid-deref.c [2018-12-09 12:08:56,697 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 12:08:56,701 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-12-09 12:08:56,710 INFO L257 AbstractCegarLoop]: Starting to check reachability of 17 error locations. [2018-12-09 12:08:56,724 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 12:08:56,724 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 12:08:56,724 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 12:08:56,724 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 12:08:56,724 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 12:08:56,724 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 12:08:56,724 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 12:08:56,724 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 12:08:56,733 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states. [2018-12-09 12:08:56,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 12:08:56,738 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:56,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:56,740 INFO L423 AbstractCegarLoop]: === Iteration 1 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:56,743 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:56,744 INFO L82 PathProgramCache]: Analyzing trace with hash 1830459948, now seen corresponding path program 1 times [2018-12-09 12:08:56,745 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:56,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:56,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:56,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:56,772 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:56,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:56,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:56,866 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:08:56,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 12:08:56,866 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:08:56,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 12:08:56,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 12:08:56,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 12:08:56,878 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 3 states. [2018-12-09 12:08:56,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:56,930 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-09 12:08:56,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 12:08:56,931 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-09 12:08:56,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:56,937 INFO L225 Difference]: With dead ends: 69 [2018-12-09 12:08:56,937 INFO L226 Difference]: Without dead ends: 66 [2018-12-09 12:08:56,938 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 12:08:56,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-12-09 12:08:56,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-12-09 12:08:56,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-12-09 12:08:56,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-12-09 12:08:56,962 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 12 [2018-12-09 12:08:56,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:56,962 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-12-09 12:08:56,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 12:08:56,962 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-12-09 12:08:56,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 12:08:56,962 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:56,962 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:56,963 INFO L423 AbstractCegarLoop]: === Iteration 2 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:56,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:56,963 INFO L82 PathProgramCache]: Analyzing trace with hash 1830459949, now seen corresponding path program 1 times [2018-12-09 12:08:56,963 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:56,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:56,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:56,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:56,964 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:56,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:57,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:57,059 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:08:57,059 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 12:08:57,059 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:08:57,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 12:08:57,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 12:08:57,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 12:08:57,061 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 4 states. [2018-12-09 12:08:57,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:57,126 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-09 12:08:57,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 12:08:57,127 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-12-09 12:08:57,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:57,128 INFO L225 Difference]: With dead ends: 69 [2018-12-09 12:08:57,128 INFO L226 Difference]: Without dead ends: 69 [2018-12-09 12:08:57,128 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 12:08:57,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-12-09 12:08:57,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2018-12-09 12:08:57,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-12-09 12:08:57,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-12-09 12:08:57,135 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 12 [2018-12-09 12:08:57,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:57,135 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-12-09 12:08:57,135 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 12:08:57,135 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-12-09 12:08:57,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 12:08:57,136 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:57,136 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:57,136 INFO L423 AbstractCegarLoop]: === Iteration 3 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:57,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:57,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1967365176, now seen corresponding path program 1 times [2018-12-09 12:08:57,136 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:57,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:57,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:57,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:57,138 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:57,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:57,228 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:57,229 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:57,229 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:08:57,229 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 16 with the following transitions: [2018-12-09 12:08:57,230 INFO L205 CegarAbsIntRunner]: [0], [1], [99], [107], [108], [110], [112], [118], [120], [122], [124], [125], [126], [128] [2018-12-09 12:08:57,249 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:08:57,249 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:08:57,369 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:08:57,370 INFO L272 AbstractInterpreter]: Visited 14 different actions 30 times. Merged at 4 different actions 16 times. Never widened. Performed 382 root evaluator evaluations with a maximum evaluation depth of 4. Performed 382 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 1 fixpoints after 1 different actions. Largest state had 28 variables. [2018-12-09 12:08:57,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:57,376 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:08:57,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:57,376 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:08:57,382 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:57,382 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:08:57,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:57,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:08:57,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 12:08:57,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,441 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 12:08:57,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,446 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 12:08:57,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 12:08:57,456 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,480 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,486 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,491 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,503 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 12:08:57,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,520 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 12:08:57,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 12:08:57,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-09 12:08:57,624 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,656 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-09 12:08:57,656 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,672 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,688 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 12:08:57,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:57,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 12:08:57,711 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,717 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,725 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,729 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:57,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 12:08:57,740 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 12:08:57,812 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:57,812 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:08:57,885 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:57,901 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:08:57,901 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2018-12-09 12:08:57,901 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:08:57,902 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 12:08:57,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 12:08:57,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:08:57,902 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 10 states. [2018-12-09 12:08:58,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:58,095 INFO L93 Difference]: Finished difference Result 72 states and 76 transitions. [2018-12-09 12:08:58,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:08:58,095 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 15 [2018-12-09 12:08:58,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:58,096 INFO L225 Difference]: With dead ends: 72 [2018-12-09 12:08:58,096 INFO L226 Difference]: Without dead ends: 72 [2018-12-09 12:08:58,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-12-09 12:08:58,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-12-09 12:08:58,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-12-09 12:08:58,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-12-09 12:08:58,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 76 transitions. [2018-12-09 12:08:58,099 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 76 transitions. Word has length 15 [2018-12-09 12:08:58,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:58,099 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 76 transitions. [2018-12-09 12:08:58,099 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 12:08:58,099 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 76 transitions. [2018-12-09 12:08:58,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:08:58,100 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:58,100 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:58,100 INFO L423 AbstractCegarLoop]: === Iteration 4 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:58,100 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:58,100 INFO L82 PathProgramCache]: Analyzing trace with hash 189347113, now seen corresponding path program 1 times [2018-12-09 12:08:58,100 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:58,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:58,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,101 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:58,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:58,134 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-12-09 12:08:58,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:08:58,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 12:08:58,134 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:08:58,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:08:58,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:08:58,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 12:08:58,135 INFO L87 Difference]: Start difference. First operand 72 states and 76 transitions. Second operand 6 states. [2018-12-09 12:08:58,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:58,195 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-12-09 12:08:58,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:08:58,196 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-09 12:08:58,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:58,196 INFO L225 Difference]: With dead ends: 71 [2018-12-09 12:08:58,196 INFO L226 Difference]: Without dead ends: 71 [2018-12-09 12:08:58,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-09 12:08:58,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-09 12:08:58,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-09 12:08:58,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-09 12:08:58,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-12-09 12:08:58,199 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-12-09 12:08:58,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:58,199 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-12-09 12:08:58,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:08:58,199 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-12-09 12:08:58,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 12:08:58,200 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:58,200 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:58,200 INFO L423 AbstractCegarLoop]: === Iteration 5 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:58,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:58,200 INFO L82 PathProgramCache]: Analyzing trace with hash 189347114, now seen corresponding path program 1 times [2018-12-09 12:08:58,200 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:58,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:58,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,201 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:58,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:58,225 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:58,226 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:58,226 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:08:58,226 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 27 with the following transitions: [2018-12-09 12:08:58,226 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [38], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:08:58,227 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:08:58,227 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:08:58,260 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:08:58,260 INFO L272 AbstractInterpreter]: Visited 20 different actions 32 times. Merged at 3 different actions 9 times. Never widened. Performed 353 root evaluator evaluations with a maximum evaluation depth of 4. Performed 353 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-09 12:08:58,262 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:58,262 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:08:58,262 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:58,262 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:08:58,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:58,270 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:08:58,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:58,287 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:08:58,299 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:58,299 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:08:58,331 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:58,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:08:58,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-09 12:08:58,345 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:08:58,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:08:58,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:08:58,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:08:58,346 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 7 states. [2018-12-09 12:08:58,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:58,361 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-09 12:08:58,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:08:58,361 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-12-09 12:08:58,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:58,362 INFO L225 Difference]: With dead ends: 76 [2018-12-09 12:08:58,362 INFO L226 Difference]: Without dead ends: 76 [2018-12-09 12:08:58,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:08:58,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-09 12:08:58,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2018-12-09 12:08:58,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-09 12:08:58,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-09 12:08:58,366 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 26 [2018-12-09 12:08:58,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:58,366 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-09 12:08:58,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:08:58,367 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-09 12:08:58,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 12:08:58,367 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:58,367 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:58,367 INFO L423 AbstractCegarLoop]: === Iteration 6 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:58,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:58,367 INFO L82 PathProgramCache]: Analyzing trace with hash -378498171, now seen corresponding path program 2 times [2018-12-09 12:08:58,367 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:58,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:58,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:58,368 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:58,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:58,414 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:58,414 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:58,414 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:08:58,414 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:08:58,414 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:08:58,414 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:58,414 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:08:58,423 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:08:58,423 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:08:58,441 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:08:58,441 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:08:58,443 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:08:58,447 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 12:08:58,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,450 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 12:08:58,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 12:08:58,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 12:08:58,463 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,475 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,482 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,490 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,500 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 12:08:58,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,513 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 12:08:58,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,550 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 12:08:58,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,594 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-09 12:08:58,594 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,615 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-09 12:08:58,615 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,625 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,641 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 12:08:58,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:58,659 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 12:08:58,659 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,665 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,671 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,674 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:58,683 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 12:08:58,683 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 12:08:58,780 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-09 12:08:58,780 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:08:58,877 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-09 12:08:58,924 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-12-09 12:08:58,957 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-09 12:08:59,018 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-09 12:08:59,033 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:08:59,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 6] imperfect sequences [7] total 17 [2018-12-09 12:08:59,033 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:08:59,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:08:59,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:08:59,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2018-12-09 12:08:59,034 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 7 states. [2018-12-09 12:08:59,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:59,188 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2018-12-09 12:08:59,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:08:59,188 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-12-09 12:08:59,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:59,189 INFO L225 Difference]: With dead ends: 74 [2018-12-09 12:08:59,189 INFO L226 Difference]: Without dead ends: 74 [2018-12-09 12:08:59,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 47 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2018-12-09 12:08:59,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-12-09 12:08:59,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-12-09 12:08:59,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-09 12:08:59,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-09 12:08:59,192 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 29 [2018-12-09 12:08:59,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:59,192 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-09 12:08:59,192 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:08:59,192 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-09 12:08:59,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-12-09 12:08:59,192 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:59,193 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:59,193 INFO L423 AbstractCegarLoop]: === Iteration 7 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:59,193 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:59,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1151458565, now seen corresponding path program 1 times [2018-12-09 12:08:59,193 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:59,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:59,193 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:08:59,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:59,194 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:59,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:59,226 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:59,226 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:59,226 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:08:59,226 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-12-09 12:08:59,226 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [36], [40], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:08:59,227 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:08:59,228 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:08:59,270 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:08:59,270 INFO L272 AbstractInterpreter]: Visited 21 different actions 33 times. Merged at 3 different actions 9 times. Never widened. Performed 360 root evaluator evaluations with a maximum evaluation depth of 4. Performed 360 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 32 variables. [2018-12-09 12:08:59,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:59,272 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:08:59,272 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:59,272 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:08:59,280 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:59,281 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:08:59,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:59,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:08:59,308 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:59,308 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:08:59,347 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:59,362 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:08:59,362 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-09 12:08:59,362 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:08:59,363 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:08:59,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:08:59,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:08:59,363 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 8 states. [2018-12-09 12:08:59,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:08:59,387 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-12-09 12:08:59,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:08:59,387 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30 [2018-12-09 12:08:59,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:08:59,387 INFO L225 Difference]: With dead ends: 79 [2018-12-09 12:08:59,387 INFO L226 Difference]: Without dead ends: 79 [2018-12-09 12:08:59,388 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:08:59,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-09 12:08:59,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 77. [2018-12-09 12:08:59,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-09 12:08:59,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-12-09 12:08:59,390 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 30 [2018-12-09 12:08:59,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:08:59,390 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-12-09 12:08:59,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:08:59,390 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-12-09 12:08:59,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-09 12:08:59,391 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:08:59,391 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:08:59,391 INFO L423 AbstractCegarLoop]: === Iteration 8 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:08:59,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:08:59,391 INFO L82 PathProgramCache]: Analyzing trace with hash -387148320, now seen corresponding path program 2 times [2018-12-09 12:08:59,391 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:08:59,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:59,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:08:59,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:08:59,392 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:08:59,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:08:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:08:59,423 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:59,423 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:08:59,423 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:08:59,423 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:08:59,423 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:08:59,423 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:08:59,432 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:08:59,432 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:08:59,448 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:08:59,449 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:08:59,450 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:08:59,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-09 12:08:59,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,470 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-09 12:08:59,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,531 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-09 12:08:59,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,587 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-09 12:08:59,590 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 12:08:59,591 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,605 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-09 12:08:59,638 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-09 12:08:59,638 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-09 12:08:59,696 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-12-09 12:08:59,739 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 12:08:59,782 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-09 12:08:59,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,842 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-09 12:08:59,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:08:59,865 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-09 12:08:59,867 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 12:08:59,868 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,877 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,886 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:08:59,940 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 12:08:59,996 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 12:09:00,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-09 12:09:00,058 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-09 12:09:00,211 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-09 12:09:00,211 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:00,257 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-09 12:09:00,272 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:09:00,272 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [8] total 10 [2018-12-09 12:09:00,272 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:00,272 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 12:09:00,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 12:09:00,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-09 12:09:00,273 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 3 states. [2018-12-09 12:09:00,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:00,306 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-09 12:09:00,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 12:09:00,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2018-12-09 12:09:00,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:00,306 INFO L225 Difference]: With dead ends: 76 [2018-12-09 12:09:00,306 INFO L226 Difference]: Without dead ends: 76 [2018-12-09 12:09:00,307 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-09 12:09:00,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-09 12:09:00,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-12-09 12:09:00,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-12-09 12:09:00,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2018-12-09 12:09:00,309 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 33 [2018-12-09 12:09:00,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:00,309 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2018-12-09 12:09:00,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 12:09:00,309 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2018-12-09 12:09:00,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-09 12:09:00,309 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:00,310 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:00,310 INFO L423 AbstractCegarLoop]: === Iteration 9 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:00,310 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:00,310 INFO L82 PathProgramCache]: Analyzing trace with hash -387148319, now seen corresponding path program 1 times [2018-12-09 12:09:00,310 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:00,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:00,310 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:00,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:00,310 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:00,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:00,347 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:09:00,347 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:00,347 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:00,348 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-12-09 12:09:00,348 INFO L205 CegarAbsIntRunner]: [0], [1], [27], [35], [36], [41], [99], [105], [107], [108], [112], [116], [117], [118], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:09:00,349 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:09:00,349 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:09:00,384 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:09:00,384 INFO L272 AbstractInterpreter]: Visited 21 different actions 33 times. Merged at 3 different actions 9 times. Never widened. Performed 361 root evaluator evaluations with a maximum evaluation depth of 4. Performed 361 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 32 variables. [2018-12-09 12:09:00,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:00,387 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:09:00,387 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:00,388 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:00,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:00,394 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:00,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:00,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:00,433 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:09:00,433 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:00,477 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:09:00,491 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:00,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-09 12:09:00,491 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:00,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 12:09:00,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 12:09:00,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:00,492 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand 9 states. [2018-12-09 12:09:00,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:00,508 INFO L93 Difference]: Finished difference Result 81 states and 85 transitions. [2018-12-09 12:09:00,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:09:00,509 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-12-09 12:09:00,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:00,510 INFO L225 Difference]: With dead ends: 81 [2018-12-09 12:09:00,510 INFO L226 Difference]: Without dead ends: 81 [2018-12-09 12:09:00,510 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 60 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:00,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-12-09 12:09:00,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 79. [2018-12-09 12:09:00,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-12-09 12:09:00,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 83 transitions. [2018-12-09 12:09:00,512 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 83 transitions. Word has length 33 [2018-12-09 12:09:00,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:00,513 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 83 transitions. [2018-12-09 12:09:00,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 12:09:00,513 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 83 transitions. [2018-12-09 12:09:00,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 12:09:00,513 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:00,513 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:00,514 INFO L423 AbstractCegarLoop]: === Iteration 10 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:00,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:00,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1133876442, now seen corresponding path program 2 times [2018-12-09 12:09:00,514 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:00,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:00,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:00,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:00,515 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:00,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:00,566 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 12:09:00,566 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:00,566 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:00,566 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:00,567 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:00,567 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:00,567 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:00,573 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:00,573 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:00,590 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:09:00,590 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:00,592 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:00,595 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 12:09:00,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,609 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 12:09:00,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,652 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 12:09:00,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,692 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-09 12:09:00,693 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,723 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 33 [2018-12-09 12:09:00,723 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,739 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,761 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 12:09:00,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,781 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 12:09:00,781 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,789 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,800 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,805 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,814 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 12:09:00,816 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 12:09:00,817 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 12:09:00,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:00,820 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 12:09:00,820 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,831 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,836 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,839 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:00,848 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 12:09:00,849 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 12:09:00,904 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-09 12:09:00,904 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:00,985 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-09 12:09:01,010 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:09:01,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [9] total 15 [2018-12-09 12:09:01,011 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:01,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 12:09:01,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 12:09:01,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2018-12-09 12:09:01,012 INFO L87 Difference]: Start difference. First operand 79 states and 83 transitions. Second operand 5 states. [2018-12-09 12:09:01,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:01,093 INFO L93 Difference]: Finished difference Result 78 states and 82 transitions. [2018-12-09 12:09:01,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 12:09:01,093 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-12-09 12:09:01,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:01,094 INFO L225 Difference]: With dead ends: 78 [2018-12-09 12:09:01,094 INFO L226 Difference]: Without dead ends: 78 [2018-12-09 12:09:01,094 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2018-12-09 12:09:01,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-12-09 12:09:01,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-12-09 12:09:01,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-12-09 12:09:01,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2018-12-09 12:09:01,097 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 36 [2018-12-09 12:09:01,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:01,097 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2018-12-09 12:09:01,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 12:09:01,097 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2018-12-09 12:09:01,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-09 12:09:01,098 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:01,098 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:01,098 INFO L423 AbstractCegarLoop]: === Iteration 11 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:01,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:01,099 INFO L82 PathProgramCache]: Analyzing trace with hash -69292150, now seen corresponding path program 1 times [2018-12-09 12:09:01,099 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:01,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:01,099 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:01,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:01,099 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:01,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:01,134 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:01,134 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:01,134 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:01,134 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-12-09 12:09:01,134 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [13], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:09:01,135 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:09:01,135 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:09:01,184 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:09:01,184 INFO L272 AbstractInterpreter]: Visited 30 different actions 76 times. Merged at 14 different actions 38 times. Widened at 2 different actions 2 times. Performed 588 root evaluator evaluations with a maximum evaluation depth of 4. Performed 588 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 6 fixpoints after 6 different actions. Largest state had 35 variables. [2018-12-09 12:09:01,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:01,186 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:09:01,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:01,186 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:01,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:01,194 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:01,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:01,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:01,222 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:01,222 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:01,285 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:01,300 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:01,300 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 13 [2018-12-09 12:09:01,300 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:01,300 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 12:09:01,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 12:09:01,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:01,300 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. Second operand 10 states. [2018-12-09 12:09:01,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:01,321 INFO L93 Difference]: Finished difference Result 83 states and 87 transitions. [2018-12-09 12:09:01,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 12:09:01,321 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-12-09 12:09:01,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:01,322 INFO L225 Difference]: With dead ends: 83 [2018-12-09 12:09:01,322 INFO L226 Difference]: Without dead ends: 83 [2018-12-09 12:09:01,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:01,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-12-09 12:09:01,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 81. [2018-12-09 12:09:01,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-12-09 12:09:01,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 85 transitions. [2018-12-09 12:09:01,324 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 85 transitions. Word has length 45 [2018-12-09 12:09:01,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:01,324 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 85 transitions. [2018-12-09 12:09:01,325 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 12:09:01,325 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 85 transitions. [2018-12-09 12:09:01,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 12:09:01,325 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:01,325 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:01,326 INFO L423 AbstractCegarLoop]: === Iteration 12 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:01,326 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:01,326 INFO L82 PathProgramCache]: Analyzing trace with hash -912931505, now seen corresponding path program 2 times [2018-12-09 12:09:01,326 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:01,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:01,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:01,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:01,327 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:01,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:01,384 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:01,384 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:01,384 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:01,384 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:01,385 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:01,385 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:01,385 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:01,390 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:01,390 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:01,406 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:09:01,406 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:01,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:01,410 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-09 12:09:01,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,429 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-09 12:09:01,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,479 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-09 12:09:01,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,502 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-09 12:09:01,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 12:09:01,504 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,514 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,523 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-09 12:09:01,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,606 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-09 12:09:01,607 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 12:09:01,608 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,618 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,649 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-09 12:09:01,651 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-09 12:09:01,652 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:01,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:01,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-09 12:09:01,696 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-12-09 12:09:01,748 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 12:09:01,790 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-09 12:09:01,840 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 12:09:01,897 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 12:09:01,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-09 12:09:01,954 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-09 12:09:02,318 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 57 [2018-12-09 12:09:02,318 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:02,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:02,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:02,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:02,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:02,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:02,365 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-12-09 12:09:02,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 12:09:02,448 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-12-09 12:09:02,448 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:02,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-1 vars, End of recursive call: 14 dim-0 vars, and 4 xjuncts. [2018-12-09 12:09:02,511 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 14 variables, input treesize:162, output treesize:225 [2018-12-09 12:09:02,719 WARN L180 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 79 [2018-12-09 12:09:02,755 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-09 12:09:02,755 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:02,862 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-09 12:09:02,877 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:09:02,877 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [10] total 18 [2018-12-09 12:09:02,878 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:02,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:09:02,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:09:02,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2018-12-09 12:09:02,878 INFO L87 Difference]: Start difference. First operand 81 states and 85 transitions. Second operand 6 states. [2018-12-09 12:09:03,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:03,170 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2018-12-09 12:09:03,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:09:03,171 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-12-09 12:09:03,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:03,171 INFO L225 Difference]: With dead ends: 80 [2018-12-09 12:09:03,171 INFO L226 Difference]: Without dead ends: 80 [2018-12-09 12:09:03,171 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 85 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2018-12-09 12:09:03,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-12-09 12:09:03,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-12-09 12:09:03,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-09 12:09:03,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2018-12-09 12:09:03,174 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 48 [2018-12-09 12:09:03,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:03,174 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2018-12-09 12:09:03,174 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:09:03,174 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2018-12-09 12:09:03,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 12:09:03,175 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:03,175 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:03,175 INFO L423 AbstractCegarLoop]: === Iteration 13 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:03,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:03,176 INFO L82 PathProgramCache]: Analyzing trace with hash -912931504, now seen corresponding path program 1 times [2018-12-09 12:09:03,176 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:03,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:03,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:03,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:03,176 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:03,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:03,228 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:03,228 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:03,228 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:03,229 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 49 with the following transitions: [2018-12-09 12:09:03,229 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [14], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:09:03,230 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:09:03,230 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:09:03,260 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:09:03,261 INFO L272 AbstractInterpreter]: Visited 30 different actions 60 times. Merged at 8 different actions 24 times. Never widened. Performed 501 root evaluator evaluations with a maximum evaluation depth of 4. Performed 501 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 4 fixpoints after 4 different actions. Largest state had 35 variables. [2018-12-09 12:09:03,263 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:03,263 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:09:03,263 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:03,263 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:03,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:03,272 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:03,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:03,295 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:03,302 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:03,302 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:03,358 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:03,373 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:03,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 13 [2018-12-09 12:09:03,373 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:03,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:09:03,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:09:03,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:03,374 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand 11 states. [2018-12-09 12:09:03,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:03,397 INFO L93 Difference]: Finished difference Result 85 states and 89 transitions. [2018-12-09 12:09:03,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 12:09:03,397 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-12-09 12:09:03,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:03,397 INFO L225 Difference]: With dead ends: 85 [2018-12-09 12:09:03,398 INFO L226 Difference]: Without dead ends: 85 [2018-12-09 12:09:03,398 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 88 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:03,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-12-09 12:09:03,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 83. [2018-12-09 12:09:03,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-12-09 12:09:03,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2018-12-09 12:09:03,400 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 48 [2018-12-09 12:09:03,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:03,400 INFO L480 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2018-12-09 12:09:03,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:09:03,400 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2018-12-09 12:09:03,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-09 12:09:03,401 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:03,401 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:03,401 INFO L423 AbstractCegarLoop]: === Iteration 14 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:03,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:03,402 INFO L82 PathProgramCache]: Analyzing trace with hash 375659883, now seen corresponding path program 2 times [2018-12-09 12:09:03,402 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:03,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:03,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:03,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:03,403 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:03,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:03,443 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:03,443 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:03,443 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:03,443 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:03,443 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:03,443 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:03,443 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:03,452 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:03,452 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:03,475 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:09:03,475 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:03,478 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:03,481 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 12:09:03,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,484 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 12:09:03,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 12:09:03,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,491 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,496 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 12:09:03,496 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,528 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,534 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,539 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,550 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 12:09:03,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,562 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 12:09:03,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,616 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 12:09:03,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-09 12:09:03,657 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,675 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-09 12:09:03,676 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,686 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,697 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 12:09:03,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,713 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 12:09:03,713 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,717 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,721 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,724 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:03,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 12:09:03,731 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 12:09:03,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 12:09:03,798 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 54 [2018-12-09 12:09:03,798 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 12:09:03,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-12-09 12:09:03,828 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:45, output treesize:96 [2018-12-09 12:09:07,779 WARN L180 SmtUtils]: Spent 3.93 s on a formula simplification. DAG size of input: 59 DAG size of output: 55 [2018-12-09 12:09:07,838 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-09 12:09:07,839 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:12,005 WARN L180 SmtUtils]: Spent 947.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-12-09 12:09:12,008 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-09 12:09:13,052 WARN L180 SmtUtils]: Spent 1.01 s on a formula simplification that was a NOOP. DAG size: 49 [2018-12-09 12:09:13,054 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-12-09 12:09:16,204 WARN L180 SmtUtils]: Spent 2.51 s on a formula simplification that was a NOOP. DAG size: 50 [2018-12-09 12:09:16,207 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-12-09 12:09:16,269 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-09 12:09:16,292 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:09:16,292 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 7] imperfect sequences [11] total 22 [2018-12-09 12:09:16,292 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:16,293 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:09:16,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:09:16,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=372, Unknown=1, NotChecked=0, Total=462 [2018-12-09 12:09:16,293 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 7 states. [2018-12-09 12:09:16,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:16,407 INFO L93 Difference]: Finished difference Result 83 states and 87 transitions. [2018-12-09 12:09:16,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:09:16,407 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2018-12-09 12:09:16,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:16,407 INFO L225 Difference]: With dead ends: 83 [2018-12-09 12:09:16,407 INFO L226 Difference]: Without dead ends: 83 [2018-12-09 12:09:16,408 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 91 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=95, Invalid=410, Unknown=1, NotChecked=0, Total=506 [2018-12-09 12:09:16,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-12-09 12:09:16,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-12-09 12:09:16,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-12-09 12:09:16,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2018-12-09 12:09:16,409 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 51 [2018-12-09 12:09:16,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:16,409 INFO L480 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2018-12-09 12:09:16,409 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:09:16,409 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2018-12-09 12:09:16,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 12:09:16,410 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:16,410 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:16,410 INFO L423 AbstractCegarLoop]: === Iteration 15 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:16,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:16,410 INFO L82 PathProgramCache]: Analyzing trace with hash -1239445561, now seen corresponding path program 1 times [2018-12-09 12:09:16,410 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:16,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,410 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:16,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,411 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:16,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:16,430 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-09 12:09:16,430 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 12:09:16,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 12:09:16,430 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:16,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 12:09:16,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 12:09:16,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 12:09:16,431 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 3 states. [2018-12-09 12:09:16,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:16,444 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-12-09 12:09:16,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 12:09:16,444 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2018-12-09 12:09:16,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:16,444 INFO L225 Difference]: With dead ends: 82 [2018-12-09 12:09:16,444 INFO L226 Difference]: Without dead ends: 82 [2018-12-09 12:09:16,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 12:09:16,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-12-09 12:09:16,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2018-12-09 12:09:16,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-12-09 12:09:16,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2018-12-09 12:09:16,446 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 86 transitions. Word has length 52 [2018-12-09 12:09:16,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:16,447 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 86 transitions. [2018-12-09 12:09:16,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 12:09:16,447 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 86 transitions. [2018-12-09 12:09:16,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 12:09:16,447 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:16,447 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:16,447 INFO L423 AbstractCegarLoop]: === Iteration 16 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:16,447 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:16,448 INFO L82 PathProgramCache]: Analyzing trace with hash -1239445560, now seen corresponding path program 1 times [2018-12-09 12:09:16,448 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:16,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,448 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:16,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,448 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:16,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:16,494 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:16,494 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:16,494 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:16,494 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 53 with the following transitions: [2018-12-09 12:09:16,494 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [11], [12], [17], [27], [33], [35], [36], [39], [42], [44], [48], [49], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [124], [125], [126], [128] [2018-12-09 12:09:16,495 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:09:16,495 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:09:16,550 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:09:16,550 INFO L272 AbstractInterpreter]: Visited 31 different actions 77 times. Merged at 14 different actions 38 times. Widened at 2 different actions 2 times. Performed 597 root evaluator evaluations with a maximum evaluation depth of 4. Performed 597 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 6 fixpoints after 6 different actions. Largest state had 35 variables. [2018-12-09 12:09:16,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:16,551 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:09:16,551 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:16,551 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:16,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:16,561 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:16,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:16,583 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:16,598 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:16,598 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:16,662 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:16,677 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:16,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-09 12:09:16,677 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:16,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 12:09:16,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 12:09:16,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:16,678 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. Second operand 12 states. [2018-12-09 12:09:16,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:16,709 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-09 12:09:16,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:09:16,709 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-12-09 12:09:16,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:16,710 INFO L225 Difference]: With dead ends: 87 [2018-12-09 12:09:16,710 INFO L226 Difference]: Without dead ends: 87 [2018-12-09 12:09:16,710 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 95 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:16,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-09 12:09:16,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 85. [2018-12-09 12:09:16,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-09 12:09:16,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-12-09 12:09:16,712 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 52 [2018-12-09 12:09:16,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:16,712 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-12-09 12:09:16,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 12:09:16,712 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-12-09 12:09:16,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-12-09 12:09:16,712 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:16,712 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:16,712 INFO L423 AbstractCegarLoop]: === Iteration 17 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:16,712 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:16,713 INFO L82 PathProgramCache]: Analyzing trace with hash -981573021, now seen corresponding path program 2 times [2018-12-09 12:09:16,713 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:16,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:16,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,713 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:16,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:16,772 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 12:09:16,772 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:16,772 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:16,772 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:16,772 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:16,772 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:16,772 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:16,779 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:16,779 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:16,797 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-09 12:09:16,797 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:16,798 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:16,801 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 12:09:16,801 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 12:09:16,813 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 12:09:16,813 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-12-09 12:09:16,832 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-12-09 12:09:16,832 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:16,875 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-12-09 12:09:16,890 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-09 12:09:16,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [12] total 16 [2018-12-09 12:09:16,890 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 12:09:16,890 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 12:09:16,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 12:09:16,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2018-12-09 12:09:16,890 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 4 states. [2018-12-09 12:09:16,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:16,907 INFO L93 Difference]: Finished difference Result 84 states and 88 transitions. [2018-12-09 12:09:16,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 12:09:16,907 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2018-12-09 12:09:16,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:16,907 INFO L225 Difference]: With dead ends: 84 [2018-12-09 12:09:16,907 INFO L226 Difference]: Without dead ends: 84 [2018-12-09 12:09:16,908 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2018-12-09 12:09:16,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-12-09 12:09:16,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-12-09 12:09:16,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-12-09 12:09:16,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 88 transitions. [2018-12-09 12:09:16,909 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 88 transitions. Word has length 55 [2018-12-09 12:09:16,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:16,910 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 88 transitions. [2018-12-09 12:09:16,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 12:09:16,910 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 88 transitions. [2018-12-09 12:09:16,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-09 12:09:16,910 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:16,910 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:16,910 INFO L423 AbstractCegarLoop]: === Iteration 18 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:16,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:16,911 INFO L82 PathProgramCache]: Analyzing trace with hash -965711231, now seen corresponding path program 1 times [2018-12-09 12:09:16,911 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:16,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,911 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:16,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:16,911 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:16,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:16,969 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:09:16,969 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:16,969 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:16,969 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 65 with the following transitions: [2018-12-09 12:09:16,969 INFO L205 CegarAbsIntRunner]: [0], [1], [3], [9], [11], [12], [15], [18], [20], [24], [25], [27], [33], [35], [36], [39], [42], [44], [48], [49], [51], [59], [61], [99], [105], [107], [108], [112], [116], [117], [118], [119], [120], [121], [122], [123], [124], [125], [126], [128] [2018-12-09 12:09:16,970 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 12:09:16,970 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 12:09:17,019 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 12:09:17,019 INFO L272 AbstractInterpreter]: Visited 40 different actions 104 times. Merged at 19 different actions 53 times. Widened at 2 different actions 2 times. Performed 728 root evaluator evaluations with a maximum evaluation depth of 4. Performed 728 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 8 fixpoints after 8 different actions. Largest state had 37 variables. [2018-12-09 12:09:17,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,020 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 12:09:17,020 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,021 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:17,028 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:17,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,050 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,056 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:09:17,056 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,111 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 12:09:17,127 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,127 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 13 [2018-12-09 12:09:17,127 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 12:09:17,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 12:09:17,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:17,128 INFO L87 Difference]: Start difference. First operand 84 states and 88 transitions. Second operand 13 states. [2018-12-09 12:09:17,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,165 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-09 12:09:17,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 12:09:17,166 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 64 [2018-12-09 12:09:17,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,166 INFO L225 Difference]: With dead ends: 87 [2018-12-09 12:09:17,166 INFO L226 Difference]: Without dead ends: 87 [2018-12-09 12:09:17,166 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 118 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:17,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-09 12:09:17,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-12-09 12:09:17,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-09 12:09:17,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2018-12-09 12:09:17,168 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 64 [2018-12-09 12:09:17,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,168 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2018-12-09 12:09:17,168 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 12:09:17,168 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2018-12-09 12:09:17,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 12:09:17,168 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,169 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,169 INFO L423 AbstractCegarLoop]: === Iteration 19 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,169 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,169 INFO L82 PathProgramCache]: Analyzing trace with hash -1653003108, now seen corresponding path program 2 times [2018-12-09 12:09:17,169 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:17,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,169 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,190 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,190 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,190 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,191 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,191 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,191 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,191 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,198 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:17,198 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:17,221 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-09 12:09:17,221 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:17,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,233 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,233 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,264 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,287 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2018-12-09 12:09:17,287 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,287 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 12:09:17,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 12:09:17,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 12:09:17,288 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand 5 states. [2018-12-09 12:09:17,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,302 INFO L93 Difference]: Finished difference Result 96 states and 100 transitions. [2018-12-09 12:09:17,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 12:09:17,302 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2018-12-09 12:09:17,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,303 INFO L225 Difference]: With dead ends: 96 [2018-12-09 12:09:17,303 INFO L226 Difference]: Without dead ends: 96 [2018-12-09 12:09:17,303 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 12:09:17,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-09 12:09:17,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 92. [2018-12-09 12:09:17,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-09 12:09:17,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 96 transitions. [2018-12-09 12:09:17,306 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 96 transitions. Word has length 67 [2018-12-09 12:09:17,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,306 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 96 transitions. [2018-12-09 12:09:17,306 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 12:09:17,306 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 96 transitions. [2018-12-09 12:09:17,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 12:09:17,307 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,307 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,307 INFO L423 AbstractCegarLoop]: === Iteration 20 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,307 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,307 INFO L82 PathProgramCache]: Analyzing trace with hash 2101599232, now seen corresponding path program 3 times [2018-12-09 12:09:17,307 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,308 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:17,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,308 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,335 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,336 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,336 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,336 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,336 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,336 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,336 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,344 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 12:09:17,344 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 12:09:17,363 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 12:09:17,363 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:17,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,370 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,370 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,405 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,420 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-09 12:09:17,420 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,420 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 12:09:17,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 12:09:17,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 12:09:17,421 INFO L87 Difference]: Start difference. First operand 92 states and 96 transitions. Second operand 6 states. [2018-12-09 12:09:17,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,434 INFO L93 Difference]: Finished difference Result 101 states and 105 transitions. [2018-12-09 12:09:17,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 12:09:17,434 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-09 12:09:17,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,435 INFO L225 Difference]: With dead ends: 101 [2018-12-09 12:09:17,435 INFO L226 Difference]: Without dead ends: 101 [2018-12-09 12:09:17,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 141 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 12:09:17,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-12-09 12:09:17,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 97. [2018-12-09 12:09:17,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-12-09 12:09:17,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-12-09 12:09:17,438 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 72 [2018-12-09 12:09:17,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,438 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-12-09 12:09:17,438 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 12:09:17,438 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-12-09 12:09:17,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-09 12:09:17,439 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,439 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,439 INFO L423 AbstractCegarLoop]: === Iteration 21 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,439 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,439 INFO L82 PathProgramCache]: Analyzing trace with hash 913517340, now seen corresponding path program 4 times [2018-12-09 12:09:17,439 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,439 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:17,440 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,440 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,473 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,473 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,473 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,473 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,473 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,473 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,473 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:17,482 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:17,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,508 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,515 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,540 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,554 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-09 12:09:17,554 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,555 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:09:17,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:09:17,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:17,555 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 7 states. [2018-12-09 12:09:17,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,570 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-12-09 12:09:17,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:09:17,571 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 77 [2018-12-09 12:09:17,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,571 INFO L225 Difference]: With dead ends: 106 [2018-12-09 12:09:17,571 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 12:09:17,572 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:17,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 12:09:17,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 102. [2018-12-09 12:09:17,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 12:09:17,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-12-09 12:09:17,574 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 77 [2018-12-09 12:09:17,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,574 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-12-09 12:09:17,574 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:09:17,574 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-12-09 12:09:17,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 12:09:17,575 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,575 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,575 INFO L423 AbstractCegarLoop]: === Iteration 22 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,576 INFO L82 PathProgramCache]: Analyzing trace with hash -515576448, now seen corresponding path program 5 times [2018-12-09 12:09:17,576 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,576 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:17,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,577 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,613 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 12:09:17,613 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,613 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,613 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,613 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,613 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,614 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,620 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:17,621 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:17,646 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-09 12:09:17,646 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:17,647 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,662 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-09 12:09:17,662 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,689 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-09 12:09:17,703 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4] total 11 [2018-12-09 12:09:17,703 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 12:09:17,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 12:09:17,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:17,704 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 9 states. [2018-12-09 12:09:17,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,733 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2018-12-09 12:09:17,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 12:09:17,734 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 82 [2018-12-09 12:09:17,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,734 INFO L225 Difference]: With dead ends: 120 [2018-12-09 12:09:17,734 INFO L226 Difference]: Without dead ends: 120 [2018-12-09 12:09:17,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 161 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:17,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-09 12:09:17,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 112. [2018-12-09 12:09:17,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-09 12:09:17,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-12-09 12:09:17,736 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 82 [2018-12-09 12:09:17,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,737 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-12-09 12:09:17,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 12:09:17,737 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-12-09 12:09:17,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-09 12:09:17,737 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,737 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,737 INFO L423 AbstractCegarLoop]: === Iteration 23 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1249559972, now seen corresponding path program 6 times [2018-12-09 12:09:17,738 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,738 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:17,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,738 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,773 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:17,773 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,773 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,773 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,773 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,773 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,773 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,780 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 12:09:17,780 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 12:09:17,806 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 12:09:17,806 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:17,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:17,818 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:17,818 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:17,858 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:17,882 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:17,882 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-09 12:09:17,882 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:17,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 12:09:17,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 12:09:17,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:17,883 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 9 states. [2018-12-09 12:09:17,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:17,906 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-12-09 12:09:17,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:09:17,906 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2018-12-09 12:09:17,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:17,907 INFO L225 Difference]: With dead ends: 121 [2018-12-09 12:09:17,907 INFO L226 Difference]: Without dead ends: 121 [2018-12-09 12:09:17,908 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:17,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-09 12:09:17,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 117. [2018-12-09 12:09:17,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-09 12:09:17,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-12-09 12:09:17,911 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 92 [2018-12-09 12:09:17,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:17,911 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-12-09 12:09:17,911 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 12:09:17,911 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-12-09 12:09:17,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-09 12:09:17,912 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:17,912 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 6, 6, 6, 6, 6, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:17,912 INFO L423 AbstractCegarLoop]: === Iteration 24 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:17,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:17,913 INFO L82 PathProgramCache]: Analyzing trace with hash -1783504008, now seen corresponding path program 7 times [2018-12-09 12:09:17,913 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:17,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,913 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:17,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:17,913 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:17,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:17,975 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:17,975 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,975 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:17,975 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:17,975 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:17,975 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:17,975 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:17,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:17,985 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:18,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:18,035 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:18,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:18,089 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:18,104 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:18,104 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 13 [2018-12-09 12:09:18,104 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:18,104 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 12:09:18,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 12:09:18,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,105 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 10 states. [2018-12-09 12:09:18,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:18,124 INFO L93 Difference]: Finished difference Result 126 states and 130 transitions. [2018-12-09 12:09:18,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 12:09:18,125 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 97 [2018-12-09 12:09:18,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:18,125 INFO L225 Difference]: With dead ends: 126 [2018-12-09 12:09:18,125 INFO L226 Difference]: Without dead ends: 126 [2018-12-09 12:09:18,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 187 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-09 12:09:18,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 122. [2018-12-09 12:09:18,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-09 12:09:18,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 126 transitions. [2018-12-09 12:09:18,127 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 126 transitions. Word has length 97 [2018-12-09 12:09:18,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:18,127 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 126 transitions. [2018-12-09 12:09:18,127 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 12:09:18,127 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 126 transitions. [2018-12-09 12:09:18,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 12:09:18,127 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:18,128 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:18,128 INFO L423 AbstractCegarLoop]: === Iteration 25 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:18,128 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:18,128 INFO L82 PathProgramCache]: Analyzing trace with hash -2083615780, now seen corresponding path program 8 times [2018-12-09 12:09:18,128 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:18,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:18,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,129 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:18,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,176 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 12:09:18,176 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,176 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:18,176 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:18,176 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:18,176 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,176 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:18,184 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:18,184 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:18,211 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-12-09 12:09:18,212 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:18,213 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:18,228 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 257 trivial. 0 not checked. [2018-12-09 12:09:18,229 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:18,255 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 257 trivial. 0 not checked. [2018-12-09 12:09:18,270 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:18,270 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 16 [2018-12-09 12:09:18,270 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:18,270 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 12:09:18,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 12:09:18,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-12-09 12:09:18,271 INFO L87 Difference]: Start difference. First operand 122 states and 126 transitions. Second operand 13 states. [2018-12-09 12:09:18,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:18,315 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-09 12:09:18,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 12:09:18,315 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-12-09 12:09:18,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:18,316 INFO L225 Difference]: With dead ends: 140 [2018-12-09 12:09:18,316 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 12:09:18,316 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-12-09 12:09:18,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 12:09:18,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 132. [2018-12-09 12:09:18,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-09 12:09:18,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-09 12:09:18,318 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 102 [2018-12-09 12:09:18,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:18,318 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-09 12:09:18,318 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 12:09:18,318 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-09 12:09:18,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-09 12:09:18,318 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:18,318 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:18,319 INFO L423 AbstractCegarLoop]: === Iteration 26 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:18,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:18,319 INFO L82 PathProgramCache]: Analyzing trace with hash 581933952, now seen corresponding path program 9 times [2018-12-09 12:09:18,319 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:18,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,319 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:18,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,319 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:18,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,375 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,376 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:18,376 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:18,376 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:18,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,376 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:18,383 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 12:09:18,383 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 12:09:18,406 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 12:09:18,406 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:18,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:18,417 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,417 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:18,473 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,487 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:18,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-09 12:09:18,487 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:18,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 12:09:18,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 12:09:18,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,488 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 12 states. [2018-12-09 12:09:18,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:18,518 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-12-09 12:09:18,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:09:18,519 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 112 [2018-12-09 12:09:18,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:18,519 INFO L225 Difference]: With dead ends: 141 [2018-12-09 12:09:18,520 INFO L226 Difference]: Without dead ends: 141 [2018-12-09 12:09:18,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 215 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-09 12:09:18,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 137. [2018-12-09 12:09:18,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-09 12:09:18,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-12-09 12:09:18,523 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 112 [2018-12-09 12:09:18,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:18,523 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-12-09 12:09:18,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 12:09:18,523 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-12-09 12:09:18,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-09 12:09:18,524 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:18,524 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 9, 9, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:18,524 INFO L423 AbstractCegarLoop]: === Iteration 27 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:18,524 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:18,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1884774756, now seen corresponding path program 10 times [2018-12-09 12:09:18,524 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:18,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,525 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:18,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,525 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:18,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,575 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,576 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:18,576 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:18,576 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:18,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,576 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:18,582 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:18,582 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:18,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:18,626 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,626 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:18,691 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 12:09:18,706 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:18,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 13 [2018-12-09 12:09:18,707 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:18,707 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 12:09:18,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 12:09:18,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,707 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 13 states. [2018-12-09 12:09:18,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:18,743 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-09 12:09:18,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 12:09:18,743 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 117 [2018-12-09 12:09:18,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:18,744 INFO L225 Difference]: With dead ends: 142 [2018-12-09 12:09:18,744 INFO L226 Difference]: Without dead ends: 142 [2018-12-09 12:09:18,744 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 224 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:18,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-09 12:09:18,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-09 12:09:18,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-09 12:09:18,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-09 12:09:18,746 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 117 [2018-12-09 12:09:18,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:18,747 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-09 12:09:18,747 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 12:09:18,747 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-09 12:09:18,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-09 12:09:18,747 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:18,747 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:18,748 INFO L423 AbstractCegarLoop]: === Iteration 28 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:18,748 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:18,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1532941056, now seen corresponding path program 11 times [2018-12-09 12:09:18,748 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:18,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:18,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,748 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:18,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,791 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:18,791 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,791 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:18,791 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:18,791 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:18,791 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,792 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:18,800 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:18,800 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:18,835 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-12-09 12:09:18,835 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:18,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:18,844 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:18,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:18,872 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:18,886 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:18,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-09 12:09:18,887 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:18,887 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 12:09:18,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 12:09:18,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:18,887 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 7 states. [2018-12-09 12:09:18,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:18,903 INFO L93 Difference]: Finished difference Result 151 states and 155 transitions. [2018-12-09 12:09:18,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 12:09:18,904 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-09 12:09:18,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:18,904 INFO L225 Difference]: With dead ends: 151 [2018-12-09 12:09:18,904 INFO L226 Difference]: Without dead ends: 151 [2018-12-09 12:09:18,904 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 240 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 12:09:18,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-09 12:09:18,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 147. [2018-12-09 12:09:18,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-09 12:09:18,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 151 transitions. [2018-12-09 12:09:18,906 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 151 transitions. Word has length 122 [2018-12-09 12:09:18,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:18,906 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 151 transitions. [2018-12-09 12:09:18,906 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 12:09:18,906 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 151 transitions. [2018-12-09 12:09:18,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-09 12:09:18,907 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:18,907 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:18,907 INFO L423 AbstractCegarLoop]: === Iteration 29 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:18,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:18,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1963431288, now seen corresponding path program 12 times [2018-12-09 12:09:18,907 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:18,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,908 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:18,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:18,908 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:18,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:18,942 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:18,942 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,943 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:18,943 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:18,943 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:18,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:18,943 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:18,950 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 12:09:18,950 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 12:09:19,109 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 12:09:19,109 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:19,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:19,124 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,124 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:19,168 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,183 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:19,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-09 12:09:19,183 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:19,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 12:09:19,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 12:09:19,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:19,184 INFO L87 Difference]: Start difference. First operand 147 states and 151 transitions. Second operand 8 states. [2018-12-09 12:09:19,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:19,204 INFO L93 Difference]: Finished difference Result 156 states and 160 transitions. [2018-12-09 12:09:19,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 12:09:19,204 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-12-09 12:09:19,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:19,205 INFO L225 Difference]: With dead ends: 156 [2018-12-09 12:09:19,205 INFO L226 Difference]: Without dead ends: 156 [2018-12-09 12:09:19,205 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:19,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-09 12:09:19,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-12-09 12:09:19,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-09 12:09:19,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 156 transitions. [2018-12-09 12:09:19,207 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 156 transitions. Word has length 127 [2018-12-09 12:09:19,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:19,207 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 156 transitions. [2018-12-09 12:09:19,207 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 12:09:19,207 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 156 transitions. [2018-12-09 12:09:19,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-12-09 12:09:19,208 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:19,208 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:19,208 INFO L423 AbstractCegarLoop]: === Iteration 30 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:19,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:19,208 INFO L82 PathProgramCache]: Analyzing trace with hash 958904320, now seen corresponding path program 13 times [2018-12-09 12:09:19,208 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:19,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,208 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:19,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,208 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:19,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:19,245 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,245 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,245 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:19,245 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:19,245 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:19,245 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,245 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:19,251 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:19,251 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:19,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:19,283 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:19,293 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,293 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:19,353 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,367 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:19,367 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2018-12-09 12:09:19,367 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:19,368 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 12:09:19,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 12:09:19,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:19,368 INFO L87 Difference]: Start difference. First operand 152 states and 156 transitions. Second operand 9 states. [2018-12-09 12:09:19,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:19,390 INFO L93 Difference]: Finished difference Result 161 states and 165 transitions. [2018-12-09 12:09:19,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 12:09:19,390 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-12-09 12:09:19,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:19,391 INFO L225 Difference]: With dead ends: 161 [2018-12-09 12:09:19,391 INFO L226 Difference]: Without dead ends: 161 [2018-12-09 12:09:19,391 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 258 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:19,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-09 12:09:19,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-09 12:09:19,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-09 12:09:19,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 161 transitions. [2018-12-09 12:09:19,393 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 161 transitions. Word has length 132 [2018-12-09 12:09:19,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:19,394 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 161 transitions. [2018-12-09 12:09:19,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 12:09:19,394 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 161 transitions. [2018-12-09 12:09:19,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-12-09 12:09:19,395 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:19,395 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:19,395 INFO L423 AbstractCegarLoop]: === Iteration 31 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:19,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:19,395 INFO L82 PathProgramCache]: Analyzing trace with hash -169874824, now seen corresponding path program 14 times [2018-12-09 12:09:19,395 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:19,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:19,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,395 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:19,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:19,449 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,450 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,450 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:19,450 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:19,450 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:19,450 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,450 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:19,457 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:19,458 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:19,594 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-09 12:09:19,595 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:19,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:19,695 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,696 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:19,759 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,774 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:19,774 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 9] total 22 [2018-12-09 12:09:19,775 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:19,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 12:09:19,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 12:09:19,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=298, Unknown=0, NotChecked=0, Total=462 [2018-12-09 12:09:19,775 INFO L87 Difference]: Start difference. First operand 157 states and 161 transitions. Second operand 19 states. [2018-12-09 12:09:19,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:19,853 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2018-12-09 12:09:19,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 12:09:19,853 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 137 [2018-12-09 12:09:19,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:19,853 INFO L225 Difference]: With dead ends: 166 [2018-12-09 12:09:19,853 INFO L226 Difference]: Without dead ends: 166 [2018-12-09 12:09:19,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 258 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2018-12-09 12:09:19,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-12-09 12:09:19,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-12-09 12:09:19,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-09 12:09:19,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 166 transitions. [2018-12-09 12:09:19,855 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 166 transitions. Word has length 137 [2018-12-09 12:09:19,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:19,856 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 166 transitions. [2018-12-09 12:09:19,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 12:09:19,856 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 166 transitions. [2018-12-09 12:09:19,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-12-09 12:09:19,856 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:19,856 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:19,856 INFO L423 AbstractCegarLoop]: === Iteration 32 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:19,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:19,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1958968576, now seen corresponding path program 15 times [2018-12-09 12:09:19,857 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:19,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,857 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:19,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:19,857 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:19,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:19,911 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:19,911 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,911 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:19,911 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:19,911 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:19,911 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:19,911 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:19,917 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 12:09:19,917 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-12-09 12:09:20,324 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 12:09:20,324 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:20,327 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:20,342 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,342 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:20,396 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,411 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:20,412 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 13 [2018-12-09 12:09:20,412 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:20,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 12:09:20,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 12:09:20,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:20,412 INFO L87 Difference]: Start difference. First operand 162 states and 166 transitions. Second operand 11 states. [2018-12-09 12:09:20,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:20,438 INFO L93 Difference]: Finished difference Result 171 states and 175 transitions. [2018-12-09 12:09:20,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 12:09:20,438 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-12-09 12:09:20,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:20,439 INFO L225 Difference]: With dead ends: 171 [2018-12-09 12:09:20,439 INFO L226 Difference]: Without dead ends: 171 [2018-12-09 12:09:20,439 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 276 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:20,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-12-09 12:09:20,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 167. [2018-12-09 12:09:20,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-09 12:09:20,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 171 transitions. [2018-12-09 12:09:20,441 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 171 transitions. Word has length 142 [2018-12-09 12:09:20,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:20,442 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 171 transitions. [2018-12-09 12:09:20,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 12:09:20,442 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 171 transitions. [2018-12-09 12:09:20,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-12-09 12:09:20,442 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:20,442 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:20,442 INFO L423 AbstractCegarLoop]: === Iteration 33 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:20,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:20,442 INFO L82 PathProgramCache]: Analyzing trace with hash 940703608, now seen corresponding path program 16 times [2018-12-09 12:09:20,443 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:20,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:20,443 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:20,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:20,443 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:20,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:20,510 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,510 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:20,510 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:20,510 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:20,510 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:20,510 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:20,510 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:20,520 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:20,520 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 12:09:20,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:20,570 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:20,589 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,589 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:20,648 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,671 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:20,672 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 13 [2018-12-09 12:09:20,672 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:20,672 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 12:09:20,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 12:09:20,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:20,673 INFO L87 Difference]: Start difference. First operand 167 states and 171 transitions. Second operand 12 states. [2018-12-09 12:09:20,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:20,708 INFO L93 Difference]: Finished difference Result 176 states and 180 transitions. [2018-12-09 12:09:20,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 12:09:20,708 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 147 [2018-12-09 12:09:20,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:20,708 INFO L225 Difference]: With dead ends: 176 [2018-12-09 12:09:20,708 INFO L226 Difference]: Without dead ends: 176 [2018-12-09 12:09:20,708 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 304 GetRequests, 285 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 12:09:20,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-09 12:09:20,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-09 12:09:20,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-09 12:09:20,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 176 transitions. [2018-12-09 12:09:20,710 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 176 transitions. Word has length 147 [2018-12-09 12:09:20,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:20,711 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 176 transitions. [2018-12-09 12:09:20,711 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 12:09:20,711 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 176 transitions. [2018-12-09 12:09:20,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-12-09 12:09:20,711 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:20,711 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:20,711 INFO L423 AbstractCegarLoop]: === Iteration 34 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:20,711 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:20,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1374712320, now seen corresponding path program 17 times [2018-12-09 12:09:20,712 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:20,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:20,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 12:09:20,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:20,712 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:20,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 12:09:20,778 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:20,778 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:20,779 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 12:09:20,779 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-09 12:09:20,779 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-09 12:09:20,779 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 12:09:20,779 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 12:09:20,786 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 12:09:20,787 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-09 12:09:21,325 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-12-09 12:09:21,325 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 12:09:21,329 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 12:09:21,452 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:21,452 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 12:09:21,520 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 12:09:21,535 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 12:09:21,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 12] total 26 [2018-12-09 12:09:21,535 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 12:09:21,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-09 12:09:21,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-09 12:09:21,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=434, Unknown=0, NotChecked=0, Total=650 [2018-12-09 12:09:21,536 INFO L87 Difference]: Start difference. First operand 172 states and 176 transitions. Second operand 25 states. [2018-12-09 12:09:21,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 12:09:21,613 INFO L93 Difference]: Finished difference Result 177 states and 181 transitions. [2018-12-09 12:09:21,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 12:09:21,613 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 152 [2018-12-09 12:09:21,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 12:09:21,614 INFO L225 Difference]: With dead ends: 177 [2018-12-09 12:09:21,614 INFO L226 Difference]: Without dead ends: 177 [2018-12-09 12:09:21,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 316 GetRequests, 282 SyntacticMatches, 9 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=240, Invalid=462, Unknown=0, NotChecked=0, Total=702 [2018-12-09 12:09:21,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-09 12:09:21,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-12-09 12:09:21,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-12-09 12:09:21,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 181 transitions. [2018-12-09 12:09:21,616 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 181 transitions. Word has length 152 [2018-12-09 12:09:21,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 12:09:21,616 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 181 transitions. [2018-12-09 12:09:21,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-09 12:09:21,616 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 181 transitions. [2018-12-09 12:09:21,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-12-09 12:09:21,617 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 12:09:21,617 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 12:09:21,617 INFO L423 AbstractCegarLoop]: === Iteration 35 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr1REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 12:09:21,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 12:09:21,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1502751624, now seen corresponding path program 18 times [2018-12-09 12:09:21,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 12:09:21,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:21,617 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 12:09:21,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 12:09:21,618 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 12:09:21,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 12:09:21,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 12:09:21,783 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 12:09:21,832 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 12:09:21 BoogieIcfgContainer [2018-12-09 12:09:21,832 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 12:09:21,832 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 12:09:21,832 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 12:09:21,832 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 12:09:21,832 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 12:08:56" (3/4) ... [2018-12-09 12:09:21,834 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 12:09:21,872 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_953af607-74b4-42a8-b2c6-785ea7b1dfef/bin-2019/utaipan/witness.graphml [2018-12-09 12:09:21,873 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 12:09:21,873 INFO L168 Benchmark]: Toolchain (without parser) took 25661.19 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 354.9 MB). Free memory was 950.8 MB in the beginning and 1.2 GB in the end (delta: -219.4 MB). Peak memory consumption was 135.6 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,873 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 12:09:21,873 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.29 ms. Allocated memory is still 1.0 GB. Free memory was 950.8 MB in the beginning and 938.9 MB in the end (delta: 11.9 MB). Peak memory consumption was 11.9 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,874 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.68 ms. Allocated memory is still 1.0 GB. Free memory was 938.9 MB in the beginning and 936.2 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,874 INFO L168 Benchmark]: Boogie Preprocessor took 52.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 113.2 MB). Free memory was 936.2 MB in the beginning and 1.1 GB in the end (delta: -174.8 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,874 INFO L168 Benchmark]: RCFGBuilder took 238.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,874 INFO L168 Benchmark]: TraceAbstraction took 25144.40 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 241.7 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -94.5 MB). Peak memory consumption was 147.2 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,874 INFO L168 Benchmark]: Witness Printer took 40.73 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 11.5 GB. [2018-12-09 12:09:21,875 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 167.29 ms. Allocated memory is still 1.0 GB. Free memory was 950.8 MB in the beginning and 938.9 MB in the end (delta: 11.9 MB). Peak memory consumption was 11.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.68 ms. Allocated memory is still 1.0 GB. Free memory was 938.9 MB in the beginning and 936.2 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 113.2 MB). Free memory was 936.2 MB in the beginning and 1.1 GB in the end (delta: -174.8 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 238.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25144.40 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 241.7 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -94.5 MB). Peak memory consumption was 147.2 MB. Max. memory is 11.5 GB. * Witness Printer took 40.73 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 38]: pointer dereference may fail pointer dereference may fail We found a FailurePath: [L6] static int array[10]; [L17] static int numbers2[10]; [L36] static int numbers4[10]; [L45] CALL getNumbers4() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L35] CALL, EXPR getNumbers3() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L25] CALL, EXPR getNumbers2() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L16] CALL, EXPR getNumbers() VAL [array={108:0}, numbers2={105:0}, numbers4={112:0}] [L8] int i = 0; VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=0, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=1, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=2, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=3, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=4, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=5, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=6, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=7, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=8, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L8] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L9] array[i] = i VAL [array={108:0}, i=9, numbers2={105:0}, numbers4={112:0}] [L8] ++i VAL [array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L8] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L12] return array; VAL [\result={108:0}, array={108:0}, i=10, numbers2={105:0}, numbers4={112:0}] [L16] RET, EXPR getNumbers() VAL [array={108:0}, getNumbers()={108:0}, numbers2={105:0}, numbers4={112:0}] [L16] int* numbers = getNumbers(); [L18] int i = 0; VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=0] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=0, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=0] [L18] ++i VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=1] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=1, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=1] [L18] ++i VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=2] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=2, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=2] [L18] ++i VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=3] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=3, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=3] [L18] ++i VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=4] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=4, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=4] [L18] ++i VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=5] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=5, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=5] [L18] ++i VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=6] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=6, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=6] [L18] ++i VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=7] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=7, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=7] [L18] ++i VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=8] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=8, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=8] [L18] ++i VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L19] EXPR numbers[i] VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=9] [L19] numbers2[i] = numbers[i] VAL [array={108:0}, i=9, numbers={108:0}, numbers2={105:0}, numbers4={112:0}, numbers[i]=9] [L18] ++i VAL [array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L18] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L21] return numbers2; VAL [\result={105:0}, array={108:0}, i=10, numbers={108:0}, numbers2={105:0}, numbers4={112:0}] [L25] RET, EXPR getNumbers2() VAL [array={108:0}, getNumbers2()={105:0}, numbers2={105:0}, numbers4={112:0}] [L25] int* numbers = getNumbers2(); [L26] int numbers3[10]; [L27] int i = 0; VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=0] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=0, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=0] [L27] ++i VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=1] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=1, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=1] [L27] ++i VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=2] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=2, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=2] [L27] ++i VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=3] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=3, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=3] [L27] ++i VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=4] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=4, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=4] [L27] ++i VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=5] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=5, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=5] [L27] ++i VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=6] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=6, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=6] [L27] ++i VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=7] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=7, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=7] [L27] ++i VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=8] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=8, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=8] [L27] ++i VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND TRUE i < 10 VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L28] EXPR numbers[i] VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=9] [L28] numbers3[i] = numbers[i] VAL [array={108:0}, i=9, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}, numbers[i]=9] [L27] ++i VAL [array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L27] COND FALSE !(i < 10) VAL [array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers3={106:0}, numbers4={112:0}] [L31] return numbers3; [L31] return numbers3; VAL [\result={106:0}, array={108:0}, i=10, numbers={105:0}, numbers2={105:0}, numbers4={112:0}] [L35] RET, EXPR getNumbers3() VAL [array={108:0}, getNumbers3()={106:0}, numbers2={105:0}, numbers4={112:0}] [L35] int* numbers = getNumbers3(); [L37] int i = 0; VAL [array={108:0}, i=0, numbers={106:0}, numbers2={105:0}, numbers4={112:0}] [L37] COND TRUE i < 10 VAL [array={108:0}, i=0, numbers={106:0}, numbers2={105:0}, numbers4={112:0}] [L38] numbers[i] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 70 locations, 17 error locations. UNSAFE Result, 25.1s OverallTime, 35 OverallIterations, 10 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1930 SDtfs, 973 SDslu, 9391 SDs, 0 SdLazy, 1865 SolverSat, 99 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4948 GetRequests, 4476 SyntacticMatches, 95 SemanticMatches, 377 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1819 ImplicationChecksByTransitivity, 15.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=34, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.4s AbstIntTime, 8 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 34 MinimizatonAttempts, 77 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 19.3s InterpolantComputationTime, 4943 NumberOfCodeBlocks, 4591 NumberOfCodeBlocksAsserted, 89 NumberOfCheckSat, 7034 ConstructedInterpolants, 236 QuantifiedInterpolants, 1867558 SizeOfPredicates, 79 NumberOfNonLiveVariables, 9907 ConjunctsInSsa, 323 ConjunctsInUnsatCore, 94 InterpolantComputations, 16 PerfectInterpolantSequences, 13257/18417 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...