./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 41595dc52c6906fb55de72b138967114013fb2be ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 41595dc52c6906fb55de72b138967114013fb2be ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 16:04:51,570 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 16:04:51,571 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 16:04:51,577 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 16:04:51,577 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 16:04:51,578 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 16:04:51,578 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 16:04:51,579 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 16:04:51,580 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 16:04:51,580 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 16:04:51,581 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 16:04:51,581 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 16:04:51,581 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 16:04:51,582 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 16:04:51,582 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 16:04:51,583 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 16:04:51,583 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 16:04:51,584 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 16:04:51,585 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 16:04:51,586 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 16:04:51,586 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 16:04:51,587 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 16:04:51,588 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 16:04:51,588 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 16:04:51,588 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 16:04:51,589 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 16:04:51,589 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 16:04:51,590 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 16:04:51,590 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 16:04:51,591 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 16:04:51,591 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 16:04:51,591 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 16:04:51,591 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 16:04:51,591 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 16:04:51,592 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 16:04:51,592 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 16:04:51,592 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-09 16:04:51,600 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 16:04:51,600 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 16:04:51,600 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 16:04:51,601 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 16:04:51,601 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 16:04:51,602 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 16:04:51,602 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 16:04:51,602 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 16:04:51,602 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 16:04:51,602 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 16:04:51,602 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 16:04:51,602 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 16:04:51,603 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 16:04:51,603 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:04:51,604 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 16:04:51,604 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 16:04:51,604 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 16:04:51,604 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 16:04:51,604 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 16:04:51,604 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 41595dc52c6906fb55de72b138967114013fb2be [2018-12-09 16:04:51,622 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 16:04:51,631 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 16:04:51,633 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 16:04:51,634 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 16:04:51,634 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 16:04:51,635 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-12-09 16:04:51,674 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/b2604df49/5863e27c8ec74f2dbd214cb79bfaf3f8/FLAG63f86cc62 [2018-12-09 16:04:52,126 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 16:04:52,126 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-12-09 16:04:52,133 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/b2604df49/5863e27c8ec74f2dbd214cb79bfaf3f8/FLAG63f86cc62 [2018-12-09 16:04:52,142 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/b2604df49/5863e27c8ec74f2dbd214cb79bfaf3f8 [2018-12-09 16:04:52,144 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 16:04:52,145 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 16:04:52,146 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 16:04:52,146 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 16:04:52,148 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 16:04:52,148 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,150 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5828bbf7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52, skipping insertion in model container [2018-12-09 16:04:52,150 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,154 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 16:04:52,182 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 16:04:52,411 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:04:52,419 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 16:04:52,455 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:04:52,489 INFO L195 MainTranslator]: Completed translation [2018-12-09 16:04:52,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52 WrapperNode [2018-12-09 16:04:52,490 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 16:04:52,490 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 16:04:52,490 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 16:04:52,490 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 16:04:52,497 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,514 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,521 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 16:04:52,522 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 16:04:52,522 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 16:04:52,522 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 16:04:52,529 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,529 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,531 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,531 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,537 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,538 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,539 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... [2018-12-09 16:04:52,541 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 16:04:52,541 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 16:04:52,541 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 16:04:52,541 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 16:04:52,542 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:04:52,572 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 16:04:52,572 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 16:04:52,572 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 16:04:52,572 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 16:04:52,572 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-09 16:04:52,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 16:04:52,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 16:04:52,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-09 16:04:52,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 16:04:52,573 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 16:04:52,573 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_2_11 [2018-12-09 16:04:52,574 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_2_11 [2018-12-09 16:04:52,574 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-09 16:04:52,574 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-09 16:04:52,574 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 16:04:52,574 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 16:04:52,574 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 16:04:52,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 16:04:52,799 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 16:04:52,799 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-09 16:04:52,799 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:04:52 BoogieIcfgContainer [2018-12-09 16:04:52,799 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 16:04:52,800 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 16:04:52,800 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 16:04:52,802 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 16:04:52,802 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 04:04:52" (1/3) ... [2018-12-09 16:04:52,803 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4d729d37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:04:52, skipping insertion in model container [2018-12-09 16:04:52,803 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:52" (2/3) ... [2018-12-09 16:04:52,803 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4d729d37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:04:52, skipping insertion in model container [2018-12-09 16:04:52,803 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:04:52" (3/3) ... [2018-12-09 16:04:52,804 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_1_false-valid-free.i [2018-12-09 16:04:52,810 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 16:04:52,815 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-12-09 16:04:52,825 INFO L257 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2018-12-09 16:04:52,840 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 16:04:52,840 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 16:04:52,840 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 16:04:52,840 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 16:04:52,840 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 16:04:52,840 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 16:04:52,840 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 16:04:52,841 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 16:04:52,852 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states. [2018-12-09 16:04:52,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 16:04:52,857 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:52,858 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:52,860 INFO L423 AbstractCegarLoop]: === Iteration 1 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:52,863 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:52,864 INFO L82 PathProgramCache]: Analyzing trace with hash -1929161300, now seen corresponding path program 1 times [2018-12-09 16:04:52,865 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:52,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:52,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:52,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:52,902 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:52,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:52,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:52,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:04:52,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 16:04:52,978 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:04:52,981 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:04:52,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:04:52,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:04:52,990 INFO L87 Difference]: Start difference. First operand 103 states. Second operand 3 states. [2018-12-09 16:04:53,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:53,123 INFO L93 Difference]: Finished difference Result 153 states and 179 transitions. [2018-12-09 16:04:53,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:04:53,124 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-09 16:04:53,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:53,130 INFO L225 Difference]: With dead ends: 153 [2018-12-09 16:04:53,131 INFO L226 Difference]: Without dead ends: 147 [2018-12-09 16:04:53,132 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:04:53,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-09 16:04:53,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 104. [2018-12-09 16:04:53,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:04:53,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 116 transitions. [2018-12-09 16:04:53,161 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 116 transitions. Word has length 16 [2018-12-09 16:04:53,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:53,161 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 116 transitions. [2018-12-09 16:04:53,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:04:53,161 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 116 transitions. [2018-12-09 16:04:53,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 16:04:53,162 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:53,162 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:53,163 INFO L423 AbstractCegarLoop]: === Iteration 2 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:53,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,163 INFO L82 PathProgramCache]: Analyzing trace with hash 622995661, now seen corresponding path program 1 times [2018-12-09 16:04:53,163 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:53,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:53,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,164 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:53,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:53,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:53,192 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:04:53,192 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:04:53,192 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:04:53,193 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:04:53,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:04:53,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:04:53,194 INFO L87 Difference]: Start difference. First operand 104 states and 116 transitions. Second operand 5 states. [2018-12-09 16:04:53,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:53,218 INFO L93 Difference]: Finished difference Result 132 states and 152 transitions. [2018-12-09 16:04:53,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:04:53,219 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-09 16:04:53,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:53,220 INFO L225 Difference]: With dead ends: 132 [2018-12-09 16:04:53,220 INFO L226 Difference]: Without dead ends: 132 [2018-12-09 16:04:53,220 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:04:53,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-09 16:04:53,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 100. [2018-12-09 16:04:53,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 16:04:53,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-12-09 16:04:53,226 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 16 [2018-12-09 16:04:53,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:53,226 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-12-09 16:04:53,226 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:04:53,226 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-12-09 16:04:53,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:04:53,226 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:53,226 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:53,227 INFO L423 AbstractCegarLoop]: === Iteration 3 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:53,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1721395782, now seen corresponding path program 1 times [2018-12-09 16:04:53,227 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:53,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:53,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,228 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:53,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:53,263 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:04:53,263 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:53,264 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 16:04:53,264 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-12-09 16:04:53,265 INFO L205 CegarAbsIntRunner]: [44], [48], [49], [50], [51], [74], [79], [81], [84], [113], [119], [129], [130], [131], [137], [138], [139], [140] [2018-12-09 16:04:53,285 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 16:04:53,285 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 16:04:53,359 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-09 16:04:53,360 INFO L272 AbstractInterpreter]: Visited 13 different actions 13 times. Never merged. Never widened. Performed 108 root evaluator evaluations with a maximum evaluation depth of 3. Performed 108 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 24 variables. [2018-12-09 16:04:53,366 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,366 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-09 16:04:53,396 INFO L227 lantSequenceWeakener]: Weakened 11 states. On average, predicates are now at 92.32% of their original sizes. [2018-12-09 16:04:53,396 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-09 16:04:53,406 INFO L418 sIntCurrentIteration]: We unified 20 AI predicates to 20 [2018-12-09 16:04:53,407 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-09 16:04:53,407 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 16:04:53,407 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [5] total 9 [2018-12-09 16:04:53,407 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:04:53,408 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:04:53,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:04:53,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:04:53,408 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 6 states. [2018-12-09 16:04:53,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:53,497 INFO L93 Difference]: Finished difference Result 110 states and 119 transitions. [2018-12-09 16:04:53,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 16:04:53,497 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-12-09 16:04:53,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:53,498 INFO L225 Difference]: With dead ends: 110 [2018-12-09 16:04:53,498 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 16:04:53,498 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 16:04:53,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 16:04:53,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 104. [2018-12-09 16:04:53,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:04:53,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-09 16:04:53,505 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 21 [2018-12-09 16:04:53,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:53,505 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-09 16:04:53,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:04:53,505 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-09 16:04:53,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:04:53,506 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:53,506 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:53,506 INFO L423 AbstractCegarLoop]: === Iteration 4 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:53,507 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,507 INFO L82 PathProgramCache]: Analyzing trace with hash -1427992775, now seen corresponding path program 1 times [2018-12-09 16:04:53,507 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:53,508 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,508 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:53,508 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,509 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:53,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:53,543 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:04:53,543 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:53,543 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 16:04:53,544 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-12-09 16:04:53,544 INFO L205 CegarAbsIntRunner]: [44], [47], [48], [49], [50], [51], [74], [79], [81], [84], [113], [119], [129], [130], [131], [137], [138], [139], [140] [2018-12-09 16:04:53,545 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 16:04:53,545 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 16:04:53,587 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-09 16:04:53,588 INFO L272 AbstractInterpreter]: Visited 19 different actions 31 times. Merged at 6 different actions 8 times. Never widened. Performed 218 root evaluator evaluations with a maximum evaluation depth of 3. Performed 218 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 24 variables. [2018-12-09 16:04:53,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,591 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-09 16:04:53,616 INFO L227 lantSequenceWeakener]: Weakened 19 states. On average, predicates are now at 91.25% of their original sizes. [2018-12-09 16:04:53,616 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-09 16:04:53,644 INFO L418 sIntCurrentIteration]: We unified 20 AI predicates to 20 [2018-12-09 16:04:53,644 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-09 16:04:53,644 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 16:04:53,645 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [4] total 12 [2018-12-09 16:04:53,645 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:04:53,645 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:04:53,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:04:53,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-12-09 16:04:53,646 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 10 states. [2018-12-09 16:04:53,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:53,912 INFO L93 Difference]: Finished difference Result 106 states and 113 transitions. [2018-12-09 16:04:53,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 16:04:53,912 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-12-09 16:04:53,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:53,913 INFO L225 Difference]: With dead ends: 106 [2018-12-09 16:04:53,914 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 16:04:53,914 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 23 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-09 16:04:53,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 16:04:53,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-09 16:04:53,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 16:04:53,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 113 transitions. [2018-12-09 16:04:53,920 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 113 transitions. Word has length 21 [2018-12-09 16:04:53,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:53,920 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 113 transitions. [2018-12-09 16:04:53,920 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:04:53,920 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 113 transitions. [2018-12-09 16:04:53,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:04:53,921 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:53,921 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:53,921 INFO L423 AbstractCegarLoop]: === Iteration 5 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:53,921 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1427992738, now seen corresponding path program 1 times [2018-12-09 16:04:53,922 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:53,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:53,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,923 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:53,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:53,968 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:04:53,968 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:04:53,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:04:53,969 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 16:04:53,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:04:53,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:04:53,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:04:53,970 INFO L87 Difference]: Start difference. First operand 106 states and 113 transitions. Second operand 5 states. [2018-12-09 16:04:53,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:53,985 INFO L93 Difference]: Finished difference Result 117 states and 125 transitions. [2018-12-09 16:04:53,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:04:53,986 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 16:04:53,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:53,986 INFO L225 Difference]: With dead ends: 117 [2018-12-09 16:04:53,986 INFO L226 Difference]: Without dead ends: 117 [2018-12-09 16:04:53,987 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:04:53,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-09 16:04:53,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 110. [2018-12-09 16:04:53,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-09 16:04:53,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 118 transitions. [2018-12-09 16:04:53,991 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 118 transitions. Word has length 21 [2018-12-09 16:04:53,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:53,991 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 118 transitions. [2018-12-09 16:04:53,991 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:04:53,991 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 118 transitions. [2018-12-09 16:04:53,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:04:53,992 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:53,992 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:53,992 INFO L423 AbstractCegarLoop]: === Iteration 6 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:53,992 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:53,992 INFO L82 PathProgramCache]: Analyzing trace with hash -1456621889, now seen corresponding path program 1 times [2018-12-09 16:04:53,992 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:53,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:53,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:53,993 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:54,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:54,055 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:54,056 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:54,056 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 16:04:54,056 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-12-09 16:04:54,056 INFO L205 CegarAbsIntRunner]: [44], [47], [49], [50], [51], [74], [79], [81], [86], [88], [119], [129], [130], [131], [137], [138], [139], [140] [2018-12-09 16:04:54,057 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 16:04:54,057 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 16:04:54,073 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 16:04:54,073 INFO L272 AbstractInterpreter]: Visited 18 different actions 21 times. Never merged. Never widened. Performed 170 root evaluator evaluations with a maximum evaluation depth of 3. Performed 170 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 24 variables. [2018-12-09 16:04:54,075 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:54,076 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 16:04:54,076 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:54,076 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:04:54,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:54,086 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 16:04:54,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:54,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:04:54,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:04:54,139 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,142 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:04:54,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:04:54,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:04:54,173 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 16:04:54,173 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:04:54,178 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-12-09 16:04:54,191 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:54,191 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:04:54,370 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:54,385 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 16:04:54,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 7] total 13 [2018-12-09 16:04:54,385 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 16:04:54,385 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 16:04:54,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 16:04:54,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-12-09 16:04:54,386 INFO L87 Difference]: Start difference. First operand 110 states and 118 transitions. Second operand 9 states. [2018-12-09 16:04:54,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:54,661 INFO L93 Difference]: Finished difference Result 142 states and 155 transitions. [2018-12-09 16:04:54,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:04:54,662 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-09 16:04:54,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:54,662 INFO L225 Difference]: With dead ends: 142 [2018-12-09 16:04:54,663 INFO L226 Difference]: Without dead ends: 142 [2018-12-09 16:04:54,663 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 33 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=211, Unknown=0, NotChecked=0, Total=272 [2018-12-09 16:04:54,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-09 16:04:54,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 111. [2018-12-09 16:04:54,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-09 16:04:54,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 119 transitions. [2018-12-09 16:04:54,667 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 119 transitions. Word has length 21 [2018-12-09 16:04:54,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:54,667 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 119 transitions. [2018-12-09 16:04:54,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 16:04:54,667 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 119 transitions. [2018-12-09 16:04:54,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:04:54,667 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:54,668 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:54,668 INFO L423 AbstractCegarLoop]: === Iteration 7 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:54,668 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:54,668 INFO L82 PathProgramCache]: Analyzing trace with hash -1456621888, now seen corresponding path program 1 times [2018-12-09 16:04:54,668 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:54,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:54,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:54,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:54,669 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:54,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:54,749 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:54,749 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:54,749 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 16:04:54,750 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-12-09 16:04:54,750 INFO L205 CegarAbsIntRunner]: [44], [47], [49], [50], [51], [74], [79], [81], [86], [89], [119], [129], [130], [131], [137], [138], [139], [140] [2018-12-09 16:04:54,751 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 16:04:54,751 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 16:04:54,761 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 16:04:54,761 INFO L272 AbstractInterpreter]: Visited 18 different actions 21 times. Never merged. Never widened. Performed 171 root evaluator evaluations with a maximum evaluation depth of 3. Performed 171 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 24 variables. [2018-12-09 16:04:54,762 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:54,762 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 16:04:54,762 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:54,763 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:04:54,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:54,769 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 16:04:54,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:54,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:04:54,785 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:04:54,785 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:04:54,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,794 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-12-09 16:04:54,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:04:54,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:04:54,827 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:04:54,828 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,833 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:04:54,833 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,837 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:04:54,838 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 16:04:54,849 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:54,850 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:04:54,911 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 27 [2018-12-09 16:04:55,331 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 22 [2018-12-09 16:04:55,447 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-12-09 16:04:55,448 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:55,451 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 15 [2018-12-09 16:04:55,459 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 3 [2018-12-09 16:04:55,459 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:55,460 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-12-09 16:04:55,460 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:04:55,463 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:04:55,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:04:55,466 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:24, output treesize:7 [2018-12-09 16:04:55,482 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:04:55,497 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 16:04:55,497 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 16 [2018-12-09 16:04:55,497 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-09 16:04:55,498 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:04:55,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:04:55,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-12-09 16:04:55,498 INFO L87 Difference]: Start difference. First operand 111 states and 119 transitions. Second operand 10 states. [2018-12-09 16:04:56,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:04:56,227 INFO L93 Difference]: Finished difference Result 165 states and 183 transitions. [2018-12-09 16:04:56,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 16:04:56,227 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-12-09 16:04:56,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:04:56,228 INFO L225 Difference]: With dead ends: 165 [2018-12-09 16:04:56,228 INFO L226 Difference]: Without dead ends: 165 [2018-12-09 16:04:56,228 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 6 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2018-12-09 16:04:56,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-09 16:04:56,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 110. [2018-12-09 16:04:56,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-09 16:04:56,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 118 transitions. [2018-12-09 16:04:56,232 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 118 transitions. Word has length 21 [2018-12-09 16:04:56,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:04:56,232 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 118 transitions. [2018-12-09 16:04:56,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:04:56,233 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 118 transitions. [2018-12-09 16:04:56,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 16:04:56,233 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:04:56,233 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:04:56,233 INFO L423 AbstractCegarLoop]: === Iteration 8 === [alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE]=== [2018-12-09 16:04:56,233 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:56,233 INFO L82 PathProgramCache]: Analyzing trace with hash 1282074310, now seen corresponding path program 1 times [2018-12-09 16:04:56,233 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 16:04:56,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:56,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:56,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 16:04:56,234 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 16:04:56,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:56,283 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:04:56,283 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:56,284 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-09 16:04:56,284 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 26 with the following transitions: [2018-12-09 16:04:56,284 INFO L205 CegarAbsIntRunner]: [2], [44], [47], [48], [49], [50], [51], [74], [79], [81], [84], [114], [116], [118], [119], [120], [129], [130], [131], [137], [138], [139], [140] [2018-12-09 16:04:56,284 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-09 16:04:56,285 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-09 16:04:56,306 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-09 16:04:56,306 INFO L272 AbstractInterpreter]: Visited 23 different actions 35 times. Merged at 6 different actions 8 times. Never widened. Performed 226 root evaluator evaluations with a maximum evaluation depth of 3. Performed 226 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 24 variables. [2018-12-09 16:04:56,307 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:04:56,307 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-09 16:04:56,307 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:04:56,307 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:04:56,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:04:56,314 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-09 16:04:56,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:04:56,329 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:04:57,789 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:04:57,789 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:04:58,039 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:04:58,039 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: This case should habe been handled by DER at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.DerPreprocessor.constructReplacement(DerPreprocessor.java:217) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.DerPreprocessor.constructReplacement(DerPreprocessor.java:209) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.DerPreprocessor.convert(DerPreprocessor.java:190) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.cacheConvert(TermTransformer.java:131) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.access$0(TermTransformer.java:127) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$Convert.walk(TermTransformer.java:79) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:253) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:211) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:214) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-12-09 16:04:58,042 INFO L168 Benchmark]: Toolchain (without parser) took 5896.90 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 221.2 MB). Free memory was 953.5 MB in the beginning and 895.4 MB in the end (delta: 58.0 MB). Peak memory consumption was 279.3 MB. Max. memory is 11.5 GB. [2018-12-09 16:04:58,042 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:04:58,043 INFO L168 Benchmark]: CACSL2BoogieTranslator took 344.24 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 146.3 MB). Free memory was 953.5 MB in the beginning and 1.1 GB in the end (delta: -163.7 MB). Peak memory consumption was 30.4 MB. Max. memory is 11.5 GB. [2018-12-09 16:04:58,043 INFO L168 Benchmark]: Boogie Procedure Inliner took 31.16 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:04:58,043 INFO L168 Benchmark]: Boogie Preprocessor took 19.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-12-09 16:04:58,043 INFO L168 Benchmark]: RCFGBuilder took 258.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 35.0 MB). Peak memory consumption was 35.0 MB. Max. memory is 11.5 GB. [2018-12-09 16:04:58,044 INFO L168 Benchmark]: TraceAbstraction took 5241.46 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 75.0 MB). Free memory was 1.1 GB in the beginning and 895.4 MB in the end (delta: 180.0 MB). Peak memory consumption was 255.0 MB. Max. memory is 11.5 GB. [2018-12-09 16:04:58,047 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 344.24 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 146.3 MB). Free memory was 953.5 MB in the beginning and 1.1 GB in the end (delta: -163.7 MB). Peak memory consumption was 30.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 31.16 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 19.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 258.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 35.0 MB). Peak memory consumption was 35.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 5241.46 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 75.0 MB). Free memory was 1.1 GB in the beginning and 895.4 MB in the end (delta: 180.0 MB). Peak memory consumption was 255.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: This case should habe been handled by DER de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: This case should habe been handled by DER: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.DerPreprocessor.constructReplacement(DerPreprocessor.java:217) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-09 16:04:59,351 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 16:04:59,352 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 16:04:59,359 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 16:04:59,359 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 16:04:59,360 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 16:04:59,361 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 16:04:59,362 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 16:04:59,363 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 16:04:59,363 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 16:04:59,364 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 16:04:59,364 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 16:04:59,365 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 16:04:59,365 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 16:04:59,366 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 16:04:59,367 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 16:04:59,367 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 16:04:59,368 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 16:04:59,370 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 16:04:59,371 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 16:04:59,372 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 16:04:59,372 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 16:04:59,374 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 16:04:59,374 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 16:04:59,374 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 16:04:59,375 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 16:04:59,376 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 16:04:59,376 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 16:04:59,377 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 16:04:59,377 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 16:04:59,378 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 16:04:59,378 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 16:04:59,378 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 16:04:59,378 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 16:04:59,379 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 16:04:59,379 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 16:04:59,379 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-12-09 16:04:59,387 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 16:04:59,388 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 16:04:59,388 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 16:04:59,388 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 16:04:59,388 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 16:04:59,388 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 16:04:59,388 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 16:04:59,388 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 16:04:59,389 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 16:04:59,389 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 16:04:59,389 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 16:04:59,390 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 16:04:59,390 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:04:59,391 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 16:04:59,391 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 16:04:59,391 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-09 16:04:59,391 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 16:04:59,391 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-09 16:04:59,391 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 41595dc52c6906fb55de72b138967114013fb2be [2018-12-09 16:04:59,409 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 16:04:59,416 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 16:04:59,419 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 16:04:59,419 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 16:04:59,420 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 16:04:59,420 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-12-09 16:04:59,456 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/102531934/e7ce34eeab9e4598a56f8e60357fc373/FLAG3148a731b [2018-12-09 16:04:59,879 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 16:04:59,880 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-12-09 16:04:59,887 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/102531934/e7ce34eeab9e4598a56f8e60357fc373/FLAG3148a731b [2018-12-09 16:04:59,895 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/data/102531934/e7ce34eeab9e4598a56f8e60357fc373 [2018-12-09 16:04:59,897 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 16:04:59,898 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 16:04:59,898 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 16:04:59,898 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 16:04:59,900 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 16:04:59,901 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:04:59" (1/1) ... [2018-12-09 16:04:59,902 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@34f70bc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:04:59, skipping insertion in model container [2018-12-09 16:04:59,903 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 04:04:59" (1/1) ... [2018-12-09 16:04:59,907 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 16:04:59,932 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 16:05:00,127 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:05:00,139 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 16:05:00,207 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 16:05:00,242 INFO L195 MainTranslator]: Completed translation [2018-12-09 16:05:00,242 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00 WrapperNode [2018-12-09 16:05:00,242 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 16:05:00,243 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 16:05:00,243 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 16:05:00,243 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 16:05:00,247 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,259 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,264 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 16:05:00,264 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 16:05:00,264 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 16:05:00,265 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 16:05:00,270 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,270 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,272 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,272 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,279 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,280 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,282 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... [2018-12-09 16:05:00,283 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 16:05:00,283 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 16:05:00,284 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 16:05:00,284 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 16:05:00,284 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 16:05:00,315 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 16:05:00,315 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-12-09 16:05:00,315 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 16:05:00,315 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 16:05:00,315 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_2_11 [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_2_11 [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-12-09 16:05:00,316 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 16:05:00,316 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 16:05:00,317 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 16:05:00,317 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 16:05:00,572 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 16:05:00,572 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-09 16:05:00,572 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:05:00 BoogieIcfgContainer [2018-12-09 16:05:00,572 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 16:05:00,573 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 16:05:00,573 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 16:05:00,575 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 16:05:00,575 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 04:04:59" (1/3) ... [2018-12-09 16:05:00,575 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e61227b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:05:00, skipping insertion in model container [2018-12-09 16:05:00,576 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 04:05:00" (2/3) ... [2018-12-09 16:05:00,576 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e61227b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 04:05:00, skipping insertion in model container [2018-12-09 16:05:00,576 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:05:00" (3/3) ... [2018-12-09 16:05:00,577 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_1_false-valid-free.i [2018-12-09 16:05:00,583 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 16:05:00,588 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-12-09 16:05:00,597 INFO L257 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2018-12-09 16:05:00,612 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 16:05:00,612 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 16:05:00,612 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 16:05:00,613 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 16:05:00,613 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 16:05:00,613 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 16:05:00,613 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 16:05:00,613 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 16:05:00,613 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 16:05:00,623 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states. [2018-12-09 16:05:00,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 16:05:00,628 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:00,628 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:00,630 INFO L423 AbstractCegarLoop]: === Iteration 1 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:00,633 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:00,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1929161300, now seen corresponding path program 1 times [2018-12-09 16:05:00,635 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:00,636 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:00,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:00,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:00,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:00,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:00,712 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:05:00,714 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:05:00,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 16:05:00,717 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 16:05:00,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 16:05:00,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:05:00,726 INFO L87 Difference]: Start difference. First operand 103 states. Second operand 3 states. [2018-12-09 16:05:00,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:00,907 INFO L93 Difference]: Finished difference Result 153 states and 179 transitions. [2018-12-09 16:05:00,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 16:05:00,909 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-12-09 16:05:00,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:00,916 INFO L225 Difference]: With dead ends: 153 [2018-12-09 16:05:00,916 INFO L226 Difference]: Without dead ends: 147 [2018-12-09 16:05:00,918 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 16:05:00,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-09 16:05:00,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 104. [2018-12-09 16:05:00,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:05:00,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 116 transitions. [2018-12-09 16:05:00,948 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 116 transitions. Word has length 16 [2018-12-09 16:05:00,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:00,949 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 116 transitions. [2018-12-09 16:05:00,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 16:05:00,949 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 116 transitions. [2018-12-09 16:05:00,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-12-09 16:05:00,950 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:00,950 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:00,951 INFO L423 AbstractCegarLoop]: === Iteration 2 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:00,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:00,951 INFO L82 PathProgramCache]: Analyzing trace with hash 622995661, now seen corresponding path program 1 times [2018-12-09 16:05:00,951 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:00,951 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:00,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:00,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:00,990 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,004 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:05:01,005 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:05:01,005 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:05:01,006 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:05:01,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:05:01,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,006 INFO L87 Difference]: Start difference. First operand 104 states and 116 transitions. Second operand 5 states. [2018-12-09 16:05:01,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:01,078 INFO L93 Difference]: Finished difference Result 132 states and 152 transitions. [2018-12-09 16:05:01,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:05:01,078 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-12-09 16:05:01,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:01,080 INFO L225 Difference]: With dead ends: 132 [2018-12-09 16:05:01,080 INFO L226 Difference]: Without dead ends: 132 [2018-12-09 16:05:01,081 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-09 16:05:01,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 100. [2018-12-09 16:05:01,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 16:05:01,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-12-09 16:05:01,090 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 16 [2018-12-09 16:05:01,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:01,090 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-12-09 16:05:01,090 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:05:01,090 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-12-09 16:05:01,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:05:01,091 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:01,091 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:01,092 INFO L423 AbstractCegarLoop]: === Iteration 3 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:01,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:01,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1721395782, now seen corresponding path program 1 times [2018-12-09 16:05:01,092 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:01,092 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:01,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:01,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:01,127 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,139 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:01,139 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:01,160 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:01,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:05:01,161 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:05:01,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:01,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:01,182 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,184 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:01,184 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:01,211 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:01,225 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:05:01,226 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4] total 4 [2018-12-09 16:05:01,226 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:05:01,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:05:01,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,227 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 5 states. [2018-12-09 16:05:01,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:01,258 INFO L93 Difference]: Finished difference Result 99 states and 107 transitions. [2018-12-09 16:05:01,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:05:01,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 16:05:01,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:01,259 INFO L225 Difference]: With dead ends: 99 [2018-12-09 16:05:01,259 INFO L226 Difference]: Without dead ends: 99 [2018-12-09 16:05:01,259 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-09 16:05:01,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-12-09 16:05:01,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 16:05:01,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 107 transitions. [2018-12-09 16:05:01,264 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 107 transitions. Word has length 21 [2018-12-09 16:05:01,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:01,264 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 107 transitions. [2018-12-09 16:05:01,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:05:01,265 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 107 transitions. [2018-12-09 16:05:01,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:05:01,265 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:01,265 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:01,265 INFO L423 AbstractCegarLoop]: === Iteration 4 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:01,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:01,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1721395745, now seen corresponding path program 1 times [2018-12-09 16:05:01,266 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:01,266 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:01,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:01,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:01,311 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,328 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,328 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:05:01,330 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:05:01,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:05:01,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:05:01,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:05:01,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,331 INFO L87 Difference]: Start difference. First operand 99 states and 107 transitions. Second operand 5 states. [2018-12-09 16:05:01,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:01,350 INFO L93 Difference]: Finished difference Result 103 states and 113 transitions. [2018-12-09 16:05:01,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:05:01,351 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 16:05:01,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:01,352 INFO L225 Difference]: With dead ends: 103 [2018-12-09 16:05:01,352 INFO L226 Difference]: Without dead ends: 101 [2018-12-09 16:05:01,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:01,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-12-09 16:05:01,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2018-12-09 16:05:01,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 16:05:01,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 111 transitions. [2018-12-09 16:05:01,357 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 111 transitions. Word has length 21 [2018-12-09 16:05:01,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:01,357 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 111 transitions. [2018-12-09 16:05:01,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:05:01,358 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 111 transitions. [2018-12-09 16:05:01,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:05:01,358 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:01,358 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:01,358 INFO L423 AbstractCegarLoop]: === Iteration 5 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:01,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:01,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1427992738, now seen corresponding path program 1 times [2018-12-09 16:05:01,359 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:01,359 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:01,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:01,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:01,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:01,435 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:01,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:01,439 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:05:01,465 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,466 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:01,528 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,529 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:05:01,529 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:05:01,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:01,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:01,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:01,552 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:01,552 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:01,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:01,554 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:05:01,559 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,559 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:01,620 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:05:01,634 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:05:01,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5] total 6 [2018-12-09 16:05:01,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 16:05:01,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 16:05:01,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-09 16:05:01,635 INFO L87 Difference]: Start difference. First operand 101 states and 111 transitions. Second operand 7 states. [2018-12-09 16:05:02,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:02,432 INFO L93 Difference]: Finished difference Result 155 states and 183 transitions. [2018-12-09 16:05:02,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:05:02,433 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-12-09 16:05:02,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:02,435 INFO L225 Difference]: With dead ends: 155 [2018-12-09 16:05:02,435 INFO L226 Difference]: Without dead ends: 155 [2018-12-09 16:05:02,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=59, Unknown=7, NotChecked=0, Total=90 [2018-12-09 16:05:02,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-12-09 16:05:02,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 102. [2018-12-09 16:05:02,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:05:02,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 112 transitions. [2018-12-09 16:05:02,447 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 112 transitions. Word has length 21 [2018-12-09 16:05:02,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:02,448 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 112 transitions. [2018-12-09 16:05:02,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 16:05:02,448 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 112 transitions. [2018-12-09 16:05:02,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:05:02,449 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:02,449 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:02,450 INFO L423 AbstractCegarLoop]: === Iteration 6 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:02,450 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:02,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1427992737, now seen corresponding path program 1 times [2018-12-09 16:05:02,451 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:02,451 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:02,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:02,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:02,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:02,545 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:02,546 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:05:02,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:05:02,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:05:02,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:05:02,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:05:02,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:02,548 INFO L87 Difference]: Start difference. First operand 102 states and 112 transitions. Second operand 5 states. [2018-12-09 16:05:02,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:02,575 INFO L93 Difference]: Finished difference Result 106 states and 116 transitions. [2018-12-09 16:05:02,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:05:02,575 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-12-09 16:05:02,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:02,576 INFO L225 Difference]: With dead ends: 106 [2018-12-09 16:05:02,576 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 16:05:02,577 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:05:02,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 16:05:02,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 104. [2018-12-09 16:05:02,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:05:02,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 114 transitions. [2018-12-09 16:05:02,581 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 114 transitions. Word has length 21 [2018-12-09 16:05:02,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:02,581 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 114 transitions. [2018-12-09 16:05:02,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:05:02,582 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 114 transitions. [2018-12-09 16:05:02,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-12-09 16:05:02,582 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:02,582 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:02,582 INFO L423 AbstractCegarLoop]: === Iteration 7 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:02,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:02,590 INFO L82 PathProgramCache]: Analyzing trace with hash -1456621888, now seen corresponding path program 1 times [2018-12-09 16:05:02,591 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:02,591 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:02,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:02,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:02,647 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:02,654 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:02,655 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:02,662 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:02,662 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:02,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:02,667 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:05:03,569 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:05:03,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:03,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:03,579 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:05:03,579 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:05:03,594 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 16:05:03,614 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 16:05:03,614 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:03,752 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:05:03,752 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:05:03,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:03,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:03,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:03,777 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:03,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,785 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:05:03,786 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,791 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:05:03,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:03,803 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:05:03,803 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:03,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:03,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:05:03,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:03,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 16:05:03,831 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-12-09 16:05:03,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:03,930 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:05:03,930 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-09 16:05:03,930 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 16:05:03,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 16:05:03,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-09 16:05:03,930 INFO L87 Difference]: Start difference. First operand 104 states and 114 transitions. Second operand 9 states. [2018-12-09 16:05:04,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:05:04,735 INFO L93 Difference]: Finished difference Result 152 states and 172 transitions. [2018-12-09 16:05:04,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:05:04,736 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-12-09 16:05:04,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:05:04,737 INFO L225 Difference]: With dead ends: 152 [2018-12-09 16:05:04,737 INFO L226 Difference]: Without dead ends: 152 [2018-12-09 16:05:04,737 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-09 16:05:04,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-09 16:05:04,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 103. [2018-12-09 16:05:04,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 16:05:04,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 113 transitions. [2018-12-09 16:05:04,740 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 113 transitions. Word has length 21 [2018-12-09 16:05:04,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:05:04,741 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 113 transitions. [2018-12-09 16:05:04,741 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 16:05:04,741 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 113 transitions. [2018-12-09 16:05:04,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 16:05:04,741 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:05:04,741 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:05:04,741 INFO L423 AbstractCegarLoop]: === Iteration 8 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:05:04,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:05:04,742 INFO L82 PathProgramCache]: Analyzing trace with hash 1282074310, now seen corresponding path program 1 times [2018-12-09 16:05:04,742 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:05:04,742 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:05:04,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:04,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:04,796 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:04,815 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-09 16:05:04,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:04,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 16:05:04,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 16:05:04,835 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 16:05:04,836 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-09 16:05:04,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:05:04,838 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-09 16:05:04,838 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:05:04,841 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:05:04,848 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 16:05:04,848 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-09 16:05:06,907 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= |c_#valid| (store |c_old(#valid)| entry_point_~c11~0.base (_ bv0 1))))) is different from true [2018-12-09 16:05:06,936 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:06,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:07,808 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_19 (_ BitVec 32))) (or (not (= (select |c_#valid| v_entry_point_~c11~0.base_19) (_ bv0 1))) (= (store |c_#valid| v_entry_point_~c11~0.base_19 (_ bv0 1)) |c_old(#valid)|))) is different from false [2018-12-09 16:05:07,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:05:07,811 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:05:07,817 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:05:07,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:05:07,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:05:07,838 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:05:07,838 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:05:08,324 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~c11~0.base_22 (_ BitVec 32))) (or (= (store |c_#valid| v_entry_point_~c11~0.base_22 (_ bv0 1)) |c_old(#valid)|) (not (= (select |c_#valid| v_entry_point_~c11~0.base_22) (_ bv0 1))))) is different from false [2018-12-09 16:05:08,340 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:05:08,341 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6] total 9 [2018-12-09 16:05:08,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:05:08,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:05:08,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=52, Unknown=3, NotChecked=48, Total=132 [2018-12-09 16:05:08,341 INFO L87 Difference]: Start difference. First operand 103 states and 113 transitions. Second operand 10 states. [2018-12-09 16:05:22,756 WARN L180 SmtUtils]: Spent 2.79 s on a formula simplification. DAG size of input: 12 DAG size of output: 10 [2018-12-09 16:06:13,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:13,336 INFO L93 Difference]: Finished difference Result 144 states and 156 transitions. [2018-12-09 16:06:13,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 16:06:13,336 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-12-09 16:06:13,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:13,337 INFO L225 Difference]: With dead ends: 144 [2018-12-09 16:06:13,337 INFO L226 Difference]: Without dead ends: 135 [2018-12-09 16:06:13,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=33, Invalid=66, Unknown=3, NotChecked=54, Total=156 [2018-12-09 16:06:13,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-09 16:06:13,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 103. [2018-12-09 16:06:13,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 16:06:13,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-12-09 16:06:13,342 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 25 [2018-12-09 16:06:13,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:13,342 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-12-09 16:06:13,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:06:13,343 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-12-09 16:06:13,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 16:06:13,343 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:13,343 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:13,344 INFO L423 AbstractCegarLoop]: === Iteration 9 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:13,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:13,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1478587815, now seen corresponding path program 1 times [2018-12-09 16:06:13,344 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:13,344 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:13,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:13,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:13,377 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:13,387 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:13,388 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:06:13,389 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:06:13,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:06:13,389 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:06:13,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:06:13,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:13,390 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 5 states. [2018-12-09 16:06:13,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:13,423 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-12-09 16:06:13,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:06:13,424 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-12-09 16:06:13,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:13,424 INFO L225 Difference]: With dead ends: 103 [2018-12-09 16:06:13,424 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 16:06:13,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:13,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 16:06:13,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 101. [2018-12-09 16:06:13,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 16:06:13,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2018-12-09 16:06:13,427 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 25 [2018-12-09 16:06:13,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:13,427 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2018-12-09 16:06:13,427 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:06:13,427 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2018-12-09 16:06:13,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 16:06:13,427 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:13,428 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:13,428 INFO L423 AbstractCegarLoop]: === Iteration 10 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:13,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:13,428 INFO L82 PathProgramCache]: Analyzing trace with hash -2125002099, now seen corresponding path program 1 times [2018-12-09 16:06:13,428 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:13,428 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:13,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:13,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:13,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:13,489 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:13,490 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:13,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:13,491 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:06:13,514 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:13,514 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:13,595 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:13,597 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:13,597 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:13,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:13,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:13,617 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:13,620 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:13,620 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:13,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:13,621 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:06:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:13,624 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:13,663 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 2 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:13,678 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:06:13,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 5, 5] total 9 [2018-12-09 16:06:13,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:06:13,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:06:13,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=65, Unknown=4, NotChecked=0, Total=90 [2018-12-09 16:06:13,679 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand 10 states. [2018-12-09 16:06:14,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:14,246 INFO L93 Difference]: Finished difference Result 127 states and 139 transitions. [2018-12-09 16:06:14,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:06:14,246 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-12-09 16:06:14,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:14,247 INFO L225 Difference]: With dead ends: 127 [2018-12-09 16:06:14,247 INFO L226 Difference]: Without dead ends: 127 [2018-12-09 16:06:14,247 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=79, Unknown=5, NotChecked=0, Total=110 [2018-12-09 16:06:14,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-09 16:06:14,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 102. [2018-12-09 16:06:14,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:06:14,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 109 transitions. [2018-12-09 16:06:14,249 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 109 transitions. Word has length 29 [2018-12-09 16:06:14,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:14,250 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 109 transitions. [2018-12-09 16:06:14,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:06:14,250 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 109 transitions. [2018-12-09 16:06:14,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 16:06:14,250 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:14,250 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:14,250 INFO L423 AbstractCegarLoop]: === Iteration 11 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:14,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:14,251 INFO L82 PathProgramCache]: Analyzing trace with hash -2125002098, now seen corresponding path program 1 times [2018-12-09 16:06:14,251 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:14,251 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:14,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:14,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:14,325 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:14,344 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:06:14,345 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:06:14,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:06:14,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:06:14,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:06:14,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:06:14,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:14,347 INFO L87 Difference]: Start difference. First operand 102 states and 109 transitions. Second operand 5 states. [2018-12-09 16:06:14,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:14,367 INFO L93 Difference]: Finished difference Result 112 states and 119 transitions. [2018-12-09 16:06:14,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:06:14,367 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 16:06:14,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:14,368 INFO L225 Difference]: With dead ends: 112 [2018-12-09 16:06:14,368 INFO L226 Difference]: Without dead ends: 112 [2018-12-09 16:06:14,369 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:14,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-09 16:06:14,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 106. [2018-12-09 16:06:14,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 16:06:14,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 114 transitions. [2018-12-09 16:06:14,372 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 114 transitions. Word has length 29 [2018-12-09 16:06:14,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:14,372 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 114 transitions. [2018-12-09 16:06:14,372 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:06:14,372 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 114 transitions. [2018-12-09 16:06:14,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 16:06:14,373 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:14,373 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:14,373 INFO L423 AbstractCegarLoop]: === Iteration 12 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:14,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:14,374 INFO L82 PathProgramCache]: Analyzing trace with hash -2125002151, now seen corresponding path program 1 times [2018-12-09 16:06:14,374 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:14,374 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:14,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:14,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:14,411 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:14,421 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:06:14,421 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:14,440 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:06:14,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:14,441 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:14,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:14,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:14,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:14,462 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:06:14,463 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:14,485 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:06:14,500 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:06:14,500 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4] total 4 [2018-12-09 16:06:14,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:06:14,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:06:14,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:14,500 INFO L87 Difference]: Start difference. First operand 106 states and 114 transitions. Second operand 5 states. [2018-12-09 16:06:14,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:14,538 INFO L93 Difference]: Finished difference Result 105 states and 112 transitions. [2018-12-09 16:06:14,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:06:14,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 16:06:14,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:14,539 INFO L225 Difference]: With dead ends: 105 [2018-12-09 16:06:14,539 INFO L226 Difference]: Without dead ends: 105 [2018-12-09 16:06:14,540 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:06:14,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-09 16:06:14,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-09 16:06:14,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 16:06:14,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 112 transitions. [2018-12-09 16:06:14,542 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 112 transitions. Word has length 29 [2018-12-09 16:06:14,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:14,542 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 112 transitions. [2018-12-09 16:06:14,542 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:06:14,542 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 112 transitions. [2018-12-09 16:06:14,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 16:06:14,542 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:14,542 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:14,543 INFO L423 AbstractCegarLoop]: === Iteration 13 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:14,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:14,543 INFO L82 PathProgramCache]: Analyzing trace with hash 2141336047, now seen corresponding path program 1 times [2018-12-09 16:06:14,543 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:14,543 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:14,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:14,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:14,623 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:14,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:14,630 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:14,637 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:14,637 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:14,642 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:14,642 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:06:15,541 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:06:15,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:15,550 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:06:15,550 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:15,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:15,564 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:15,564 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,575 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,575 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 16:06:15,593 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-09 16:06:15,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:15,738 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:15,738 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:15,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:15,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:15,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:15,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:15,765 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:15,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:06:15,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:15,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:15,788 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:15,788 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,802 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:06:15,802 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:15,812 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-09 16:06:15,813 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 2 not checked. [2018-12-09 16:06:15,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:15,918 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:06:15,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-09 16:06:15,919 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 16:06:15,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 16:06:15,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=70, Unknown=1, NotChecked=16, Total=110 [2018-12-09 16:06:15,919 INFO L87 Difference]: Start difference. First operand 105 states and 112 transitions. Second operand 9 states. [2018-12-09 16:06:16,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:16,416 INFO L93 Difference]: Finished difference Result 140 states and 152 transitions. [2018-12-09 16:06:16,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:06:16,416 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-09 16:06:16,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:16,417 INFO L225 Difference]: With dead ends: 140 [2018-12-09 16:06:16,417 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 16:06:16,417 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-12-09 16:06:16,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 16:06:16,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 104. [2018-12-09 16:06:16,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:06:16,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-09 16:06:16,420 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 29 [2018-12-09 16:06:16,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:16,420 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-09 16:06:16,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 16:06:16,420 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-09 16:06:16,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 16:06:16,420 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:16,420 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:16,421 INFO L423 AbstractCegarLoop]: === Iteration 14 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:16,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:16,421 INFO L82 PathProgramCache]: Analyzing trace with hash -606993372, now seen corresponding path program 1 times [2018-12-09 16:06:16,421 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:16,421 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:16,436 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:16,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:16,499 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:17,288 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 16:06:17,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:17,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:17,293 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:06:17,293 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:17,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:17,300 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 16:06:17,333 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-09 16:06:17,333 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:06:17,334 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:06:17,334 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:06:17,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 16:06:17,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 16:06:17,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=31, Unknown=1, NotChecked=10, Total=56 [2018-12-09 16:06:17,335 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 8 states. [2018-12-09 16:06:18,136 WARN L180 SmtUtils]: Spent 703.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 20 [2018-12-09 16:06:18,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:18,378 INFO L93 Difference]: Finished difference Result 127 states and 139 transitions. [2018-12-09 16:06:18,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 16:06:18,379 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-12-09 16:06:18,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:18,379 INFO L225 Difference]: With dead ends: 127 [2018-12-09 16:06:18,379 INFO L226 Difference]: Without dead ends: 127 [2018-12-09 16:06:18,380 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=24, Invalid=51, Unknown=1, NotChecked=14, Total=90 [2018-12-09 16:06:18,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-09 16:06:18,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 103. [2018-12-09 16:06:18,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 16:06:18,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-12-09 16:06:18,382 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 32 [2018-12-09 16:06:18,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:18,382 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-12-09 16:06:18,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 16:06:18,382 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-12-09 16:06:18,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 16:06:18,383 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:18,383 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:18,383 INFO L423 AbstractCegarLoop]: === Iteration 15 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:18,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:18,383 INFO L82 PathProgramCache]: Analyzing trace with hash -606993371, now seen corresponding path program 1 times [2018-12-09 16:06:18,384 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:18,384 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:18,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:18,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:18,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:18,478 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:18,479 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:18,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:18,486 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:18,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:18,491 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:06:19,379 WARN L180 SmtUtils]: Spent 836.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 16:06:19,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:19,387 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:06:19,387 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:19,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:19,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:19,402 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:19,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:19,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:19,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-09 16:06:20,285 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:06:20,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:20,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:20,292 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:20,292 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,304 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:06:20,304 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,311 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-09 16:06:20,346 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-12-09 16:06:20,346 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:20,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:20,612 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:20,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:20,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:20,642 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:20,647 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:20,647 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,653 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:20,654 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:20,659 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:06:22,663 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 16:06:22,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,672 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:06:22,672 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:22,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,689 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:06:22,690 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:22,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:22,702 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-12-09 16:06:22,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:06:22,791 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:22,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:22,814 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-12-09 16:06:22,815 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:22,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:22,828 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:36, output treesize:11 [2018-12-09 16:06:22,831 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 16:06:22,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:22,968 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:06:22,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 14 [2018-12-09 16:06:22,968 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-09 16:06:22,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-09 16:06:22,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=231, Unknown=2, NotChecked=62, Total=342 [2018-12-09 16:06:22,969 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 15 states. [2018-12-09 16:06:26,105 WARN L180 SmtUtils]: Spent 3.01 s on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-12-09 16:06:30,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:30,006 INFO L93 Difference]: Finished difference Result 140 states and 154 transitions. [2018-12-09 16:06:30,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 16:06:30,006 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 32 [2018-12-09 16:06:30,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:30,007 INFO L225 Difference]: With dead ends: 140 [2018-12-09 16:06:30,007 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 16:06:30,007 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=84, Invalid=428, Unknown=2, NotChecked=86, Total=600 [2018-12-09 16:06:30,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 16:06:30,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 102. [2018-12-09 16:06:30,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:06:30,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 109 transitions. [2018-12-09 16:06:30,011 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 109 transitions. Word has length 32 [2018-12-09 16:06:30,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:30,011 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 109 transitions. [2018-12-09 16:06:30,011 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-09 16:06:30,011 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 109 transitions. [2018-12-09 16:06:30,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 16:06:30,011 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:30,012 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:30,012 INFO L423 AbstractCegarLoop]: === Iteration 16 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:30,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:30,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1879002710, now seen corresponding path program 1 times [2018-12-09 16:06:30,012 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:30,012 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:30,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:30,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:30,077 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:30,079 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:30,079 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,080 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:06:30,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:30,108 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,110 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 16:06:30,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,152 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 16:06:30,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:30,157 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:13 [2018-12-09 16:06:30,173 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:30,173 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:30,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:06:30,218 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,223 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,223 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:4 [2018-12-09 16:06:30,287 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 4 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:30,288 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:30,289 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:30,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:30,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:30,307 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:30,309 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:30,309 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,310 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,311 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:06:30,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,316 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:06:30,316 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,318 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,319 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 16:06:30,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:30,332 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-12-09 16:06:30,332 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:30,337 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:13 [2018-12-09 16:06:30,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:30,339 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:30,381 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:06:30,381 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:30,385 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:4 [2018-12-09 16:06:30,451 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 4 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:30,465 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:06:30,465 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9] total 11 [2018-12-09 16:06:30,466 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 16:06:30,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 16:06:30,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=101, Unknown=6, NotChecked=0, Total=132 [2018-12-09 16:06:30,466 INFO L87 Difference]: Start difference. First operand 102 states and 109 transitions. Second operand 12 states. [2018-12-09 16:06:42,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:06:42,322 INFO L93 Difference]: Finished difference Result 128 states and 142 transitions. [2018-12-09 16:06:42,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 16:06:42,322 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-12-09 16:06:42,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:06:42,323 INFO L225 Difference]: With dead ends: 128 [2018-12-09 16:06:42,323 INFO L226 Difference]: Without dead ends: 128 [2018-12-09 16:06:42,323 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 104 SyntacticMatches, 13 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=62, Invalid=255, Unknown=25, NotChecked=0, Total=342 [2018-12-09 16:06:42,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-09 16:06:42,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 104. [2018-12-09 16:06:42,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:06:42,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-12-09 16:06:42,326 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 32 [2018-12-09 16:06:42,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:06:42,326 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-12-09 16:06:42,326 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 16:06:42,326 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-12-09 16:06:42,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 16:06:42,327 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:06:42,327 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:06:42,327 INFO L423 AbstractCegarLoop]: === Iteration 17 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:06:42,327 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:06:42,327 INFO L82 PathProgramCache]: Analyzing trace with hash 794921029, now seen corresponding path program 1 times [2018-12-09 16:06:42,327 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:06:42,328 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:06:42,343 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:42,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:42,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:42,420 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:42,420 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,424 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,424 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 16:06:42,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:42,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:42,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:42,454 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,458 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 16:06:42,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:06:42,482 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,494 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:06:42,496 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:06:42,496 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,498 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:42,504 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:24, output treesize:15 [2018-12-09 16:06:44,526 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_26 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_26 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_26) (_ bv0 32))))) is different from true [2018-12-09 16:06:44,561 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-09 16:06:44,563 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:06:44,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,570 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,580 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:21 [2018-12-09 16:06:44,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 21 [2018-12-09 16:06:44,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 12 [2018-12-09 16:06:44,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,656 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:7 [2018-12-09 16:06:44,694 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 16:06:44,694 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:44,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-09 16:06:44,790 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:44,794 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-09 16:06:44,870 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:06:44,870 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:06:44,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:06:44,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:06:44,897 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:06:44,901 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:06:44,901 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,903 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:06:44,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:44,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:06:44,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:06:44,963 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:44,965 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 16:06:45,025 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:06:45,027 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:06:45,027 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:45,029 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:45,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:45,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-12-09 16:06:47,085 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_29 (_ BitVec 32)) (v_entry_point_~c11~0.offset_BEFORE_CALL_16 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_29) v_entry_point_~c11~0.offset_BEFORE_CALL_16) v_entry_point_~c11~0.base_BEFORE_CALL_29))) is different from true [2018-12-09 16:06:47,145 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-12-09 16:06:47,147 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:06:47,148 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-12-09 16:06:47,273 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 21 [2018-12-09 16:06:47,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 12 [2018-12-09 16:06:47,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,282 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:7 [2018-12-09 16:06:47,283 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-12-09 16:06:47,283 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:06:47,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-12-09 16:06:47,330 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:06:47,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 16:06:47,334 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:15 [2018-12-09 16:06:47,467 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 16:06:47,486 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-09 16:06:47,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 29 [2018-12-09 16:06:47,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-12-09 16:06:47,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-12-09 16:06:47,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=720, Unknown=18, NotChecked=110, Total=930 [2018-12-09 16:06:47,487 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 30 states. [2018-12-09 16:06:54,006 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-09 16:07:00,115 WARN L180 SmtUtils]: Spent 4.03 s on a formula simplification. DAG size of input: 36 DAG size of output: 29 [2018-12-09 16:07:04,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:07:04,196 INFO L93 Difference]: Finished difference Result 133 states and 145 transitions. [2018-12-09 16:07:04,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-09 16:07:04,196 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-12-09 16:07:04,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:07:04,197 INFO L225 Difference]: With dead ends: 133 [2018-12-09 16:07:04,197 INFO L226 Difference]: Without dead ends: 133 [2018-12-09 16:07:04,198 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 73 SyntacticMatches, 7 SemanticMatches, 44 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 325 ImplicationChecksByTransitivity, 19.3s TimeCoverageRelationStatistics Valid=212, Invalid=1660, Unknown=28, NotChecked=170, Total=2070 [2018-12-09 16:07:04,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-12-09 16:07:04,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 107. [2018-12-09 16:07:04,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-09 16:07:04,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 114 transitions. [2018-12-09 16:07:04,201 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 114 transitions. Word has length 34 [2018-12-09 16:07:04,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:07:04,201 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 114 transitions. [2018-12-09 16:07:04,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-12-09 16:07:04,202 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 114 transitions. [2018-12-09 16:07:04,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 16:07:04,202 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:07:04,202 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:07:04,202 INFO L423 AbstractCegarLoop]: === Iteration 18 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:07:04,203 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:07:04,203 INFO L82 PathProgramCache]: Analyzing trace with hash 794921030, now seen corresponding path program 1 times [2018-12-09 16:07:04,203 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:07:04,203 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:07:04,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:04,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:04,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:04,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:07:04,307 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,311 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 16:07:04,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:04,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:04,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:07:04,351 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,356 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,356 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:11 [2018-12-09 16:07:04,390 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:04,392 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:04,393 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,395 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,411 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:04,413 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:04,413 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,415 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,425 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-12-09 16:07:04,514 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-09 16:07:04,517 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:07:04,517 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,527 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-12-09 16:07:04,562 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:07:04,562 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,574 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,592 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:66, output treesize:28 [2018-12-09 16:07:04,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-09 16:07:04,705 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:07:04,705 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,719 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 16:07:04,721 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 16:07:04,721 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,726 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:04,732 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:9 [2018-12-09 16:07:04,788 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:07:04,788 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:07:05,165 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 44 [2018-12-09 16:07:05,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 16:07:05,288 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-12-09 16:07:05,288 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:07:05,395 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-12-09 16:07:05,395 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:07:05,507 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-09 16:07:05,507 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:103, output treesize:122 [2018-12-09 16:07:06,354 WARN L180 SmtUtils]: Spent 340.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 46 [2018-12-09 16:07:06,361 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:07:06,362 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:07:06,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:06,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:06,394 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:06,396 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:07:06,396 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,398 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:07:06,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:06,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:06,515 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:07:06,515 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,523 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 16:07:06,649 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:06,651 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:06,652 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,655 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,670 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:06,672 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:06,672 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,674 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,683 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,683 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-09 16:07:06,929 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-12-09 16:07:06,932 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:07:06,933 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,942 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-12-09 16:07:06,974 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 16:07:06,974 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:06,987 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,001 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,001 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:25 [2018-12-09 16:07:07,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-12-09 16:07:07,229 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:07:07,229 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,232 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-12-09 16:07:07,247 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-12-09 16:07:07,248 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,253 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:07,260 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-12-09 16:07:07,262 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 16:07:07,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:07:07,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-12-09 16:07:07,298 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 16:07:07,500 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2018-12-09 16:07:07,501 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:07:07,685 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-12-09 16:07:07,685 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:07:07,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-12-09 16:07:07,852 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:133, output treesize:162 [2018-12-09 16:07:08,775 WARN L180 SmtUtils]: Spent 479.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 54 [2018-12-09 16:07:08,797 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:07:08,797 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 25 [2018-12-09 16:07:08,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 16:07:08,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 16:07:08,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=955, Unknown=0, NotChecked=0, Total=1056 [2018-12-09 16:07:08,798 INFO L87 Difference]: Start difference. First operand 107 states and 114 transitions. Second operand 26 states. [2018-12-09 16:07:13,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:07:13,434 INFO L93 Difference]: Finished difference Result 136 states and 146 transitions. [2018-12-09 16:07:13,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 16:07:13,434 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 34 [2018-12-09 16:07:13,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:07:13,435 INFO L225 Difference]: With dead ends: 136 [2018-12-09 16:07:13,435 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 16:07:13,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 52 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=198, Invalid=1524, Unknown=0, NotChecked=0, Total=1722 [2018-12-09 16:07:13,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 16:07:13,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 106. [2018-12-09 16:07:13,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 16:07:13,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 113 transitions. [2018-12-09 16:07:13,437 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 113 transitions. Word has length 34 [2018-12-09 16:07:13,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:07:13,437 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 113 transitions. [2018-12-09 16:07:13,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 16:07:13,438 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 113 transitions. [2018-12-09 16:07:13,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 16:07:13,438 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:07:13,438 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:07:13,438 INFO L423 AbstractCegarLoop]: === Iteration 19 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:07:13,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:07:13,438 INFO L82 PathProgramCache]: Analyzing trace with hash 1061111753, now seen corresponding path program 1 times [2018-12-09 16:07:13,439 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:07:13,439 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:07:13,460 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:13,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:13,526 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:13,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 17 [2018-12-09 16:07:13,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:13,553 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 15 [2018-12-09 16:07:13,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-12-09 16:07:13,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 16:07:13,561 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 15 [2018-12-09 16:07:13,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:13,563 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-12-09 16:07:13,563 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:13,566 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:13,574 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-12-09 16:07:13,574 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:18, output treesize:19 [2018-12-09 16:07:22,921 WARN L180 SmtUtils]: Spent 5.27 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-09 16:07:24,952 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 19 [2018-12-09 16:07:26,334 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse1 (store .cse0 entry_point_~cfg~1.base (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store .cse1 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv1 1) (select .cse1 entry_point_~c11~0.base)))))) is different from true [2018-12-09 16:07:26,395 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:07:26,395 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:07:26,575 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 47 [2018-12-09 16:07:28,614 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~cfg~1.base_31 (_ BitVec 32)) (v_entry_point_~c11~0.base_28 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_28 (_ bv1 1)))) (or (= |c_old(#valid)| (store (store .cse0 v_entry_point_~cfg~1.base_31 (_ bv0 1)) v_entry_point_~c11~0.base_28 (_ bv0 1))) (not (= (select .cse0 v_entry_point_~cfg~1.base_31) (_ bv0 1))) (= v_entry_point_~c11~0.base_28 (_ bv0 32)) (not (= (select |c_#valid| v_entry_point_~c11~0.base_28) (_ bv0 1)))))) is different from false [2018-12-09 16:07:28,618 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:07:28,618 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:07:28,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:28,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:28,649 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:37,212 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 16:07:38,508 WARN L854 $PredicateComparison]: unable to prove that (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) is different from true [2018-12-09 16:07:38,511 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:07:38,511 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:07:40,646 WARN L832 $PredicateComparison]: unable to prove that (forall ((v_entry_point_~cfg~1.base_34 (_ BitVec 32)) (v_entry_point_~c11~0.base_31 (_ BitVec 32))) (let ((.cse0 (store |c_#valid| v_entry_point_~c11~0.base_31 (_ bv1 1)))) (or (= (store (store .cse0 v_entry_point_~cfg~1.base_34 (_ bv0 1)) v_entry_point_~c11~0.base_31 (_ bv0 1)) |c_old(#valid)|) (not (= (select |c_#valid| v_entry_point_~c11~0.base_31) (_ bv0 1))) (not (= (_ bv0 1) (select .cse0 v_entry_point_~cfg~1.base_34)))))) is different from false [2018-12-09 16:07:40,662 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:07:40,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 18 [2018-12-09 16:07:40,663 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 16:07:40,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 16:07:40,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=209, Unknown=13, NotChecked=132, Total=420 [2018-12-09 16:07:40,663 INFO L87 Difference]: Start difference. First operand 106 states and 113 transitions. Second operand 19 states. [2018-12-09 16:07:50,727 WARN L180 SmtUtils]: Spent 1.73 s on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2018-12-09 16:07:51,746 WARN L854 $PredicateComparison]: unable to prove that (and (exists ((|~#ldv_global_msg_list~0.base| (_ BitVec 32))) (= (bvadd (select |c_old(#valid)| |~#ldv_global_msg_list~0.base|) (_ bv1 1)) (_ bv0 1))) (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse0 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (and (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse0 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store (store .cse0 entry_point_~cfg~1.base (_ bv0 1)) entry_point_~c11~0.base (_ bv0 1)))))) (exists ((entry_point_~c11~0.base (_ BitVec 32)) (entry_point_~cfg~1.base (_ BitVec 32))) (let ((.cse1 (store |c_old(#valid)| entry_point_~c11~0.base (_ bv1 1)))) (let ((.cse2 (store .cse1 entry_point_~cfg~1.base (_ bv0 1)))) (and (not (= (_ bv0 32) entry_point_~c11~0.base)) (= (_ bv0 1) (select |c_old(#valid)| entry_point_~c11~0.base)) (= (select .cse1 entry_point_~cfg~1.base) (_ bv0 1)) (= |c_#valid| (store .cse2 entry_point_~c11~0.base (_ bv0 1))) (= (_ bv1 1) (select .cse2 entry_point_~c11~0.base))))))) is different from true [2018-12-09 16:07:54,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:07:54,401 INFO L93 Difference]: Finished difference Result 145 states and 158 transitions. [2018-12-09 16:07:54,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 16:07:54,401 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 35 [2018-12-09 16:07:54,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:07:54,402 INFO L225 Difference]: With dead ends: 145 [2018-12-09 16:07:54,402 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 16:07:54,403 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 29.4s TimeCoverageRelationStatistics Valid=72, Invalid=240, Unknown=14, NotChecked=180, Total=506 [2018-12-09 16:07:54,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 16:07:54,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 102. [2018-12-09 16:07:54,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:07:54,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 108 transitions. [2018-12-09 16:07:54,405 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 108 transitions. Word has length 35 [2018-12-09 16:07:54,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:07:54,406 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 108 transitions. [2018-12-09 16:07:54,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 16:07:54,406 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 108 transitions. [2018-12-09 16:07:54,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-12-09 16:07:54,406 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:07:54,406 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:07:54,407 INFO L423 AbstractCegarLoop]: === Iteration 20 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:07:54,407 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:07:54,407 INFO L82 PathProgramCache]: Analyzing trace with hash 932029034, now seen corresponding path program 1 times [2018-12-09 16:07:54,407 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:07:54,407 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:07:54,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:54,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:54,441 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:54,449 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:07:54,449 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:07:54,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:07:54,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:07:54,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:07:54,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:07:54,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:07:54,451 INFO L87 Difference]: Start difference. First operand 102 states and 108 transitions. Second operand 5 states. [2018-12-09 16:07:54,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:07:54,467 INFO L93 Difference]: Finished difference Result 100 states and 105 transitions. [2018-12-09 16:07:54,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:07:54,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-12-09 16:07:54,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:07:54,468 INFO L225 Difference]: With dead ends: 100 [2018-12-09 16:07:54,468 INFO L226 Difference]: Without dead ends: 100 [2018-12-09 16:07:54,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:07:54,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-09 16:07:54,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2018-12-09 16:07:54,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-12-09 16:07:54,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 103 transitions. [2018-12-09 16:07:54,470 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 103 transitions. Word has length 35 [2018-12-09 16:07:54,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:07:54,470 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 103 transitions. [2018-12-09 16:07:54,470 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:07:54,470 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 103 transitions. [2018-12-09 16:07:54,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 16:07:54,470 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:07:54,470 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:07:54,471 INFO L423 AbstractCegarLoop]: === Iteration 21 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:07:54,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:07:54,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1511879600, now seen corresponding path program 1 times [2018-12-09 16:07:54,471 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:07:54,471 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:07:54,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:54,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:54,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:54,581 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:07:54,581 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:07:54,583 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:07:54,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:07:54,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:07:54,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:07:54,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:07:54,584 INFO L87 Difference]: Start difference. First operand 98 states and 103 transitions. Second operand 5 states. [2018-12-09 16:07:54,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:07:54,609 INFO L93 Difference]: Finished difference Result 104 states and 109 transitions. [2018-12-09 16:07:54,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:07:54,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-12-09 16:07:54,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:07:54,610 INFO L225 Difference]: With dead ends: 104 [2018-12-09 16:07:54,610 INFO L226 Difference]: Without dead ends: 104 [2018-12-09 16:07:54,610 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:07:54,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-12-09 16:07:54,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 102. [2018-12-09 16:07:54,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:07:54,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2018-12-09 16:07:54,612 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 43 [2018-12-09 16:07:54,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:07:54,612 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2018-12-09 16:07:54,612 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:07:54,612 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2018-12-09 16:07:54,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 16:07:54,612 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:07:54,613 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:07:54,613 INFO L423 AbstractCegarLoop]: === Iteration 22 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:07:54,613 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:07:54,613 INFO L82 PathProgramCache]: Analyzing trace with hash 1483250449, now seen corresponding path program 1 times [2018-12-09 16:07:54,613 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:07:54,613 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:07:54,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:07:54,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:07:54,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:07:54,736 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:07:54,737 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,740 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 16:07:54,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:54,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:07:54,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:07:54,774 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,777 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 16:07:54,803 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:07:54,803 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,828 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:54,831 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:54,831 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,834 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,850 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:07:54,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:07:54,853 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,855 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:07:54,864 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:35, output treesize:22 [2018-12-09 16:07:56,895 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_44 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_44 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_44) (_ bv0 32))))) is different from true [2018-12-09 16:07:56,898 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:07:56,898 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:07:56,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:07:56,904 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-12-09 16:08:00,929 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 16:08:01,040 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 16:08:01,043 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:01,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,054 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,081 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 16:08:01,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:01,084 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,094 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,108 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:31 [2018-12-09 16:08:01,214 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-12-09 16:08:01,216 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-12-09 16:08:01,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:01,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-12-09 16:08:01,328 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-09 16:08:01,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 16:08:01,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,335 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 16:08:01,335 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:01,337 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-12-09 16:08:02,534 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 16:08:02,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:02,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:02,540 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:08:02,540 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:02,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:02,546 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 16:08:02,592 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-09 16:08:02,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:08:02,689 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:08:02,689 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:08:02,696 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:08:02,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:08:02,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:08:02,725 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:02,725 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:02,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:02,726 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:08:04,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:04,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:04,830 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:08:04,830 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,833 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:4 [2018-12-09 16:08:04,928 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:04,930 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:04,930 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,933 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,949 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:04,950 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:04,951 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,953 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:04,962 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 16:08:07,031 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_47 (_ BitVec 32)) (v_entry_point_~c11~0.offset_BEFORE_CALL_29 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_47) v_entry_point_~c11~0.offset_BEFORE_CALL_29) v_entry_point_~c11~0.base_BEFORE_CALL_47))) is different from true [2018-12-09 16:08:07,034 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:07,035 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:07,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:07,040 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-12-09 16:08:15,108 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 16:08:15,298 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-12-09 16:08:15,301 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:15,301 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,311 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,340 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-12-09 16:08:15,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:15,343 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,352 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,364 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:60, output treesize:28 [2018-12-09 16:08:15,583 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-12-09 16:08:15,585 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-12-09 16:08:15,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,588 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,597 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:15,597 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:42, output treesize:31 [2018-12-09 16:08:15,757 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-12-09 16:08:15,759 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 16:08:15,759 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 16:08:15,765 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,766 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,768 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:33, output treesize:5 [2018-12-09 16:08:15,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:15,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:15,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:08:15,773 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:15,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:15,779 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 16:08:15,782 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 10 not checked. [2018-12-09 16:08:15,783 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:08:15,889 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:08:15,889 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 37 [2018-12-09 16:08:15,889 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-09 16:08:15,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-09 16:08:15,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1155, Unknown=8, NotChecked=210, Total=1482 [2018-12-09 16:08:15,890 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand 38 states. [2018-12-09 16:08:24,045 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-09 16:08:32,562 WARN L180 SmtUtils]: Spent 4.01 s on a formula simplification. DAG size of input: 19 DAG size of output: 12 [2018-12-09 16:08:38,685 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification that was a NOOP. DAG size: 28 [2018-12-09 16:08:43,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:08:43,826 INFO L93 Difference]: Finished difference Result 115 states and 123 transitions. [2018-12-09 16:08:43,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-09 16:08:43,827 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 43 [2018-12-09 16:08:43,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:08:43,828 INFO L225 Difference]: With dead ends: 115 [2018-12-09 16:08:43,828 INFO L226 Difference]: Without dead ends: 115 [2018-12-09 16:08:43,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 53 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 41.8s TimeCoverageRelationStatistics Valid=270, Invalid=2485, Unknown=13, NotChecked=312, Total=3080 [2018-12-09 16:08:43,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-09 16:08:43,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 101. [2018-12-09 16:08:43,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-12-09 16:08:43,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 106 transitions. [2018-12-09 16:08:43,830 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 106 transitions. Word has length 43 [2018-12-09 16:08:43,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:08:43,830 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 106 transitions. [2018-12-09 16:08:43,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-09 16:08:43,830 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 106 transitions. [2018-12-09 16:08:43,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 16:08:43,831 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:08:43,831 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:08:43,831 INFO L423 AbstractCegarLoop]: === Iteration 23 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:08:43,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:08:43,831 INFO L82 PathProgramCache]: Analyzing trace with hash 1483250450, now seen corresponding path program 1 times [2018-12-09 16:08:43,831 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:08:43,831 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:08:43,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:08:43,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:08:43,982 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:08:43,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:43,984 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:43,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:43,988 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 16:08:44,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:44,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:44,026 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:08:44,026 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,030 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:8 [2018-12-09 16:08:44,059 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:44,062 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:44,062 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,064 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:44,082 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:44,082 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,085 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:44,094 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-12-09 16:08:46,123 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_50 (_ BitVec 32))) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_50 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_50) (_ bv0 32))))) is different from true [2018-12-09 16:08:48,150 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 16:08:48,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:48,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:48,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:48,165 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:48,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:48,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:22 [2018-12-09 16:08:50,211 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-09 16:08:50,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-12-09 16:08:50,346 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:50,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,358 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,386 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-12-09 16:08:50,389 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:08:50,389 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,397 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,411 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:68, output treesize:65 [2018-12-09 16:08:50,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-12-09 16:08:50,709 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 48 [2018-12-09 16:08:50,710 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:50,725 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:08:50,725 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,734 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:50,749 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 31 [2018-12-09 16:08:50,751 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-12-09 16:08:50,751 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,758 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 16:08:50,759 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,762 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:50,766 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:88, output treesize:14 [2018-12-09 16:08:51,981 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:08:51,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:51,989 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:08:51,989 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:52,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:52,003 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:08:52,004 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,013 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 16:08:52,055 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-09 16:08:52,055 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:08:52,298 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:08:52,298 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:08:52,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:08:52,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:08:52,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:08:52,341 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:52,341 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,342 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:08:52,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:52,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:08:52,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:08:52,454 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,455 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,455 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-12-09 16:08:52,546 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:52,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:52,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,551 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,566 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 16:08:52,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 16:08:52,568 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,570 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:08:52,578 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-12-09 16:08:54,653 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_34 (_ BitVec 32)) (v_entry_point_~c11~0.base_BEFORE_CALL_53 (_ BitVec 32))) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_53) v_entry_point_~c11~0.offset_BEFORE_CALL_34) v_entry_point_~c11~0.base_BEFORE_CALL_53))) is different from true [2018-12-09 16:08:58,733 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 16:08:58,737 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:58,737 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:58,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:08:58,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:08:58,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 16:08:58,761 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:24, output treesize:22 [2018-12-09 16:09:02,847 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 23 [2018-12-09 16:09:03,097 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-12-09 16:09:03,100 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:09:03,100 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-12-09 16:09:03,141 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-12-09 16:09:03,141 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,149 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,162 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:65, output treesize:62 [2018-12-09 16:09:03,688 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 70 [2018-12-09 16:09:03,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 52 [2018-12-09 16:09:03,692 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:09:03,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:09:03,707 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,716 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:09:03,732 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 35 [2018-12-09 16:09:03,734 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-12-09 16:09:03,734 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,742 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 15 [2018-12-09 16:09:03,743 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,746 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,751 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:92, output treesize:18 [2018-12-09 16:09:03,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:03,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:03,758 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:09:03,759 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:09:03,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:03,784 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-12-09 16:09:03,788 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-12-09 16:09:03,788 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:09:03,968 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:09:03,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 40 [2018-12-09 16:09:03,968 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-12-09 16:09:03,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-12-09 16:09:03,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1442, Unknown=8, NotChecked=234, Total=1806 [2018-12-09 16:09:03,969 INFO L87 Difference]: Start difference. First operand 101 states and 106 transitions. Second operand 41 states. [2018-12-09 16:09:07,492 WARN L180 SmtUtils]: Spent 1.35 s on a formula simplification that was a NOOP. DAG size: 24 [2018-12-09 16:09:14,032 WARN L180 SmtUtils]: Spent 4.02 s on a formula simplification. DAG size of input: 22 DAG size of output: 15 [2018-12-09 16:09:16,094 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-12-09 16:09:20,064 WARN L180 SmtUtils]: Spent 3.85 s on a formula simplification that was a NOOP. DAG size: 35 [2018-12-09 16:09:25,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:09:25,484 INFO L93 Difference]: Finished difference Result 108 states and 113 transitions. [2018-12-09 16:09:25,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-09 16:09:25,484 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 43 [2018-12-09 16:09:25,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:09:25,485 INFO L225 Difference]: With dead ends: 108 [2018-12-09 16:09:25,485 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 16:09:25,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 481 ImplicationChecksByTransitivity, 35.8s TimeCoverageRelationStatistics Valid=251, Invalid=2507, Unknown=10, NotChecked=312, Total=3080 [2018-12-09 16:09:25,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 16:09:25,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 100. [2018-12-09 16:09:25,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-09 16:09:25,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 104 transitions. [2018-12-09 16:09:25,488 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 104 transitions. Word has length 43 [2018-12-09 16:09:25,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:09:25,488 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 104 transitions. [2018-12-09 16:09:25,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-12-09 16:09:25,488 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 104 transitions. [2018-12-09 16:09:25,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 16:09:25,489 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:09:25,489 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:09:25,489 INFO L423 AbstractCegarLoop]: === Iteration 24 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:09:25,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:09:25,489 INFO L82 PathProgramCache]: Analyzing trace with hash 1683743134, now seen corresponding path program 1 times [2018-12-09 16:09:25,490 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:09:25,490 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:09:25,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:09:25,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:09:25,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:09:25,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:09:25,592 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:25,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:25,592 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 16:09:25,624 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 16:09:25,624 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:09:25,626 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:09:25,626 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 16:09:25,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 16:09:25,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 16:09:25,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-09 16:09:25,627 INFO L87 Difference]: Start difference. First operand 100 states and 104 transitions. Second operand 8 states. [2018-12-09 16:09:26,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:09:26,045 INFO L93 Difference]: Finished difference Result 115 states and 119 transitions. [2018-12-09 16:09:26,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 16:09:26,045 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-12-09 16:09:26,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:09:26,046 INFO L225 Difference]: With dead ends: 115 [2018-12-09 16:09:26,046 INFO L226 Difference]: Without dead ends: 115 [2018-12-09 16:09:26,046 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-12-09 16:09:26,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-09 16:09:26,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 109. [2018-12-09 16:09:26,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-12-09 16:09:26,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 114 transitions. [2018-12-09 16:09:26,048 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 114 transitions. Word has length 47 [2018-12-09 16:09:26,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:09:26,048 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 114 transitions. [2018-12-09 16:09:26,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 16:09:26,048 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 114 transitions. [2018-12-09 16:09:26,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 16:09:26,048 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:09:26,049 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:09:26,049 INFO L423 AbstractCegarLoop]: === Iteration 25 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:09:26,049 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:09:26,049 INFO L82 PathProgramCache]: Analyzing trace with hash 1683743135, now seen corresponding path program 1 times [2018-12-09 16:09:26,049 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:09:26,049 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:09:26,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:09:26,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:09:26,181 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:09:26,187 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:09:26,187 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:26,194 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:09:26,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:26,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:26,200 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:09:27,126 WARN L180 SmtUtils]: Spent 875.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 16:09:27,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:27,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:09:27,135 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:27,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:27,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:27,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:09:27,151 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:27,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:27,160 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:13 [2018-12-09 16:09:28,133 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:09:28,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:28,139 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:09:28,139 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:28,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:28,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:28,154 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:09:28,154 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:28,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:28,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 16:09:28,339 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 16:09:28,339 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:09:30,966 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:09:30,966 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:09:30,973 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:09:31,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:09:31,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:09:31,011 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:09:31,011 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:31,018 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:09:31,019 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:31,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:31,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:09:32,140 WARN L180 SmtUtils]: Spent 1.05 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 16:09:32,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,148 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:09:32,149 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:09:32,167 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,180 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:25 [2018-12-09 16:09:32,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:09:32,309 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-12-09 16:09:32,309 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,330 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:09:32,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:09:32,347 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:11 [2018-12-09 16:09:32,393 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 6 not checked. [2018-12-09 16:09:32,393 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:09:34,374 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 41 [2018-12-09 16:09:34,390 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:09:34,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18] total 20 [2018-12-09 16:09:34,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-09 16:09:34,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-09 16:09:34,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1014, Unknown=2, NotChecked=64, Total=1190 [2018-12-09 16:09:34,391 INFO L87 Difference]: Start difference. First operand 109 states and 114 transitions. Second operand 21 states. [2018-12-09 16:09:37,073 WARN L180 SmtUtils]: Spent 2.48 s on a formula simplification. DAG size of input: 33 DAG size of output: 23 [2018-12-09 16:10:08,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:08,238 INFO L93 Difference]: Finished difference Result 132 states and 138 transitions. [2018-12-09 16:10:08,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 16:10:08,239 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 47 [2018-12-09 16:10:08,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:08,239 INFO L225 Difference]: With dead ends: 132 [2018-12-09 16:10:08,239 INFO L226 Difference]: Without dead ends: 132 [2018-12-09 16:10:08,239 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 100 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=177, Invalid=1547, Unknown=2, NotChecked=80, Total=1806 [2018-12-09 16:10:08,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-09 16:10:08,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 109. [2018-12-09 16:10:08,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-12-09 16:10:08,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 113 transitions. [2018-12-09 16:10:08,242 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 113 transitions. Word has length 47 [2018-12-09 16:10:08,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:08,242 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 113 transitions. [2018-12-09 16:10:08,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-09 16:10:08,242 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 113 transitions. [2018-12-09 16:10:08,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 16:10:08,242 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:08,242 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:08,242 INFO L423 AbstractCegarLoop]: === Iteration 26 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:08,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:08,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1880256639, now seen corresponding path program 1 times [2018-12-09 16:10:08,243 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:08,243 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:08,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:08,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:08,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:08,300 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:10:08,300 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:08,301 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:08,302 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:10:08,302 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:10:08,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:10:08,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:10:08,302 INFO L87 Difference]: Start difference. First operand 109 states and 113 transitions. Second operand 5 states. [2018-12-09 16:10:08,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:08,321 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2018-12-09 16:10:08,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:10:08,321 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-12-09 16:10:08,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:08,321 INFO L225 Difference]: With dead ends: 110 [2018-12-09 16:10:08,322 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 16:10:08,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:10:08,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 16:10:08,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2018-12-09 16:10:08,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 16:10:08,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 110 transitions. [2018-12-09 16:10:08,323 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 110 transitions. Word has length 47 [2018-12-09 16:10:08,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:08,323 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 110 transitions. [2018-12-09 16:10:08,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:10:08,324 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 110 transitions. [2018-12-09 16:10:08,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 16:10:08,324 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:08,324 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:08,324 INFO L423 AbstractCegarLoop]: === Iteration 27 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:08,324 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:08,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1240788270, now seen corresponding path program 1 times [2018-12-09 16:10:08,324 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:08,324 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:08,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:08,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:08,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:08,474 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:10:08,474 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:08,474 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:08,474 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 16:10:09,263 WARN L854 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)) (= (store |c_old(#valid)| |ldv_malloc_#t~malloc12.base| (_ bv1 1)) |c_#valid|))) is different from true [2018-12-09 16:10:09,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:09,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:09,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:10:09,269 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:09,279 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:09,279 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-12-09 16:10:09,346 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 16:10:09,346 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:09,348 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:09,349 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 16:10:09,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 16:10:09,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 16:10:09,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=57, Unknown=1, NotChecked=14, Total=90 [2018-12-09 16:10:09,349 INFO L87 Difference]: Start difference. First operand 108 states and 110 transitions. Second operand 10 states. [2018-12-09 16:10:09,899 WARN L180 SmtUtils]: Spent 312.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-09 16:10:10,561 WARN L180 SmtUtils]: Spent 638.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2018-12-09 16:10:10,900 WARN L180 SmtUtils]: Spent 309.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-12-09 16:10:13,716 WARN L180 SmtUtils]: Spent 759.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2018-12-09 16:10:14,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:14,031 INFO L93 Difference]: Finished difference Result 111 states and 113 transitions. [2018-12-09 16:10:14,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 16:10:14,032 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-12-09 16:10:14,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:14,032 INFO L225 Difference]: With dead ends: 111 [2018-12-09 16:10:14,032 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 16:10:14,032 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=42, Invalid=143, Unknown=1, NotChecked=24, Total=210 [2018-12-09 16:10:14,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 16:10:14,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 107. [2018-12-09 16:10:14,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-09 16:10:14,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 109 transitions. [2018-12-09 16:10:14,035 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 109 transitions. Word has length 48 [2018-12-09 16:10:14,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:14,035 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 109 transitions. [2018-12-09 16:10:14,035 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 16:10:14,035 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 109 transitions. [2018-12-09 16:10:14,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 16:10:14,035 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:14,035 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:14,036 INFO L423 AbstractCegarLoop]: === Iteration 28 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:14,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:14,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1240788271, now seen corresponding path program 1 times [2018-12-09 16:10:14,036 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:14,036 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:14,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:14,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:14,227 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:14,232 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:10:14,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:14,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:10:14,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:14,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:14,249 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:10:15,307 WARN L180 SmtUtils]: Spent 1.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-12-09 16:10:15,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:15,316 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:10:15,316 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:15,331 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:15,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:15,332 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:10:15,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:15,340 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:15,340 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:15 [2018-12-09 16:10:16,343 WARN L854 $PredicateComparison]: unable to prove that (exists ((ldv_malloc_~size (_ BitVec 32)) (|ldv_malloc_#t~malloc12.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc12.base| ldv_malloc_~size)) (= (select |c_old(#valid)| |ldv_malloc_#t~malloc12.base|) (_ bv0 1)))) is different from true [2018-12-09 16:10:16,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:10:16,351 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,367 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:10:16,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,376 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-12-09 16:10:16,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,439 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:10:16,439 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:16,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:10:16,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,462 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:16,462 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-12-09 16:10:16,562 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 8 not checked. [2018-12-09 16:10:16,562 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:10:17,210 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:10:17,210 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:10:17,216 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:17,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:17,256 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:17,259 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:10:17,260 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:17,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:10:17,267 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:17,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:17,275 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-12-09 16:10:18,386 WARN L180 SmtUtils]: Spent 1.05 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-09 16:10:18,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,394 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:10:18,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,412 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-12-09 16:10:18,412 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,425 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:27 [2018-12-09 16:10:18,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,558 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-12-09 16:10:18,558 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,584 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,585 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-12-09 16:10:18,585 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,601 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:11 [2018-12-09 16:10:18,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,652 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-12-09 16:10:18,652 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:18,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-12-09 16:10:18,667 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:18,676 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-12-09 16:10:18,685 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 8 not checked. [2018-12-09 16:10:18,685 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:10:18,890 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:10:18,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18] total 20 [2018-12-09 16:10:18,890 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-09 16:10:18,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-09 16:10:18,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=585, Unknown=1, NotChecked=48, Total=702 [2018-12-09 16:10:18,891 INFO L87 Difference]: Start difference. First operand 107 states and 109 transitions. Second operand 21 states. [2018-12-09 16:10:21,642 WARN L180 SmtUtils]: Spent 2.60 s on a formula simplification. DAG size of input: 33 DAG size of output: 23 [2018-12-09 16:10:38,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:38,303 INFO L93 Difference]: Finished difference Result 128 states and 132 transitions. [2018-12-09 16:10:38,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-09 16:10:38,303 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 48 [2018-12-09 16:10:38,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:38,304 INFO L225 Difference]: With dead ends: 128 [2018-12-09 16:10:38,304 INFO L226 Difference]: Without dead ends: 128 [2018-12-09 16:10:38,304 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=125, Invalid=1068, Unknown=1, NotChecked=66, Total=1260 [2018-12-09 16:10:38,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-09 16:10:38,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 106. [2018-12-09 16:10:38,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 16:10:38,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 108 transitions. [2018-12-09 16:10:38,307 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 108 transitions. Word has length 48 [2018-12-09 16:10:38,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:38,307 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 108 transitions. [2018-12-09 16:10:38,307 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-09 16:10:38,307 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2018-12-09 16:10:38,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 16:10:38,307 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:38,308 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:38,308 INFO L423 AbstractCegarLoop]: === Iteration 29 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:38,308 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:38,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1959437562, now seen corresponding path program 1 times [2018-12-09 16:10:38,308 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:38,308 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:38,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:38,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:38,367 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:38,378 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:10:38,378 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:38,380 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:38,380 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 16:10:38,380 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:10:38,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:10:38,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:10:38,380 INFO L87 Difference]: Start difference. First operand 106 states and 108 transitions. Second operand 5 states. [2018-12-09 16:10:38,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:38,418 INFO L93 Difference]: Finished difference Result 105 states and 107 transitions. [2018-12-09 16:10:38,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:10:38,418 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-12-09 16:10:38,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:38,419 INFO L225 Difference]: With dead ends: 105 [2018-12-09 16:10:38,419 INFO L226 Difference]: Without dead ends: 105 [2018-12-09 16:10:38,419 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:10:38,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-09 16:10:38,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-09 16:10:38,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 16:10:38,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 107 transitions. [2018-12-09 16:10:38,420 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 107 transitions. Word has length 53 [2018-12-09 16:10:38,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:38,421 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 107 transitions. [2018-12-09 16:10:38,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:10:38,421 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 107 transitions. [2018-12-09 16:10:38,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-09 16:10:38,421 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:38,421 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:38,421 INFO L423 AbstractCegarLoop]: === Iteration 30 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:38,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:38,422 INFO L82 PathProgramCache]: Analyzing trace with hash -613022222, now seen corresponding path program 1 times [2018-12-09 16:10:38,422 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:38,422 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:38,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:38,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:38,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:38,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:10:38,555 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:38,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:38,558 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:10:38,579 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:10:38,580 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:38,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:38,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 16:10:38,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:10:38,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:10:38,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:10:38,582 INFO L87 Difference]: Start difference. First operand 105 states and 107 transitions. Second operand 6 states. [2018-12-09 16:10:38,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:38,828 INFO L93 Difference]: Finished difference Result 122 states and 128 transitions. [2018-12-09 16:10:38,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:10:38,829 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2018-12-09 16:10:38,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:38,830 INFO L225 Difference]: With dead ends: 122 [2018-12-09 16:10:38,830 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 16:10:38,830 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 16:10:38,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 16:10:38,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 104. [2018-12-09 16:10:38,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 16:10:38,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2018-12-09 16:10:38,833 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 54 [2018-12-09 16:10:38,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:38,833 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2018-12-09 16:10:38,833 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:10:38,833 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2018-12-09 16:10:38,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 16:10:38,833 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:38,834 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:38,834 INFO L423 AbstractCegarLoop]: === Iteration 31 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:38,834 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:38,834 INFO L82 PathProgramCache]: Analyzing trace with hash -1858618114, now seen corresponding path program 1 times [2018-12-09 16:10:38,834 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:38,834 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:38,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:38,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:38,954 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:38,957 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:10:38,957 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:38,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:38,958 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 16:10:39,039 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 16:10:39,039 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:39,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:39,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 16:10:39,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 16:10:39,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 16:10:39,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-09 16:10:39,042 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 13 states. [2018-12-09 16:10:39,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:39,869 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2018-12-09 16:10:39,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 16:10:39,869 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-12-09 16:10:39,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:39,870 INFO L225 Difference]: With dead ends: 139 [2018-12-09 16:10:39,870 INFO L226 Difference]: Without dead ends: 139 [2018-12-09 16:10:39,870 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 49 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2018-12-09 16:10:39,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-09 16:10:39,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 126. [2018-12-09 16:10:39,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-12-09 16:10:39,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 131 transitions. [2018-12-09 16:10:39,879 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 131 transitions. Word has length 62 [2018-12-09 16:10:39,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:39,880 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 131 transitions. [2018-12-09 16:10:39,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 16:10:39,880 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 131 transitions. [2018-12-09 16:10:39,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 16:10:39,880 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:39,880 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:39,880 INFO L423 AbstractCegarLoop]: === Iteration 32 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:39,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:39,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1858618113, now seen corresponding path program 1 times [2018-12-09 16:10:39,881 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:39,881 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:39,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:40,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:40,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:40,455 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:10:40,455 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:10:41,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-12-09 16:10:41,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:41,399 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-12-09 16:10:41,399 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:41,415 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-12-09 16:10:41,416 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-12-09 16:10:43,214 WARN L180 SmtUtils]: Spent 305.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 44 [2018-12-09 16:10:43,484 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:10:43,486 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:10:43,486 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:10:43,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:43,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:43,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:44,922 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:10:44,922 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:10:45,185 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-12-09 16:10:45,185 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:45,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-12-09 16:10:45,218 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:45,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:45,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:67, output treesize:14 [2018-12-09 16:10:48,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 44 [2018-12-09 16:10:48,944 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-12-09 16:10:49,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2018-12-09 16:10:49,073 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:49,170 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-12-09 16:10:49,170 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:96 [2018-12-09 16:10:49,704 WARN L180 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 31 [2018-12-09 16:10:50,162 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:10:50,177 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:10:50,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 20, 19] total 48 [2018-12-09 16:10:50,177 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-12-09 16:10:50,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-12-09 16:10:50,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=2174, Unknown=1, NotChecked=0, Total=2352 [2018-12-09 16:10:50,178 INFO L87 Difference]: Start difference. First operand 126 states and 131 transitions. Second operand 49 states. [2018-12-09 16:10:57,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:10:57,379 INFO L93 Difference]: Finished difference Result 127 states and 131 transitions. [2018-12-09 16:10:57,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-12-09 16:10:57,380 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 62 [2018-12-09 16:10:57,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:10:57,381 INFO L225 Difference]: With dead ends: 127 [2018-12-09 16:10:57,381 INFO L226 Difference]: Without dead ends: 127 [2018-12-09 16:10:57,382 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 268 GetRequests, 193 SyntacticMatches, 9 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1003 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=385, Invalid=4170, Unknown=1, NotChecked=0, Total=4556 [2018-12-09 16:10:57,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-09 16:10:57,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-12-09 16:10:57,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-12-09 16:10:57,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 129 transitions. [2018-12-09 16:10:57,384 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 129 transitions. Word has length 62 [2018-12-09 16:10:57,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:10:57,384 INFO L480 AbstractCegarLoop]: Abstraction has 125 states and 129 transitions. [2018-12-09 16:10:57,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-12-09 16:10:57,384 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 129 transitions. [2018-12-09 16:10:57,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-09 16:10:57,384 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:10:57,384 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:10:57,385 INFO L423 AbstractCegarLoop]: === Iteration 33 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:10:57,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:10:57,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1947796072, now seen corresponding path program 1 times [2018-12-09 16:10:57,385 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:10:57,385 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:10:57,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:10:57,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:10:57,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:10:57,554 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-12-09 16:10:57,554 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:57,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:10:57,555 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-12-09 16:10:57,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:57,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:57,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-12-09 16:10:57,672 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:57,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:57,681 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:24, output treesize:23 [2018-12-09 16:10:57,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:57,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 16:10:57,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-12-09 16:10:57,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:10:57,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 16:10:57,719 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:13 [2018-12-09 16:10:58,003 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 16:10:58,003 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 16:10:58,006 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 16:10:58,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-12-09 16:10:58,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-09 16:10:58,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-09 16:10:58,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=378, Unknown=0, NotChecked=0, Total=420 [2018-12-09 16:10:58,007 INFO L87 Difference]: Start difference. First operand 125 states and 129 transitions. Second operand 21 states. [2018-12-09 16:11:02,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:02,055 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2018-12-09 16:11:02,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-09 16:11:02,055 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-12-09 16:11:02,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:02,056 INFO L225 Difference]: With dead ends: 132 [2018-12-09 16:11:02,056 INFO L226 Difference]: Without dead ends: 132 [2018-12-09 16:11:02,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=112, Invalid=1078, Unknown=0, NotChecked=0, Total=1190 [2018-12-09 16:11:02,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-09 16:11:02,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 102. [2018-12-09 16:11:02,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-12-09 16:11:02,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 104 transitions. [2018-12-09 16:11:02,057 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 104 transitions. Word has length 64 [2018-12-09 16:11:02,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:02,058 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 104 transitions. [2018-12-09 16:11:02,058 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-09 16:11:02,058 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2018-12-09 16:11:02,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-09 16:11:02,058 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:02,058 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:02,058 INFO L423 AbstractCegarLoop]: === Iteration 34 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:02,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:02,058 INFO L82 PathProgramCache]: Analyzing trace with hash -574918422, now seen corresponding path program 1 times [2018-12-09 16:11:02,058 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:02,059 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:02,072 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:02,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:02,179 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:02,241 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 16:11:02,243 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 16:11:02,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 16:11:02,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-09 16:11:02,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:11:02,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,827 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:02,828 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-09 16:11:02,890 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:02,891 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:04,275 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:04,277 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:04,277 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,279 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-09 16:11:04,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-09 16:11:04,488 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:04,491 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:04,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,493 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:04,501 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:04,680 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:04,683 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:04,683 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:04,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:04,694 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:04,803 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 16:11:04,805 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 16:11:04,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [22] total 35 [2018-12-09 16:11:04,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-09 16:11:04,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-09 16:11:04,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=1168, Unknown=0, NotChecked=0, Total=1260 [2018-12-09 16:11:04,806 INFO L87 Difference]: Start difference. First operand 102 states and 104 transitions. Second operand 36 states. [2018-12-09 16:11:08,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:08,085 INFO L93 Difference]: Finished difference Result 139 states and 141 transitions. [2018-12-09 16:11:08,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-12-09 16:11:08,085 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-12-09 16:11:08,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:08,086 INFO L225 Difference]: With dead ends: 139 [2018-12-09 16:11:08,086 INFO L226 Difference]: Without dead ends: 139 [2018-12-09 16:11:08,087 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 405 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=194, Invalid=2562, Unknown=0, NotChecked=0, Total=2756 [2018-12-09 16:11:08,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-09 16:11:08,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 124. [2018-12-09 16:11:08,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-09 16:11:08,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 128 transitions. [2018-12-09 16:11:08,089 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 128 transitions. Word has length 71 [2018-12-09 16:11:08,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:08,090 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 128 transitions. [2018-12-09 16:11:08,090 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-09 16:11:08,090 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 128 transitions. [2018-12-09 16:11:08,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-09 16:11:08,090 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:08,090 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:08,091 INFO L423 AbstractCegarLoop]: === Iteration 35 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:08,091 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:08,091 INFO L82 PathProgramCache]: Analyzing trace with hash -642601829, now seen corresponding path program 1 times [2018-12-09 16:11:08,091 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:08,091 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:08,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:08,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:08,213 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:08,294 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 16:11:08,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 16:11:08,296 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,301 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 16:11:08,877 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-09 16:11:08,879 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-12-09 16:11:08,879 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:11:08,889 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,892 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,893 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:08,893 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-09 16:11:08,991 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:08,991 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:10,461 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:10,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:10,463 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,465 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-12-09 16:11:10,469 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:7 [2018-12-09 16:11:10,681 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:10,683 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:10,683 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:10,693 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:10,878 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:10,881 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:10,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:10,893 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:10,893 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:11,001 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-09 16:11:11,004 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 16:11:11,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [24] total 37 [2018-12-09 16:11:11,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-12-09 16:11:11,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-12-09 16:11:11,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1238, Unknown=0, NotChecked=0, Total=1332 [2018-12-09 16:11:11,005 INFO L87 Difference]: Start difference. First operand 124 states and 128 transitions. Second operand 37 states. [2018-12-09 16:11:13,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:13,623 INFO L93 Difference]: Finished difference Result 139 states and 140 transitions. [2018-12-09 16:11:13,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-12-09 16:11:13,624 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 72 [2018-12-09 16:11:13,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:13,624 INFO L225 Difference]: With dead ends: 139 [2018-12-09 16:11:13,625 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 16:11:13,625 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 379 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=194, Invalid=2458, Unknown=0, NotChecked=0, Total=2652 [2018-12-09 16:11:13,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 16:11:13,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 122. [2018-12-09 16:11:13,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-09 16:11:13,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 124 transitions. [2018-12-09 16:11:13,628 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 124 transitions. Word has length 72 [2018-12-09 16:11:13,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:13,628 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 124 transitions. [2018-12-09 16:11:13,628 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-12-09 16:11:13,628 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2018-12-09 16:11:13,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 16:11:13,629 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:13,629 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:13,629 INFO L423 AbstractCegarLoop]: === Iteration 36 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:13,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:13,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1554367744, now seen corresponding path program 1 times [2018-12-09 16:11:13,629 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:13,630 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:13,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:13,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:13,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:13,696 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:13,697 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:13,726 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:13,728 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:11:13,728 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:11:13,734 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:13,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:13,759 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:13,762 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:13,762 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:13,792 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:13,807 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-09 16:11:13,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4] total 4 [2018-12-09 16:11:13,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 16:11:13,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 16:11:13,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:11:13,808 INFO L87 Difference]: Start difference. First operand 122 states and 124 transitions. Second operand 5 states. [2018-12-09 16:11:13,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:13,829 INFO L93 Difference]: Finished difference Result 121 states and 123 transitions. [2018-12-09 16:11:13,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 16:11:13,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-09 16:11:13,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:13,830 INFO L225 Difference]: With dead ends: 121 [2018-12-09 16:11:13,830 INFO L226 Difference]: Without dead ends: 121 [2018-12-09 16:11:13,830 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 290 GetRequests, 287 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 16:11:13,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-09 16:11:13,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-12-09 16:11:13,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-12-09 16:11:13,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 123 transitions. [2018-12-09 16:11:13,831 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 123 transitions. Word has length 73 [2018-12-09 16:11:13,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:13,832 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 123 transitions. [2018-12-09 16:11:13,832 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 16:11:13,832 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 123 transitions. [2018-12-09 16:11:13,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 16:11:13,832 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:13,832 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:13,833 INFO L423 AbstractCegarLoop]: === Iteration 37 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:13,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:13,833 INFO L82 PathProgramCache]: Analyzing trace with hash -933085808, now seen corresponding path program 1 times [2018-12-09 16:11:13,833 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:13,833 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:13,855 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:13,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:13,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:14,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 16:11:14,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 16:11:14,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,083 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-12-09 16:11:14,714 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-12-09 16:11:14,716 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-12-09 16:11:14,716 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,726 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-12-09 16:11:14,726 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,729 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:14,730 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:22, output treesize:3 [2018-12-09 16:11:14,792 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-09 16:11:14,792 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:16,346 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:16,348 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:16,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,357 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:16,357 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:10 [2018-12-09 16:11:16,582 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:16,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:16,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,594 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:16,594 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:16,803 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-09 16:11:16,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-09 16:11:16,806 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:16,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 16:11:16,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:25 [2018-12-09 16:11:16,987 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-12-09 16:11:16,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 16:11:16,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [24] total 37 [2018-12-09 16:11:16,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-09 16:11:16,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-09 16:11:16,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=1308, Unknown=0, NotChecked=0, Total=1406 [2018-12-09 16:11:16,990 INFO L87 Difference]: Start difference. First operand 121 states and 123 transitions. Second operand 38 states. [2018-12-09 16:11:20,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:20,018 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2018-12-09 16:11:20,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-12-09 16:11:20,019 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 73 [2018-12-09 16:11:20,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:20,019 INFO L225 Difference]: With dead ends: 120 [2018-12-09 16:11:20,019 INFO L226 Difference]: Without dead ends: 120 [2018-12-09 16:11:20,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=181, Invalid=2369, Unknown=0, NotChecked=0, Total=2550 [2018-12-09 16:11:20,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-09 16:11:20,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-12-09 16:11:20,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-12-09 16:11:20,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 122 transitions. [2018-12-09 16:11:20,021 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 122 transitions. Word has length 73 [2018-12-09 16:11:20,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:20,022 INFO L480 AbstractCegarLoop]: Abstraction has 120 states and 122 transitions. [2018-12-09 16:11:20,022 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-09 16:11:20,022 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2018-12-09 16:11:20,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 16:11:20,022 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:20,022 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:20,023 INFO L423 AbstractCegarLoop]: === Iteration 38 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:20,023 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:20,023 INFO L82 PathProgramCache]: Analyzing trace with hash 940759944, now seen corresponding path program 1 times [2018-12-09 16:11:20,023 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:20,023 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:20,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:20,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:20,141 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:20,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:11:20,144 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:20,145 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:20,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:11:20,168 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:11:20,168 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:20,193 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 16:11:20,193 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 16:11:20,200 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:20,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 16:11:20,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 16:11:20,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 16:11:20,228 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 16:11:20,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 16:11:20,229 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 16:11:20,233 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-09 16:11:20,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 16:11:20,273 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 16:11:20,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-12-09 16:11:20,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 16:11:20,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 16:11:20,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-09 16:11:20,273 INFO L87 Difference]: Start difference. First operand 120 states and 122 transitions. Second operand 6 states. [2018-12-09 16:11:20,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 16:11:20,528 INFO L93 Difference]: Finished difference Result 124 states and 126 transitions. [2018-12-09 16:11:20,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 16:11:20,528 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2018-12-09 16:11:20,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 16:11:20,529 INFO L225 Difference]: With dead ends: 124 [2018-12-09 16:11:20,529 INFO L226 Difference]: Without dead ends: 124 [2018-12-09 16:11:20,529 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 156 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=26, Unknown=4, NotChecked=0, Total=42 [2018-12-09 16:11:20,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-12-09 16:11:20,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-12-09 16:11:20,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-09 16:11:20,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 124 transitions. [2018-12-09 16:11:20,531 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 124 transitions. Word has length 74 [2018-12-09 16:11:20,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 16:11:20,531 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 124 transitions. [2018-12-09 16:11:20,531 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 16:11:20,531 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2018-12-09 16:11:20,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 16:11:20,532 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 16:11:20,532 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 16:11:20,532 INFO L423 AbstractCegarLoop]: === Iteration 39 === [alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err4REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, entry_pointErr2REQUIRES_VIOLATION]=== [2018-12-09 16:11:20,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 16:11:20,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1139111093, now seen corresponding path program 1 times [2018-12-09 16:11:20,532 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 16:11:20,532 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/cvc4 Starting monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 16:11:20,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 16:11:20,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 16:11:21,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 16:11:21,218 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 16:11:21,238 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 16:11:21,239 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 16:11:21,248 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 04:11:21 BoogieIcfgContainer [2018-12-09 16:11:21,248 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 16:11:21,248 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 16:11:21,248 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 16:11:21,249 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 16:11:21,249 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 04:05:00" (3/4) ... [2018-12-09 16:11:21,250 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 16:11:21,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 16:11:21,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 16:11:21,293 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_b1e8d386-6fcb-475e-afe0-c148ccba874c/bin-2019/utaipan/witness.graphml [2018-12-09 16:11:21,293 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 16:11:21,293 INFO L168 Benchmark]: Toolchain (without parser) took 381395.96 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 167.8 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -116.2 MB). Peak memory consumption was 51.5 MB. Max. memory is 11.5 GB. [2018-12-09 16:11:21,293 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: CACSL2BoogieTranslator took 344.11 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -168.5 MB). Peak memory consumption was 39.3 MB. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: Boogie Preprocessor took 18.83 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: RCFGBuilder took 289.13 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.8 MB). Peak memory consumption was 44.8 MB. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: TraceAbstraction took 380675.24 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 26.7 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.5 MB). Peak memory consumption was 34.2 MB. Max. memory is 11.5 GB. [2018-12-09 16:11:21,294 INFO L168 Benchmark]: Witness Printer took 44.37 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 16:11:21,295 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 344.11 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -168.5 MB). Peak memory consumption was 39.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 21.59 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 18.83 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 289.13 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 44.8 MB). Peak memory consumption was 44.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 380675.24 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 26.7 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.5 MB). Peak memory consumption was 34.2 MB. Max. memory is 11.5 GB. * Witness Printer took 44.37 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1486]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={1114772347:0}] [L1514] CALL entry_point() VAL [ldv_global_msg_list={1114772347:0}] [L1491] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={1114772347:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={-1343361123:0}, ldv_global_msg_list={1114772347:0}, malloc(size)={-1343361123:0}, size=20] [L1491] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={1114772347:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={-1343361123:0}] [L1491] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1492] COND FALSE !(!c11) VAL [c11={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1494] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={1114772347:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1089599296:0}, ldv_global_msg_list={1114772347:0}, malloc(size)={-1089599296:0}, size=4] [L1494] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={-1343361123:0}, ldv_global_msg_list={1114772347:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={-1089599296:0}] [L1493-L1494] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1495] COND FALSE !(!cfg) VAL [c11={-1343361123:0}, cfg={-1089599296:0}, ldv_global_msg_list={1114772347:0}] [L1496] c11->dev.platform_data = cfg VAL [c11={-1343361123:0}, cfg={-1089599296:0}, ldv_global_msg_list={1114772347:0}] [L1498] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={1114772347:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={-1123653551:0}, ldv_global_msg_list={1114772347:0}, malloc(size)={-1123653551:0}, size=4] [L1498] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={-1343361123:0}, cfg={-1089599296:0}, ldv_global_msg_list={1114772347:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={-1123653551:0}] [L1497-L1498] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1499] COND FALSE !(!fe) VAL [c11={-1343361123:0}, cfg={-1089599296:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}] [L1500] cfg->fe = fe VAL [c11={-1343361123:0}, cfg={-1089599296:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}] [L1501] CALL alloc_2_11(c11) VAL [client={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1470] EXPR client->dev.platform_data VAL [client={-1343361123:0}, client={-1343361123:0}, client->dev.platform_data={-1089599296:0}, ldv_global_msg_list={1114772347:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={-1089599296:0}, cfg->fe={-1123653551:0}, client={-1343361123:0}, client={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={1114772347:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={1114772346:0}, ldv_global_msg_list={1114772347:0}, malloc(size)={1114772346:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, ldv_malloc(sizeof(struct Data11))={1114772346:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1474] fe->tuner_priv = priv VAL [cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1475] CALL ldv_i2c_set_clientdata(client, priv) VAL [data={1114772346:0}, dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={1114772346:0}, dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1198] dev->driver_data = data VAL [data={1114772346:0}, data={1114772346:0}, dev={-1343361123:0}, dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={1114772346:0}, data={1114772346:0}, dev={-1343361123:0}, dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1475] RET ldv_i2c_set_clientdata(client, priv) VAL [cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1476] free(priv) VAL [cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1476] free(priv) [L1477] return 0; VAL [\result=0, cfg={-1089599296:0}, client={-1343361123:0}, client={-1343361123:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1501] RET alloc_2_11(c11) VAL [alloc_2_11(c11)=0, c11={-1343361123:0}, cfg={-1089599296:0}, fe={-1123653551:0}, ldv_global_msg_list={1114772347:0}] [L1502] CALL free_11(c11) VAL [client={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1484] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={-1343361123:0}, ldv_global_msg_list={1114772347:0}] [L1193] EXPR dev->driver_data VAL [dev={-1343361123:0}, dev={-1343361123:0}, dev->driver_data={1114772346:0}, ldv_global_msg_list={1114772347:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={-1343361123:0}, dev={-1343361123:0}, ldv_dev_get_drvdata(&dev->dev)={1114772346:0}, ldv_global_msg_list={1114772347:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1484] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={-1343361123:0}, client={-1343361123:0}, ldv_global_msg_list={1114772347:0}, ldv_i2c_get_clientdata(client)={1114772346:0}] [L1484] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1485] COND TRUE \read(*priv) VAL [client={-1343361123:0}, client={-1343361123:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1486] free(priv) VAL [client={-1343361123:0}, client={-1343361123:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] [L1486] free(priv) VAL [client={-1343361123:0}, client={-1343361123:0}, ldv_global_msg_list={1114772347:0}, priv={1114772346:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 103 locations, 25 error locations. UNSAFE Result, 380.6s OverallTime, 39 OverallIterations, 4 TraceHistogramMax, 252.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3069 SDtfs, 2571 SDslu, 16425 SDs, 0 SdLazy, 18830 SolverSat, 920 SolverUnsat, 180 SolverUnknown, 0 SolverNotchecked, 170.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3386 GetRequests, 2603 SyntacticMatches, 56 SemanticMatches, 727 ConstructedPredicates, 24 IntricatePredicates, 1 DeprecatedPredicates, 4583 ImplicationChecksByTransitivity, 189.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=126occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 633 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 122.8s InterpolantComputationTime, 2367 NumberOfCodeBlocks, 2367 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 3002 ConstructedInterpolants, 254 QuantifiedInterpolants, 852362 SizeOfPredicates, 444 NumberOfNonLiveVariables, 9002 ConjunctsInSsa, 1213 ConjunctsInUnsatCore, 75 InterpolantComputations, 19 PerfectInterpolantSequences, 830/1140 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...