./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 17:39:00,159 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 17:39:00,160 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 17:39:00,166 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 17:39:00,166 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 17:39:00,167 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 17:39:00,167 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 17:39:00,168 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 17:39:00,169 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 17:39:00,169 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 17:39:00,170 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 17:39:00,170 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 17:39:00,170 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 17:39:00,171 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 17:39:00,171 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 17:39:00,172 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 17:39:00,172 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 17:39:00,173 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 17:39:00,174 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 17:39:00,174 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 17:39:00,175 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 17:39:00,176 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 17:39:00,177 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 17:39:00,177 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 17:39:00,177 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 17:39:00,177 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 17:39:00,178 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 17:39:00,178 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 17:39:00,179 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 17:39:00,179 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 17:39:00,179 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 17:39:00,180 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 17:39:00,180 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 17:39:00,180 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 17:39:00,180 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 17:39:00,181 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 17:39:00,181 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-12-08 17:39:00,188 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 17:39:00,188 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 17:39:00,189 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 17:39:00,189 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 17:39:00,189 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 17:39:00,190 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-08 17:39:00,190 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-08 17:39:00,190 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 17:39:00,190 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 17:39:00,190 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 17:39:00,190 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 17:39:00,190 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 17:39:00,191 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 17:39:00,191 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:39:00,192 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 17:39:00,192 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-08 17:39:00,210 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 17:39:00,219 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 17:39:00,222 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 17:39:00,223 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 17:39:00,223 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 17:39:00,224 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:00,271 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/7fcff52bb/233c0d1b4d604b529f0acad6aa59e054/FLAG38b3a28b5 [2018-12-08 17:39:00,710 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 17:39:00,711 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:00,720 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/7fcff52bb/233c0d1b4d604b529f0acad6aa59e054/FLAG38b3a28b5 [2018-12-08 17:39:00,732 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/7fcff52bb/233c0d1b4d604b529f0acad6aa59e054 [2018-12-08 17:39:00,734 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 17:39:00,735 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 17:39:00,736 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 17:39:00,736 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 17:39:00,739 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 17:39:00,739 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:39:00" (1/1) ... [2018-12-08 17:39:00,742 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33416e95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:00, skipping insertion in model container [2018-12-08 17:39:00,742 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:39:00" (1/1) ... [2018-12-08 17:39:00,748 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 17:39:00,769 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 17:39:00,986 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:39:00,995 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 17:39:01,031 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:39:01,074 INFO L195 MainTranslator]: Completed translation [2018-12-08 17:39:01,074 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01 WrapperNode [2018-12-08 17:39:01,075 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 17:39:01,075 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 17:39:01,075 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 17:39:01,075 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 17:39:01,081 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,092 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,097 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 17:39:01,097 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 17:39:01,098 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 17:39:01,098 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 17:39:01,103 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,103 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,106 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,106 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,113 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,115 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,117 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... [2018-12-08 17:39:01,118 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 17:39:01,119 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 17:39:01,119 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 17:39:01,119 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 17:39:01,119 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:39:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 17:39:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 17:39:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 17:39:01,150 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 17:39:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 17:39:01,150 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 17:39:01,150 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 17:39:01,151 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 17:39:01,151 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 17:39:01,152 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-08 17:39:01,152 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 17:39:01,153 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 17:39:01,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 17:39:01,317 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 17:39:01,398 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 17:39:01,398 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 17:39:01,398 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:39:01 BoogieIcfgContainer [2018-12-08 17:39:01,398 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 17:39:01,399 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 17:39:01,399 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 17:39:01,401 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 17:39:01,401 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 05:39:00" (1/3) ... [2018-12-08 17:39:01,401 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@595ed087 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:39:01, skipping insertion in model container [2018-12-08 17:39:01,401 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:01" (2/3) ... [2018-12-08 17:39:01,402 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@595ed087 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:39:01, skipping insertion in model container [2018-12-08 17:39:01,402 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:39:01" (3/3) ... [2018-12-08 17:39:01,403 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:01,409 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 17:39:01,413 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-08 17:39:01,422 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-08 17:39:01,437 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 17:39:01,437 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 17:39:01,437 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 17:39:01,437 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 17:39:01,437 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 17:39:01,438 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 17:39:01,438 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 17:39:01,438 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 17:39:01,448 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-12-08 17:39:01,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:01,453 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:01,454 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:01,455 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:01,459 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:01,459 INFO L82 PathProgramCache]: Analyzing trace with hash 1378758445, now seen corresponding path program 1 times [2018-12-08 17:39:01,460 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:01,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:01,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,492 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:01,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:01,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:01,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:01,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 17:39:01,575 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:01,578 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:01,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:01,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:01,588 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-12-08 17:39:01,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:01,692 INFO L93 Difference]: Finished difference Result 157 states and 168 transitions. [2018-12-08 17:39:01,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:01,693 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 17:39:01,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:01,702 INFO L225 Difference]: With dead ends: 157 [2018-12-08 17:39:01,702 INFO L226 Difference]: Without dead ends: 154 [2018-12-08 17:39:01,703 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:01,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-08 17:39:01,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 148. [2018-12-08 17:39:01,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 17:39:01,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 159 transitions. [2018-12-08 17:39:01,735 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 159 transitions. Word has length 17 [2018-12-08 17:39:01,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:01,736 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 159 transitions. [2018-12-08 17:39:01,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:01,736 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 159 transitions. [2018-12-08 17:39:01,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:01,736 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:01,736 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:01,737 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:01,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:01,737 INFO L82 PathProgramCache]: Analyzing trace with hash 1378758446, now seen corresponding path program 1 times [2018-12-08 17:39:01,737 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:01,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,738 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:01,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,738 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:01,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:01,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:01,807 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:01,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:01,807 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:01,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:39:01,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:39:01,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:39:01,809 INFO L87 Difference]: Start difference. First operand 148 states and 159 transitions. Second operand 6 states. [2018-12-08 17:39:01,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:01,906 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-08 17:39:01,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:39:01,907 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 17:39:01,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:01,908 INFO L225 Difference]: With dead ends: 153 [2018-12-08 17:39:01,909 INFO L226 Difference]: Without dead ends: 153 [2018-12-08 17:39:01,909 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:01,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-08 17:39:01,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-12-08 17:39:01,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 17:39:01,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-12-08 17:39:01,919 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 17 [2018-12-08 17:39:01,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:01,919 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-12-08 17:39:01,919 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:39:01,919 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-12-08 17:39:01,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:01,920 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:01,920 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:01,920 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:01,921 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:01,921 INFO L82 PathProgramCache]: Analyzing trace with hash 1407387596, now seen corresponding path program 1 times [2018-12-08 17:39:01,921 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:01,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:01,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,923 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:01,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:01,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:01,961 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:01,961 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:01,961 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:01,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:01,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:01,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:01,962 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 5 states. [2018-12-08 17:39:01,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:01,976 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-12-08 17:39:01,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:01,976 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 17:39:01,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:01,978 INFO L225 Difference]: With dead ends: 147 [2018-12-08 17:39:01,978 INFO L226 Difference]: Without dead ends: 147 [2018-12-08 17:39:01,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:01,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-08 17:39:01,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-08 17:39:01,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-08 17:39:01,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-12-08 17:39:01,986 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 17 [2018-12-08 17:39:01,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:01,987 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-12-08 17:39:01,987 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:01,987 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-12-08 17:39:01,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-08 17:39:01,988 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:01,988 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:01,988 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:01,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:01,989 INFO L82 PathProgramCache]: Analyzing trace with hash -826274431, now seen corresponding path program 1 times [2018-12-08 17:39:01,989 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:01,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:01,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:01,990 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,022 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:02,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:02,022 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:02,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:02,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:02,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:02,023 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 5 states. [2018-12-08 17:39:02,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:02,044 INFO L93 Difference]: Finished difference Result 147 states and 154 transitions. [2018-12-08 17:39:02,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:02,044 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-08 17:39:02,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:02,045 INFO L225 Difference]: With dead ends: 147 [2018-12-08 17:39:02,045 INFO L226 Difference]: Without dead ends: 147 [2018-12-08 17:39:02,046 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:02,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-08 17:39:02,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-08 17:39:02,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-08 17:39:02,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 152 transitions. [2018-12-08 17:39:02,050 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 152 transitions. Word has length 29 [2018-12-08 17:39:02,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:02,051 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 152 transitions. [2018-12-08 17:39:02,051 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:02,051 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 152 transitions. [2018-12-08 17:39:02,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-08 17:39:02,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:02,051 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:02,051 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:02,052 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,052 INFO L82 PathProgramCache]: Analyzing trace with hash -1823346784, now seen corresponding path program 1 times [2018-12-08 17:39:02,052 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:02,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,053 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,125 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:02,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:39:02,125 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:02,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:39:02,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:39:02,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:39:02,126 INFO L87 Difference]: Start difference. First operand 145 states and 152 transitions. Second operand 9 states. [2018-12-08 17:39:02,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:02,181 INFO L93 Difference]: Finished difference Result 165 states and 173 transitions. [2018-12-08 17:39:02,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:39:02,181 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-08 17:39:02,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:02,182 INFO L225 Difference]: With dead ends: 165 [2018-12-08 17:39:02,182 INFO L226 Difference]: Without dead ends: 165 [2018-12-08 17:39:02,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:02,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-08 17:39:02,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-12-08 17:39:02,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 17:39:02,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-08 17:39:02,187 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 29 [2018-12-08 17:39:02,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:02,187 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-08 17:39:02,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:39:02,188 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-08 17:39:02,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 17:39:02,188 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:02,188 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:02,188 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:02,189 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,189 INFO L82 PathProgramCache]: Analyzing trace with hash 1811183393, now seen corresponding path program 1 times [2018-12-08 17:39:02,189 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:02,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,190 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,251 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:02,251 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 17:39:02,251 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:02,252 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:39:02,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:39:02,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:02,252 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 11 states. [2018-12-08 17:39:02,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:02,467 INFO L93 Difference]: Finished difference Result 158 states and 165 transitions. [2018-12-08 17:39:02,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:39:02,468 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-08 17:39:02,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:02,468 INFO L225 Difference]: With dead ends: 158 [2018-12-08 17:39:02,469 INFO L226 Difference]: Without dead ends: 158 [2018-12-08 17:39:02,469 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:39:02,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-08 17:39:02,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-12-08 17:39:02,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-08 17:39:02,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-08 17:39:02,473 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 32 [2018-12-08 17:39:02,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:02,473 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-08 17:39:02,473 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:39:02,473 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-08 17:39:02,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 17:39:02,474 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:02,474 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:02,474 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:02,474 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1811183394, now seen corresponding path program 1 times [2018-12-08 17:39:02,474 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:02,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,476 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,497 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:02,497 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 17:39:02,497 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:02,498 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 17:39:02,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 17:39:02,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 17:39:02,498 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-08 17:39:02,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:02,512 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-08 17:39:02,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 17:39:02,512 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 17:39:02,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:02,513 INFO L225 Difference]: With dead ends: 161 [2018-12-08 17:39:02,514 INFO L226 Difference]: Without dead ends: 159 [2018-12-08 17:39:02,514 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:02,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-08 17:39:02,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-08 17:39:02,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 17:39:02,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-08 17:39:02,519 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-08 17:39:02,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:02,520 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-08 17:39:02,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 17:39:02,520 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-08 17:39:02,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 17:39:02,521 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:02,521 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:02,521 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:02,521 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,521 INFO L82 PathProgramCache]: Analyzing trace with hash -1970935514, now seen corresponding path program 1 times [2018-12-08 17:39:02,521 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:02,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,523 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,557 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,557 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:02,557 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:02,558 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-12-08 17:39:02,559 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [58], [62], [66], [69], [71], [72], [76], [78], [79], [131], [134], [136], [137], [138], [160], [161], [162], [163], [164], [166], [172], [176], [182], [198], [199], [200] [2018-12-08 17:39:02,582 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:02,582 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:02,710 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:02,711 INFO L272 AbstractInterpreter]: Visited 33 different actions 41 times. Merged at 3 different actions 5 times. Never widened. Performed 352 root evaluator evaluations with a maximum evaluation depth of 4. Performed 352 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 2 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-08 17:39:02,717 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,718 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:02,718 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:02,718 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:02,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,726 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:02,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:02,777 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,777 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:02,838 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,853 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:02,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2018-12-08 17:39:02,853 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:02,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:39:02,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:39:02,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:39:02,854 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 6 states. [2018-12-08 17:39:02,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:02,870 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-12-08 17:39:02,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:02,870 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-08 17:39:02,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:02,871 INFO L225 Difference]: With dead ends: 162 [2018-12-08 17:39:02,871 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 17:39:02,872 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:39:02,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 17:39:02,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-12-08 17:39:02,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-08 17:39:02,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-12-08 17:39:02,876 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 33 [2018-12-08 17:39:02,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:02,877 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-12-08 17:39:02,877 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:39:02,877 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-12-08 17:39:02,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 17:39:02,877 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:02,878 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:02,878 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:02,878 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:02,878 INFO L82 PathProgramCache]: Analyzing trace with hash 1042462626, now seen corresponding path program 2 times [2018-12-08 17:39:02,878 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:02,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:02,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:02,879 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:02,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:02,925 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:02,926 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:02,926 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:02,926 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:02,926 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:02,926 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:02,926 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:02,935 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:02,935 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:02,953 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:02,953 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:02,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:02,977 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:02,978 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:02,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:02,988 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 17:39:03,113 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 17:39:03,114 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:03,302 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 17:39:03,317 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:39:03,318 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [6] total 27 [2018-12-08 17:39:03,318 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:03,318 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:39:03,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:39:03,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=630, Unknown=0, NotChecked=0, Total=702 [2018-12-08 17:39:03,318 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 13 states. [2018-12-08 17:39:03,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:03,650 INFO L93 Difference]: Finished difference Result 218 states and 227 transitions. [2018-12-08 17:39:03,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:39:03,650 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-12-08 17:39:03,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:03,651 INFO L225 Difference]: With dead ends: 218 [2018-12-08 17:39:03,651 INFO L226 Difference]: Without dead ends: 218 [2018-12-08 17:39:03,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 46 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=99, Invalid=831, Unknown=0, NotChecked=0, Total=930 [2018-12-08 17:39:03,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-12-08 17:39:03,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 159. [2018-12-08 17:39:03,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 17:39:03,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-08 17:39:03,656 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 34 [2018-12-08 17:39:03,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:03,656 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-08 17:39:03,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:39:03,656 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-08 17:39:03,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-08 17:39:03,657 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:03,657 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:03,657 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:03,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:03,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1557173335, now seen corresponding path program 1 times [2018-12-08 17:39:03,658 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:03,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:03,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:39:03,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:03,659 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:03,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:03,731 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-08 17:39:03,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:03,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 17:39:03,731 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:03,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:39:03,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:39:03,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:03,732 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 11 states. [2018-12-08 17:39:03,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:03,903 INFO L93 Difference]: Finished difference Result 157 states and 164 transitions. [2018-12-08 17:39:03,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:39:03,903 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 39 [2018-12-08 17:39:03,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:03,904 INFO L225 Difference]: With dead ends: 157 [2018-12-08 17:39:03,904 INFO L226 Difference]: Without dead ends: 157 [2018-12-08 17:39:03,904 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:39:03,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-08 17:39:03,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-12-08 17:39:03,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-08 17:39:03,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 164 transitions. [2018-12-08 17:39:03,907 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 164 transitions. Word has length 39 [2018-12-08 17:39:03,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:03,907 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 164 transitions. [2018-12-08 17:39:03,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:39:03,907 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 164 transitions. [2018-12-08 17:39:03,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-08 17:39:03,908 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:03,908 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:03,908 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:03,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:03,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1557173334, now seen corresponding path program 1 times [2018-12-08 17:39:03,908 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:03,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:03,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:03,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:03,909 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:03,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:03,930 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:03,930 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:03,930 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:03,930 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-12-08 17:39:03,930 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [58], [62], [66], [67], [70], [71], [72], [76], [78], [79], [123], [126], [131], [134], [136], [137], [138], [160], [161], [162], [163], [164], [166], [172], [176], [182], [183], [184], [198], [199], [200] [2018-12-08 17:39:03,931 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:03,931 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:03,977 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:03,977 INFO L272 AbstractInterpreter]: Visited 38 different actions 50 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 422 root evaluator evaluations with a maximum evaluation depth of 4. Performed 422 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 25 variables. [2018-12-08 17:39:03,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:03,979 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:03,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:03,979 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:03,986 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:03,986 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:04,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:04,005 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:04,011 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:04,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:04,074 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:04,089 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:04,089 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2018-12-08 17:39:04,090 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:04,090 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 17:39:04,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 17:39:04,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:04,090 INFO L87 Difference]: Start difference. First operand 157 states and 164 transitions. Second operand 7 states. [2018-12-08 17:39:04,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:04,105 INFO L93 Difference]: Finished difference Result 160 states and 167 transitions. [2018-12-08 17:39:04,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:39:04,105 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2018-12-08 17:39:04,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:04,106 INFO L225 Difference]: With dead ends: 160 [2018-12-08 17:39:04,106 INFO L226 Difference]: Without dead ends: 158 [2018-12-08 17:39:04,106 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:39:04,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-08 17:39:04,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-12-08 17:39:04,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-08 17:39:04,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-08 17:39:04,109 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 39 [2018-12-08 17:39:04,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:04,109 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-08 17:39:04,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 17:39:04,109 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-08 17:39:04,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 17:39:04,110 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:04,110 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:04,111 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:04,111 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:04,111 INFO L82 PathProgramCache]: Analyzing trace with hash 1671484848, now seen corresponding path program 1 times [2018-12-08 17:39:04,111 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:04,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,112 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:04,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,112 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:04,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:04,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:04,156 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:04,156 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 17:39:04,156 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:04,156 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 17:39:04,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 17:39:04,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:04,156 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 7 states. [2018-12-08 17:39:04,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:04,174 INFO L93 Difference]: Finished difference Result 167 states and 174 transitions. [2018-12-08 17:39:04,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:39:04,174 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-08 17:39:04,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:04,175 INFO L225 Difference]: With dead ends: 167 [2018-12-08 17:39:04,175 INFO L226 Difference]: Without dead ends: 167 [2018-12-08 17:39:04,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:39:04,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-12-08 17:39:04,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 163. [2018-12-08 17:39:04,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-08 17:39:04,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-12-08 17:39:04,178 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 40 [2018-12-08 17:39:04,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:04,178 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-12-08 17:39:04,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 17:39:04,178 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-12-08 17:39:04,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 17:39:04,179 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:04,179 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:04,179 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:04,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:04,180 INFO L82 PathProgramCache]: Analyzing trace with hash 352218406, now seen corresponding path program 2 times [2018-12-08 17:39:04,180 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:04,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:04,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,181 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:04,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:04,223 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:04,223 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:04,223 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:04,223 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:04,223 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:04,223 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:04,223 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:04,232 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:04,233 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:04,253 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:04,253 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:04,256 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:04,263 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:04,264 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:04,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:04,268 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 17:39:04,427 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:39:04,427 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:04,625 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:39:04,641 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:39:04,641 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12, 11] imperfect sequences [7] total 28 [2018-12-08 17:39:04,641 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:04,641 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:39:04,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:39:04,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=679, Unknown=0, NotChecked=0, Total=756 [2018-12-08 17:39:04,641 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 13 states. [2018-12-08 17:39:04,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:04,945 INFO L93 Difference]: Finished difference Result 165 states and 171 transitions. [2018-12-08 17:39:04,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:39:04,945 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-12-08 17:39:04,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:04,945 INFO L225 Difference]: With dead ends: 165 [2018-12-08 17:39:04,946 INFO L226 Difference]: Without dead ends: 165 [2018-12-08 17:39:04,946 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 56 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=888, Unknown=0, NotChecked=0, Total=992 [2018-12-08 17:39:04,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-08 17:39:04,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 161. [2018-12-08 17:39:04,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-12-08 17:39:04,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-12-08 17:39:04,948 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 40 [2018-12-08 17:39:04,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:04,948 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-12-08 17:39:04,948 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:39:04,949 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-12-08 17:39:04,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:39:04,949 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:04,949 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:04,949 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:04,949 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:04,950 INFO L82 PathProgramCache]: Analyzing trace with hash -559431756, now seen corresponding path program 1 times [2018-12-08 17:39:04,950 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:04,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,950 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:39:04,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:04,951 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:04,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:04,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:04,964 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:04,964 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 17:39:04,964 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:04,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 17:39:04,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 17:39:04,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 17:39:04,965 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 3 states. [2018-12-08 17:39:05,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:05,016 INFO L93 Difference]: Finished difference Result 172 states and 178 transitions. [2018-12-08 17:39:05,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 17:39:05,016 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-08 17:39:05,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:05,017 INFO L225 Difference]: With dead ends: 172 [2018-12-08 17:39:05,017 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 17:39:05,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 17:39:05,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 17:39:05,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 138. [2018-12-08 17:39:05,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 17:39:05,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions. [2018-12-08 17:39:05,019 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 38 [2018-12-08 17:39:05,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:05,019 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 144 transitions. [2018-12-08 17:39:05,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 17:39:05,019 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions. [2018-12-08 17:39:05,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-12-08 17:39:05,019 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:05,019 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:05,020 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:05,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,020 INFO L82 PathProgramCache]: Analyzing trace with hash -879586871, now seen corresponding path program 1 times [2018-12-08 17:39:05,020 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:05,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,021 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:05,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,051 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:39:05,051 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:05,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 17:39:05,052 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:05,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 17:39:05,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 17:39:05,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:05,052 INFO L87 Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 7 states. [2018-12-08 17:39:05,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:05,072 INFO L93 Difference]: Finished difference Result 140 states and 145 transitions. [2018-12-08 17:39:05,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 17:39:05,072 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-12-08 17:39:05,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:05,073 INFO L225 Difference]: With dead ends: 140 [2018-12-08 17:39:05,073 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 17:39:05,073 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:39:05,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 17:39:05,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 17:39:05,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 17:39:05,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 143 transitions. [2018-12-08 17:39:05,076 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 143 transitions. Word has length 45 [2018-12-08 17:39:05,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:05,076 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 143 transitions. [2018-12-08 17:39:05,076 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 17:39:05,076 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 143 transitions. [2018-12-08 17:39:05,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 17:39:05,076 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:05,076 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:05,077 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:05,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,077 INFO L82 PathProgramCache]: Analyzing trace with hash 724402156, now seen corresponding path program 1 times [2018-12-08 17:39:05,077 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:05,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,078 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:05,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,110 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:39:05,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:05,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:39:05,111 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:05,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:39:05,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:39:05,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:39:05,111 INFO L87 Difference]: Start difference. First operand 138 states and 143 transitions. Second operand 9 states. [2018-12-08 17:39:05,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:05,150 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-12-08 17:39:05,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:39:05,150 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 50 [2018-12-08 17:39:05,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:05,151 INFO L225 Difference]: With dead ends: 142 [2018-12-08 17:39:05,151 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 17:39:05,151 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:05,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 17:39:05,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 17:39:05,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 17:39:05,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-12-08 17:39:05,153 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 50 [2018-12-08 17:39:05,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:05,153 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-12-08 17:39:05,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:39:05,153 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-12-08 17:39:05,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 17:39:05,153 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:05,153 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:05,154 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:05,154 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,154 INFO L82 PathProgramCache]: Analyzing trace with hash 97698700, now seen corresponding path program 1 times [2018-12-08 17:39:05,154 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:05,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,155 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:05,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,268 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:39:05,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:05,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-08 17:39:05,268 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:05,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 17:39:05,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 17:39:05,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:39:05,269 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 16 states. [2018-12-08 17:39:05,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:05,511 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2018-12-08 17:39:05,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:39:05,511 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 61 [2018-12-08 17:39:05,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:05,512 INFO L225 Difference]: With dead ends: 136 [2018-12-08 17:39:05,512 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 17:39:05,512 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-08 17:39:05,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 17:39:05,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-08 17:39:05,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 17:39:05,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-12-08 17:39:05,516 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 61 [2018-12-08 17:39:05,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:05,516 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-12-08 17:39:05,516 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 17:39:05,516 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-12-08 17:39:05,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-08 17:39:05,517 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:05,517 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:05,517 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:05,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,517 INFO L82 PathProgramCache]: Analyzing trace with hash 97698701, now seen corresponding path program 1 times [2018-12-08 17:39:05,517 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:05,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,518 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:05,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,561 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:05,561 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:05,561 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:05,561 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 62 with the following transitions: [2018-12-08 17:39:05,561 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [27], [31], [36], [38], [52], [54], [58], [62], [65], [66], [67], [70], [71], [72], [76], [78], [79], [90], [93], [123], [124], [127], [130], [131], [134], [136], [137], [138], [139], [143], [146], [160], [161], [162], [163], [164], [165], [166], [170], [172], [173], [176], [177], [178], [182], [183], [184], [185], [192], [194], [198], [199], [200] [2018-12-08 17:39:05,563 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:05,564 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:05,632 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:05,632 INFO L272 AbstractInterpreter]: Visited 59 different actions 71 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 571 root evaluator evaluations with a maximum evaluation depth of 4. Performed 571 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 26 variables. [2018-12-08 17:39:05,633 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,634 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:05,634 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:05,634 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:05,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,640 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:05,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:05,672 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:05,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:05,774 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:05,789 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:05,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2018-12-08 17:39:05,789 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:05,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:39:05,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:39:05,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:39:05,790 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 8 states. [2018-12-08 17:39:05,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:05,804 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2018-12-08 17:39:05,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 17:39:05,804 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-12-08 17:39:05,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:05,804 INFO L225 Difference]: With dead ends: 139 [2018-12-08 17:39:05,805 INFO L226 Difference]: Without dead ends: 137 [2018-12-08 17:39:05,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 116 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:39:05,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-08 17:39:05,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-08 17:39:05,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-08 17:39:05,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-12-08 17:39:05,807 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 61 [2018-12-08 17:39:05,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:05,807 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-12-08 17:39:05,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:39:05,807 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-12-08 17:39:05,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-08 17:39:05,807 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:05,807 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:05,807 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:05,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:05,808 INFO L82 PathProgramCache]: Analyzing trace with hash -1006551031, now seen corresponding path program 2 times [2018-12-08 17:39:05,808 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:05,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:05,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:05,808 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:05,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:05,837 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:05,837 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:05,837 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:05,837 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:05,837 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:05,837 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:05,837 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:05,844 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:05,844 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:05,866 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:05,866 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:05,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:05,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:05,875 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:05,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:05,879 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 17:39:06,084 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:39:06,084 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:06,443 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:39:06,459 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:39:06,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17, 16] imperfect sequences [8] total 39 [2018-12-08 17:39:06,460 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:06,460 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 17:39:06,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 17:39:06,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=1369, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 17:39:06,461 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 18 states. [2018-12-08 17:39:06,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:06,899 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2018-12-08 17:39:06,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 17:39:06,899 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 62 [2018-12-08 17:39:06,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:06,900 INFO L225 Difference]: With dead ends: 135 [2018-12-08 17:39:06,900 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 17:39:06,900 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 90 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 466 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=154, Invalid=1826, Unknown=0, NotChecked=0, Total=1980 [2018-12-08 17:39:06,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 17:39:06,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-08 17:39:06,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-08 17:39:06,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-12-08 17:39:06,902 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 62 [2018-12-08 17:39:06,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:06,902 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-12-08 17:39:06,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 17:39:06,902 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-12-08 17:39:06,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 17:39:06,903 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:06,903 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:06,903 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:06,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:06,903 INFO L82 PathProgramCache]: Analyzing trace with hash -479546296, now seen corresponding path program 1 times [2018-12-08 17:39:06,904 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:06,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:06,904 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:39:06,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:06,904 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:06,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:06,967 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:39:06,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:06,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 17:39:06,967 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:06,968 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 17:39:06,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 17:39:06,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:39:06,968 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 12 states. [2018-12-08 17:39:07,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:07,017 INFO L93 Difference]: Finished difference Result 141 states and 144 transitions. [2018-12-08 17:39:07,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:39:07,017 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 73 [2018-12-08 17:39:07,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:07,017 INFO L225 Difference]: With dead ends: 141 [2018-12-08 17:39:07,017 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 17:39:07,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:39:07,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 17:39:07,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-08 17:39:07,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-08 17:39:07,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 138 transitions. [2018-12-08 17:39:07,020 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 138 transitions. Word has length 73 [2018-12-08 17:39:07,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:07,020 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 138 transitions. [2018-12-08 17:39:07,020 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 17:39:07,020 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 138 transitions. [2018-12-08 17:39:07,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 17:39:07,021 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:07,021 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:07,021 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:07,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:07,021 INFO L82 PathProgramCache]: Analyzing trace with hash -1613688134, now seen corresponding path program 1 times [2018-12-08 17:39:07,021 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:07,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:07,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,022 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:07,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:07,131 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:39:07,131 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:07,131 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-08 17:39:07,131 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:07,131 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 17:39:07,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 17:39:07,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:39:07,132 INFO L87 Difference]: Start difference. First operand 135 states and 138 transitions. Second operand 16 states. [2018-12-08 17:39:07,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:07,415 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-12-08 17:39:07,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 17:39:07,416 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 86 [2018-12-08 17:39:07,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:07,417 INFO L225 Difference]: With dead ends: 142 [2018-12-08 17:39:07,417 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 17:39:07,417 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-08 17:39:07,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 17:39:07,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 133. [2018-12-08 17:39:07,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-08 17:39:07,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions. [2018-12-08 17:39:07,420 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 86 [2018-12-08 17:39:07,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:07,421 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 136 transitions. [2018-12-08 17:39:07,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 17:39:07,421 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions. [2018-12-08 17:39:07,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 17:39:07,422 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:07,422 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:07,422 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:07,422 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:07,422 INFO L82 PathProgramCache]: Analyzing trace with hash -1613688133, now seen corresponding path program 1 times [2018-12-08 17:39:07,422 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:07,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:07,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,424 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:07,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:07,477 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:07,478 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:07,478 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:07,478 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 87 with the following transitions: [2018-12-08 17:39:07,478 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [42], [52], [54], [58], [62], [65], [66], [67], [70], [71], [72], [76], [78], [79], [80], [90], [91], [94], [95], [98], [99], [123], [124], [127], [130], [131], [134], [136], [137], [138], [139], [141], [142], [143], [146], [151], [152], [153], [160], [161], [162], [163], [164], [165], [166], [168], [170], [171], [172], [173], [176], [177], [178], [179], [180], [182], [183], [184], [185], [186], [192], [193], [194], [195], [196], [198], [199], [200] [2018-12-08 17:39:07,480 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:07,480 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:07,534 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:07,534 INFO L272 AbstractInterpreter]: Visited 83 different actions 95 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 742 root evaluator evaluations with a maximum evaluation depth of 4. Performed 742 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 3 fixpoints after 2 different actions. Largest state had 30 variables. [2018-12-08 17:39:07,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:07,539 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:07,539 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:07,539 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:07,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:07,546 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:07,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:07,584 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:07,603 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:07,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:07,725 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:07,740 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:07,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2018-12-08 17:39:07,741 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:07,741 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:39:07,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:39:07,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:39:07,741 INFO L87 Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 9 states. [2018-12-08 17:39:07,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:07,765 INFO L93 Difference]: Finished difference Result 136 states and 139 transitions. [2018-12-08 17:39:07,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:39:07,766 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 86 [2018-12-08 17:39:07,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:07,766 INFO L225 Difference]: With dead ends: 136 [2018-12-08 17:39:07,766 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 17:39:07,766 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 165 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:39:07,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 17:39:07,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-08 17:39:07,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 17:39:07,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2018-12-08 17:39:07,768 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 86 [2018-12-08 17:39:07,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:07,768 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2018-12-08 17:39:07,768 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:39:07,768 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2018-12-08 17:39:07,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-12-08 17:39:07,769 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:07,769 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:07,769 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:07,769 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:07,769 INFO L82 PathProgramCache]: Analyzing trace with hash -1159046721, now seen corresponding path program 2 times [2018-12-08 17:39:07,769 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:07,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:07,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:07,770 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:07,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:07,807 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:07,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:07,807 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:07,807 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:07,807 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:07,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:07,807 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:07,816 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:07,816 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:07,851 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:07,851 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:07,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:07,861 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:07,862 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:07,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:07,871 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 17:39:08,132 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 17:39:08,133 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:08,556 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 17:39:08,571 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:39:08,571 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18, 18] imperfect sequences [9] total 43 [2018-12-08 17:39:08,571 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:08,571 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 17:39:08,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 17:39:08,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=1676, Unknown=0, NotChecked=0, Total=1806 [2018-12-08 17:39:08,572 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 19 states. [2018-12-08 17:39:09,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:09,054 INFO L93 Difference]: Finished difference Result 132 states and 135 transitions. [2018-12-08 17:39:09,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 17:39:09,054 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-12-08 17:39:09,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:09,055 INFO L225 Difference]: With dead ends: 132 [2018-12-08 17:39:09,055 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 17:39:09,055 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 134 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=172, Invalid=2180, Unknown=0, NotChecked=0, Total=2352 [2018-12-08 17:39:09,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 17:39:09,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-08 17:39:09,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 17:39:09,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-12-08 17:39:09,057 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 87 [2018-12-08 17:39:09,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:09,057 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-12-08 17:39:09,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 17:39:09,057 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-12-08 17:39:09,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 17:39:09,058 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:09,058 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:09,058 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:09,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:09,058 INFO L82 PathProgramCache]: Analyzing trace with hash -285282494, now seen corresponding path program 1 times [2018-12-08 17:39:09,058 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:09,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,059 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:39:09,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,059 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:09,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:09,108 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 17:39:09,108 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:09,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 17:39:09,108 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:09,108 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 17:39:09,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 17:39:09,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:39:09,108 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 10 states. [2018-12-08 17:39:09,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:09,141 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-12-08 17:39:09,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:39:09,141 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 85 [2018-12-08 17:39:09,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:09,142 INFO L225 Difference]: With dead ends: 134 [2018-12-08 17:39:09,142 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 17:39:09,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:39:09,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 17:39:09,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-12-08 17:39:09,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-08 17:39:09,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2018-12-08 17:39:09,144 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 85 [2018-12-08 17:39:09,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:09,144 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 134 transitions. [2018-12-08 17:39:09,145 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 17:39:09,145 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions. [2018-12-08 17:39:09,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-08 17:39:09,145 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:09,145 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:09,145 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:09,146 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:09,146 INFO L82 PathProgramCache]: Analyzing trace with hash -546882410, now seen corresponding path program 1 times [2018-12-08 17:39:09,146 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:09,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:09,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,147 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:09,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:09,291 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 17:39:09,292 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:09,292 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 17:39:09,292 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:09,292 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:39:09,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:39:09,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:09,292 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 20 states. [2018-12-08 17:39:09,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:09,634 INFO L93 Difference]: Finished difference Result 135 states and 137 transitions. [2018-12-08 17:39:09,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 17:39:09,634 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 101 [2018-12-08 17:39:09,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:09,635 INFO L225 Difference]: With dead ends: 135 [2018-12-08 17:39:09,635 INFO L226 Difference]: Without dead ends: 135 [2018-12-08 17:39:09,635 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-08 17:39:09,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-08 17:39:09,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-12-08 17:39:09,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-08 17:39:09,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-08 17:39:09,637 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 101 [2018-12-08 17:39:09,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:09,637 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-08 17:39:09,637 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:39:09,637 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-08 17:39:09,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-08 17:39:09,637 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:09,637 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:09,638 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:09,638 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:09,638 INFO L82 PathProgramCache]: Analyzing trace with hash -546882409, now seen corresponding path program 1 times [2018-12-08 17:39:09,638 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:09,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:09,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:09,638 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:09,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:09,695 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:09,696 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:09,696 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:09,696 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 102 with the following transitions: [2018-12-08 17:39:09,696 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [58], [62], [65], [66], [67], [70], [71], [72], [76], [78], [79], [80], [82], [85], [90], [91], [94], [95], [98], [99], [100], [103], [106], [123], [124], [127], [130], [131], [134], [136], [137], [138], [139], [141], [142], [143], [146], [151], [152], [153], [160], [161], [162], [163], [164], [165], [166], [168], [170], [171], [172], [173], [174], [176], [177], [178], [179], [180], [182], [183], [184], [185], [186], [187], [188], [190], [192], [193], [194], [195], [196], [198], [199], [200] [2018-12-08 17:39:09,699 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:09,699 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:09,775 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:09,775 INFO L272 AbstractInterpreter]: Visited 97 different actions 109 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 864 root evaluator evaluations with a maximum evaluation depth of 6. Performed 864 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-08 17:39:09,779 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:09,779 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:09,779 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:09,779 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:09,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:09,788 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:09,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:09,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:09,846 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:09,846 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:09,980 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:09,994 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:09,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2018-12-08 17:39:09,994 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:09,995 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 17:39:09,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 17:39:09,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:39:09,995 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 10 states. [2018-12-08 17:39:10,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:10,013 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-12-08 17:39:10,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:39:10,013 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 101 [2018-12-08 17:39:10,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:10,014 INFO L225 Difference]: With dead ends: 133 [2018-12-08 17:39:10,014 INFO L226 Difference]: Without dead ends: 131 [2018-12-08 17:39:10,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 194 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:39:10,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-08 17:39:10,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-12-08 17:39:10,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 17:39:10,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-12-08 17:39:10,017 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 101 [2018-12-08 17:39:10,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:10,017 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-12-08 17:39:10,017 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 17:39:10,017 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-12-08 17:39:10,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-08 17:39:10,018 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:10,018 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:10,018 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:10,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:10,018 INFO L82 PathProgramCache]: Analyzing trace with hash 167677203, now seen corresponding path program 2 times [2018-12-08 17:39:10,018 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:10,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:10,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:10,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:10,019 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:10,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:10,093 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:10,093 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:10,093 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:10,093 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:10,093 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:10,093 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:10,093 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:10,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:10,100 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:10,133 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:10,133 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:10,136 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:10,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:10,144 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:10,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:10,148 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-08 17:39:10,476 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 17:39:10,476 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:10,979 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 17:39:10,994 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:39:10,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 22] imperfect sequences [10] total 52 [2018-12-08 17:39:10,994 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:39:10,994 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-08 17:39:10,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-08 17:39:10,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=2490, Unknown=0, NotChecked=0, Total=2652 [2018-12-08 17:39:10,995 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 23 states. [2018-12-08 17:39:11,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:11,595 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2018-12-08 17:39:11,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 17:39:11,595 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 102 [2018-12-08 17:39:11,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:11,596 INFO L225 Difference]: With dead ends: 129 [2018-12-08 17:39:11,596 INFO L226 Difference]: Without dead ends: 129 [2018-12-08 17:39:11,596 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 154 SyntacticMatches, 9 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 947 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=218, Invalid=3322, Unknown=0, NotChecked=0, Total=3540 [2018-12-08 17:39:11,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-12-08 17:39:11,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-12-08 17:39:11,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-08 17:39:11,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 131 transitions. [2018-12-08 17:39:11,599 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 131 transitions. Word has length 102 [2018-12-08 17:39:11,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:11,599 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 131 transitions. [2018-12-08 17:39:11,599 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-08 17:39:11,599 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 131 transitions. [2018-12-08 17:39:11,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-12-08 17:39:11,600 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:11,600 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:11,600 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:11,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:11,600 INFO L82 PathProgramCache]: Analyzing trace with hash 1126892509, now seen corresponding path program 1 times [2018-12-08 17:39:11,601 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:11,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:11,601 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:39:11,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:11,601 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:11,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:11,644 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:11,644 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:11,644 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:11,644 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 108 with the following transitions: [2018-12-08 17:39:11,644 INFO L205 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [29], [30], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [58], [62], [65], [66], [67], [70], [71], [72], [76], [78], [79], [80], [82], [85], [90], [91], [94], [95], [98], [99], [100], [103], [104], [107], [109], [111], [114], [115], [123], [124], [127], [130], [131], [134], [136], [137], [138], [139], [141], [142], [143], [146], [151], [152], [153], [160], [161], [162], [163], [164], [165], [166], [168], [170], [171], [172], [173], [174], [176], [177], [178], [179], [180], [182], [183], [184], [185], [186], [187], [188], [190], [192], [193], [194], [195], [196], [198], [199], [200] [2018-12-08 17:39:11,646 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:39:11,646 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:39:11,698 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:39:11,698 INFO L272 AbstractInterpreter]: Visited 102 different actions 114 times. Merged at 3 different actions 8 times. Widened at 1 different actions 1 times. Performed 891 root evaluator evaluations with a maximum evaluation depth of 6. Performed 891 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 3 fixpoints after 2 different actions. Largest state had 31 variables. [2018-12-08 17:39:11,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:11,703 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:39:11,703 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:11,703 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:11,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:11,711 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:39:11,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:11,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:11,763 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:11,763 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:11,896 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:11,911 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:39:11,911 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2018-12-08 17:39:11,911 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:39:11,912 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:39:11,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:39:11,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-08 17:39:11,912 INFO L87 Difference]: Start difference. First operand 129 states and 131 transitions. Second operand 11 states. [2018-12-08 17:39:11,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:11,928 INFO L93 Difference]: Finished difference Result 132 states and 134 transitions. [2018-12-08 17:39:11,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:39:11,929 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 107 [2018-12-08 17:39:11,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:11,929 INFO L225 Difference]: With dead ends: 132 [2018-12-08 17:39:11,929 INFO L226 Difference]: Without dead ends: 130 [2018-12-08 17:39:11,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 224 GetRequests, 205 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:11,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-12-08 17:39:11,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-12-08 17:39:11,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-08 17:39:11,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-12-08 17:39:11,931 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 107 [2018-12-08 17:39:11,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:11,931 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-12-08 17:39:11,931 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:39:11,931 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-12-08 17:39:11,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-12-08 17:39:11,931 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:11,931 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:11,932 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION]=== [2018-12-08 17:39:11,932 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:11,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1921714009, now seen corresponding path program 2 times [2018-12-08 17:39:11,932 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:39:11,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:11,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:11,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:39:11,932 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:39:11,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:11,984 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:11,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:11,984 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:39:11,984 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:39:11,984 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:39:11,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:11,984 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:11,991 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:39:11,991 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:39:12,026 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:39:12,027 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:39:12,031 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:12,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 17:39:12,076 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 17:39:12,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,077 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,078 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-08 17:39:12,135 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:39:12,136 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:39:12,140 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 17:39:12,140 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-08 17:39:12,766 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-08 17:39:12,772 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-08 17:39:12,774 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:12,775 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-08 17:39:12,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:12,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:12,780 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-08 17:39:12,780 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,785 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,788 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:12,791 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-08 17:39:13,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:13,068 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-08 17:39:13,071 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 17:39:13,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:13,072 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-08 17:39:13,072 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,077 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-08 17:39:13,344 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-08 17:39:13,345 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-08 17:39:13,345 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,346 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:13,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-08 17:39:13,389 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 17:39:13,390 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:14,437 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-12-08 17:39:14,439 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-12-08 17:39:14,439 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:14,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:14,443 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 17:39:14,443 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:38 [2018-12-08 17:39:14,678 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 17:39:14,691 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 95 [2018-12-08 17:39:14,894 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:14,894 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:214) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-12-08 17:39:14,897 INFO L168 Benchmark]: Toolchain (without parser) took 14162.31 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 468.2 MB). Free memory was 947.0 MB in the beginning and 1.2 GB in the end (delta: -233.9 MB). Peak memory consumption was 234.3 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:14,897 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:39:14,898 INFO L168 Benchmark]: CACSL2BoogieTranslator took 339.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.6 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -158.9 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:14,898 INFO L168 Benchmark]: Boogie Procedure Inliner took 22.03 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:39:14,898 INFO L168 Benchmark]: Boogie Preprocessor took 21.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:14,898 INFO L168 Benchmark]: RCFGBuilder took 279.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.5 MB). Peak memory consumption was 45.5 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:14,899 INFO L168 Benchmark]: TraceAbstraction took 13497.37 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 335.5 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -127.5 MB). Peak memory consumption was 208.1 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:14,901 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 976.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 339.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 132.6 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -158.9 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 22.03 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.02 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.5 MB). Peak memory consumption was 3.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 279.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.5 MB). Peak memory consumption was 45.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13497.37 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 335.5 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -127.5 MB). Peak memory consumption was 208.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 17:39:16,207 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 17:39:16,208 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 17:39:16,214 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 17:39:16,214 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 17:39:16,214 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 17:39:16,215 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 17:39:16,216 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 17:39:16,217 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 17:39:16,218 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 17:39:16,218 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 17:39:16,219 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 17:39:16,219 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 17:39:16,220 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 17:39:16,221 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 17:39:16,221 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 17:39:16,222 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 17:39:16,223 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 17:39:16,224 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 17:39:16,225 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 17:39:16,225 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 17:39:16,226 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 17:39:16,228 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 17:39:16,228 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 17:39:16,228 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 17:39:16,229 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 17:39:16,229 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 17:39:16,230 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 17:39:16,230 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 17:39:16,231 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 17:39:16,231 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 17:39:16,231 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 17:39:16,232 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 17:39:16,232 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 17:39:16,232 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 17:39:16,233 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 17:39:16,233 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-12-08 17:39:16,244 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 17:39:16,244 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 17:39:16,245 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 17:39:16,245 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 17:39:16,245 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 17:39:16,245 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 17:39:16,245 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 17:39:16,245 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 17:39:16,246 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 17:39:16,246 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 17:39:16,246 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 17:39:16,246 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 17:39:16,247 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 17:39:16,247 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 17:39:16,247 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 17:39:16,247 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 17:39:16,247 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 17:39:16,247 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 17:39:16,248 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 17:39:16,249 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 17:39:16,249 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 17:39:16,249 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 17:39:16,249 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 17:39:16,249 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 17:39:16,249 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:39:16,250 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 17:39:16,250 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 17:39:16,250 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-08 17:39:16,250 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 17:39:16,250 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 17:39:16,250 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-08 17:39:16,275 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 17:39:16,284 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 17:39:16,287 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 17:39:16,288 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 17:39:16,288 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 17:39:16,289 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:16,329 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/8b7f653f1/4112da5da94c48c2b75a94a7125a6448/FLAGe2eafb428 [2018-12-08 17:39:16,757 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 17:39:16,757 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:16,765 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/8b7f653f1/4112da5da94c48c2b75a94a7125a6448/FLAGe2eafb428 [2018-12-08 17:39:16,772 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/data/8b7f653f1/4112da5da94c48c2b75a94a7125a6448 [2018-12-08 17:39:16,774 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 17:39:16,775 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 17:39:16,776 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 17:39:16,776 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 17:39:16,778 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 17:39:16,778 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:39:16" (1/1) ... [2018-12-08 17:39:16,780 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4096dacc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:16, skipping insertion in model container [2018-12-08 17:39:16,780 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:39:16" (1/1) ... [2018-12-08 17:39:16,784 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 17:39:16,805 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 17:39:16,994 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:39:17,048 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 17:39:17,081 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:39:17,114 INFO L195 MainTranslator]: Completed translation [2018-12-08 17:39:17,114 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17 WrapperNode [2018-12-08 17:39:17,114 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 17:39:17,115 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 17:39:17,115 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 17:39:17,115 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 17:39:17,120 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,131 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,136 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 17:39:17,136 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 17:39:17,137 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 17:39:17,137 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 17:39:17,142 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,145 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,145 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,153 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,156 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,157 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... [2018-12-08 17:39:17,159 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 17:39:17,159 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 17:39:17,159 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 17:39:17,159 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 17:39:17,160 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:39:17,190 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 17:39:17,190 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-08 17:39:17,190 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-08 17:39:17,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-08 17:39:17,190 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-08 17:39:17,190 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-08 17:39:17,190 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-08 17:39:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-08 17:39:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-08 17:39:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-08 17:39:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-08 17:39:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-08 17:39:17,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 17:39:17,192 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 17:39:17,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 17:39:17,192 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 17:39:17,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-08 17:39:17,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-08 17:39:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-08 17:39:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-08 17:39:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-08 17:39:17,194 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-08 17:39:17,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-08 17:39:17,194 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-08 17:39:17,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-08 17:39:17,194 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 17:39:17,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 17:39:17,384 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-08 17:39:17,501 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 17:39:17,501 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 17:39:17,501 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:39:17 BoogieIcfgContainer [2018-12-08 17:39:17,501 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 17:39:17,502 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 17:39:17,502 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 17:39:17,504 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 17:39:17,504 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 05:39:16" (1/3) ... [2018-12-08 17:39:17,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e94f73c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:39:17, skipping insertion in model container [2018-12-08 17:39:17,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:39:17" (2/3) ... [2018-12-08 17:39:17,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e94f73c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:39:17, skipping insertion in model container [2018-12-08 17:39:17,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:39:17" (3/3) ... [2018-12-08 17:39:17,506 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-08 17:39:17,512 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 17:39:17,518 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-12-08 17:39:17,528 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2018-12-08 17:39:17,545 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 17:39:17,545 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 17:39:17,546 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-08 17:39:17,546 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 17:39:17,546 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 17:39:17,546 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 17:39:17,546 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 17:39:17,546 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 17:39:17,546 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 17:39:17,558 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states. [2018-12-08 17:39:17,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:17,564 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:17,565 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:17,566 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:17,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:17,570 INFO L82 PathProgramCache]: Analyzing trace with hash 1529894351, now seen corresponding path program 1 times [2018-12-08 17:39:17,573 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:17,573 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:17,589 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:17,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:17,639 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:17,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:17,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:17,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:17,671 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:17,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:17,689 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:17,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:17,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 17:39:17,694 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:17,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:17,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:17,708 INFO L87 Difference]: Start difference. First operand 145 states. Second operand 5 states. [2018-12-08 17:39:17,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:17,913 INFO L93 Difference]: Finished difference Result 156 states and 167 transitions. [2018-12-08 17:39:17,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:17,914 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 17:39:17,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:17,923 INFO L225 Difference]: With dead ends: 156 [2018-12-08 17:39:17,923 INFO L226 Difference]: Without dead ends: 153 [2018-12-08 17:39:17,924 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:17,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-08 17:39:17,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 147. [2018-12-08 17:39:17,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-08 17:39:17,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 158 transitions. [2018-12-08 17:39:17,953 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 158 transitions. Word has length 17 [2018-12-08 17:39:17,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:17,954 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 158 transitions. [2018-12-08 17:39:17,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:17,954 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 158 transitions. [2018-12-08 17:39:17,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:17,954 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:17,954 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:17,955 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:17,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:17,955 INFO L82 PathProgramCache]: Analyzing trace with hash 1529894352, now seen corresponding path program 1 times [2018-12-08 17:39:17,955 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:17,955 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:17,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:18,016 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:18,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:18,025 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:18,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,055 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:18,056 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:18,056 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:18,058 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:39:18,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:39:18,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:39:18,058 INFO L87 Difference]: Start difference. First operand 147 states and 158 transitions. Second operand 6 states. [2018-12-08 17:39:18,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:18,256 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-08 17:39:18,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:39:18,257 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-08 17:39:18,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:18,258 INFO L225 Difference]: With dead ends: 152 [2018-12-08 17:39:18,258 INFO L226 Difference]: Without dead ends: 152 [2018-12-08 17:39:18,258 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:18,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-08 17:39:18,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 147. [2018-12-08 17:39:18,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-08 17:39:18,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 157 transitions. [2018-12-08 17:39:18,265 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 157 transitions. Word has length 17 [2018-12-08 17:39:18,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:18,265 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 157 transitions. [2018-12-08 17:39:18,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:39:18,265 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 157 transitions. [2018-12-08 17:39:18,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-08 17:39:18,266 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:18,266 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:18,266 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:18,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:18,267 INFO L82 PathProgramCache]: Analyzing trace with hash 1558523502, now seen corresponding path program 1 times [2018-12-08 17:39:18,267 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:18,267 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:18,282 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,312 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,335 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:18,336 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:18,336 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:18,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:18,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:18,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:18,337 INFO L87 Difference]: Start difference. First operand 147 states and 157 transitions. Second operand 5 states. [2018-12-08 17:39:18,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:18,354 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-12-08 17:39:18,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:18,355 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-08 17:39:18,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:18,356 INFO L225 Difference]: With dead ends: 146 [2018-12-08 17:39:18,356 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 17:39:18,356 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:18,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 17:39:18,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-08 17:39:18,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:39:18,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-12-08 17:39:18,361 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 17 [2018-12-08 17:39:18,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:18,362 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-12-08 17:39:18,362 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:18,362 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-12-08 17:39:18,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-08 17:39:18,362 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:18,362 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:18,362 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:18,363 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:18,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1747357821, now seen corresponding path program 1 times [2018-12-08 17:39:18,363 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:18,363 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:18,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,424 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:18,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:18,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:39:18,426 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:39:18,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:39:18,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:18,426 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 5 states. [2018-12-08 17:39:18,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:18,442 INFO L93 Difference]: Finished difference Result 146 states and 153 transitions. [2018-12-08 17:39:18,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:39:18,443 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-08 17:39:18,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:18,444 INFO L225 Difference]: With dead ends: 146 [2018-12-08 17:39:18,444 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 17:39:18,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:18,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 17:39:18,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-08 17:39:18,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:39:18,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 151 transitions. [2018-12-08 17:39:18,452 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 151 transitions. Word has length 29 [2018-12-08 17:39:18,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:18,452 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 151 transitions. [2018-12-08 17:39:18,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:39:18,452 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 151 transitions. [2018-12-08 17:39:18,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-08 17:39:18,453 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:18,453 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:18,453 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:18,453 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:18,453 INFO L82 PathProgramCache]: Analyzing trace with hash 1550537122, now seen corresponding path program 1 times [2018-12-08 17:39:18,453 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:18,453 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:18,468 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,589 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:18,590 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:18,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:39:18,591 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:39:18,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:39:18,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:39:18,591 INFO L87 Difference]: Start difference. First operand 144 states and 151 transitions. Second operand 9 states. [2018-12-08 17:39:18,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:18,676 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-12-08 17:39:18,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:39:18,677 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-08 17:39:18,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:18,678 INFO L225 Difference]: With dead ends: 164 [2018-12-08 17:39:18,678 INFO L226 Difference]: Without dead ends: 164 [2018-12-08 17:39:18,679 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:18,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-08 17:39:18,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 158. [2018-12-08 17:39:18,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-08 17:39:18,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-08 17:39:18,687 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 29 [2018-12-08 17:39:18,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:18,688 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-08 17:39:18,688 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:39:18,688 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-08 17:39:18,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 17:39:18,689 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:18,689 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:18,689 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:18,689 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:18,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1468013630, now seen corresponding path program 1 times [2018-12-08 17:39:18,690 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:18,690 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:18,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,763 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:18,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:18,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 17:39:18,765 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 17:39:18,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 17:39:18,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 17:39:18,765 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-08 17:39:18,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:18,791 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-08 17:39:18,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 17:39:18,792 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-08 17:39:18,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:18,792 INFO L225 Difference]: With dead ends: 161 [2018-12-08 17:39:18,793 INFO L226 Difference]: Without dead ends: 159 [2018-12-08 17:39:18,793 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:39:18,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-08 17:39:18,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-08 17:39:18,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 17:39:18,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-08 17:39:18,797 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-08 17:39:18,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:18,797 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-08 17:39:18,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 17:39:18,797 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-08 17:39:18,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-08 17:39:18,798 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:18,798 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:18,798 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:18,798 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:18,798 INFO L82 PathProgramCache]: Analyzing trace with hash 376614820, now seen corresponding path program 1 times [2018-12-08 17:39:18,798 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:18,799 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:18,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,866 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,877 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:18,934 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:18,936 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:18,936 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:18,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:18,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:18,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:18,970 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:18,970 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:18,972 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:18,972 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:19,118 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 17:39:19,118 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:19,133 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:39:19,133 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [5, 5] total 18 [2018-12-08 17:39:19,133 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 17:39:19,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 17:39:19,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:39:19,134 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 18 states. [2018-12-08 17:39:20,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:20,620 INFO L93 Difference]: Finished difference Result 177 states and 184 transitions. [2018-12-08 17:39:20,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 17:39:20,620 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 33 [2018-12-08 17:39:20,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:20,621 INFO L225 Difference]: With dead ends: 177 [2018-12-08 17:39:20,621 INFO L226 Difference]: Without dead ends: 173 [2018-12-08 17:39:20,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=112, Invalid=590, Unknown=0, NotChecked=0, Total=702 [2018-12-08 17:39:20,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-08 17:39:20,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 161. [2018-12-08 17:39:20,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-12-08 17:39:20,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-12-08 17:39:20,625 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 33 [2018-12-08 17:39:20,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:20,625 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-12-08 17:39:20,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 17:39:20,625 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-12-08 17:39:20,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-08 17:39:20,626 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:20,626 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:20,626 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:20,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:20,627 INFO L82 PathProgramCache]: Analyzing trace with hash -918764097, now seen corresponding path program 1 times [2018-12-08 17:39:20,627 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:20,627 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:20,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:20,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:20,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:20,735 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:20,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:20,861 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:20,863 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:20,863 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:20,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:20,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:20,893 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:20,910 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:20,911 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:20,915 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:20,915 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:21,182 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:39:21,183 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:21,198 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:39:21,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8, 8] total 25 [2018-12-08 17:39:21,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-08 17:39:21,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-08 17:39:21,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=509, Unknown=0, NotChecked=0, Total=600 [2018-12-08 17:39:21,199 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 25 states. [2018-12-08 17:39:23,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:23,874 INFO L93 Difference]: Finished difference Result 228 states and 241 transitions. [2018-12-08 17:39:23,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 17:39:23,875 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 36 [2018-12-08 17:39:23,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:23,875 INFO L225 Difference]: With dead ends: 228 [2018-12-08 17:39:23,876 INFO L226 Difference]: Without dead ends: 224 [2018-12-08 17:39:23,876 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=252, Invalid=1388, Unknown=0, NotChecked=0, Total=1640 [2018-12-08 17:39:23,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-12-08 17:39:23,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 166. [2018-12-08 17:39:23,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-12-08 17:39:23,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 173 transitions. [2018-12-08 17:39:23,881 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 173 transitions. Word has length 36 [2018-12-08 17:39:23,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:23,881 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 173 transitions. [2018-12-08 17:39:23,881 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-08 17:39:23,881 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 173 transitions. [2018-12-08 17:39:23,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 17:39:23,882 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:23,882 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:23,882 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:23,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:23,883 INFO L82 PathProgramCache]: Analyzing trace with hash 400998699, now seen corresponding path program 1 times [2018-12-08 17:39:23,883 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:23,883 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:23,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:23,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:23,959 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:23,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:23,999 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:24,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:24,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 17:39:24,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 17:39:24,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 17:39:24,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:24,002 INFO L87 Difference]: Start difference. First operand 166 states and 173 transitions. Second operand 7 states. [2018-12-08 17:39:24,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:24,030 INFO L93 Difference]: Finished difference Result 175 states and 182 transitions. [2018-12-08 17:39:24,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:39:24,031 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-08 17:39:24,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:24,031 INFO L225 Difference]: With dead ends: 175 [2018-12-08 17:39:24,032 INFO L226 Difference]: Without dead ends: 175 [2018-12-08 17:39:24,032 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:39:24,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-12-08 17:39:24,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 171. [2018-12-08 17:39:24,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-12-08 17:39:24,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 178 transitions. [2018-12-08 17:39:24,036 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 178 transitions. Word has length 40 [2018-12-08 17:39:24,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:24,036 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 178 transitions. [2018-12-08 17:39:24,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 17:39:24,036 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 178 transitions. [2018-12-08 17:39:24,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:39:24,037 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:24,037 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:24,038 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:24,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:24,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1558604051, now seen corresponding path program 1 times [2018-12-08 17:39:24,038 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:24,038 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:24,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:24,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:24,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:24,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:24,088 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:24,090 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:24,090 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 17:39:24,090 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 17:39:24,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 17:39:24,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 17:39:24,091 INFO L87 Difference]: Start difference. First operand 171 states and 178 transitions. Second operand 3 states. [2018-12-08 17:39:24,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:24,188 INFO L93 Difference]: Finished difference Result 182 states and 188 transitions. [2018-12-08 17:39:24,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 17:39:24,188 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-08 17:39:24,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:24,189 INFO L225 Difference]: With dead ends: 182 [2018-12-08 17:39:24,189 INFO L226 Difference]: Without dead ends: 156 [2018-12-08 17:39:24,189 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 17:39:24,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-08 17:39:24,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 148. [2018-12-08 17:39:24,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 17:39:24,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-08 17:39:24,192 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 38 [2018-12-08 17:39:24,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:24,192 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-08 17:39:24,192 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 17:39:24,193 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-08 17:39:24,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 17:39:24,193 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:24,193 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:24,194 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:24,194 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:24,194 INFO L82 PathProgramCache]: Analyzing trace with hash -567770836, now seen corresponding path program 1 times [2018-12-08 17:39:24,194 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:24,194 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:24,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:24,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:24,299 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:24,375 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:24,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:39:24,762 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:39:24,764 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:39:24,765 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:39:24,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:24,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:24,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:24,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:24,806 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:24,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:24,807 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:25,195 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-08 17:39:25,196 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:25,211 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:39:25,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [14, 14] total 36 [2018-12-08 17:39:25,211 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-12-08 17:39:25,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-12-08 17:39:25,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=1053, Unknown=0, NotChecked=0, Total=1260 [2018-12-08 17:39:25,212 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 36 states. [2018-12-08 17:39:28,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:28,491 INFO L93 Difference]: Finished difference Result 168 states and 177 transitions. [2018-12-08 17:39:28,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-08 17:39:28,492 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 47 [2018-12-08 17:39:28,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:28,492 INFO L225 Difference]: With dead ends: 168 [2018-12-08 17:39:28,493 INFO L226 Difference]: Without dead ends: 164 [2018-12-08 17:39:28,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=511, Invalid=2681, Unknown=0, NotChecked=0, Total=3192 [2018-12-08 17:39:28,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-08 17:39:28,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 152. [2018-12-08 17:39:28,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-08 17:39:28,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 158 transitions. [2018-12-08 17:39:28,497 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 158 transitions. Word has length 47 [2018-12-08 17:39:28,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:28,498 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 158 transitions. [2018-12-08 17:39:28,498 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-12-08 17:39:28,498 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 158 transitions. [2018-12-08 17:39:28,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-08 17:39:28,499 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:28,499 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:28,499 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:28,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:28,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1569882861, now seen corresponding path program 1 times [2018-12-08 17:39:28,500 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:28,500 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:28,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:28,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:28,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:28,689 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:28,689 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:28,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:28,694 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:28,863 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:28,863 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:28,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:28,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 17:39:28,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:39:28,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:39:28,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:39:28,866 INFO L87 Difference]: Start difference. First operand 152 states and 158 transitions. Second operand 13 states. [2018-12-08 17:39:29,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:29,665 INFO L93 Difference]: Finished difference Result 150 states and 156 transitions. [2018-12-08 17:39:29,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:39:29,666 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-08 17:39:29,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:29,667 INFO L225 Difference]: With dead ends: 150 [2018-12-08 17:39:29,667 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 17:39:29,667 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:39:29,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 17:39:29,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 17:39:29,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 17:39:29,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-12-08 17:39:29,669 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 53 [2018-12-08 17:39:29,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:29,670 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-12-08 17:39:29,670 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:39:29,670 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-12-08 17:39:29,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-08 17:39:29,670 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:29,670 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:29,670 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:29,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:29,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1661487265, now seen corresponding path program 1 times [2018-12-08 17:39:29,671 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:29,671 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:29,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:29,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:29,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:29,753 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:29,753 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:29,754 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:29,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 17:39:29,755 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 17:39:29,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 17:39:29,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:39:29,755 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 7 states. [2018-12-08 17:39:29,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:29,784 INFO L93 Difference]: Finished difference Result 152 states and 157 transitions. [2018-12-08 17:39:29,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 17:39:29,785 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 58 [2018-12-08 17:39:29,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:29,786 INFO L225 Difference]: With dead ends: 152 [2018-12-08 17:39:29,786 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 17:39:29,786 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:39:29,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 17:39:29,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 17:39:29,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 17:39:29,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 155 transitions. [2018-12-08 17:39:29,789 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 155 transitions. Word has length 58 [2018-12-08 17:39:29,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:29,790 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 155 transitions. [2018-12-08 17:39:29,790 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 17:39:29,790 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 155 transitions. [2018-12-08 17:39:29,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-08 17:39:29,791 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:29,791 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:29,791 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:29,791 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:29,791 INFO L82 PathProgramCache]: Analyzing trace with hash -1553192592, now seen corresponding path program 1 times [2018-12-08 17:39:29,792 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:29,792 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:29,813 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:29,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:29,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:29,920 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:29,920 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:29,922 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:29,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:39:29,922 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:39:29,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:39:29,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:39:29,922 INFO L87 Difference]: Start difference. First operand 150 states and 155 transitions. Second operand 9 states. [2018-12-08 17:39:29,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:29,982 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2018-12-08 17:39:29,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:39:29,982 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 63 [2018-12-08 17:39:29,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:29,983 INFO L225 Difference]: With dead ends: 154 [2018-12-08 17:39:29,983 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 17:39:29,983 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:39:29,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 17:39:29,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-08 17:39:29,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-08 17:39:29,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 154 transitions. [2018-12-08 17:39:29,985 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 154 transitions. Word has length 63 [2018-12-08 17:39:29,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:29,985 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 154 transitions. [2018-12-08 17:39:29,985 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:39:29,985 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 154 transitions. [2018-12-08 17:39:29,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-08 17:39:29,986 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:29,986 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:29,986 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:29,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:29,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1865578334, now seen corresponding path program 1 times [2018-12-08 17:39:29,986 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:29,986 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:30,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:30,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:30,150 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:30,153 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:30,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:30,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:30,154 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:30,391 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:30,391 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:30,394 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:30,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 17:39:30,395 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:39:30,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:39:30,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:30,395 INFO L87 Difference]: Start difference. First operand 150 states and 154 transitions. Second operand 20 states. [2018-12-08 17:39:32,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:32,065 INFO L93 Difference]: Finished difference Result 160 states and 163 transitions. [2018-12-08 17:39:32,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:39:32,066 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-08 17:39:32,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:32,066 INFO L225 Difference]: With dead ends: 160 [2018-12-08 17:39:32,066 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 17:39:32,067 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-08 17:39:32,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 17:39:32,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-08 17:39:32,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 17:39:32,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2018-12-08 17:39:32,069 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 74 [2018-12-08 17:39:32,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:32,069 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2018-12-08 17:39:32,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:39:32,069 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2018-12-08 17:39:32,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-08 17:39:32,070 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:32,070 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:32,070 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:32,070 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:32,071 INFO L82 PathProgramCache]: Analyzing trace with hash -1865578333, now seen corresponding path program 1 times [2018-12-08 17:39:32,071 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:32,071 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:32,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:32,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:32,314 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:32,320 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:32,320 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:32,325 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:32,325 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:32,667 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:32,667 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:32,670 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:32,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 17:39:32,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:39:32,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:39:32,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:32,670 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 20 states. [2018-12-08 17:39:34,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:34,381 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-12-08 17:39:34,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:39:34,381 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-08 17:39:34,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:34,382 INFO L225 Difference]: With dead ends: 146 [2018-12-08 17:39:34,382 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 17:39:34,382 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-08 17:39:34,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 17:39:34,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 17:39:34,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 17:39:34,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-08 17:39:34,385 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 74 [2018-12-08 17:39:34,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:34,385 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-08 17:39:34,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:39:34,385 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-08 17:39:34,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 17:39:34,386 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:34,386 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:34,386 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:34,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:34,387 INFO L82 PathProgramCache]: Analyzing trace with hash -590599637, now seen corresponding path program 1 times [2018-12-08 17:39:34,387 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:34,387 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:34,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:34,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:34,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:34,535 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:34,535 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:34,537 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:34,537 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 17:39:34,537 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 17:39:34,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 17:39:34,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:39:34,537 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 12 states. [2018-12-08 17:39:34,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:34,629 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2018-12-08 17:39:34,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:39:34,629 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-12-08 17:39:34,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:34,630 INFO L225 Difference]: With dead ends: 152 [2018-12-08 17:39:34,630 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 17:39:34,630 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:39:34,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 17:39:34,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-08 17:39:34,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-08 17:39:34,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 149 transitions. [2018-12-08 17:39:34,633 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 149 transitions. Word has length 85 [2018-12-08 17:39:34,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:34,633 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 149 transitions. [2018-12-08 17:39:34,633 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 17:39:34,633 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 149 transitions. [2018-12-08 17:39:34,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 17:39:34,634 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:34,634 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:34,634 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:34,635 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:34,635 INFO L82 PathProgramCache]: Analyzing trace with hash -27324397, now seen corresponding path program 1 times [2018-12-08 17:39:34,635 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:34,635 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:34,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:34,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:34,834 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:34,836 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:34,836 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:34,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:34,838 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:35,098 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:35,098 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:35,101 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:35,101 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 17:39:35,101 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:39:35,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:39:35,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:35,102 INFO L87 Difference]: Start difference. First operand 146 states and 149 transitions. Second operand 20 states. [2018-12-08 17:39:36,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:36,586 INFO L93 Difference]: Finished difference Result 160 states and 162 transitions. [2018-12-08 17:39:36,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 17:39:36,587 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-08 17:39:36,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:36,587 INFO L225 Difference]: With dead ends: 160 [2018-12-08 17:39:36,588 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 17:39:36,588 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-08 17:39:36,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 17:39:36,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 144. [2018-12-08 17:39:36,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:39:36,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 147 transitions. [2018-12-08 17:39:36,590 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 147 transitions. Word has length 98 [2018-12-08 17:39:36,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:36,591 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 147 transitions. [2018-12-08 17:39:36,591 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:39:36,591 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 147 transitions. [2018-12-08 17:39:36,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 17:39:36,591 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:36,591 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:36,592 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:36,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:36,592 INFO L82 PathProgramCache]: Analyzing trace with hash -27324396, now seen corresponding path program 1 times [2018-12-08 17:39:36,592 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:36,592 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:36,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:36,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:36,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:36,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:36,890 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:36,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:36,894 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:37,246 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:37,246 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:37,249 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:37,249 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-08 17:39:37,249 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:39:37,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:39:37,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:39:37,250 INFO L87 Difference]: Start difference. First operand 144 states and 147 transitions. Second operand 20 states. [2018-12-08 17:39:38,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:38,737 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-12-08 17:39:38,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:39:38,738 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-08 17:39:38,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:38,738 INFO L225 Difference]: With dead ends: 142 [2018-12-08 17:39:38,738 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 17:39:38,739 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-08 17:39:38,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 17:39:38,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 17:39:38,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 17:39:38,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-08 17:39:38,744 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 98 [2018-12-08 17:39:38,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:38,744 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-08 17:39:38,744 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:39:38,744 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-08 17:39:38,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-08 17:39:38,746 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:38,746 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:38,746 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:38,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:38,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1418374661, now seen corresponding path program 1 times [2018-12-08 17:39:38,747 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:38,748 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:38,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:38,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:38,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:38,918 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:38,918 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:38,920 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:38,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 17:39:38,920 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 17:39:38,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 17:39:38,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:39:38,921 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 10 states. [2018-12-08 17:39:38,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:38,976 INFO L93 Difference]: Finished difference Result 144 states and 146 transitions. [2018-12-08 17:39:38,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:39:38,977 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 96 [2018-12-08 17:39:38,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:38,977 INFO L225 Difference]: With dead ends: 144 [2018-12-08 17:39:38,977 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 17:39:38,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:39:38,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 17:39:38,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 17:39:38,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 17:39:38,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 144 transitions. [2018-12-08 17:39:38,979 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 144 transitions. Word has length 96 [2018-12-08 17:39:38,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:38,980 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 144 transitions. [2018-12-08 17:39:38,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 17:39:38,980 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2018-12-08 17:39:38,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-08 17:39:38,980 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:38,981 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:38,981 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:38,981 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:38,981 INFO L82 PathProgramCache]: Analyzing trace with hash -1449427867, now seen corresponding path program 1 times [2018-12-08 17:39:38,981 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:38,981 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:38,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:39,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:39,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:39,228 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:39,229 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:39,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:39,231 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-08 17:39:39,610 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:39,610 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:39,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:39,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 17:39:39,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 17:39:39,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 17:39:39,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:39:39,614 INFO L87 Difference]: Start difference. First operand 142 states and 144 transitions. Second operand 24 states. [2018-12-08 17:39:41,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:41,636 INFO L93 Difference]: Finished difference Result 152 states and 153 transitions. [2018-12-08 17:39:41,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 17:39:41,637 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-08 17:39:41,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:41,637 INFO L225 Difference]: With dead ends: 152 [2018-12-08 17:39:41,637 INFO L226 Difference]: Without dead ends: 152 [2018-12-08 17:39:41,637 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-08 17:39:41,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-08 17:39:41,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2018-12-08 17:39:41,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 17:39:41,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 142 transitions. [2018-12-08 17:39:41,639 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 142 transitions. Word has length 111 [2018-12-08 17:39:41,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:41,640 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 142 transitions. [2018-12-08 17:39:41,640 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 17:39:41,640 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2018-12-08 17:39:41,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-08 17:39:41,640 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:41,640 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:41,640 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:41,640 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:41,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1449427866, now seen corresponding path program 1 times [2018-12-08 17:39:41,641 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:41,641 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:41,656 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:41,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:41,946 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:41,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 17:39:41,953 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:41,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:41,957 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-08 17:39:42,472 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:39:42,473 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:39:42,476 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:39:42,476 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-08 17:39:42,477 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 17:39:42,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 17:39:42,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:39:42,477 INFO L87 Difference]: Start difference. First operand 140 states and 142 transitions. Second operand 24 states. [2018-12-08 17:39:44,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:39:44,534 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-12-08 17:39:44,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 17:39:44,535 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-08 17:39:44,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:39:44,536 INFO L225 Difference]: With dead ends: 138 [2018-12-08 17:39:44,536 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 17:39:44,536 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-08 17:39:44,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 17:39:44,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-08 17:39:44,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-08 17:39:44,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-08 17:39:44,538 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 111 [2018-12-08 17:39:44,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:39:44,538 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-08 17:39:44,539 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 17:39:44,539 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-08 17:39:44,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-08 17:39:44,539 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:39:44,539 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:39:44,540 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:39:44,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:39:44,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1759453353, now seen corresponding path program 1 times [2018-12-08 17:39:44,540 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:39:44,540 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:39:44,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:39:45,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:39:45,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:39:45,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-08 17:39:45,080 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-08 17:39:45,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,083 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,090 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-08 17:39:45,113 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-08 17:39:45,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,119 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-08 17:39:45,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,128 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,138 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,138 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-08 17:39:45,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-08 17:39:45,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-08 17:39:45,176 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,193 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-08 17:39:45,256 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-08 17:39:45,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,269 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-08 17:39:45,270 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,322 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-08 17:39:45,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-08 17:39:45,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-08 17:39:45,400 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,452 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,484 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-08 17:39:45,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-08 17:39:45,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,600 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-08 17:39:45,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,674 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,711 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-08 17:39:45,817 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-08 17:39:45,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:45,870 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-08 17:39:45,871 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:45,974 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,018 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-08 17:39:46,144 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-08 17:39:46,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,210 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-08 17:39:46,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,356 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-08 17:39:46,544 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-08 17:39:46,553 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,563 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,577 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:46,640 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-08 17:39:46,641 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,919 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:46,919 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-08 17:39:47,103 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-08 17:39:47,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,224 INFO L303 Elim1Store]: Index analysis took 119 ms [2018-12-08 17:39:47,225 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-08 17:39:47,226 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:47,507 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:47,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:47,587 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-08 17:39:47,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-08 17:39:47,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:47,962 INFO L303 Elim1Store]: Index analysis took 156 ms [2018-12-08 17:39:47,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-08 17:39:47,965 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:48,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:48,450 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:48,450 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-08 17:39:48,681 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 53 [2018-12-08 17:39:48,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-08 17:39:48,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,738 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,796 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,799 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,832 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:48,967 INFO L303 Elim1Store]: Index analysis took 250 ms [2018-12-08 17:39:48,969 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-08 17:39:48,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:49,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:49,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:49,551 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-08 17:39:49,796 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-08 17:39:49,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:49,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,045 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,062 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:50,074 INFO L303 Elim1Store]: Index analysis took 276 ms [2018-12-08 17:39:50,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-08 17:39:50,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:50,673 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:50,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:50,794 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-08 17:39:51,065 WARN L180 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 17:39:51,099 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-08 17:39:51,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,294 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,307 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,462 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,567 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,724 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,768 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:51,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:52,110 INFO L303 Elim1Store]: Index analysis took 1009 ms [2018-12-08 17:39:52,111 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-08 17:39:52,112 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:52,817 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:52,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:52,964 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-08 17:39:53,277 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-08 17:39:53,307 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-08 17:39:53,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,526 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,553 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,582 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:53,719 INFO L303 Elim1Store]: Index analysis took 410 ms [2018-12-08 17:39:53,721 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-08 17:39:53,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:54,558 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:54,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:54,726 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-08 17:39:55,083 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-08 17:39:55,123 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-08 17:39:55,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,362 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,379 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,547 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:55,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,008 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:39:56,788 INFO L303 Elim1Store]: Index analysis took 1662 ms [2018-12-08 17:39:56,789 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-08 17:39:56,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:39:57,837 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:58,008 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:39:58,008 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-08 17:39:58,441 WARN L180 SmtUtils]: Spent 170.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-08 17:40:00,286 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:00,292 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:00,298 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:00,299 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-08 17:40:02,304 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-08 17:40:04,310 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-08 17:40:04,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,423 INFO L303 Elim1Store]: Index analysis took 110 ms [2018-12-08 17:40:04,423 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-08 17:40:04,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:04,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:05,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:06,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,075 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:07,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,070 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,372 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,481 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,593 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,814 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:08,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,305 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:09,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:10,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,783 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:11,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:12,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:12,092 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:12,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:12,139 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 17:40:13,926 INFO L303 Elim1Store]: Index analysis took 9499 ms [2018-12-08 17:40:14,149 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-08 17:40:14,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,329 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,382 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,626 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:14,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,122 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,485 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,530 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:15,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,086 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,175 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:16,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,153 INFO L303 Elim1Store]: Index analysis took 2966 ms [2018-12-08 17:40:17,155 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-08 17:40:17,902 WARN L180 SmtUtils]: Spent 744.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-08 17:40:17,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:17,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,122 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,291 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,543 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,576 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,724 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:18,754 INFO L303 Elim1Store]: Index analysis took 850 ms [2018-12-08 17:40:18,756 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-08 17:40:18,757 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:19,146 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:20,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,713 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:20,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,472 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:21,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,186 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,399 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,765 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,795 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:22,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,692 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:23,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,030 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,081 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,298 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:24,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:25,286 INFO L303 Elim1Store]: Index analysis took 4751 ms [2018-12-08 17:40:25,367 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-08 17:40:27,174 WARN L180 SmtUtils]: Spent 1.80 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-08 17:40:27,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,363 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,377 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,394 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,426 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,590 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,610 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:27,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,063 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:28,449 INFO L303 Elim1Store]: Index analysis took 1272 ms [2018-12-08 17:40:28,450 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-08 17:40:28,451 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:29,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,094 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,102 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,387 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,495 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,519 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,615 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,706 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,743 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,752 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,762 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,791 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:29,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,049 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:30,330 INFO L303 Elim1Store]: Index analysis took 1308 ms [2018-12-08 17:40:30,332 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-08 17:40:30,333 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:30,780 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-08 17:40:30,923 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 17:40:30,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:31,041 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:31,042 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-08 17:40:34,427 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 96 [2018-12-08 17:40:34,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:34,461 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 200 [2018-12-08 17:40:34,462 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:34,510 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:34,538 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:34,538 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:132, output treesize:113 [2018-12-08 17:40:36,700 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 88 [2018-12-08 17:40:36,930 INFO L303 Elim1Store]: Index analysis took 228 ms [2018-12-08 17:40:36,931 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 106 [2018-12-08 17:40:36,931 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:36,957 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:36,982 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:36,982 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:121, output treesize:106 [2018-12-08 17:40:39,115 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-08 17:40:39,191 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-08 17:40:39,192 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-08 17:40:39,192 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-08 17:40:39,246 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 17:40:39,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-08 17:40:39,296 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-08 17:40:40,223 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 17:40:40,223 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:40:42,343 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:42,345 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:42,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:42,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-08 17:40:42,654 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:40:42,655 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:40:42,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:40:42,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:40:42,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:40:43,491 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-08 17:40:43,498 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-08 17:40:43,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:43,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:43,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:43,503 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-08 17:40:44,890 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:44,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:44,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-08 17:40:44,918 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-08 17:40:47,390 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-08 17:40:47,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-08 17:40:47,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:47,407 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-08 17:40:47,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:47,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:47,413 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:47,418 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-08 17:40:47,418 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:47,428 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:47,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:47,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:47,453 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-08 17:40:52,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:52,874 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-08 17:40:52,877 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 17:40:52,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 17:40:52,879 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 15 [2018-12-08 17:40:52,879 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:52,883 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:52,887 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:52,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-08 17:40:56,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-08 17:40:56,779 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-08 17:40:56,780 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 17:40:56,781 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:56,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 17:40:56,782 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-08 17:40:57,108 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-08 17:40:57,108 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:40:57,125 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:40:57,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [42] imperfect sequences [63] total 101 [2018-12-08 17:40:57,125 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2018-12-08 17:40:57,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2018-12-08 17:40:57,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=320, Invalid=11458, Unknown=2, NotChecked=430, Total=12210 [2018-12-08 17:40:57,127 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 101 states. [2018-12-08 17:41:53,692 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-08 17:41:59,061 WARN L180 SmtUtils]: Spent 4.11 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-08 17:42:04,047 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-08 17:42:10,352 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-08 17:42:32,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:42:32,707 INFO L93 Difference]: Finished difference Result 116 states and 116 transitions. [2018-12-08 17:42:32,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-12-08 17:42:32,708 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 116 [2018-12-08 17:42:32,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:42:32,708 INFO L225 Difference]: With dead ends: 116 [2018-12-08 17:42:32,708 INFO L226 Difference]: Without dead ends: 116 [2018-12-08 17:42:32,711 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 152 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3510 ImplicationChecksByTransitivity, 55.0s TimeCoverageRelationStatistics Valid=742, Invalid=22216, Unknown=2, NotChecked=602, Total=23562 [2018-12-08 17:42:32,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-08 17:42:32,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-08 17:42:32,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-08 17:42:32,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-12-08 17:42:32,712 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 116 [2018-12-08 17:42:32,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:42:32,712 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-12-08 17:42:32,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2018-12-08 17:42:32,712 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-12-08 17:42:32,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-08 17:42:32,713 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:42:32,713 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:42:32,713 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION]=== [2018-12-08 17:42:32,713 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:42:32,713 INFO L82 PathProgramCache]: Analyzing trace with hash -626319491, now seen corresponding path program 1 times [2018-12-08 17:42:32,713 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:42:32,713 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8ec3a340-0f8e-44ec-b81c-76fadf1c715f/bin-2019/utaipan/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:42:32,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:42:37,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 17:42:41,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 17:42:41,669 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 17:42:41,679 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 17:42:41,686 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-08 17:42:41,696 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 17:42:41,696 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-08 17:42:41,707 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 05:42:41 BoogieIcfgContainer [2018-12-08 17:42:41,707 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 17:42:41,707 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 17:42:41,708 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 17:42:41,708 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 17:42:41,708 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:39:17" (3/4) ... [2018-12-08 17:42:41,711 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 17:42:41,711 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 17:42:41,711 INFO L168 Benchmark]: Toolchain (without parser) took 204936.75 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 293.1 MB). Free memory was 939.4 MB in the beginning and 866.8 MB in the end (delta: 72.6 MB). Peak memory consumption was 365.6 MB. Max. memory is 11.5 GB. [2018-12-08 17:42:41,712 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:42:41,712 INFO L168 Benchmark]: CACSL2BoogieTranslator took 339.02 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.9 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -177.0 MB). Peak memory consumption was 37.2 MB. Max. memory is 11.5 GB. [2018-12-08 17:42:41,712 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.51 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:42:41,712 INFO L168 Benchmark]: Boogie Preprocessor took 22.68 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:42:41,712 INFO L168 Benchmark]: RCFGBuilder took 342.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 52.7 MB). Peak memory consumption was 52.7 MB. Max. memory is 11.5 GB. [2018-12-08 17:42:41,713 INFO L168 Benchmark]: TraceAbstraction took 204205.27 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 143.1 MB). Free memory was 1.1 GB in the beginning and 866.8 MB in the end (delta: 196.9 MB). Peak memory consumption was 340.0 MB. Max. memory is 11.5 GB. [2018-12-08 17:42:41,713 INFO L168 Benchmark]: Witness Printer took 3.45 ms. Allocated memory is still 1.3 GB. Free memory is still 866.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:42:41,714 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 339.02 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 149.9 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -177.0 MB). Peak memory consumption was 37.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 21.51 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 22.68 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 342.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 52.7 MB). Peak memory consumption was 52.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 204205.27 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 143.1 MB). Free memory was 1.1 GB in the beginning and 866.8 MB in the end (delta: 196.9 MB). Peak memory consumption was 340.0 MB. Max. memory is 11.5 GB. * Witness Printer took 3.45 ms. Allocated memory is still 1.3 GB. Free memory is still 866.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1453] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1445] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1446] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1446] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1447] RET f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1453] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 145 locations, 23 error locations. UNSAFE Result, 204.1s OverallTime, 24 OverallIterations, 16 TraceHistogramMax, 115.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2783 SDtfs, 1468 SDslu, 23111 SDs, 0 SdLazy, 17230 SolverSat, 458 SolverUnsat, 7 SolverUnknown, 0 SolverNotchecked, 84.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1851 GetRequests, 1300 SyntacticMatches, 41 SemanticMatches, 510 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 4561 ImplicationChecksByTransitivity, 61.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=171occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 23 MinimizatonAttempts, 155 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.8s SatisfiabilityAnalysisTime, 76.3s InterpolantComputationTime, 1719 NumberOfCodeBlocks, 1719 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1690 ConstructedInterpolants, 357 QuantifiedInterpolants, 1264276 SizeOfPredicates, 236 NumberOfNonLiveVariables, 6572 ConjunctsInSsa, 664 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1698/1966 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...