./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe031_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe031_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 24849c867d7852f51047e765a239b7226a0f0861 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 15:21:52,781 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 15:21:52,783 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 15:21:52,790 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 15:21:52,791 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 15:21:52,791 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 15:21:52,792 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 15:21:52,793 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 15:21:52,794 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 15:21:52,795 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 15:21:52,795 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 15:21:52,796 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 15:21:52,796 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 15:21:52,797 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 15:21:52,798 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 15:21:52,798 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 15:21:52,799 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 15:21:52,800 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 15:21:52,801 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 15:21:52,802 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 15:21:52,803 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 15:21:52,804 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 15:21:52,806 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 15:21:52,806 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 15:21:52,806 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 15:21:52,807 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 15:21:52,807 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 15:21:52,808 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 15:21:52,809 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 15:21:52,809 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 15:21:52,809 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 15:21:52,810 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 15:21:52,810 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 15:21:52,810 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 15:21:52,811 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 15:21:52,811 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 15:21:52,812 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-09 15:21:52,822 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 15:21:52,822 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 15:21:52,822 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 15:21:52,822 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 15:21:52,823 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 15:21:52,823 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 15:21:52,824 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 15:21:52,824 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 15:21:52,825 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 15:21:52,825 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 15:21:52,826 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-09 15:21:52,826 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 24849c867d7852f51047e765a239b7226a0f0861 [2018-12-09 15:21:52,847 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 15:21:52,856 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 15:21:52,858 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 15:21:52,859 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 15:21:52,859 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 15:21:52,860 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/safe031_power.opt_false-unreach-call.i [2018-12-09 15:21:52,896 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/data/f0d145fb0/d0c08bf64df748a7bf2cda676c56b0e7/FLAGb980da0d0 [2018-12-09 15:21:53,275 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 15:21:53,275 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/sv-benchmarks/c/pthread-wmm/safe031_power.opt_false-unreach-call.i [2018-12-09 15:21:53,282 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/data/f0d145fb0/d0c08bf64df748a7bf2cda676c56b0e7/FLAGb980da0d0 [2018-12-09 15:21:53,629 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/data/f0d145fb0/d0c08bf64df748a7bf2cda676c56b0e7 [2018-12-09 15:21:53,633 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 15:21:53,635 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 15:21:53,636 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 15:21:53,636 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 15:21:53,640 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 15:21:53,641 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:53,643 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@340b48b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53, skipping insertion in model container [2018-12-09 15:21:53,643 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:53,648 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 15:21:53,671 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 15:21:53,847 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 15:21:53,855 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 15:21:53,932 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 15:21:53,962 INFO L195 MainTranslator]: Completed translation [2018-12-09 15:21:53,963 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53 WrapperNode [2018-12-09 15:21:53,963 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 15:21:53,963 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 15:21:53,963 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 15:21:53,963 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 15:21:53,968 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:53,978 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:53,995 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 15:21:53,995 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 15:21:53,996 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 15:21:53,996 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 15:21:54,001 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,002 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,004 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,004 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,010 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,012 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,013 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... [2018-12-09 15:21:54,015 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 15:21:54,016 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 15:21:54,016 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 15:21:54,016 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 15:21:54,016 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 15:21:54,047 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-09 15:21:54,048 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-09 15:21:54,048 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-09 15:21:54,048 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-09 15:21:54,048 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 15:21:54,048 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 15:21:54,049 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-09 15:21:54,369 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 15:21:54,369 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-09 15:21:54,369 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:21:54 BoogieIcfgContainer [2018-12-09 15:21:54,369 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 15:21:54,370 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 15:21:54,370 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 15:21:54,372 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 15:21:54,372 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 03:21:53" (1/3) ... [2018-12-09 15:21:54,372 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@166b9c44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:21:54, skipping insertion in model container [2018-12-09 15:21:54,372 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:21:53" (2/3) ... [2018-12-09 15:21:54,372 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@166b9c44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:21:54, skipping insertion in model container [2018-12-09 15:21:54,373 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:21:54" (3/3) ... [2018-12-09 15:21:54,373 INFO L112 eAbstractionObserver]: Analyzing ICFG safe031_power.opt_false-unreach-call.i [2018-12-09 15:21:54,396 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,396 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,397 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,398 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,399 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,400 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,401 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,402 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,403 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,404 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,405 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,406 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,407 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 15:21:54,411 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-09 15:21:54,411 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 15:21:54,417 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-09 15:21:54,426 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-09 15:21:54,441 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 15:21:54,441 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 15:21:54,441 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 15:21:54,441 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 15:21:54,441 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 15:21:54,441 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 15:21:54,441 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 15:21:54,442 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 15:21:54,448 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 155places, 192 transitions [2018-12-09 15:22:09,460 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 128912 states. [2018-12-09 15:22:09,462 INFO L276 IsEmpty]: Start isEmpty. Operand 128912 states. [2018-12-09 15:22:09,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-12-09 15:22:09,469 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:09,470 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:09,471 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:09,474 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:09,475 INFO L82 PathProgramCache]: Analyzing trace with hash 961127934, now seen corresponding path program 1 times [2018-12-09 15:22:09,476 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:09,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:09,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:09,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:09,510 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:09,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:09,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:09,638 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:09,638 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:09,638 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:09,641 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:09,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:09,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:09,651 INFO L87 Difference]: Start difference. First operand 128912 states. Second operand 4 states. [2018-12-09 15:22:10,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:10,924 INFO L93 Difference]: Finished difference Result 233472 states and 1098324 transitions. [2018-12-09 15:22:10,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 15:22:10,925 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2018-12-09 15:22:10,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:11,695 INFO L225 Difference]: With dead ends: 233472 [2018-12-09 15:22:11,695 INFO L226 Difference]: Without dead ends: 203722 [2018-12-09 15:22:11,696 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:14,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203722 states. [2018-12-09 15:22:16,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203722 to 118892. [2018-12-09 15:22:16,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-12-09 15:22:16,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 559775 transitions. [2018-12-09 15:22:16,866 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 559775 transitions. Word has length 43 [2018-12-09 15:22:16,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:16,866 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 559775 transitions. [2018-12-09 15:22:16,867 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:16,867 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 559775 transitions. [2018-12-09 15:22:16,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-09 15:22:16,873 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:16,873 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:16,874 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:16,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:16,874 INFO L82 PathProgramCache]: Analyzing trace with hash -94457539, now seen corresponding path program 1 times [2018-12-09 15:22:16,874 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:16,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:16,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:16,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:16,877 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:16,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:16,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:16,915 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:16,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 15:22:16,915 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:16,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 15:22:16,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 15:22:16,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:22:16,916 INFO L87 Difference]: Start difference. First operand 118892 states and 559775 transitions. Second operand 3 states. [2018-12-09 15:22:17,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:17,474 INFO L93 Difference]: Finished difference Result 118892 states and 557815 transitions. [2018-12-09 15:22:17,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 15:22:17,475 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2018-12-09 15:22:17,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:17,823 INFO L225 Difference]: With dead ends: 118892 [2018-12-09 15:22:17,823 INFO L226 Difference]: Without dead ends: 118892 [2018-12-09 15:22:17,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:22:19,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118892 states. [2018-12-09 15:22:20,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118892 to 118892. [2018-12-09 15:22:20,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118892 states. [2018-12-09 15:22:20,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118892 states to 118892 states and 557815 transitions. [2018-12-09 15:22:20,594 INFO L78 Accepts]: Start accepts. Automaton has 118892 states and 557815 transitions. Word has length 50 [2018-12-09 15:22:20,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:20,594 INFO L480 AbstractCegarLoop]: Abstraction has 118892 states and 557815 transitions. [2018-12-09 15:22:20,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 15:22:20,594 INFO L276 IsEmpty]: Start isEmpty. Operand 118892 states and 557815 transitions. [2018-12-09 15:22:20,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-09 15:22:20,598 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:20,598 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:20,598 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:20,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:20,598 INFO L82 PathProgramCache]: Analyzing trace with hash -1901912002, now seen corresponding path program 1 times [2018-12-09 15:22:20,598 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:20,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:20,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:20,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:20,600 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:20,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:20,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:20,655 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:20,655 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 15:22:20,655 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:20,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 15:22:20,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 15:22:20,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:20,655 INFO L87 Difference]: Start difference. First operand 118892 states and 557815 transitions. Second operand 5 states. [2018-12-09 15:22:23,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:23,715 INFO L93 Difference]: Finished difference Result 325272 states and 1468249 transitions. [2018-12-09 15:22:23,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:22:23,716 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-12-09 15:22:23,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:24,577 INFO L225 Difference]: With dead ends: 325272 [2018-12-09 15:22:24,577 INFO L226 Difference]: Without dead ends: 324272 [2018-12-09 15:22:24,577 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:22:25,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324272 states. [2018-12-09 15:22:29,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324272 to 186422. [2018-12-09 15:22:29,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186422 states. [2018-12-09 15:22:30,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186422 states to 186422 states and 840914 transitions. [2018-12-09 15:22:30,111 INFO L78 Accepts]: Start accepts. Automaton has 186422 states and 840914 transitions. Word has length 50 [2018-12-09 15:22:30,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:30,112 INFO L480 AbstractCegarLoop]: Abstraction has 186422 states and 840914 transitions. [2018-12-09 15:22:30,112 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 15:22:30,112 INFO L276 IsEmpty]: Start isEmpty. Operand 186422 states and 840914 transitions. [2018-12-09 15:22:30,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-09 15:22:30,117 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:30,117 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:30,118 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:30,118 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:30,118 INFO L82 PathProgramCache]: Analyzing trace with hash 945118259, now seen corresponding path program 1 times [2018-12-09 15:22:30,118 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:30,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:30,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:30,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:30,120 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:30,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:30,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:30,159 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:30,159 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:30,159 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:30,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:30,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:30,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:30,159 INFO L87 Difference]: Start difference. First operand 186422 states and 840914 transitions. Second operand 4 states. [2018-12-09 15:22:30,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:30,891 INFO L93 Difference]: Finished difference Result 163598 states and 725472 transitions. [2018-12-09 15:22:30,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:22:30,892 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 51 [2018-12-09 15:22:30,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:31,283 INFO L225 Difference]: With dead ends: 163598 [2018-12-09 15:22:31,283 INFO L226 Difference]: Without dead ends: 160993 [2018-12-09 15:22:31,283 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:32,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160993 states. [2018-12-09 15:22:36,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160993 to 160993. [2018-12-09 15:22:36,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160993 states. [2018-12-09 15:22:36,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160993 states to 160993 states and 716800 transitions. [2018-12-09 15:22:36,679 INFO L78 Accepts]: Start accepts. Automaton has 160993 states and 716800 transitions. Word has length 51 [2018-12-09 15:22:36,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:36,679 INFO L480 AbstractCegarLoop]: Abstraction has 160993 states and 716800 transitions. [2018-12-09 15:22:36,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:36,679 INFO L276 IsEmpty]: Start isEmpty. Operand 160993 states and 716800 transitions. [2018-12-09 15:22:36,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 15:22:36,684 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:36,684 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:36,684 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:36,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:36,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1724507505, now seen corresponding path program 1 times [2018-12-09 15:22:36,684 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:36,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:36,686 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:36,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:36,686 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:36,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:36,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:36,728 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:36,728 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 15:22:36,728 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:36,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 15:22:36,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 15:22:36,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:36,729 INFO L87 Difference]: Start difference. First operand 160993 states and 716800 transitions. Second operand 5 states. [2018-12-09 15:22:36,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:36,944 INFO L93 Difference]: Finished difference Result 51405 states and 209121 transitions. [2018-12-09 15:22:36,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 15:22:36,944 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2018-12-09 15:22:36,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:37,037 INFO L225 Difference]: With dead ends: 51405 [2018-12-09 15:22:37,038 INFO L226 Difference]: Without dead ends: 49093 [2018-12-09 15:22:37,038 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:37,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49093 states. [2018-12-09 15:22:37,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49093 to 49093. [2018-12-09 15:22:37,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49093 states. [2018-12-09 15:22:38,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49093 states to 49093 states and 200467 transitions. [2018-12-09 15:22:38,097 INFO L78 Accepts]: Start accepts. Automaton has 49093 states and 200467 transitions. Word has length 52 [2018-12-09 15:22:38,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:38,098 INFO L480 AbstractCegarLoop]: Abstraction has 49093 states and 200467 transitions. [2018-12-09 15:22:38,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 15:22:38,098 INFO L276 IsEmpty]: Start isEmpty. Operand 49093 states and 200467 transitions. [2018-12-09 15:22:38,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-09 15:22:38,106 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:38,106 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:38,106 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:38,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:38,106 INFO L82 PathProgramCache]: Analyzing trace with hash 206449116, now seen corresponding path program 1 times [2018-12-09 15:22:38,106 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:38,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:38,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:38,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:38,108 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:38,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:38,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:38,144 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:38,144 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:38,144 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:38,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:38,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:38,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:38,144 INFO L87 Difference]: Start difference. First operand 49093 states and 200467 transitions. Second operand 4 states. [2018-12-09 15:22:38,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:38,480 INFO L93 Difference]: Finished difference Result 70361 states and 282256 transitions. [2018-12-09 15:22:38,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:22:38,481 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2018-12-09 15:22:38,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:38,614 INFO L225 Difference]: With dead ends: 70361 [2018-12-09 15:22:38,614 INFO L226 Difference]: Without dead ends: 70361 [2018-12-09 15:22:38,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:38,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70361 states. [2018-12-09 15:22:39,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70361 to 53657. [2018-12-09 15:22:39,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53657 states. [2018-12-09 15:22:39,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53657 states to 53657 states and 217408 transitions. [2018-12-09 15:22:39,507 INFO L78 Accepts]: Start accepts. Automaton has 53657 states and 217408 transitions. Word has length 65 [2018-12-09 15:22:39,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:39,507 INFO L480 AbstractCegarLoop]: Abstraction has 53657 states and 217408 transitions. [2018-12-09 15:22:39,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:39,507 INFO L276 IsEmpty]: Start isEmpty. Operand 53657 states and 217408 transitions. [2018-12-09 15:22:39,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-09 15:22:39,519 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:39,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:39,520 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:39,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:39,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1949259451, now seen corresponding path program 1 times [2018-12-09 15:22:39,520 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:39,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:39,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:39,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:39,522 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:39,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:39,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:39,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:39,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 15:22:39,594 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:39,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:22:39,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:22:39,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:22:39,594 INFO L87 Difference]: Start difference. First operand 53657 states and 217408 transitions. Second operand 6 states. [2018-12-09 15:22:39,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:39,910 INFO L93 Difference]: Finished difference Result 69863 states and 278244 transitions. [2018-12-09 15:22:39,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:22:39,910 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-12-09 15:22:39,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:40,044 INFO L225 Difference]: With dead ends: 69863 [2018-12-09 15:22:40,044 INFO L226 Difference]: Without dead ends: 69863 [2018-12-09 15:22:40,044 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:40,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69863 states. [2018-12-09 15:22:41,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69863 to 50543. [2018-12-09 15:22:41,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50543 states. [2018-12-09 15:22:41,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50543 states to 50543 states and 197926 transitions. [2018-12-09 15:22:41,196 INFO L78 Accepts]: Start accepts. Automaton has 50543 states and 197926 transitions. Word has length 65 [2018-12-09 15:22:41,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:41,196 INFO L480 AbstractCegarLoop]: Abstraction has 50543 states and 197926 transitions. [2018-12-09 15:22:41,196 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:22:41,197 INFO L276 IsEmpty]: Start isEmpty. Operand 50543 states and 197926 transitions. [2018-12-09 15:22:41,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-09 15:22:41,205 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:41,205 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:41,205 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:41,206 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:41,206 INFO L82 PathProgramCache]: Analyzing trace with hash 2035427671, now seen corresponding path program 1 times [2018-12-09 15:22:41,206 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:41,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:41,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,207 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:41,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:41,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:41,264 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:41,264 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 15:22:41,264 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:41,264 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:22:41,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:22:41,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:22:41,265 INFO L87 Difference]: Start difference. First operand 50543 states and 197926 transitions. Second operand 6 states. [2018-12-09 15:22:41,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:41,314 INFO L93 Difference]: Finished difference Result 9615 states and 32198 transitions. [2018-12-09 15:22:41,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 15:22:41,314 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-12-09 15:22:41,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:41,324 INFO L225 Difference]: With dead ends: 9615 [2018-12-09 15:22:41,324 INFO L226 Difference]: Without dead ends: 8287 [2018-12-09 15:22:41,324 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:22:41,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8287 states. [2018-12-09 15:22:41,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8287 to 7997. [2018-12-09 15:22:41,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7997 states. [2018-12-09 15:22:41,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7997 states to 7997 states and 26709 transitions. [2018-12-09 15:22:41,403 INFO L78 Accepts]: Start accepts. Automaton has 7997 states and 26709 transitions. Word has length 65 [2018-12-09 15:22:41,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:41,403 INFO L480 AbstractCegarLoop]: Abstraction has 7997 states and 26709 transitions. [2018-12-09 15:22:41,403 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:22:41,403 INFO L276 IsEmpty]: Start isEmpty. Operand 7997 states and 26709 transitions. [2018-12-09 15:22:41,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:41,412 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:41,412 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:41,412 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:41,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:41,412 INFO L82 PathProgramCache]: Analyzing trace with hash 1784329644, now seen corresponding path program 1 times [2018-12-09 15:22:41,412 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:41,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,414 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:41,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,414 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:41,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:41,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:41,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:41,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 15:22:41,449 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:41,449 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 15:22:41,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 15:22:41,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:22:41,450 INFO L87 Difference]: Start difference. First operand 7997 states and 26709 transitions. Second operand 3 states. [2018-12-09 15:22:41,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:41,518 INFO L93 Difference]: Finished difference Result 8417 states and 27860 transitions. [2018-12-09 15:22:41,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 15:22:41,518 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2018-12-09 15:22:41,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:41,527 INFO L225 Difference]: With dead ends: 8417 [2018-12-09 15:22:41,527 INFO L226 Difference]: Without dead ends: 8417 [2018-12-09 15:22:41,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:22:41,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8417 states. [2018-12-09 15:22:41,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8417 to 8187. [2018-12-09 15:22:41,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8187 states. [2018-12-09 15:22:41,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8187 states to 8187 states and 27231 transitions. [2018-12-09 15:22:41,606 INFO L78 Accepts]: Start accepts. Automaton has 8187 states and 27231 transitions. Word has length 100 [2018-12-09 15:22:41,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:41,606 INFO L480 AbstractCegarLoop]: Abstraction has 8187 states and 27231 transitions. [2018-12-09 15:22:41,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 15:22:41,606 INFO L276 IsEmpty]: Start isEmpty. Operand 8187 states and 27231 transitions. [2018-12-09 15:22:41,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:41,615 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:41,615 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:41,615 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:41,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:41,615 INFO L82 PathProgramCache]: Analyzing trace with hash 1102539179, now seen corresponding path program 1 times [2018-12-09 15:22:41,615 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:41,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:41,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:41,617 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:41,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:41,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:41,705 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:41,705 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 15:22:41,705 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:41,705 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:22:41,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:22:41,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:41,705 INFO L87 Difference]: Start difference. First operand 8187 states and 27231 transitions. Second operand 7 states. [2018-12-09 15:22:41,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:41,939 INFO L93 Difference]: Finished difference Result 11661 states and 38096 transitions. [2018-12-09 15:22:41,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 15:22:41,940 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-12-09 15:22:41,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:41,951 INFO L225 Difference]: With dead ends: 11661 [2018-12-09 15:22:41,951 INFO L226 Difference]: Without dead ends: 11661 [2018-12-09 15:22:41,952 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:41,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11661 states. [2018-12-09 15:22:42,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11661 to 8907. [2018-12-09 15:22:42,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8907 states. [2018-12-09 15:22:42,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8907 states to 8907 states and 29372 transitions. [2018-12-09 15:22:42,048 INFO L78 Accepts]: Start accepts. Automaton has 8907 states and 29372 transitions. Word has length 100 [2018-12-09 15:22:42,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:42,049 INFO L480 AbstractCegarLoop]: Abstraction has 8907 states and 29372 transitions. [2018-12-09 15:22:42,049 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:22:42,049 INFO L276 IsEmpty]: Start isEmpty. Operand 8907 states and 29372 transitions. [2018-12-09 15:22:42,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:42,058 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:42,058 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:42,058 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:42,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:42,058 INFO L82 PathProgramCache]: Analyzing trace with hash 179855596, now seen corresponding path program 1 times [2018-12-09 15:22:42,058 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:42,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:42,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,059 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:42,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:42,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:42,094 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:42,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:42,094 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:42,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:42,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:42,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:42,095 INFO L87 Difference]: Start difference. First operand 8907 states and 29372 transitions. Second operand 4 states. [2018-12-09 15:22:42,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:42,194 INFO L93 Difference]: Finished difference Result 12026 states and 38686 transitions. [2018-12-09 15:22:42,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:22:42,194 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-12-09 15:22:42,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:42,206 INFO L225 Difference]: With dead ends: 12026 [2018-12-09 15:22:42,206 INFO L226 Difference]: Without dead ends: 12026 [2018-12-09 15:22:42,206 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:42,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12026 states. [2018-12-09 15:22:42,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12026 to 9284. [2018-12-09 15:22:42,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9284 states. [2018-12-09 15:22:42,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9284 states to 9284 states and 30393 transitions. [2018-12-09 15:22:42,307 INFO L78 Accepts]: Start accepts. Automaton has 9284 states and 30393 transitions. Word has length 100 [2018-12-09 15:22:42,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:42,307 INFO L480 AbstractCegarLoop]: Abstraction has 9284 states and 30393 transitions. [2018-12-09 15:22:42,307 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:42,307 INFO L276 IsEmpty]: Start isEmpty. Operand 9284 states and 30393 transitions. [2018-12-09 15:22:42,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:42,317 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:42,317 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:42,317 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:42,317 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:42,317 INFO L82 PathProgramCache]: Analyzing trace with hash 2044047387, now seen corresponding path program 2 times [2018-12-09 15:22:42,317 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:42,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,318 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:42,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,318 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:42,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:42,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:42,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:42,352 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:42,353 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:42,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:42,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:42,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:42,353 INFO L87 Difference]: Start difference. First operand 9284 states and 30393 transitions. Second operand 4 states. [2018-12-09 15:22:42,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:42,437 INFO L93 Difference]: Finished difference Result 11299 states and 36460 transitions. [2018-12-09 15:22:42,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 15:22:42,437 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-12-09 15:22:42,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:42,448 INFO L225 Difference]: With dead ends: 11299 [2018-12-09 15:22:42,448 INFO L226 Difference]: Without dead ends: 11299 [2018-12-09 15:22:42,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:42,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11299 states. [2018-12-09 15:22:42,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11299 to 9334. [2018-12-09 15:22:42,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9334 states. [2018-12-09 15:22:42,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9334 states to 9334 states and 30528 transitions. [2018-12-09 15:22:42,546 INFO L78 Accepts]: Start accepts. Automaton has 9334 states and 30528 transitions. Word has length 100 [2018-12-09 15:22:42,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:42,547 INFO L480 AbstractCegarLoop]: Abstraction has 9334 states and 30528 transitions. [2018-12-09 15:22:42,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:42,547 INFO L276 IsEmpty]: Start isEmpty. Operand 9334 states and 30528 transitions. [2018-12-09 15:22:42,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:42,556 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:42,556 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:42,556 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:42,556 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:42,556 INFO L82 PathProgramCache]: Analyzing trace with hash 309684232, now seen corresponding path program 2 times [2018-12-09 15:22:42,556 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:42,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,557 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:42,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,558 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:42,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:42,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:42,607 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:42,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 15:22:42,607 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:42,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 15:22:42,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 15:22:42,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:42,608 INFO L87 Difference]: Start difference. First operand 9334 states and 30528 transitions. Second operand 5 states. [2018-12-09 15:22:42,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:42,734 INFO L93 Difference]: Finished difference Result 12433 states and 39916 transitions. [2018-12-09 15:22:42,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:22:42,734 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 100 [2018-12-09 15:22:42,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:42,747 INFO L225 Difference]: With dead ends: 12433 [2018-12-09 15:22:42,747 INFO L226 Difference]: Without dead ends: 12433 [2018-12-09 15:22:42,747 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:22:42,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12433 states. [2018-12-09 15:22:42,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12433 to 9804. [2018-12-09 15:22:42,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9804 states. [2018-12-09 15:22:42,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9804 states to 9804 states and 31874 transitions. [2018-12-09 15:22:42,854 INFO L78 Accepts]: Start accepts. Automaton has 9804 states and 31874 transitions. Word has length 100 [2018-12-09 15:22:42,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:42,854 INFO L480 AbstractCegarLoop]: Abstraction has 9804 states and 31874 transitions. [2018-12-09 15:22:42,854 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 15:22:42,854 INFO L276 IsEmpty]: Start isEmpty. Operand 9804 states and 31874 transitions. [2018-12-09 15:22:42,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:42,863 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:42,863 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:42,863 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:42,864 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:42,864 INFO L82 PathProgramCache]: Analyzing trace with hash -755719330, now seen corresponding path program 3 times [2018-12-09 15:22:42,864 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:42,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,865 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:42,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:42,865 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:42,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:42,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:42,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:42,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 15:22:42,922 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:42,922 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:22:42,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:22:42,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:22:42,922 INFO L87 Difference]: Start difference. First operand 9804 states and 31874 transitions. Second operand 6 states. [2018-12-09 15:22:43,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:43,084 INFO L93 Difference]: Finished difference Result 8341 states and 27047 transitions. [2018-12-09 15:22:43,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:22:43,084 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-12-09 15:22:43,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:43,093 INFO L225 Difference]: With dead ends: 8341 [2018-12-09 15:22:43,093 INFO L226 Difference]: Without dead ends: 8341 [2018-12-09 15:22:43,093 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:22:43,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8341 states. [2018-12-09 15:22:43,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8341 to 7997. [2018-12-09 15:22:43,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7997 states. [2018-12-09 15:22:43,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7997 states to 7997 states and 26085 transitions. [2018-12-09 15:22:43,168 INFO L78 Accepts]: Start accepts. Automaton has 7997 states and 26085 transitions. Word has length 100 [2018-12-09 15:22:43,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:43,168 INFO L480 AbstractCegarLoop]: Abstraction has 7997 states and 26085 transitions. [2018-12-09 15:22:43,168 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:22:43,168 INFO L276 IsEmpty]: Start isEmpty. Operand 7997 states and 26085 transitions. [2018-12-09 15:22:43,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:43,175 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:43,175 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:43,175 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:43,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:43,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1091822080, now seen corresponding path program 2 times [2018-12-09 15:22:43,175 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:43,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:43,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,176 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:43,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:43,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:43,246 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:43,246 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 15:22:43,246 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:43,246 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:22:43,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:22:43,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:43,246 INFO L87 Difference]: Start difference. First operand 7997 states and 26085 transitions. Second operand 4 states. [2018-12-09 15:22:43,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:43,359 INFO L93 Difference]: Finished difference Result 9341 states and 30773 transitions. [2018-12-09 15:22:43,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 15:22:43,359 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 100 [2018-12-09 15:22:43,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:43,369 INFO L225 Difference]: With dead ends: 9341 [2018-12-09 15:22:43,369 INFO L226 Difference]: Without dead ends: 9341 [2018-12-09 15:22:43,370 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:22:43,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9341 states. [2018-12-09 15:22:43,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9341 to 9213. [2018-12-09 15:22:43,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9213 states. [2018-12-09 15:22:43,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9213 states to 9213 states and 30357 transitions. [2018-12-09 15:22:43,463 INFO L78 Accepts]: Start accepts. Automaton has 9213 states and 30357 transitions. Word has length 100 [2018-12-09 15:22:43,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:43,463 INFO L480 AbstractCegarLoop]: Abstraction has 9213 states and 30357 transitions. [2018-12-09 15:22:43,463 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:22:43,463 INFO L276 IsEmpty]: Start isEmpty. Operand 9213 states and 30357 transitions. [2018-12-09 15:22:43,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-12-09 15:22:43,471 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:43,471 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:43,471 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:43,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:43,472 INFO L82 PathProgramCache]: Analyzing trace with hash 1125935873, now seen corresponding path program 1 times [2018-12-09 15:22:43,472 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:43,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,473 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:43,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,473 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:43,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:43,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:43,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:43,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 15:22:43,554 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:43,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:22:43,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:22:43,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:22:43,554 INFO L87 Difference]: Start difference. First operand 9213 states and 30357 transitions. Second operand 6 states. [2018-12-09 15:22:43,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:43,677 INFO L93 Difference]: Finished difference Result 8061 states and 25909 transitions. [2018-12-09 15:22:43,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 15:22:43,678 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 100 [2018-12-09 15:22:43,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:43,687 INFO L225 Difference]: With dead ends: 8061 [2018-12-09 15:22:43,687 INFO L226 Difference]: Without dead ends: 8061 [2018-12-09 15:22:43,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:43,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8061 states. [2018-12-09 15:22:43,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8061 to 6636. [2018-12-09 15:22:43,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6636 states. [2018-12-09 15:22:43,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6636 states to 6636 states and 21578 transitions. [2018-12-09 15:22:43,764 INFO L78 Accepts]: Start accepts. Automaton has 6636 states and 21578 transitions. Word has length 100 [2018-12-09 15:22:43,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:43,765 INFO L480 AbstractCegarLoop]: Abstraction has 6636 states and 21578 transitions. [2018-12-09 15:22:43,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:22:43,765 INFO L276 IsEmpty]: Start isEmpty. Operand 6636 states and 21578 transitions. [2018-12-09 15:22:43,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:43,771 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:43,771 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:43,771 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:43,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:43,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1482892778, now seen corresponding path program 1 times [2018-12-09 15:22:43,772 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:43,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:43,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:43,773 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:43,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:43,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:43,833 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:43,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 15:22:43,834 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:43,834 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:22:43,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:22:43,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:43,834 INFO L87 Difference]: Start difference. First operand 6636 states and 21578 transitions. Second operand 7 states. [2018-12-09 15:22:44,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:44,113 INFO L93 Difference]: Finished difference Result 12093 states and 38955 transitions. [2018-12-09 15:22:44,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 15:22:44,113 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-09 15:22:44,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:44,125 INFO L225 Difference]: With dead ends: 12093 [2018-12-09 15:22:44,125 INFO L226 Difference]: Without dead ends: 12093 [2018-12-09 15:22:44,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-09 15:22:44,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12093 states. [2018-12-09 15:22:44,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12093 to 9368. [2018-12-09 15:22:44,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9368 states. [2018-12-09 15:22:44,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9368 states to 9368 states and 30681 transitions. [2018-12-09 15:22:44,230 INFO L78 Accepts]: Start accepts. Automaton has 9368 states and 30681 transitions. Word has length 102 [2018-12-09 15:22:44,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:44,230 INFO L480 AbstractCegarLoop]: Abstraction has 9368 states and 30681 transitions. [2018-12-09 15:22:44,230 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:22:44,230 INFO L276 IsEmpty]: Start isEmpty. Operand 9368 states and 30681 transitions. [2018-12-09 15:22:44,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:44,239 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:44,239 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:44,240 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:44,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:44,240 INFO L82 PathProgramCache]: Analyzing trace with hash -238128297, now seen corresponding path program 1 times [2018-12-09 15:22:44,240 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:44,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:44,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,241 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:44,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:44,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:44,302 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:44,302 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 15:22:44,302 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:44,302 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:22:44,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:22:44,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:22:44,302 INFO L87 Difference]: Start difference. First operand 9368 states and 30681 transitions. Second operand 6 states. [2018-12-09 15:22:44,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:44,380 INFO L93 Difference]: Finished difference Result 8558 states and 27748 transitions. [2018-12-09 15:22:44,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 15:22:44,380 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 102 [2018-12-09 15:22:44,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:44,390 INFO L225 Difference]: With dead ends: 8558 [2018-12-09 15:22:44,390 INFO L226 Difference]: Without dead ends: 8558 [2018-12-09 15:22:44,390 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:22:44,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8558 states. [2018-12-09 15:22:44,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8558 to 8208. [2018-12-09 15:22:44,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8208 states. [2018-12-09 15:22:44,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8208 states to 8208 states and 26803 transitions. [2018-12-09 15:22:44,470 INFO L78 Accepts]: Start accepts. Automaton has 8208 states and 26803 transitions. Word has length 102 [2018-12-09 15:22:44,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:44,470 INFO L480 AbstractCegarLoop]: Abstraction has 8208 states and 26803 transitions. [2018-12-09 15:22:44,470 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:22:44,470 INFO L276 IsEmpty]: Start isEmpty. Operand 8208 states and 26803 transitions. [2018-12-09 15:22:44,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:44,478 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:44,478 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:44,478 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:44,478 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:44,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1153127017, now seen corresponding path program 1 times [2018-12-09 15:22:44,479 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:44,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:44,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,480 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:44,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:44,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:44,526 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:44,526 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 15:22:44,526 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:44,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 15:22:44,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 15:22:44,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 15:22:44,527 INFO L87 Difference]: Start difference. First operand 8208 states and 26803 transitions. Second operand 5 states. [2018-12-09 15:22:44,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:44,641 INFO L93 Difference]: Finished difference Result 9488 states and 30963 transitions. [2018-12-09 15:22:44,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 15:22:44,642 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 102 [2018-12-09 15:22:44,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:44,652 INFO L225 Difference]: With dead ends: 9488 [2018-12-09 15:22:44,652 INFO L226 Difference]: Without dead ends: 9488 [2018-12-09 15:22:44,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:44,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9488 states. [2018-12-09 15:22:44,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9488 to 8400. [2018-12-09 15:22:44,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8400 states. [2018-12-09 15:22:44,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8400 states to 8400 states and 27427 transitions. [2018-12-09 15:22:44,745 INFO L78 Accepts]: Start accepts. Automaton has 8400 states and 27427 transitions. Word has length 102 [2018-12-09 15:22:44,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:44,746 INFO L480 AbstractCegarLoop]: Abstraction has 8400 states and 27427 transitions. [2018-12-09 15:22:44,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 15:22:44,746 INFO L276 IsEmpty]: Start isEmpty. Operand 8400 states and 27427 transitions. [2018-12-09 15:22:44,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:44,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:44,753 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:44,754 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:44,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:44,754 INFO L82 PathProgramCache]: Analyzing trace with hash 91637464, now seen corresponding path program 1 times [2018-12-09 15:22:44,754 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:44,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:44,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:44,755 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:44,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:44,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:44,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:44,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 15:22:44,818 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:44,819 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:22:44,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:22:44,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:44,819 INFO L87 Difference]: Start difference. First operand 8400 states and 27427 transitions. Second operand 7 states. [2018-12-09 15:22:44,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:44,988 INFO L93 Difference]: Finished difference Result 15474 states and 51162 transitions. [2018-12-09 15:22:44,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:22:44,988 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-09 15:22:44,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:44,996 INFO L225 Difference]: With dead ends: 15474 [2018-12-09 15:22:44,996 INFO L226 Difference]: Without dead ends: 7770 [2018-12-09 15:22:44,997 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:22:45,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7770 states. [2018-12-09 15:22:45,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7770 to 7740. [2018-12-09 15:22:45,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7740 states. [2018-12-09 15:22:45,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7740 states to 7740 states and 25507 transitions. [2018-12-09 15:22:45,073 INFO L78 Accepts]: Start accepts. Automaton has 7740 states and 25507 transitions. Word has length 102 [2018-12-09 15:22:45,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:45,073 INFO L480 AbstractCegarLoop]: Abstraction has 7740 states and 25507 transitions. [2018-12-09 15:22:45,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:22:45,073 INFO L276 IsEmpty]: Start isEmpty. Operand 7740 states and 25507 transitions. [2018-12-09 15:22:45,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:45,080 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:45,080 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:45,080 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:45,080 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:45,080 INFO L82 PathProgramCache]: Analyzing trace with hash -1179786124, now seen corresponding path program 2 times [2018-12-09 15:22:45,080 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:45,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,081 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:45,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,081 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:45,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:45,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:45,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:45,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 15:22:45,163 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:45,163 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:22:45,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:22:45,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:22:45,164 INFO L87 Difference]: Start difference. First operand 7740 states and 25507 transitions. Second operand 10 states. [2018-12-09 15:22:45,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:45,423 INFO L93 Difference]: Finished difference Result 14482 states and 48370 transitions. [2018-12-09 15:22:45,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 15:22:45,423 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 102 [2018-12-09 15:22:45,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:45,435 INFO L225 Difference]: With dead ends: 14482 [2018-12-09 15:22:45,435 INFO L226 Difference]: Without dead ends: 6821 [2018-12-09 15:22:45,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=169, Unknown=0, NotChecked=0, Total=240 [2018-12-09 15:22:45,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6821 states. [2018-12-09 15:22:45,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6821 to 6821. [2018-12-09 15:22:45,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6821 states. [2018-12-09 15:22:45,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6821 states to 6821 states and 23055 transitions. [2018-12-09 15:22:45,507 INFO L78 Accepts]: Start accepts. Automaton has 6821 states and 23055 transitions. Word has length 102 [2018-12-09 15:22:45,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:45,507 INFO L480 AbstractCegarLoop]: Abstraction has 6821 states and 23055 transitions. [2018-12-09 15:22:45,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:22:45,507 INFO L276 IsEmpty]: Start isEmpty. Operand 6821 states and 23055 transitions. [2018-12-09 15:22:45,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:45,513 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:45,513 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:45,513 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:45,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:45,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1413135963, now seen corresponding path program 1 times [2018-12-09 15:22:45,513 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:45,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,514 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:45,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,515 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:45,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:45,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:45,588 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:45,588 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 15:22:45,588 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:45,588 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:22:45,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:22:45,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:22:45,589 INFO L87 Difference]: Start difference. First operand 6821 states and 23055 transitions. Second operand 7 states. [2018-12-09 15:22:45,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:45,795 INFO L93 Difference]: Finished difference Result 8877 states and 29201 transitions. [2018-12-09 15:22:45,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 15:22:45,796 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-12-09 15:22:45,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:45,805 INFO L225 Difference]: With dead ends: 8877 [2018-12-09 15:22:45,806 INFO L226 Difference]: Without dead ends: 8761 [2018-12-09 15:22:45,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:22:45,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8761 states. [2018-12-09 15:22:45,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8761 to 6789. [2018-12-09 15:22:45,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6789 states. [2018-12-09 15:22:45,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6789 states to 6789 states and 22927 transitions. [2018-12-09 15:22:45,885 INFO L78 Accepts]: Start accepts. Automaton has 6789 states and 22927 transitions. Word has length 102 [2018-12-09 15:22:45,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:45,885 INFO L480 AbstractCegarLoop]: Abstraction has 6789 states and 22927 transitions. [2018-12-09 15:22:45,885 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:22:45,885 INFO L276 IsEmpty]: Start isEmpty. Operand 6789 states and 22927 transitions. [2018-12-09 15:22:45,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:45,891 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:45,891 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:45,891 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:45,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:45,892 INFO L82 PathProgramCache]: Analyzing trace with hash -522524324, now seen corresponding path program 3 times [2018-12-09 15:22:45,892 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:45,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:22:45,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:45,893 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:45,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:22:46,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:22:46,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:22:46,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 15:22:46,007 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 15:22:46,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 15:22:46,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 15:22:46,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:22:46,008 INFO L87 Difference]: Start difference. First operand 6789 states and 22927 transitions. Second operand 12 states. [2018-12-09 15:22:46,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:22:46,355 INFO L93 Difference]: Finished difference Result 13177 states and 44650 transitions. [2018-12-09 15:22:46,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 15:22:46,355 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 102 [2018-12-09 15:22:46,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:22:46,366 INFO L225 Difference]: With dead ends: 13177 [2018-12-09 15:22:46,366 INFO L226 Difference]: Without dead ends: 9273 [2018-12-09 15:22:46,367 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-12-09 15:22:46,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9273 states. [2018-12-09 15:22:46,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9273 to 8665. [2018-12-09 15:22:46,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8665 states. [2018-12-09 15:22:46,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8665 states to 8665 states and 28570 transitions. [2018-12-09 15:22:46,454 INFO L78 Accepts]: Start accepts. Automaton has 8665 states and 28570 transitions. Word has length 102 [2018-12-09 15:22:46,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:22:46,454 INFO L480 AbstractCegarLoop]: Abstraction has 8665 states and 28570 transitions. [2018-12-09 15:22:46,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 15:22:46,454 INFO L276 IsEmpty]: Start isEmpty. Operand 8665 states and 28570 transitions. [2018-12-09 15:22:46,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:22:46,462 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:22:46,462 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:22:46,463 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 15:22:46,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:22:46,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1889908770, now seen corresponding path program 4 times [2018-12-09 15:22:46,463 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 15:22:46,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:46,464 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:22:46,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:22:46,464 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 15:22:46,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 15:22:46,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 15:22:46,503 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 15:22:46,570 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-09 15:22:46,571 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 03:22:46 BasicIcfg [2018-12-09 15:22:46,571 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 15:22:46,571 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 15:22:46,571 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 15:22:46,572 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 15:22:46,572 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:21:54" (3/4) ... [2018-12-09 15:22:46,574 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 15:22:46,645 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_241597a9-151a-45a6-b0ef-cbbd37d00232/bin-2019/utaipan/witness.graphml [2018-12-09 15:22:46,645 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 15:22:46,646 INFO L168 Benchmark]: Toolchain (without parser) took 53011.81 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 947.0 MB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,647 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 15:22:46,647 INFO L168 Benchmark]: CACSL2BoogieTranslator took 326.99 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -135.9 MB). Peak memory consumption was 25.8 MB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,647 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,647 INFO L168 Benchmark]: Boogie Preprocessor took 20.00 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 15:22:46,647 INFO L168 Benchmark]: RCFGBuilder took 353.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.6 MB). Peak memory consumption was 47.6 MB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,648 INFO L168 Benchmark]: TraceAbstraction took 52201.32 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,648 INFO L168 Benchmark]: Witness Printer took 73.53 ms. Allocated memory is still 7.0 GB. Free memory was 2.6 GB in the beginning and 2.6 GB in the end (delta: 35.0 MB). Peak memory consumption was 35.0 MB. Max. memory is 11.5 GB. [2018-12-09 15:22:46,649 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 326.99 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 947.0 MB in the beginning and 1.1 GB in the end (delta: -135.9 MB). Peak memory consumption was 25.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 32.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 20.00 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 353.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.6 MB). Peak memory consumption was 47.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 52201.32 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 73.53 ms. Allocated memory is still 7.0 GB. Free memory was 2.6 GB in the beginning and 2.6 GB in the end (delta: 35.0 MB). Peak memory consumption was 35.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0] [L676] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L678] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L680] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L681] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L682] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L683] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L684] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L685] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L686] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L687] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L688] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L689] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L690] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L691] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L692] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L693] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L694] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L695] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L696] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L698] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L699] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L700] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t2518; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t2518, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] -1 pthread_t t2519; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] FCALL, FORK -1 pthread_create(&t2519, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L782] -1 pthread_t t2520; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L783] FCALL, FORK -1 pthread_create(&t2520, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L741] 0 y$w_buff1 = y$w_buff0 [L742] 0 y$w_buff0 = 2 [L743] 0 y$w_buff1_used = y$w_buff0_used [L744] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L746] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L747] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L748] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L749] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L750] 0 y$r_buff0_thd3 = (_Bool)1 [L753] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L704] 1 z = 2 [L709] 1 __unbuffered_p0_EAX = x [L714] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L721] 2 x = 1 [L724] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=2] [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=1, z=2] [L727] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L728] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L728] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L729] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L729] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L730] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L756] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L730] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L731] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L731] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L734] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L758] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L758] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L759] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L760] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L760] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L763] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L790] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L790] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L791] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L791] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L792] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L792] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L793] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L793] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L796] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L797] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L798] -1 y$flush_delayed = weak$$choice2 [L799] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L801] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L801] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L802] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L802] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L803] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L803] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L804] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L805] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L806] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L806] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L807] -1 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] -1 y = y$flush_delayed ? y$mem_tmp : y [L809] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=1, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 198 locations, 3 error locations. UNSAFE Result, 52.1s OverallTime, 24 OverallIterations, 1 TraceHistogramMax, 11.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5153 SDtfs, 4994 SDslu, 12693 SDs, 0 SdLazy, 3405 SolverSat, 199 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 230 GetRequests, 70 SyntacticMatches, 16 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=186422occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 23.3s AutomataMinimizationTime, 23 MinimizatonAttempts, 277984 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 2057 NumberOfCodeBlocks, 2057 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1932 ConstructedInterpolants, 0 QuantifiedInterpolants, 398251 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 23 InterpolantComputations, 23 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...