./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 17:26:04,545 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 17:26:04,546 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 17:26:04,552 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 17:26:04,552 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 17:26:04,553 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 17:26:04,553 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 17:26:04,554 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 17:26:04,555 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 17:26:04,556 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 17:26:04,556 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 17:26:04,556 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 17:26:04,557 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 17:26:04,557 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 17:26:04,558 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 17:26:04,558 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 17:26:04,559 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 17:26:04,560 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 17:26:04,561 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 17:26:04,561 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 17:26:04,562 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 17:26:04,562 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 17:26:04,564 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 17:26:04,564 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 17:26:04,564 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 17:26:04,564 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 17:26:04,565 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 17:26:04,565 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 17:26:04,566 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 17:26:04,566 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 17:26:04,566 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 17:26:04,567 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 17:26:04,567 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 17:26:04,567 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 17:26:04,568 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 17:26:04,568 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 17:26:04,568 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-08 17:26:04,576 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 17:26:04,576 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 17:26:04,576 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 17:26:04,576 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 17:26:04,577 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-08 17:26:04,577 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-08 17:26:04,578 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 17:26:04,578 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 17:26:04,578 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 17:26:04,578 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 17:26:04,578 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 17:26:04,578 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 17:26:04,579 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 17:26:04,579 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:26:04,580 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-08 17:26:04,580 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-08 17:26:04,597 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 17:26:04,604 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 17:26:04,606 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 17:26:04,607 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 17:26:04,607 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 17:26:04,608 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:04,643 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/9bd2d7f5f/f8ff5662070f466fa66d5c1aa39054f9/FLAG590410cc3 [2018-12-08 17:26:05,114 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 17:26:05,114 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:05,118 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/9bd2d7f5f/f8ff5662070f466fa66d5c1aa39054f9/FLAG590410cc3 [2018-12-08 17:26:05,127 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/9bd2d7f5f/f8ff5662070f466fa66d5c1aa39054f9 [2018-12-08 17:26:05,128 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 17:26:05,129 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 17:26:05,130 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 17:26:05,130 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 17:26:05,132 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 17:26:05,132 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,134 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@58f41b83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05, skipping insertion in model container [2018-12-08 17:26:05,134 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,138 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 17:26:05,151 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 17:26:05,253 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:26:05,255 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 17:26:05,277 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:26:05,285 INFO L195 MainTranslator]: Completed translation [2018-12-08 17:26:05,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05 WrapperNode [2018-12-08 17:26:05,285 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 17:26:05,286 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 17:26:05,286 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 17:26:05,286 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 17:26:05,291 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,295 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,299 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 17:26:05,299 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 17:26:05,299 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 17:26:05,299 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 17:26:05,336 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,337 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,338 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,338 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,343 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,349 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,350 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... [2018-12-08 17:26:05,351 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 17:26:05,352 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 17:26:05,352 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 17:26:05,352 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 17:26:05,353 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:26:05,384 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 17:26:05,384 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 17:26:05,384 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-08 17:26:05,384 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-08 17:26:05,384 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 17:26:05,384 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 17:26:05,384 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 17:26:05,384 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 17:26:05,384 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-08 17:26:05,385 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-08 17:26:05,385 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-08 17:26:05,385 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-08 17:26:05,537 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 17:26:05,537 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-08 17:26:05,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:05 BoogieIcfgContainer [2018-12-08 17:26:05,537 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 17:26:05,538 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 17:26:05,538 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 17:26:05,540 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 17:26:05,541 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 05:26:05" (1/3) ... [2018-12-08 17:26:05,541 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40373cad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:26:05, skipping insertion in model container [2018-12-08 17:26:05,541 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:05" (2/3) ... [2018-12-08 17:26:05,542 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40373cad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:26:05, skipping insertion in model container [2018-12-08 17:26:05,542 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:05" (3/3) ... [2018-12-08 17:26:05,543 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:05,550 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 17:26:05,556 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 17:26:05,570 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 17:26:05,595 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 17:26:05,595 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 17:26:05,595 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 17:26:05,595 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 17:26:05,595 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 17:26:05,595 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 17:26:05,596 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 17:26:05,596 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 17:26:05,606 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-08 17:26:05,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 17:26:05,610 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:05,611 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:05,612 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:05,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:05,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-08 17:26:05,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:05,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:05,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:05,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:05,653 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:05,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:05,842 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:05,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:05,843 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:26:05,844 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 35 with the following transitions: [2018-12-08 17:26:05,846 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-08 17:26:05,868 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:26:05,868 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:26:05,947 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-12-08 17:26:05,948 INFO L272 AbstractInterpreter]: Visited 21 different actions 29 times. Never merged. Never widened. Performed 79 root evaluator evaluations with a maximum evaluation depth of 3. Performed 79 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 19 variables. [2018-12-08 17:26:05,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:05,955 INFO L401 sIntCurrentIteration]: Generating AbsInt predicates [2018-12-08 17:26:06,001 INFO L227 lantSequenceWeakener]: Weakened 16 states. On average, predicates are now at 62.81% of their original sizes. [2018-12-08 17:26:06,001 INFO L416 sIntCurrentIteration]: Unifying AI predicates [2018-12-08 17:26:06,048 INFO L418 sIntCurrentIteration]: We unified 33 AI predicates to 33 [2018-12-08 17:26:06,048 INFO L427 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-12-08 17:26:06,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:26:06,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [9] total 20 [2018-12-08 17:26:06,049 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:26:06,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:26:06,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:26:06,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:06,056 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 13 states. [2018-12-08 17:26:06,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:06,423 INFO L93 Difference]: Finished difference Result 146 states and 218 transitions. [2018-12-08 17:26:06,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 17:26:06,425 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-12-08 17:26:06,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:06,434 INFO L225 Difference]: With dead ends: 146 [2018-12-08 17:26:06,434 INFO L226 Difference]: Without dead ends: 85 [2018-12-08 17:26:06,436 INFO L631 BasicCegarLoop]: 2 DeclaredPredicates, 38 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:26:06,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-12-08 17:26:06,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 71. [2018-12-08 17:26:06,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-08 17:26:06,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 91 transitions. [2018-12-08 17:26:06,465 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 91 transitions. Word has length 34 [2018-12-08 17:26:06,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:06,466 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 91 transitions. [2018-12-08 17:26:06,466 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:26:06,466 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 91 transitions. [2018-12-08 17:26:06,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:26:06,467 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:06,467 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:06,467 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:06,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:06,468 INFO L82 PathProgramCache]: Analyzing trace with hash 1691151941, now seen corresponding path program 1 times [2018-12-08 17:26:06,468 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:06,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:06,469 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:06,469 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:06,469 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:06,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:06,578 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:06,578 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:06,578 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:26:06,578 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 39 with the following transitions: [2018-12-08 17:26:06,579 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-08 17:26:06,580 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:26:06,580 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:26:06,637 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:26:06,637 INFO L272 AbstractInterpreter]: Visited 31 different actions 84 times. Merged at 7 different actions 17 times. Never widened. Performed 279 root evaluator evaluations with a maximum evaluation depth of 6. Performed 279 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 19 variables. [2018-12-08 17:26:06,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:06,647 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:26:06,647 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:06,647 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:06,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:06,656 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:26:06,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:06,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:06,732 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-08 17:26:06,732 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:06,841 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:06,856 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:26:06,856 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 19 [2018-12-08 17:26:06,856 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:26:06,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 17:26:06,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 17:26:06,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2018-12-08 17:26:06,859 INFO L87 Difference]: Start difference. First operand 71 states and 91 transitions. Second operand 12 states. [2018-12-08 17:26:07,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:07,077 INFO L93 Difference]: Finished difference Result 144 states and 192 transitions. [2018-12-08 17:26:07,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:26:07,078 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-12-08 17:26:07,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:07,079 INFO L225 Difference]: With dead ends: 144 [2018-12-08 17:26:07,079 INFO L226 Difference]: Without dead ends: 118 [2018-12-08 17:26:07,080 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2018-12-08 17:26:07,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-08 17:26:07,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 93. [2018-12-08 17:26:07,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-08 17:26:07,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 119 transitions. [2018-12-08 17:26:07,088 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 119 transitions. Word has length 38 [2018-12-08 17:26:07,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:07,089 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 119 transitions. [2018-12-08 17:26:07,089 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 17:26:07,089 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 119 transitions. [2018-12-08 17:26:07,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:26:07,090 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:07,090 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:07,090 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:07,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:07,090 INFO L82 PathProgramCache]: Analyzing trace with hash 1748410243, now seen corresponding path program 1 times [2018-12-08 17:26:07,090 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:07,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:07,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:07,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:07,091 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:07,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:07,185 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:07,185 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:07,185 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:26:07,185 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 39 with the following transitions: [2018-12-08 17:26:07,185 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [54], [62], [63], [67], [69], [71], [73], [94], [99], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-08 17:26:07,186 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:26:07,186 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:26:07,224 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:26:07,225 INFO L272 AbstractInterpreter]: Visited 31 different actions 81 times. Merged at 7 different actions 17 times. Never widened. Performed 246 root evaluator evaluations with a maximum evaluation depth of 6. Performed 246 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 19 variables. [2018-12-08 17:26:07,226 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:07,226 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:26:07,226 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:07,226 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:07,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:07,232 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:26:07,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:07,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:07,318 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-08 17:26:07,318 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:07,456 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:07,470 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:26:07,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 20 [2018-12-08 17:26:07,470 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:26:07,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:26:07,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:26:07,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:26:07,471 INFO L87 Difference]: Start difference. First operand 93 states and 119 transitions. Second operand 13 states. [2018-12-08 17:26:07,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:07,700 INFO L93 Difference]: Finished difference Result 150 states and 198 transitions. [2018-12-08 17:26:07,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 17:26:07,700 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 38 [2018-12-08 17:26:07,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:07,701 INFO L225 Difference]: With dead ends: 150 [2018-12-08 17:26:07,701 INFO L226 Difference]: Without dead ends: 114 [2018-12-08 17:26:07,702 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 65 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=693, Unknown=0, NotChecked=0, Total=812 [2018-12-08 17:26:07,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-08 17:26:07,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 85. [2018-12-08 17:26:07,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-08 17:26:07,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 105 transitions. [2018-12-08 17:26:07,709 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 105 transitions. Word has length 38 [2018-12-08 17:26:07,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:07,710 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 105 transitions. [2018-12-08 17:26:07,710 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:26:07,710 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 105 transitions. [2018-12-08 17:26:07,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:26:07,711 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:07,711 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:07,711 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:07,711 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:07,711 INFO L82 PathProgramCache]: Analyzing trace with hash 1790976707, now seen corresponding path program 2 times [2018-12-08 17:26:07,711 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:07,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:07,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:07,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:07,712 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:07,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:07,771 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:07,771 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:07,771 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:26:07,771 INFO L187 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-12-08 17:26:07,771 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-12-08 17:26:07,771 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:07,771 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:07,777 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 17:26:07,777 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-12-08 17:26:07,788 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-12-08 17:26:07,788 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:26:07,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:07,838 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:07,838 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:07,931 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:07,946 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:26:07,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8, 8] imperfect sequences [8] total 20 [2018-12-08 17:26:07,946 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:26:07,946 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:26:07,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:26:07,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=337, Unknown=0, NotChecked=0, Total=380 [2018-12-08 17:26:07,947 INFO L87 Difference]: Start difference. First operand 85 states and 105 transitions. Second operand 8 states. [2018-12-08 17:26:07,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:07,991 INFO L93 Difference]: Finished difference Result 126 states and 160 transitions. [2018-12-08 17:26:07,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:26:07,991 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-08 17:26:07,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:07,992 INFO L225 Difference]: With dead ends: 126 [2018-12-08 17:26:07,992 INFO L226 Difference]: Without dead ends: 100 [2018-12-08 17:26:07,993 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-12-08 17:26:07,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-08 17:26:07,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 93. [2018-12-08 17:26:07,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-08 17:26:07,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 113 transitions. [2018-12-08 17:26:07,998 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 113 transitions. Word has length 38 [2018-12-08 17:26:07,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:07,999 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 113 transitions. [2018-12-08 17:26:07,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:26:07,999 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 113 transitions. [2018-12-08 17:26:07,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:07,999 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:07,999 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:08,000 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:08,000 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:08,000 INFO L82 PathProgramCache]: Analyzing trace with hash -774274828, now seen corresponding path program 3 times [2018-12-08 17:26:08,000 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:08,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:08,000 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:26:08,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:08,000 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:08,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:08,099 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:26:08,099 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:08,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 17:26:08,100 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:26:08,100 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 17:26:08,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 17:26:08,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:26:08,100 INFO L87 Difference]: Start difference. First operand 93 states and 113 transitions. Second operand 10 states. [2018-12-08 17:26:25,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:25,205 INFO L93 Difference]: Finished difference Result 160 states and 211 transitions. [2018-12-08 17:26:25,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:26:25,205 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-12-08 17:26:25,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:25,206 INFO L225 Difference]: With dead ends: 160 [2018-12-08 17:26:25,206 INFO L226 Difference]: Without dead ends: 134 [2018-12-08 17:26:25,206 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:26:25,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-08 17:26:25,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 115. [2018-12-08 17:26:25,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-08 17:26:25,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 147 transitions. [2018-12-08 17:26:25,213 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 147 transitions. Word has length 42 [2018-12-08 17:26:25,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:25,214 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 147 transitions. [2018-12-08 17:26:25,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 17:26:25,214 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 147 transitions. [2018-12-08 17:26:25,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:25,215 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:25,215 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:25,215 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:25,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:25,215 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 2 times [2018-12-08 17:26:25,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:25,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:25,216 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:26:25,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:25,216 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:25,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:25,334 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:26:25,334 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:25,334 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 17:26:25,334 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-08 17:26:25,334 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:26:25,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:26:25,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:25,335 INFO L87 Difference]: Start difference. First operand 115 states and 147 transitions. Second operand 13 states. [2018-12-08 17:26:25,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:25,473 INFO L93 Difference]: Finished difference Result 140 states and 179 transitions. [2018-12-08 17:26:25,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:26:25,473 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-08 17:26:25,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:25,474 INFO L225 Difference]: With dead ends: 140 [2018-12-08 17:26:25,474 INFO L226 Difference]: Without dead ends: 138 [2018-12-08 17:26:25,475 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:25,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-08 17:26:25,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 119. [2018-12-08 17:26:25,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-12-08 17:26:25,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 150 transitions. [2018-12-08 17:26:25,482 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 150 transitions. Word has length 42 [2018-12-08 17:26:25,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:25,482 INFO L480 AbstractCegarLoop]: Abstraction has 119 states and 150 transitions. [2018-12-08 17:26:25,482 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:26:25,482 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 150 transitions. [2018-12-08 17:26:25,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:25,483 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:25,483 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:25,483 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:25,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:25,483 INFO L82 PathProgramCache]: Analyzing trace with hash 749157176, now seen corresponding path program 1 times [2018-12-08 17:26:25,483 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:25,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:25,484 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:26:25,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:25,484 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:25,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:25,536 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:25,536 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:25,536 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-12-08 17:26:25,536 INFO L203 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-12-08 17:26:25,536 INFO L205 CegarAbsIntRunner]: [0], [1], [4], [6], [35], [44], [48], [50], [54], [60], [62], [63], [67], [69], [71], [73], [94], [97], [105], [129], [132], [134], [140], [141], [142], [144], [145], [146], [147], [148], [149], [150], [156] [2018-12-08 17:26:25,537 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-12-08 17:26:25,537 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-12-08 17:26:25,594 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-12-08 17:26:25,594 INFO L272 AbstractInterpreter]: Visited 33 different actions 138 times. Merged at 8 different actions 40 times. Never widened. Performed 458 root evaluator evaluations with a maximum evaluation depth of 6. Performed 458 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 2 fixpoints after 1 different actions. Largest state had 19 variables. [2018-12-08 17:26:25,596 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:25,597 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-12-08 17:26:25,597 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:25,597 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:25,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:25,606 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-12-08 17:26:25,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:25,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:25,634 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:25,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:26,380 WARN L180 SmtUtils]: Spent 712.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:27,110 WARN L180 SmtUtils]: Spent 718.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:27,843 WARN L180 SmtUtils]: Spent 718.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:28,581 WARN L180 SmtUtils]: Spent 715.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:29,319 WARN L180 SmtUtils]: Spent 715.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:30,047 WARN L180 SmtUtils]: Spent 715.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-12-08 17:26:30,053 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:30,068 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:26:30,068 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 15 [2018-12-08 17:26:30,068 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-12-08 17:26:30,068 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:26:30,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:26:30,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:26:30,069 INFO L87 Difference]: Start difference. First operand 119 states and 150 transitions. Second operand 8 states. [2018-12-08 17:26:30,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:30,140 INFO L93 Difference]: Finished difference Result 188 states and 243 transitions. [2018-12-08 17:26:30,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:26:30,141 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-08 17:26:30,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:30,141 INFO L225 Difference]: With dead ends: 188 [2018-12-08 17:26:30,142 INFO L226 Difference]: Without dead ends: 162 [2018-12-08 17:26:30,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:30,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-08 17:26:30,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 147. [2018-12-08 17:26:30,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-08 17:26:30,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 189 transitions. [2018-12-08 17:26:30,154 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 189 transitions. Word has length 42 [2018-12-08 17:26:30,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:30,154 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 189 transitions. [2018-12-08 17:26:30,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:26:30,154 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 189 transitions. [2018-12-08 17:26:30,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:30,155 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:30,156 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:30,156 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:30,156 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:30,156 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-08 17:26:30,156 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-08 17:26:30,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:30,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:30,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 17:26:30,157 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-08 17:26:30,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 17:26:30,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 17:26:30,189 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 17:26:30,206 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 05:26:30 BoogieIcfgContainer [2018-12-08 17:26:30,207 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 17:26:30,207 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 17:26:30,207 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 17:26:30,207 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 17:26:30,207 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:05" (3/4) ... [2018-12-08 17:26:30,210 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 17:26:30,210 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 17:26:30,210 INFO L168 Benchmark]: Toolchain (without parser) took 25081.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 207.1 MB). Free memory was 957.8 MB in the beginning and 798.0 MB in the end (delta: 159.8 MB). Peak memory consumption was 366.9 MB. Max. memory is 11.5 GB. [2018-12-08 17:26:30,211 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:26:30,211 INFO L168 Benchmark]: CACSL2BoogieTranslator took 155.62 ms. Allocated memory is still 1.0 GB. Free memory was 957.8 MB in the beginning and 941.7 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-08 17:26:30,211 INFO L168 Benchmark]: Boogie Procedure Inliner took 13.09 ms. Allocated memory is still 1.0 GB. Free memory is still 941.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:26:30,211 INFO L168 Benchmark]: Boogie Preprocessor took 52.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 119.0 MB). Free memory was 941.7 MB in the beginning and 1.1 GB in the end (delta: -172.1 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. [2018-12-08 17:26:30,212 INFO L168 Benchmark]: RCFGBuilder took 185.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.1 MB). Peak memory consumption was 22.1 MB. Max. memory is 11.5 GB. [2018-12-08 17:26:30,212 INFO L168 Benchmark]: TraceAbstraction took 24668.82 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 88.1 MB). Free memory was 1.1 GB in the beginning and 798.0 MB in the end (delta: 293.7 MB). Peak memory consumption was 381.8 MB. Max. memory is 11.5 GB. [2018-12-08 17:26:30,212 INFO L168 Benchmark]: Witness Printer took 2.99 ms. Allocated memory is still 1.2 GB. Free memory is still 798.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:26:30,214 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 155.62 ms. Allocated memory is still 1.0 GB. Free memory was 957.8 MB in the beginning and 941.7 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 13.09 ms. Allocated memory is still 1.0 GB. Free memory is still 941.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 119.0 MB). Free memory was 941.7 MB in the beginning and 1.1 GB in the end (delta: -172.1 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 185.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.1 MB). Peak memory consumption was 22.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 24668.82 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 88.1 MB). Free memory was 1.1 GB in the beginning and 798.0 MB in the end (delta: 293.7 MB). Peak memory consumption was 381.8 MB. Max. memory is 11.5 GB. * Witness Printer took 2.99 ms. Allocated memory is still 1.2 GB. Free memory is still 798.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 98. Possible FailurePath: [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add1 ; [L222] unsigned int r_add2 ; [L223] unsigned int zero ; [L224] int tmp ; [L225] int tmp___0 ; [L226] int __retres14 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L230] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L230] RET, EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L230] zero = base2flt(0, 0) [L231] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L231] RET, EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L231] a = base2flt(ma, ea) [L232] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=4278190080, e=0, res=4278190080] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=36028797002186752, __retres4=4278190080, e=0, res=4278190080] [L232] RET, EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=36028797002186752, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L232] b = base2flt(mb, eb) [L233] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=4278190080] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080, ea=127, eb=2147483519] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. UNSAFE Result, 24.6s OverallTime, 8 OverallIterations, 3 TraceHistogramMax, 18.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 539 SDtfs, 304 SDslu, 4251 SDs, 0 SdLazy, 859 SolverSat, 42 SolverUnsat, 8 SolverUnknown, 0 SolverNotchecked, 16.6s Time, PredicateUnifierStatistics: 2 DeclaredPredicates, 436 GetRequests, 302 SyntacticMatches, 4 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 5.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=147occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.2s AbstIntTime, 4 AbstIntIterations, 1 AbstIntStrong, 0.5444444444444445 AbsIntWeakeningRatio, 1.8484848484848484 AbsIntAvgWeakeningVarsNumRemoved, 1.0 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 7 MinimizatonAttempts, 128 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 5.5s InterpolantComputationTime, 472 NumberOfCodeBlocks, 454 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 571 ConstructedInterpolants, 26 QuantifiedInterpolants, 62844 SizeOfPredicates, 20 NumberOfNonLiveVariables, 427 ConjunctsInSsa, 76 ConjunctsInUnsatCore, 15 InterpolantComputations, 4 PerfectInterpolantSequences, 193/242 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 17:26:31,494 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 17:26:31,495 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 17:26:31,501 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 17:26:31,502 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 17:26:31,502 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 17:26:31,503 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 17:26:31,504 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 17:26:31,505 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 17:26:31,506 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 17:26:31,507 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 17:26:31,507 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 17:26:31,507 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 17:26:31,508 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 17:26:31,508 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 17:26:31,508 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 17:26:31,509 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 17:26:31,510 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 17:26:31,511 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 17:26:31,512 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 17:26:31,513 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 17:26:31,513 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 17:26:31,514 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 17:26:31,515 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 17:26:31,515 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 17:26:31,515 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 17:26:31,516 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 17:26:31,516 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 17:26:31,517 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 17:26:31,517 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 17:26:31,517 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 17:26:31,518 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 17:26:31,518 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 17:26:31,518 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 17:26:31,519 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 17:26:31,519 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 17:26:31,520 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-12-08 17:26:31,529 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 17:26:31,529 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 17:26:31,530 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 17:26:31,530 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 17:26:31,531 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-08 17:26:31,531 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-08 17:26:31,531 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-08 17:26:31,531 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-08 17:26:31,531 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-08 17:26:31,531 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-08 17:26:31,532 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 17:26:31,532 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 17:26:31,532 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 17:26:31,533 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 17:26:31,534 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 17:26:31,534 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 17:26:31,534 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 17:26:31,534 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 17:26:31,534 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 17:26:31,534 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:26:31,535 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-12-08 17:26:31,535 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 17:26:31,536 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 17:26:31,536 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-08 17:26:31,536 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-08 17:26:31,560 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 17:26:31,567 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 17:26:31,569 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 17:26:31,570 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 17:26:31,570 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 17:26:31,570 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:31,607 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/484a74b75/57aed1af5b4c4d9fb96a87d7631607a1/FLAG945e40c4b [2018-12-08 17:26:32,035 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 17:26:32,036 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:32,040 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/484a74b75/57aed1af5b4c4d9fb96a87d7631607a1/FLAG945e40c4b [2018-12-08 17:26:32,047 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/data/484a74b75/57aed1af5b4c4d9fb96a87d7631607a1 [2018-12-08 17:26:32,049 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 17:26:32,050 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 17:26:32,050 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 17:26:32,050 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 17:26:32,052 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 17:26:32,053 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,054 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@284ba15b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32, skipping insertion in model container [2018-12-08 17:26:32,055 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,059 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 17:26:32,072 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 17:26:32,178 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:26:32,180 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 17:26:32,204 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 17:26:32,212 INFO L195 MainTranslator]: Completed translation [2018-12-08 17:26:32,213 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32 WrapperNode [2018-12-08 17:26:32,213 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 17:26:32,213 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 17:26:32,213 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 17:26:32,213 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 17:26:32,218 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,224 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,227 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 17:26:32,228 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 17:26:32,228 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 17:26:32,228 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 17:26:32,233 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,233 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,235 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,235 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,239 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,274 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,275 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... [2018-12-08 17:26:32,277 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 17:26:32,278 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 17:26:32,278 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 17:26:32,278 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 17:26:32,279 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 17:26:32,312 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-08 17:26:32,312 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 17:26:32,312 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 17:26:32,312 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-08 17:26:32,312 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-08 17:26:32,312 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-08 17:26:32,313 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-08 17:26:32,469 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 17:26:32,469 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-08 17:26:32,470 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:32 BoogieIcfgContainer [2018-12-08 17:26:32,470 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 17:26:32,470 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 17:26:32,470 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 17:26:32,472 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 17:26:32,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 05:26:32" (1/3) ... [2018-12-08 17:26:32,472 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@621e63bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:26:32, skipping insertion in model container [2018-12-08 17:26:32,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 05:26:32" (2/3) ... [2018-12-08 17:26:32,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@621e63bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 05:26:32, skipping insertion in model container [2018-12-08 17:26:32,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:32" (3/3) ... [2018-12-08 17:26:32,474 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 17:26:32,481 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 17:26:32,485 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 17:26:32,493 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 17:26:32,510 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 17:26:32,511 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 17:26:32,511 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 17:26:32,511 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 17:26:32,511 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 17:26:32,511 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 17:26:32,511 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 17:26:32,511 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 17:26:32,511 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 17:26:32,522 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-08 17:26:32,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 17:26:32,525 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:32,526 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:32,527 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:32,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:32,530 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-08 17:26:32,533 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:32,533 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:32,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:32,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:32,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:32,659 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:32,659 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:32,698 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:32,700 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:32,700 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:32,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:32,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:32,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:32,732 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:32,732 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:32,770 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:32,784 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:26:32,784 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 9 [2018-12-08 17:26:32,787 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:26:32,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:26:32,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:26:32,796 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 9 states. [2018-12-08 17:26:32,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:32,922 INFO L93 Difference]: Finished difference Result 136 states and 204 transitions. [2018-12-08 17:26:32,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:26:32,923 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-12-08 17:26:32,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:32,933 INFO L225 Difference]: With dead ends: 136 [2018-12-08 17:26:32,933 INFO L226 Difference]: Without dead ends: 78 [2018-12-08 17:26:32,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:32,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-12-08 17:26:32,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 64. [2018-12-08 17:26:32,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-12-08 17:26:32,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 86 transitions. [2018-12-08 17:26:32,964 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 86 transitions. Word has length 34 [2018-12-08 17:26:32,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:32,965 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 86 transitions. [2018-12-08 17:26:32,965 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:26:32,965 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 86 transitions. [2018-12-08 17:26:32,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:26:32,966 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:32,967 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:32,967 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:32,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:32,967 INFO L82 PathProgramCache]: Analyzing trace with hash 1790976707, now seen corresponding path program 1 times [2018-12-08 17:26:32,968 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:32,968 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:32,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:32,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:33,002 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:33,063 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:33,064 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:33,113 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:33,114 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:33,114 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:33,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:33,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:33,134 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:33,216 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-08 17:26:33,217 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:33,327 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:33,351 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:26:33,351 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [8, 8, 12] total 18 [2018-12-08 17:26:33,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 17:26:33,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 17:26:33,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:26:33,353 INFO L87 Difference]: Start difference. First operand 64 states and 86 transitions. Second operand 18 states. [2018-12-08 17:26:33,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:33,687 INFO L93 Difference]: Finished difference Result 169 states and 234 transitions. [2018-12-08 17:26:33,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:26:33,688 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 38 [2018-12-08 17:26:33,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:33,690 INFO L225 Difference]: With dead ends: 169 [2018-12-08 17:26:33,691 INFO L226 Difference]: Without dead ends: 139 [2018-12-08 17:26:33,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 130 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:26:33,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-08 17:26:33,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 92. [2018-12-08 17:26:33,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-08 17:26:33,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 126 transitions. [2018-12-08 17:26:33,704 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 126 transitions. Word has length 38 [2018-12-08 17:26:33,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:33,705 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 126 transitions. [2018-12-08 17:26:33,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 17:26:33,705 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 126 transitions. [2018-12-08 17:26:33,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 17:26:33,706 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:33,706 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:33,706 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:33,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:33,706 INFO L82 PathProgramCache]: Analyzing trace with hash -182008515, now seen corresponding path program 1 times [2018-12-08 17:26:33,706 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:33,706 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:33,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:33,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:33,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:33,763 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:33,763 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:33,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:33,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 17:26:33,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:26:33,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:26:33,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:26:33,765 INFO L87 Difference]: Start difference. First operand 92 states and 126 transitions. Second operand 8 states. [2018-12-08 17:26:33,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:33,818 INFO L93 Difference]: Finished difference Result 149 states and 202 transitions. [2018-12-08 17:26:33,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:26:33,818 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-08 17:26:33,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:33,819 INFO L225 Difference]: With dead ends: 149 [2018-12-08 17:26:33,819 INFO L226 Difference]: Without dead ends: 113 [2018-12-08 17:26:33,819 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:26:33,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-08 17:26:33,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 92. [2018-12-08 17:26:33,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-08 17:26:33,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 126 transitions. [2018-12-08 17:26:33,828 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 126 transitions. Word has length 38 [2018-12-08 17:26:33,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:33,829 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 126 transitions. [2018-12-08 17:26:33,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:26:33,829 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 126 transitions. [2018-12-08 17:26:33,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:33,830 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:33,830 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:33,830 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:33,830 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:33,830 INFO L82 PathProgramCache]: Analyzing trace with hash -977604237, now seen corresponding path program 1 times [2018-12-08 17:26:33,830 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:33,830 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:33,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:33,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:33,858 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:33,885 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 17:26:33,885 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:33,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:33,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:26:33,887 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:26:33,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:26:33,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:26:33,887 INFO L87 Difference]: Start difference. First operand 92 states and 126 transitions. Second operand 9 states. [2018-12-08 17:26:33,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:33,968 INFO L93 Difference]: Finished difference Result 136 states and 182 transitions. [2018-12-08 17:26:33,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:26:33,968 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-12-08 17:26:33,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:33,970 INFO L225 Difference]: With dead ends: 136 [2018-12-08 17:26:33,970 INFO L226 Difference]: Without dead ends: 115 [2018-12-08 17:26:33,970 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:33,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-08 17:26:33,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 100. [2018-12-08 17:26:33,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-08 17:26:33,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 135 transitions. [2018-12-08 17:26:33,982 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 135 transitions. Word has length 42 [2018-12-08 17:26:33,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:33,982 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 135 transitions. [2018-12-08 17:26:33,982 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:26:33,982 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 135 transitions. [2018-12-08 17:26:33,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:33,983 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:33,984 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:33,984 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:33,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:33,984 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 1 times [2018-12-08 17:26:33,984 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:33,984 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:33,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:34,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:34,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:34,114 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:26:34,114 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:34,115 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:34,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 17:26:34,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:26:34,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:26:34,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:34,116 INFO L87 Difference]: Start difference. First operand 100 states and 135 transitions. Second operand 13 states. [2018-12-08 17:26:34,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:34,278 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2018-12-08 17:26:34,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:26:34,279 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-08 17:26:34,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:34,280 INFO L225 Difference]: With dead ends: 181 [2018-12-08 17:26:34,280 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 17:26:34,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:34,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 17:26:34,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 134. [2018-12-08 17:26:34,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 17:26:34,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 176 transitions. [2018-12-08 17:26:34,291 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 176 transitions. Word has length 42 [2018-12-08 17:26:34,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:34,292 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 176 transitions. [2018-12-08 17:26:34,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:26:34,292 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 176 transitions. [2018-12-08 17:26:34,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:34,293 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:34,293 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:34,293 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:34,293 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:34,293 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-08 17:26:34,293 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:34,293 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:34,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:34,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:34,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:34,399 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:34,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:34,554 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:34,554 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:34,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:34,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:34,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:34,578 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:34,578 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:34,599 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:26:34,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-08 17:26:34,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:26:34,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:26:34,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:34,600 INFO L87 Difference]: Start difference. First operand 134 states and 176 transitions. Second operand 11 states. [2018-12-08 17:26:34,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:34,776 INFO L93 Difference]: Finished difference Result 193 states and 247 transitions. [2018-12-08 17:26:34,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:26:34,777 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-12-08 17:26:34,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:34,778 INFO L225 Difference]: With dead ends: 193 [2018-12-08 17:26:34,778 INFO L226 Difference]: Without dead ends: 162 [2018-12-08 17:26:34,779 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2018-12-08 17:26:34,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-08 17:26:34,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 142. [2018-12-08 17:26:34,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 17:26:34,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 181 transitions. [2018-12-08 17:26:34,788 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 181 transitions. Word has length 42 [2018-12-08 17:26:34,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:34,789 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 181 transitions. [2018-12-08 17:26:34,789 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:26:34,789 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 181 transitions. [2018-12-08 17:26:34,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:34,789 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:34,789 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:34,790 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:34,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:34,790 INFO L82 PathProgramCache]: Analyzing trace with hash -1035766736, now seen corresponding path program 1 times [2018-12-08 17:26:34,790 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:34,790 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:34,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:34,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:34,855 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:34,945 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:34,945 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:34,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:34,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 17:26:34,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 17:26:34,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 17:26:34,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:26:34,948 INFO L87 Difference]: Start difference. First operand 142 states and 181 transitions. Second operand 12 states. [2018-12-08 17:26:35,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:35,223 INFO L93 Difference]: Finished difference Result 220 states and 285 transitions. [2018-12-08 17:26:35,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 17:26:35,223 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-12-08 17:26:35,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:35,224 INFO L225 Difference]: With dead ends: 220 [2018-12-08 17:26:35,224 INFO L226 Difference]: Without dead ends: 190 [2018-12-08 17:26:35,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-12-08 17:26:35,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-12-08 17:26:35,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 170. [2018-12-08 17:26:35,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-12-08 17:26:35,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 214 transitions. [2018-12-08 17:26:35,234 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 214 transitions. Word has length 42 [2018-12-08 17:26:35,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:35,235 INFO L480 AbstractCegarLoop]: Abstraction has 170 states and 214 transitions. [2018-12-08 17:26:35,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 17:26:35,235 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 214 transitions. [2018-12-08 17:26:35,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:35,235 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:35,235 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:35,235 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:35,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:35,236 INFO L82 PathProgramCache]: Analyzing trace with hash 487665268, now seen corresponding path program 1 times [2018-12-08 17:26:35,236 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:35,236 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:35,248 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:35,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:35,286 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:35,324 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:26:35,324 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:35,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:35,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 17:26:35,326 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:26:35,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:26:35,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:26:35,326 INFO L87 Difference]: Start difference. First operand 170 states and 214 transitions. Second operand 6 states. [2018-12-08 17:26:36,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:36,577 INFO L93 Difference]: Finished difference Result 215 states and 269 transitions. [2018-12-08 17:26:36,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:26:36,578 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-08 17:26:36,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:36,579 INFO L225 Difference]: With dead ends: 215 [2018-12-08 17:26:36,579 INFO L226 Difference]: Without dead ends: 213 [2018-12-08 17:26:36,579 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:26:36,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-12-08 17:26:36,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 176. [2018-12-08 17:26:36,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-12-08 17:26:36,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 221 transitions. [2018-12-08 17:26:36,589 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 221 transitions. Word has length 42 [2018-12-08 17:26:36,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:36,589 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 221 transitions. [2018-12-08 17:26:36,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:26:36,590 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 221 transitions. [2018-12-08 17:26:36,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 17:26:36,590 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:36,590 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:36,590 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:36,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:36,591 INFO L82 PathProgramCache]: Analyzing trace with hash 544923570, now seen corresponding path program 2 times [2018-12-08 17:26:36,591 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:36,591 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:36,604 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:26:36,627 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 17:26:36,627 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:26:36,629 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:36,659 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:26:36,659 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:36,660 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:36,661 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 17:26:36,661 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:26:36,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:26:36,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:26:36,661 INFO L87 Difference]: Start difference. First operand 176 states and 221 transitions. Second operand 6 states. [2018-12-08 17:26:38,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:38,738 INFO L93 Difference]: Finished difference Result 182 states and 226 transitions. [2018-12-08 17:26:38,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:26:38,738 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-08 17:26:38,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:38,739 INFO L225 Difference]: With dead ends: 182 [2018-12-08 17:26:38,739 INFO L226 Difference]: Without dead ends: 180 [2018-12-08 17:26:38,739 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:26:38,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-12-08 17:26:38,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 174. [2018-12-08 17:26:38,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-12-08 17:26:38,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 217 transitions. [2018-12-08 17:26:38,752 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 217 transitions. Word has length 42 [2018-12-08 17:26:38,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:38,752 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 217 transitions. [2018-12-08 17:26:38,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:26:38,752 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 217 transitions. [2018-12-08 17:26:38,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 17:26:38,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:38,753 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:38,754 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:38,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:38,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1597355174, now seen corresponding path program 1 times [2018-12-08 17:26:38,754 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:38,754 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:38,767 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:26:38,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:38,781 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:38,811 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:38,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:38,868 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:38,870 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:38,870 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:38,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:38,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:38,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:38,903 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:38,903 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:38,953 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:38,969 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:26:38,969 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 10 [2018-12-08 17:26:38,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 17:26:38,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 17:26:38,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-08 17:26:38,970 INFO L87 Difference]: Start difference. First operand 174 states and 217 transitions. Second operand 10 states. [2018-12-08 17:26:39,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:39,108 INFO L93 Difference]: Finished difference Result 231 states and 295 transitions. [2018-12-08 17:26:39,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:26:39,108 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 47 [2018-12-08 17:26:39,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:39,109 INFO L225 Difference]: With dead ends: 231 [2018-12-08 17:26:39,109 INFO L226 Difference]: Without dead ends: 220 [2018-12-08 17:26:39,109 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 174 SyntacticMatches, 7 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-12-08 17:26:39,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-12-08 17:26:39,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 188. [2018-12-08 17:26:39,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-12-08 17:26:39,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 236 transitions. [2018-12-08 17:26:39,123 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 236 transitions. Word has length 47 [2018-12-08 17:26:39,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:39,123 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 236 transitions. [2018-12-08 17:26:39,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 17:26:39,124 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 236 transitions. [2018-12-08 17:26:39,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 17:26:39,124 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:39,124 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:39,124 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:39,125 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:39,125 INFO L82 PathProgramCache]: Analyzing trace with hash -896290596, now seen corresponding path program 1 times [2018-12-08 17:26:39,125 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:39,125 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:39,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:39,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:39,160 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:39,234 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:26:39,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:39,337 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:26:39,339 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:39,339 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:39,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:39,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:39,355 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:39,387 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:39,387 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:39,403 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:26:39,403 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [10, 10] total 17 [2018-12-08 17:26:39,403 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-08 17:26:39,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-08 17:26:39,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:39,403 INFO L87 Difference]: Start difference. First operand 188 states and 236 transitions. Second operand 17 states. [2018-12-08 17:26:39,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:39,671 INFO L93 Difference]: Finished difference Result 257 states and 326 transitions. [2018-12-08 17:26:39,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:26:39,671 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-12-08 17:26:39,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:39,672 INFO L225 Difference]: With dead ends: 257 [2018-12-08 17:26:39,672 INFO L226 Difference]: Without dead ends: 250 [2018-12-08 17:26:39,672 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 124 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=539, Unknown=0, NotChecked=0, Total=650 [2018-12-08 17:26:39,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-12-08 17:26:39,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 207. [2018-12-08 17:26:39,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-08 17:26:39,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 262 transitions. [2018-12-08 17:26:39,684 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 262 transitions. Word has length 47 [2018-12-08 17:26:39,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:39,684 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 262 transitions. [2018-12-08 17:26:39,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-08 17:26:39,684 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 262 transitions. [2018-12-08 17:26:39,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-08 17:26:39,685 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:39,685 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:39,685 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:39,685 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:39,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1716473666, now seen corresponding path program 1 times [2018-12-08 17:26:39,685 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:39,685 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:39,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:39,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:39,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:39,758 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:26:39,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:39,869 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:26:39,870 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:39,871 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:39,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:39,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:39,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:39,944 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:39,944 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:39,990 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:26:40,004 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:26:40,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 11, 11] total 21 [2018-12-08 17:26:40,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-08 17:26:40,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-08 17:26:40,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2018-12-08 17:26:40,005 INFO L87 Difference]: Start difference. First operand 207 states and 262 transitions. Second operand 21 states. [2018-12-08 17:26:40,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:40,464 INFO L93 Difference]: Finished difference Result 304 states and 389 transitions. [2018-12-08 17:26:40,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 17:26:40,464 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-12-08 17:26:40,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:40,465 INFO L225 Difference]: With dead ends: 304 [2018-12-08 17:26:40,465 INFO L226 Difference]: Without dead ends: 271 [2018-12-08 17:26:40,466 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=132, Invalid=798, Unknown=0, NotChecked=0, Total=930 [2018-12-08 17:26:40,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-12-08 17:26:40,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 228. [2018-12-08 17:26:40,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-12-08 17:26:40,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 289 transitions. [2018-12-08 17:26:40,479 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 289 transitions. Word has length 49 [2018-12-08 17:26:40,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:40,479 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 289 transitions. [2018-12-08 17:26:40,480 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-08 17:26:40,480 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 289 transitions. [2018-12-08 17:26:40,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-08 17:26:40,480 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:40,480 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:40,480 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:40,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:40,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1773731968, now seen corresponding path program 1 times [2018-12-08 17:26:40,481 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:40,481 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:40,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:40,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:40,535 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:40,551 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 17:26:40,552 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:40,553 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:40,553 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 17:26:40,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:26:40,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:26:40,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:26:40,554 INFO L87 Difference]: Start difference. First operand 228 states and 289 transitions. Second operand 6 states. [2018-12-08 17:26:40,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:40,590 INFO L93 Difference]: Finished difference Result 236 states and 296 transitions. [2018-12-08 17:26:40,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:26:40,590 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 49 [2018-12-08 17:26:40,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:40,591 INFO L225 Difference]: With dead ends: 236 [2018-12-08 17:26:40,591 INFO L226 Difference]: Without dead ends: 209 [2018-12-08 17:26:40,591 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 17:26:40,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-12-08 17:26:40,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 201. [2018-12-08 17:26:40,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-12-08 17:26:40,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 253 transitions. [2018-12-08 17:26:40,606 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 253 transitions. Word has length 49 [2018-12-08 17:26:40,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:40,606 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 253 transitions. [2018-12-08 17:26:40,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:26:40,606 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 253 transitions. [2018-12-08 17:26:40,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 17:26:40,607 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:40,607 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:40,607 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:40,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:40,607 INFO L82 PathProgramCache]: Analyzing trace with hash 2005355055, now seen corresponding path program 1 times [2018-12-08 17:26:40,608 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:40,608 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:40,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:40,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:40,657 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:40,741 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:26:40,741 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:40,743 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:40,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 17:26:40,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 17:26:40,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 17:26:40,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-12-08 17:26:40,743 INFO L87 Difference]: Start difference. First operand 201 states and 253 transitions. Second operand 13 states. [2018-12-08 17:26:40,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:40,897 INFO L93 Difference]: Finished difference Result 256 states and 323 transitions. [2018-12-08 17:26:40,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:26:40,898 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 50 [2018-12-08 17:26:40,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:40,899 INFO L225 Difference]: With dead ends: 256 [2018-12-08 17:26:40,899 INFO L226 Difference]: Without dead ends: 221 [2018-12-08 17:26:40,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:26:40,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-12-08 17:26:40,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 197. [2018-12-08 17:26:40,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-12-08 17:26:40,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 243 transitions. [2018-12-08 17:26:40,910 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 243 transitions. Word has length 50 [2018-12-08 17:26:40,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:40,911 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 243 transitions. [2018-12-08 17:26:40,911 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 17:26:40,911 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 243 transitions. [2018-12-08 17:26:40,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 17:26:40,912 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:40,912 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:40,912 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:40,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:40,912 INFO L82 PathProgramCache]: Analyzing trace with hash -802652045, now seen corresponding path program 1 times [2018-12-08 17:26:40,912 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:40,912 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:40,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:40,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:40,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:41,062 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:41,063 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:41,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:26:41,160 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:26:41,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:41,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:41,184 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:41,231 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:41,231 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:26:41,298 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:26:41,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-08 17:26:41,298 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:26:41,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:26:41,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:26:41,299 INFO L87 Difference]: Start difference. First operand 197 states and 243 transitions. Second operand 11 states. [2018-12-08 17:26:44,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:26:44,336 INFO L93 Difference]: Finished difference Result 265 states and 330 transitions. [2018-12-08 17:26:44,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:26:44,337 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2018-12-08 17:26:44,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:26:44,337 INFO L225 Difference]: With dead ends: 265 [2018-12-08 17:26:44,337 INFO L226 Difference]: Without dead ends: 220 [2018-12-08 17:26:44,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 101 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-12-08 17:26:44,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-12-08 17:26:44,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 195. [2018-12-08 17:26:44,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-12-08 17:26:44,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 239 transitions. [2018-12-08 17:26:44,356 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 239 transitions. Word has length 50 [2018-12-08 17:26:44,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:26:44,356 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 239 transitions. [2018-12-08 17:26:44,356 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:26:44,356 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 239 transitions. [2018-12-08 17:26:44,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 17:26:44,357 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:26:44,357 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:26:44,358 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:26:44,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:26:44,358 INFO L82 PathProgramCache]: Analyzing trace with hash -526602707, now seen corresponding path program 1 times [2018-12-08 17:26:44,358 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:26:44,358 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:26:44,371 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:26:44,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:26:44,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:26:46,510 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 17:26:46,510 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:26:46,512 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:26:46,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 17:26:46,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 17:26:46,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 17:26:46,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=110, Unknown=1, NotChecked=0, Total=132 [2018-12-08 17:26:46,512 INFO L87 Difference]: Start difference. First operand 195 states and 239 transitions. Second operand 12 states. [2018-12-08 17:26:55,361 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 25 [2018-12-08 17:27:01,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:01,492 INFO L93 Difference]: Finished difference Result 270 states and 332 transitions. [2018-12-08 17:27:01,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 17:27:01,492 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 50 [2018-12-08 17:27:01,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:01,493 INFO L225 Difference]: With dead ends: 270 [2018-12-08 17:27:01,493 INFO L226 Difference]: Without dead ends: 225 [2018-12-08 17:27:01,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 15.2s TimeCoverageRelationStatistics Valid=101, Invalid=401, Unknown=4, NotChecked=0, Total=506 [2018-12-08 17:27:01,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-12-08 17:27:01,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 193. [2018-12-08 17:27:01,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-12-08 17:27:01,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 235 transitions. [2018-12-08 17:27:01,503 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 235 transitions. Word has length 50 [2018-12-08 17:27:01,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:01,503 INFO L480 AbstractCegarLoop]: Abstraction has 193 states and 235 transitions. [2018-12-08 17:27:01,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 17:27:01,504 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 235 transitions. [2018-12-08 17:27:01,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 17:27:01,504 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:01,504 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:01,504 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:01,504 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:01,504 INFO L82 PathProgramCache]: Analyzing trace with hash 960357489, now seen corresponding path program 1 times [2018-12-08 17:27:01,505 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:01,505 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:01,520 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:01,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:01,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:05,690 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:05,690 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:27:05,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:27:05,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 17:27:05,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:27:05,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:27:05,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=37, Unknown=1, NotChecked=0, Total=56 [2018-12-08 17:27:05,692 INFO L87 Difference]: Start difference. First operand 193 states and 235 transitions. Second operand 8 states. [2018-12-08 17:27:16,117 WARN L180 SmtUtils]: Spent 5.72 s on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2018-12-08 17:27:17,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:17,542 INFO L93 Difference]: Finished difference Result 213 states and 261 transitions. [2018-12-08 17:27:17,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:27:17,543 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 50 [2018-12-08 17:27:17,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:17,544 INFO L225 Difference]: With dead ends: 213 [2018-12-08 17:27:17,544 INFO L226 Difference]: Without dead ends: 211 [2018-12-08 17:27:17,544 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 10.2s TimeCoverageRelationStatistics Valid=28, Invalid=61, Unknown=1, NotChecked=0, Total=90 [2018-12-08 17:27:17,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-12-08 17:27:17,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 198. [2018-12-08 17:27:17,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-12-08 17:27:17,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 240 transitions. [2018-12-08 17:27:17,562 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 240 transitions. Word has length 50 [2018-12-08 17:27:17,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:17,562 INFO L480 AbstractCegarLoop]: Abstraction has 198 states and 240 transitions. [2018-12-08 17:27:17,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:27:17,562 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 240 transitions. [2018-12-08 17:27:17,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 17:27:17,563 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:17,563 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:17,563 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:17,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:17,564 INFO L82 PathProgramCache]: Analyzing trace with hash -614439095, now seen corresponding path program 1 times [2018-12-08 17:27:17,564 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:17,564 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:17,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:17,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:17,595 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:17,653 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:17,653 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:17,778 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:17,779 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:17,779 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:17,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:17,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:17,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:17,797 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:17,797 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:17,876 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:17,890 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:17,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-12-08 17:27:17,891 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 17:27:17,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 17:27:17,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:27:17,891 INFO L87 Difference]: Start difference. First operand 198 states and 240 transitions. Second operand 16 states. [2018-12-08 17:27:18,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:18,296 INFO L93 Difference]: Finished difference Result 245 states and 319 transitions. [2018-12-08 17:27:18,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 17:27:18,296 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 51 [2018-12-08 17:27:18,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:18,298 INFO L225 Difference]: With dead ends: 245 [2018-12-08 17:27:18,298 INFO L226 Difference]: Without dead ends: 236 [2018-12-08 17:27:18,298 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 184 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2018-12-08 17:27:18,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-12-08 17:27:18,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 206. [2018-12-08 17:27:18,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-12-08 17:27:18,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 255 transitions. [2018-12-08 17:27:18,318 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 255 transitions. Word has length 51 [2018-12-08 17:27:18,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:18,319 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 255 transitions. [2018-12-08 17:27:18,319 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 17:27:18,319 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 255 transitions. [2018-12-08 17:27:18,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 17:27:18,319 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:18,320 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:18,320 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:18,320 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:18,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1494907781, now seen corresponding path program 1 times [2018-12-08 17:27:18,320 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:18,320 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:18,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:18,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:18,349 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:18,465 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:18,465 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:18,733 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:18,734 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:18,734 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:18,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:18,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:18,755 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:18,759 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:18,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:18,851 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:18,866 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:18,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-08 17:27:18,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 17:27:18,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 17:27:18,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:27:18,867 INFO L87 Difference]: Start difference. First operand 206 states and 255 transitions. Second operand 24 states. [2018-12-08 17:27:19,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:19,784 INFO L93 Difference]: Finished difference Result 269 states and 366 transitions. [2018-12-08 17:27:19,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 17:27:19,785 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-08 17:27:19,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:19,786 INFO L225 Difference]: With dead ends: 269 [2018-12-08 17:27:19,786 INFO L226 Difference]: Without dead ends: 235 [2018-12-08 17:27:19,786 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 177 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=199, Invalid=1361, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 17:27:19,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-12-08 17:27:19,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 195. [2018-12-08 17:27:19,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-12-08 17:27:19,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 254 transitions. [2018-12-08 17:27:19,805 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 254 transitions. Word has length 51 [2018-12-08 17:27:19,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:19,806 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 254 transitions. [2018-12-08 17:27:19,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 17:27:19,806 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 254 transitions. [2018-12-08 17:27:19,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 17:27:19,806 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:19,806 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:19,807 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:19,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:19,807 INFO L82 PathProgramCache]: Analyzing trace with hash 32918923, now seen corresponding path program 2 times [2018-12-08 17:27:19,807 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:19,807 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:19,830 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:19,843 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:19,844 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:19,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:19,904 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:19,904 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:20,004 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:20,006 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:20,006 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:20,011 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:20,022 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:20,022 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:20,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:20,026 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:20,026 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:20,093 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 17:27:20,108 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:20,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 14 [2018-12-08 17:27:20,108 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 17:27:20,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 17:27:20,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-12-08 17:27:20,108 INFO L87 Difference]: Start difference. First operand 195 states and 254 transitions. Second operand 14 states. [2018-12-08 17:27:20,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:20,416 INFO L93 Difference]: Finished difference Result 233 states and 325 transitions. [2018-12-08 17:27:20,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:27:20,417 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 51 [2018-12-08 17:27:20,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:20,418 INFO L225 Difference]: With dead ends: 233 [2018-12-08 17:27:20,418 INFO L226 Difference]: Without dead ends: 226 [2018-12-08 17:27:20,418 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 188 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2018-12-08 17:27:20,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-12-08 17:27:20,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 199. [2018-12-08 17:27:20,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-12-08 17:27:20,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 260 transitions. [2018-12-08 17:27:20,435 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 260 transitions. Word has length 51 [2018-12-08 17:27:20,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:20,436 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 260 transitions. [2018-12-08 17:27:20,436 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 17:27:20,436 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 260 transitions. [2018-12-08 17:27:20,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 17:27:20,437 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:20,437 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:20,437 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:20,437 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:20,437 INFO L82 PathProgramCache]: Analyzing trace with hash 1866743247, now seen corresponding path program 2 times [2018-12-08 17:27:20,437 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:20,437 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:20,450 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:20,463 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:20,464 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:20,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:20,548 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:20,548 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:20,823 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:20,825 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:20,825 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:20,830 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:20,848 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:20,848 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:20,849 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:20,851 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:20,851 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:20,936 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 17:27:20,951 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:20,951 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-12-08 17:27:20,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 17:27:20,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 17:27:20,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:27:20,951 INFO L87 Difference]: Start difference. First operand 199 states and 260 transitions. Second operand 24 states. [2018-12-08 17:27:22,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:22,033 INFO L93 Difference]: Finished difference Result 247 states and 329 transitions. [2018-12-08 17:27:22,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-08 17:27:22,034 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-08 17:27:22,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:22,035 INFO L225 Difference]: With dead ends: 247 [2018-12-08 17:27:22,035 INFO L226 Difference]: Without dead ends: 214 [2018-12-08 17:27:22,035 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 177 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=184, Invalid=1298, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 17:27:22,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-12-08 17:27:22,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 179. [2018-12-08 17:27:22,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-12-08 17:27:22,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 234 transitions. [2018-12-08 17:27:22,049 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 234 transitions. Word has length 51 [2018-12-08 17:27:22,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:22,049 INFO L480 AbstractCegarLoop]: Abstraction has 179 states and 234 transitions. [2018-12-08 17:27:22,049 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 17:27:22,050 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 234 transitions. [2018-12-08 17:27:22,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 17:27:22,050 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:22,050 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:22,050 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:22,050 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:22,050 INFO L82 PathProgramCache]: Analyzing trace with hash -528325640, now seen corresponding path program 1 times [2018-12-08 17:27:22,050 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:22,051 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:22,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:27:22,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:22,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:26,802 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:26,802 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:27:26,803 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:27:26,803 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 17:27:26,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 17:27:26,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 17:27:26,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=37, Unknown=2, NotChecked=0, Total=56 [2018-12-08 17:27:26,804 INFO L87 Difference]: Start difference. First operand 179 states and 234 transitions. Second operand 8 states. [2018-12-08 17:27:49,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:49,195 INFO L93 Difference]: Finished difference Result 195 states and 254 transitions. [2018-12-08 17:27:49,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 17:27:49,196 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-12-08 17:27:49,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:49,197 INFO L225 Difference]: With dead ends: 195 [2018-12-08 17:27:49,197 INFO L226 Difference]: Without dead ends: 191 [2018-12-08 17:27:49,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=21, Invalid=49, Unknown=2, NotChecked=0, Total=72 [2018-12-08 17:27:49,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-12-08 17:27:49,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 176. [2018-12-08 17:27:49,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-12-08 17:27:49,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 230 transitions. [2018-12-08 17:27:49,211 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 230 transitions. Word has length 51 [2018-12-08 17:27:49,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:49,211 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 230 transitions. [2018-12-08 17:27:49,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 17:27:49,211 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 230 transitions. [2018-12-08 17:27:49,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-08 17:27:49,212 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:49,212 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:49,212 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:49,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:49,212 INFO L82 PathProgramCache]: Analyzing trace with hash -1162373086, now seen corresponding path program 1 times [2018-12-08 17:27:49,213 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:49,213 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:49,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:49,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:49,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:49,279 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:27:49,279 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:27:49,280 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:27:49,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 17:27:49,280 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 17:27:49,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 17:27:49,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 17:27:49,281 INFO L87 Difference]: Start difference. First operand 176 states and 230 transitions. Second operand 9 states. [2018-12-08 17:27:49,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:49,407 INFO L93 Difference]: Finished difference Result 215 states and 303 transitions. [2018-12-08 17:27:49,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:27:49,408 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 57 [2018-12-08 17:27:49,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:49,409 INFO L225 Difference]: With dead ends: 215 [2018-12-08 17:27:49,409 INFO L226 Difference]: Without dead ends: 206 [2018-12-08 17:27:49,409 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:27:49,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-08 17:27:49,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 181. [2018-12-08 17:27:49,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-12-08 17:27:49,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 244 transitions. [2018-12-08 17:27:49,425 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 244 transitions. Word has length 57 [2018-12-08 17:27:49,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:49,425 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 244 transitions. [2018-12-08 17:27:49,425 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 17:27:49,425 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 244 transitions. [2018-12-08 17:27:49,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-08 17:27:49,426 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:49,426 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:49,426 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:49,426 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:49,427 INFO L82 PathProgramCache]: Analyzing trace with hash -1304588962, now seen corresponding path program 1 times [2018-12-08 17:27:49,427 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:49,427 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:49,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:49,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:49,467 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:49,489 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:27:49,489 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:27:49,490 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:27:49,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 17:27:49,490 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 17:27:49,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 17:27:49,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:27:49,491 INFO L87 Difference]: Start difference. First operand 181 states and 244 transitions. Second operand 5 states. [2018-12-08 17:27:49,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:49,558 INFO L93 Difference]: Finished difference Result 220 states and 326 transitions. [2018-12-08 17:27:49,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 17:27:49,558 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 57 [2018-12-08 17:27:49,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:49,559 INFO L225 Difference]: With dead ends: 220 [2018-12-08 17:27:49,559 INFO L226 Difference]: Without dead ends: 209 [2018-12-08 17:27:49,559 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 17:27:49,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-12-08 17:27:49,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 202. [2018-12-08 17:27:49,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-12-08 17:27:49,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 289 transitions. [2018-12-08 17:27:49,576 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 289 transitions. Word has length 57 [2018-12-08 17:27:49,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:49,576 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 289 transitions. [2018-12-08 17:27:49,577 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 17:27:49,577 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 289 transitions. [2018-12-08 17:27:49,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-08 17:27:49,577 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:49,577 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:49,577 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:49,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:49,578 INFO L82 PathProgramCache]: Analyzing trace with hash 1712427967, now seen corresponding path program 1 times [2018-12-08 17:27:49,578 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:49,578 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:49,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:49,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:49,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:49,675 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:27:49,676 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:49,817 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:27:49,818 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:49,818 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:49,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:49,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:49,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:49,841 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:27:49,841 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:49,920 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 17:27:49,935 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:49,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 18 [2018-12-08 17:27:49,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 17:27:49,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 17:27:49,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:27:49,936 INFO L87 Difference]: Start difference. First operand 202 states and 289 transitions. Second operand 18 states. [2018-12-08 17:27:50,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:50,155 INFO L93 Difference]: Finished difference Result 231 states and 327 transitions. [2018-12-08 17:27:50,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:27:50,156 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 64 [2018-12-08 17:27:50,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:50,157 INFO L225 Difference]: With dead ends: 231 [2018-12-08 17:27:50,157 INFO L226 Difference]: Without dead ends: 222 [2018-12-08 17:27:50,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-12-08 17:27:50,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-12-08 17:27:50,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 207. [2018-12-08 17:27:50,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-08 17:27:50,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 295 transitions. [2018-12-08 17:27:50,191 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 295 transitions. Word has length 64 [2018-12-08 17:27:50,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:50,191 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 295 transitions. [2018-12-08 17:27:50,191 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 17:27:50,191 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 295 transitions. [2018-12-08 17:27:50,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-08 17:27:50,192 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:50,193 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:50,193 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:50,193 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:50,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1835326830, now seen corresponding path program 1 times [2018-12-08 17:27:50,193 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:50,193 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:50,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:50,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:50,224 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:50,247 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,248 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:50,309 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,311 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:50,311 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:50,319 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:50,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:50,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:50,334 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,334 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:50,372 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,392 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:50,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-08 17:27:50,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:27:50,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:27:50,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:27:50,393 INFO L87 Difference]: Start difference. First operand 207 states and 295 transitions. Second operand 11 states. [2018-12-08 17:27:50,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:50,531 INFO L93 Difference]: Finished difference Result 225 states and 317 transitions. [2018-12-08 17:27:50,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 17:27:50,532 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2018-12-08 17:27:50,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:50,533 INFO L225 Difference]: With dead ends: 225 [2018-12-08 17:27:50,533 INFO L226 Difference]: Without dead ends: 207 [2018-12-08 17:27:50,534 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:27:50,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-12-08 17:27:50,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-12-08 17:27:50,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-08 17:27:50,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 293 transitions. [2018-12-08 17:27:50,557 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 293 transitions. Word has length 64 [2018-12-08 17:27:50,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:50,557 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 293 transitions. [2018-12-08 17:27:50,557 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:27:50,557 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 293 transitions. [2018-12-08 17:27:50,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-08 17:27:50,558 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:50,558 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:50,559 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:50,559 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:50,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1527151470, now seen corresponding path program 2 times [2018-12-08 17:27:50,559 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:50,559 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:50,580 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:50,614 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:50,614 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:50,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:50,644 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:50,710 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,712 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:50,712 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:50,717 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:50,731 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:50,731 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:50,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:50,735 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:50,784 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 17:27:50,799 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:50,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-08 17:27:50,799 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:27:50,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:27:50,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:27:50,799 INFO L87 Difference]: Start difference. First operand 207 states and 293 transitions. Second operand 11 states. [2018-12-08 17:27:50,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:50,954 INFO L93 Difference]: Finished difference Result 220 states and 311 transitions. [2018-12-08 17:27:50,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:27:50,954 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2018-12-08 17:27:50,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:50,955 INFO L225 Difference]: With dead ends: 220 [2018-12-08 17:27:50,956 INFO L226 Difference]: Without dead ends: 202 [2018-12-08 17:27:50,956 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:27:50,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-12-08 17:27:50,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2018-12-08 17:27:50,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-12-08 17:27:50,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 284 transitions. [2018-12-08 17:27:50,974 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 284 transitions. Word has length 64 [2018-12-08 17:27:50,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:50,974 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 284 transitions. [2018-12-08 17:27:50,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:27:50,974 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 284 transitions. [2018-12-08 17:27:50,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-08 17:27:50,975 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:50,976 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:50,976 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:50,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:50,976 INFO L82 PathProgramCache]: Analyzing trace with hash 218346458, now seen corresponding path program 1 times [2018-12-08 17:27:50,976 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:50,976 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:50,990 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:27:51,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:51,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:51,030 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:51,086 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,088 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:51,088 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:51,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:51,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:51,106 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:51,108 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,109 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:51,162 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,176 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:51,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-08 17:27:51,177 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:27:51,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:27:51,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:27:51,177 INFO L87 Difference]: Start difference. First operand 202 states and 284 transitions. Second operand 11 states. [2018-12-08 17:27:51,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:51,297 INFO L93 Difference]: Finished difference Result 213 states and 295 transitions. [2018-12-08 17:27:51,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 17:27:51,297 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-08 17:27:51,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:51,298 INFO L225 Difference]: With dead ends: 213 [2018-12-08 17:27:51,298 INFO L226 Difference]: Without dead ends: 199 [2018-12-08 17:27:51,298 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:27:51,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-12-08 17:27:51,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2018-12-08 17:27:51,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-12-08 17:27:51,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 278 transitions. [2018-12-08 17:27:51,315 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 278 transitions. Word has length 66 [2018-12-08 17:27:51,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:51,315 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 278 transitions. [2018-12-08 17:27:51,316 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:27:51,316 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 278 transitions. [2018-12-08 17:27:51,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-08 17:27:51,316 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:51,316 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:51,317 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:51,317 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:51,317 INFO L82 PathProgramCache]: Analyzing trace with hash 166673046, now seen corresponding path program 2 times [2018-12-08 17:27:51,317 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:51,317 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:51,337 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:51,380 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:51,380 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:51,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:51,414 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,415 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:51,493 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,494 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:51,494 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:51,503 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:51,521 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:51,521 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:51,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:51,526 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,526 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:51,588 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:27:51,602 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:51,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-12-08 17:27:51,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:27:51,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:27:51,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:27:51,603 INFO L87 Difference]: Start difference. First operand 199 states and 278 transitions. Second operand 11 states. [2018-12-08 17:27:51,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:51,733 INFO L93 Difference]: Finished difference Result 210 states and 289 transitions. [2018-12-08 17:27:51,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 17:27:51,733 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-08 17:27:51,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:51,733 INFO L225 Difference]: With dead ends: 210 [2018-12-08 17:27:51,734 INFO L226 Difference]: Without dead ends: 196 [2018-12-08 17:27:51,734 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:27:51,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-12-08 17:27:51,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 194. [2018-12-08 17:27:51,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-12-08 17:27:51,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 261 transitions. [2018-12-08 17:27:51,759 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 261 transitions. Word has length 66 [2018-12-08 17:27:51,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:51,759 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 261 transitions. [2018-12-08 17:27:51,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:27:51,759 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 261 transitions. [2018-12-08 17:27:51,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 17:27:51,760 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:51,760 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:51,760 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:51,760 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:51,760 INFO L82 PathProgramCache]: Analyzing trace with hash -1109140964, now seen corresponding path program 1 times [2018-12-08 17:27:51,760 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:51,760 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:51,775 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:27:51,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:51,795 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:51,874 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:51,875 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:52,038 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:52,039 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:52,039 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:52,045 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:52,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:52,062 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:52,067 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:52,067 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:52,174 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:52,188 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:52,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-12-08 17:27:52,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 17:27:52,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 17:27:52,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:27:52,189 INFO L87 Difference]: Start difference. First operand 194 states and 261 transitions. Second operand 16 states. [2018-12-08 17:27:52,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:52,496 INFO L93 Difference]: Finished difference Result 212 states and 289 transitions. [2018-12-08 17:27:52,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 17:27:52,497 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 71 [2018-12-08 17:27:52,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:52,497 INFO L225 Difference]: With dead ends: 212 [2018-12-08 17:27:52,498 INFO L226 Difference]: Without dead ends: 169 [2018-12-08 17:27:52,498 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 265 SyntacticMatches, 6 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:27:52,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-08 17:27:52,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 159. [2018-12-08 17:27:52,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-08 17:27:52,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 227 transitions. [2018-12-08 17:27:52,519 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 227 transitions. Word has length 71 [2018-12-08 17:27:52,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:52,519 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 227 transitions. [2018-12-08 17:27:52,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 17:27:52,519 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 227 transitions. [2018-12-08 17:27:52,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 17:27:52,520 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:52,520 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:52,520 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:52,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:52,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1251533860, now seen corresponding path program 2 times [2018-12-08 17:27:52,520 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:52,521 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:52,533 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:52,567 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:52,567 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:52,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:52,712 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 10 proven. 8 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:52,712 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:53,020 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:53,020 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:53,031 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:27:53,049 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:27:53,049 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:27:53,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:53,145 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 17:27:53,145 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:27:53,160 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:27:53,160 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [15] total 20 [2018-12-08 17:27:53,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:27:53,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:27:53,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=454, Unknown=0, NotChecked=0, Total=506 [2018-12-08 17:27:53,160 INFO L87 Difference]: Start difference. First operand 159 states and 227 transitions. Second operand 20 states. [2018-12-08 17:27:53,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:27:53,886 INFO L93 Difference]: Finished difference Result 214 states and 282 transitions. [2018-12-08 17:27:53,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 17:27:53,887 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 71 [2018-12-08 17:27:53,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:27:53,887 INFO L225 Difference]: With dead ends: 214 [2018-12-08 17:27:53,887 INFO L226 Difference]: Without dead ends: 174 [2018-12-08 17:27:53,888 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=171, Invalid=1089, Unknown=0, NotChecked=0, Total=1260 [2018-12-08 17:27:53,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-12-08 17:27:53,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 151. [2018-12-08 17:27:53,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 17:27:53,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 206 transitions. [2018-12-08 17:27:53,902 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 206 transitions. Word has length 71 [2018-12-08 17:27:53,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:27:53,902 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 206 transitions. [2018-12-08 17:27:53,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:27:53,902 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 206 transitions. [2018-12-08 17:27:53,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 17:27:53,902 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:27:53,902 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:27:53,902 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:27:53,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:27:53,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1043562547, now seen corresponding path program 1 times [2018-12-08 17:27:53,903 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:27:53,903 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:27:53,919 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:27:53,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:53,990 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:54,276 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:27:54,276 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:55,450 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:27:55,451 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:27:55,451 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:27:55,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:27:55,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:27:55,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:27:56,048 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:27:56,048 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:27:58,235 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:27:58,250 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:27:58,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13, 14] total 38 [2018-12-08 17:27:58,250 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-08 17:27:58,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-08 17:27:58,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1232, Unknown=0, NotChecked=0, Total=1406 [2018-12-08 17:27:58,251 INFO L87 Difference]: Start difference. First operand 151 states and 206 transitions. Second operand 38 states. [2018-12-08 17:27:58,946 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 48 [2018-12-08 17:27:59,400 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 45 [2018-12-08 17:27:59,905 WARN L180 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 43 [2018-12-08 17:28:00,404 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 46 [2018-12-08 17:28:00,686 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 45 [2018-12-08 17:28:00,998 WARN L180 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 47 [2018-12-08 17:28:02,686 WARN L180 SmtUtils]: Spent 268.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2018-12-08 17:28:03,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:03,942 INFO L93 Difference]: Finished difference Result 200 states and 283 transitions. [2018-12-08 17:28:03,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:28:03,943 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 71 [2018-12-08 17:28:03,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:03,944 INFO L225 Difference]: With dead ends: 200 [2018-12-08 17:28:03,944 INFO L226 Difference]: Without dead ends: 189 [2018-12-08 17:28:03,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 240 SyntacticMatches, 6 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 502 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=446, Invalid=2206, Unknown=0, NotChecked=0, Total=2652 [2018-12-08 17:28:03,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-12-08 17:28:03,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 163. [2018-12-08 17:28:03,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-08 17:28:03,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 230 transitions. [2018-12-08 17:28:03,974 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 230 transitions. Word has length 71 [2018-12-08 17:28:03,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:03,974 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 230 transitions. [2018-12-08 17:28:03,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-08 17:28:03,974 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 230 transitions. [2018-12-08 17:28:03,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 17:28:03,975 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:03,975 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:03,975 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:03,975 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:03,976 INFO L82 PathProgramCache]: Analyzing trace with hash 1017205495, now seen corresponding path program 2 times [2018-12-08 17:28:03,976 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:03,976 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:03,988 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:04,057 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:04,057 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:04,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:04,369 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:04,369 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:05,499 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:05,500 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:05,501 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:05,507 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:05,539 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:05,539 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:05,541 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:06,099 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:06,100 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:06,223 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2018-12-08 17:28:08,236 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:08,251 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:08,251 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13, 14] total 38 [2018-12-08 17:28:08,251 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-12-08 17:28:08,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-12-08 17:28:08,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=1235, Unknown=0, NotChecked=0, Total=1406 [2018-12-08 17:28:08,252 INFO L87 Difference]: Start difference. First operand 163 states and 230 transitions. Second operand 38 states. [2018-12-08 17:28:08,945 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 47 [2018-12-08 17:28:09,781 WARN L180 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 44 [2018-12-08 17:28:10,397 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 43 [2018-12-08 17:28:10,625 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 38 [2018-12-08 17:28:10,975 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 46 [2018-12-08 17:28:11,332 WARN L180 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 45 [2018-12-08 17:28:11,650 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 50 [2018-12-08 17:28:12,517 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 36 [2018-12-08 17:28:12,795 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 48 [2018-12-08 17:28:13,403 WARN L180 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 55 [2018-12-08 17:28:14,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:14,132 INFO L93 Difference]: Finished difference Result 205 states and 290 transitions. [2018-12-08 17:28:14,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 17:28:14,133 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 71 [2018-12-08 17:28:14,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:14,134 INFO L225 Difference]: With dead ends: 205 [2018-12-08 17:28:14,134 INFO L226 Difference]: Without dead ends: 194 [2018-12-08 17:28:14,135 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 242 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 505 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=449, Invalid=2203, Unknown=0, NotChecked=0, Total=2652 [2018-12-08 17:28:14,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-12-08 17:28:14,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 173. [2018-12-08 17:28:14,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 17:28:14,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 247 transitions. [2018-12-08 17:28:14,156 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 247 transitions. Word has length 71 [2018-12-08 17:28:14,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:14,156 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 247 transitions. [2018-12-08 17:28:14,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-12-08 17:28:14,157 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 247 transitions. [2018-12-08 17:28:14,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 17:28:14,157 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:14,157 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:14,157 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:14,157 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:14,157 INFO L82 PathProgramCache]: Analyzing trace with hash 1098580064, now seen corresponding path program 1 times [2018-12-08 17:28:14,158 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:14,158 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:14,172 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:28:14,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:14,192 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:14,287 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:14,287 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:14,360 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:14,360 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:14,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:14,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:14,419 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:15,556 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-08 17:28:15,556 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:28:15,570 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:28:15,571 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [13] total 29 [2018-12-08 17:28:15,571 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-08 17:28:15,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-08 17:28:15,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=785, Unknown=0, NotChecked=0, Total=870 [2018-12-08 17:28:15,571 INFO L87 Difference]: Start difference. First operand 173 states and 247 transitions. Second operand 29 states. [2018-12-08 17:28:17,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:17,366 INFO L93 Difference]: Finished difference Result 200 states and 276 transitions. [2018-12-08 17:28:17,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-08 17:28:17,366 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 71 [2018-12-08 17:28:17,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:17,367 INFO L225 Difference]: With dead ends: 200 [2018-12-08 17:28:17,367 INFO L226 Difference]: Without dead ends: 191 [2018-12-08 17:28:17,368 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=204, Invalid=1518, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 17:28:17,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-12-08 17:28:17,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 173. [2018-12-08 17:28:17,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 17:28:17,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 246 transitions. [2018-12-08 17:28:17,388 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 246 transitions. Word has length 71 [2018-12-08 17:28:17,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:17,388 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 246 transitions. [2018-12-08 17:28:17,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-08 17:28:17,388 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 246 transitions. [2018-12-08 17:28:17,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-08 17:28:17,389 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:17,389 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:17,389 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:17,389 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:17,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1669060429, now seen corresponding path program 1 times [2018-12-08 17:28:17,389 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:17,389 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:17,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:17,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:17,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:18,070 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:28:18,071 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:18,345 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-12-08 17:28:19,417 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:19,417 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:19,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:19,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:19,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:20,523 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 17:28:20,523 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:20,754 WARN L180 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2018-12-08 17:28:21,223 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:28:21,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18] total 23 [2018-12-08 17:28:21,223 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-08 17:28:21,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-08 17:28:21,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=741, Unknown=0, NotChecked=0, Total=812 [2018-12-08 17:28:21,224 INFO L87 Difference]: Start difference. First operand 173 states and 246 transitions. Second operand 23 states. [2018-12-08 17:28:22,475 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 37 [2018-12-08 17:28:22,762 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 39 [2018-12-08 17:28:24,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:24,424 INFO L93 Difference]: Finished difference Result 202 states and 278 transitions. [2018-12-08 17:28:24,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 17:28:24,425 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 76 [2018-12-08 17:28:24,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:24,426 INFO L225 Difference]: With dead ends: 202 [2018-12-08 17:28:24,426 INFO L226 Difference]: Without dead ends: 186 [2018-12-08 17:28:24,426 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 142 SyntacticMatches, 5 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=161, Invalid=1321, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 17:28:24,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-12-08 17:28:24,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 173. [2018-12-08 17:28:24,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 17:28:24,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 241 transitions. [2018-12-08 17:28:24,446 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 241 transitions. Word has length 76 [2018-12-08 17:28:24,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:24,447 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 241 transitions. [2018-12-08 17:28:24,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-08 17:28:24,447 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 241 transitions. [2018-12-08 17:28:24,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 17:28:24,447 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:24,447 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:24,447 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:24,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:24,448 INFO L82 PathProgramCache]: Analyzing trace with hash 1038546648, now seen corresponding path program 1 times [2018-12-08 17:28:24,448 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:24,448 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:24,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:24,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:24,484 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:24,521 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 17:28:24,521 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:24,559 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 17:28:24,560 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:24,560 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:24,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:24,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:24,580 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:24,583 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 17:28:24,583 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:24,618 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 17:28:24,633 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:24,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6] total 6 [2018-12-08 17:28:24,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:28:24,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:28:24,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:28:24,633 INFO L87 Difference]: Start difference. First operand 173 states and 241 transitions. Second operand 6 states. [2018-12-08 17:28:24,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:24,674 INFO L93 Difference]: Finished difference Result 185 states and 253 transitions. [2018-12-08 17:28:24,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:28:24,674 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2018-12-08 17:28:24,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:24,675 INFO L225 Difference]: With dead ends: 185 [2018-12-08 17:28:24,675 INFO L226 Difference]: Without dead ends: 180 [2018-12-08 17:28:24,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 282 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:28:24,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-12-08 17:28:24,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 173. [2018-12-08 17:28:24,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 17:28:24,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 241 transitions. [2018-12-08 17:28:24,696 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 241 transitions. Word has length 73 [2018-12-08 17:28:24,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:24,697 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 241 transitions. [2018-12-08 17:28:24,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:28:24,697 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 241 transitions. [2018-12-08 17:28:24,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 17:28:24,698 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:24,698 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:24,698 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:24,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:24,698 INFO L82 PathProgramCache]: Analyzing trace with hash 1937569667, now seen corresponding path program 1 times [2018-12-08 17:28:24,698 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:24,698 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:24,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:24,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:24,785 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:25,113 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:25,113 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:26,234 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:26,235 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:26,235 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:26,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:26,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:26,271 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:26,282 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:26,282 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:26,646 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:26,660 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:26,661 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-12-08 17:28:26,661 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 17:28:26,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 17:28:26,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2018-12-08 17:28:26,661 INFO L87 Difference]: Start difference. First operand 173 states and 241 transitions. Second operand 22 states. [2018-12-08 17:28:27,133 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 41 [2018-12-08 17:28:27,670 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 38 [2018-12-08 17:28:28,000 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-08 17:28:28,407 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 43 [2018-12-08 17:28:29,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:29,313 INFO L93 Difference]: Finished difference Result 194 states and 263 transitions. [2018-12-08 17:28:29,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 17:28:29,314 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-12-08 17:28:29,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:29,315 INFO L225 Difference]: With dead ends: 194 [2018-12-08 17:28:29,315 INFO L226 Difference]: Without dead ends: 183 [2018-12-08 17:28:29,315 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=196, Invalid=796, Unknown=0, NotChecked=0, Total=992 [2018-12-08 17:28:29,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-12-08 17:28:29,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 173. [2018-12-08 17:28:29,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 17:28:29,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 239 transitions. [2018-12-08 17:28:29,336 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 239 transitions. Word has length 73 [2018-12-08 17:28:29,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:29,336 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 239 transitions. [2018-12-08 17:28:29,336 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 17:28:29,336 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 239 transitions. [2018-12-08 17:28:29,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-08 17:28:29,337 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:29,337 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:29,337 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:29,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:29,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1573324402, now seen corresponding path program 1 times [2018-12-08 17:28:29,337 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:29,337 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 63 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:29,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:29,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:29,432 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:29,790 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 17:28:29,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:30,407 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-12-08 17:28:31,349 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-08 17:28:31,351 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:31,351 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:31,356 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:31,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:31,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:31,472 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 17:28:31,472 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:31,744 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-12-08 17:28:31,949 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-08 17:28:31,964 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:31,964 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 13, 15] total 24 [2018-12-08 17:28:31,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 17:28:31,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 17:28:31,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:28:31,965 INFO L87 Difference]: Start difference. First operand 173 states and 239 transitions. Second operand 24 states. [2018-12-08 17:28:34,459 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 29 [2018-12-08 17:28:35,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:35,151 INFO L93 Difference]: Finished difference Result 241 states and 314 transitions. [2018-12-08 17:28:35,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 17:28:35,153 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 77 [2018-12-08 17:28:35,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:35,154 INFO L225 Difference]: With dead ends: 241 [2018-12-08 17:28:35,154 INFO L226 Difference]: Without dead ends: 177 [2018-12-08 17:28:35,155 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 281 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=262, Invalid=1220, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 17:28:35,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-08 17:28:35,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 166. [2018-12-08 17:28:35,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-12-08 17:28:35,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 228 transitions. [2018-12-08 17:28:35,175 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 228 transitions. Word has length 77 [2018-12-08 17:28:35,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:35,175 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 228 transitions. [2018-12-08 17:28:35,175 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 17:28:35,176 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 228 transitions. [2018-12-08 17:28:35,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 17:28:35,176 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:35,176 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:35,177 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:35,177 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:35,177 INFO L82 PathProgramCache]: Analyzing trace with hash -880217657, now seen corresponding path program 2 times [2018-12-08 17:28:35,177 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:35,177 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:35,192 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:35,257 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:35,257 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:35,258 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:35,577 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:35,577 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:36,730 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:36,732 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:36,732 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:36,737 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:36,770 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:36,770 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:36,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:36,780 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:36,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:37,128 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 17:28:37,143 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:37,143 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-12-08 17:28:37,143 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 17:28:37,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 17:28:37,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2018-12-08 17:28:37,144 INFO L87 Difference]: Start difference. First operand 166 states and 228 transitions. Second operand 22 states. [2018-12-08 17:28:37,640 WARN L180 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 41 [2018-12-08 17:28:38,090 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 38 [2018-12-08 17:28:38,351 WARN L180 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-08 17:28:38,556 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 43 [2018-12-08 17:28:39,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:39,411 INFO L93 Difference]: Finished difference Result 187 states and 250 transitions. [2018-12-08 17:28:39,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:28:39,413 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-12-08 17:28:39,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:39,414 INFO L225 Difference]: With dead ends: 187 [2018-12-08 17:28:39,414 INFO L226 Difference]: Without dead ends: 173 [2018-12-08 17:28:39,414 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=192, Invalid=800, Unknown=0, NotChecked=0, Total=992 [2018-12-08 17:28:39,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-08 17:28:39,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 163. [2018-12-08 17:28:39,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-08 17:28:39,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 219 transitions. [2018-12-08 17:28:39,433 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 219 transitions. Word has length 73 [2018-12-08 17:28:39,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:39,434 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 219 transitions. [2018-12-08 17:28:39,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 17:28:39,434 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 219 transitions. [2018-12-08 17:28:39,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-08 17:28:39,434 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:39,434 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:39,434 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:39,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:39,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1211717294, now seen corresponding path program 2 times [2018-12-08 17:28:39,435 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:39,435 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:39,447 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:39,522 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:39,522 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:39,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:39,875 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 17:28:39,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:41,722 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-08 17:28:41,724 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:41,724 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:41,729 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:28:41,810 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:28:41,810 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:28:41,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:42,567 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 17:28:42,567 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:42,763 WARN L180 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 57 [2018-12-08 17:28:45,322 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-08 17:28:45,336 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:28:45,336 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 16, 17] total 43 [2018-12-08 17:28:45,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-12-08 17:28:45,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-12-08 17:28:45,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=221, Invalid=1585, Unknown=0, NotChecked=0, Total=1806 [2018-12-08 17:28:45,337 INFO L87 Difference]: Start difference. First operand 163 states and 219 transitions. Second operand 43 states. [2018-12-08 17:28:46,472 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2018-12-08 17:28:46,913 WARN L180 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2018-12-08 17:28:48,571 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2018-12-08 17:28:48,906 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 35 [2018-12-08 17:28:50,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:50,970 INFO L93 Difference]: Finished difference Result 229 states and 295 transitions. [2018-12-08 17:28:50,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-12-08 17:28:50,971 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 77 [2018-12-08 17:28:50,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:50,971 INFO L225 Difference]: With dead ends: 229 [2018-12-08 17:28:50,971 INFO L226 Difference]: Without dead ends: 169 [2018-12-08 17:28:50,972 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 260 SyntacticMatches, 5 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 688 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=637, Invalid=3145, Unknown=0, NotChecked=0, Total=3782 [2018-12-08 17:28:50,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-08 17:28:50,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 148. [2018-12-08 17:28:50,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 17:28:50,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 195 transitions. [2018-12-08 17:28:50,988 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 195 transitions. Word has length 77 [2018-12-08 17:28:50,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:50,988 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 195 transitions. [2018-12-08 17:28:50,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-12-08 17:28:50,988 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 195 transitions. [2018-12-08 17:28:50,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-08 17:28:50,989 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:50,989 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:50,989 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:50,989 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:50,989 INFO L82 PathProgramCache]: Analyzing trace with hash 237463554, now seen corresponding path program 1 times [2018-12-08 17:28:50,989 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:50,989 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:51,002 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:28:51,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:51,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:51,040 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-12-08 17:28:51,040 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:28:51,041 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:28:51,041 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 17:28:51,041 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 17:28:51,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 17:28:51,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 17:28:51,042 INFO L87 Difference]: Start difference. First operand 148 states and 195 transitions. Second operand 6 states. [2018-12-08 17:28:51,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:51,076 INFO L93 Difference]: Finished difference Result 160 states and 207 transitions. [2018-12-08 17:28:51,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 17:28:51,076 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2018-12-08 17:28:51,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:51,077 INFO L225 Difference]: With dead ends: 160 [2018-12-08 17:28:51,077 INFO L226 Difference]: Without dead ends: 151 [2018-12-08 17:28:51,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 70 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 17:28:51,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-08 17:28:51,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 137. [2018-12-08 17:28:51,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-08 17:28:51,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 174 transitions. [2018-12-08 17:28:51,091 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 174 transitions. Word has length 75 [2018-12-08 17:28:51,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:51,092 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 174 transitions. [2018-12-08 17:28:51,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 17:28:51,092 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 174 transitions. [2018-12-08 17:28:51,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 17:28:51,092 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:51,092 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:51,092 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:51,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:51,093 INFO L82 PathProgramCache]: Analyzing trace with hash 1637188566, now seen corresponding path program 1 times [2018-12-08 17:28:51,093 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:51,093 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 70 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:51,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:51,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:51,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:51,347 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:51,347 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:51,496 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:28:51,496 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:28:51,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:51,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:51,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:51,741 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 24 proven. 3 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:28:51,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:28:51,948 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:28:51,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15] total 15 [2018-12-08 17:28:51,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 17:28:51,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 17:28:51,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 17:28:51,949 INFO L87 Difference]: Start difference. First operand 137 states and 174 transitions. Second operand 15 states. [2018-12-08 17:28:56,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:28:56,939 INFO L93 Difference]: Finished difference Result 169 states and 214 transitions. [2018-12-08 17:28:56,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:28:56,940 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 80 [2018-12-08 17:28:56,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:28:56,941 INFO L225 Difference]: With dead ends: 169 [2018-12-08 17:28:56,941 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 17:28:56,941 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=439, Unknown=0, NotChecked=0, Total=506 [2018-12-08 17:28:56,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 17:28:56,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 144. [2018-12-08 17:28:56,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:28:56,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 188 transitions. [2018-12-08 17:28:56,958 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 188 transitions. Word has length 80 [2018-12-08 17:28:56,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:28:56,959 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 188 transitions. [2018-12-08 17:28:56,959 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 17:28:56,959 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 188 transitions. [2018-12-08 17:28:56,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 17:28:56,959 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:28:56,959 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:28:56,959 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:28:56,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:28:56,959 INFO L82 PathProgramCache]: Analyzing trace with hash -734550696, now seen corresponding path program 1 times [2018-12-08 17:28:56,960 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:28:56,960 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:28:56,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:28:57,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:28:57,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:28:59,833 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:28:59,833 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:00,236 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:00,236 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:00,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:00,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:00,261 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:00,376 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 17:29:00,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:00,537 WARN L180 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-12-08 17:29:00,831 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:29:00,831 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 14 [2018-12-08 17:29:00,832 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 17:29:00,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 17:29:00,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=180, Unknown=1, NotChecked=0, Total=210 [2018-12-08 17:29:00,832 INFO L87 Difference]: Start difference. First operand 144 states and 188 transitions. Second operand 14 states. [2018-12-08 17:29:14,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:14,437 INFO L93 Difference]: Finished difference Result 171 states and 215 transitions. [2018-12-08 17:29:14,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 17:29:14,438 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 80 [2018-12-08 17:29:14,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:14,438 INFO L225 Difference]: With dead ends: 171 [2018-12-08 17:29:14,438 INFO L226 Difference]: Without dead ends: 162 [2018-12-08 17:29:14,439 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=65, Invalid=395, Unknown=2, NotChecked=0, Total=462 [2018-12-08 17:29:14,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-08 17:29:14,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 144. [2018-12-08 17:29:14,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:29:14,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 187 transitions. [2018-12-08 17:29:14,456 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 187 transitions. Word has length 80 [2018-12-08 17:29:14,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:14,456 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 187 transitions. [2018-12-08 17:29:14,456 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 17:29:14,456 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2018-12-08 17:29:14,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 17:29:14,457 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:14,457 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:14,457 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:14,457 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:14,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1107258990, now seen corresponding path program 2 times [2018-12-08 17:29:14,457 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:14,457 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 74 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:14,470 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:29:14,534 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:29:14,534 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:29:14,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:16,309 WARN L180 SmtUtils]: Spent 1.71 s on a formula simplification that was a NOOP. DAG size: 16 [2018-12-08 17:29:16,403 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:16,404 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 17:29:16,405 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 17:29:16,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-08 17:29:16,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 17:29:16,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 17:29:16,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-12-08 17:29:16,406 INFO L87 Difference]: Start difference. First operand 144 states and 187 transitions. Second operand 11 states. [2018-12-08 17:29:18,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:18,958 INFO L93 Difference]: Finished difference Result 167 states and 210 transitions. [2018-12-08 17:29:18,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:29:18,959 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 80 [2018-12-08 17:29:18,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:18,960 INFO L225 Difference]: With dead ends: 167 [2018-12-08 17:29:18,960 INFO L226 Difference]: Without dead ends: 158 [2018-12-08 17:29:18,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:29:18,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-08 17:29:18,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 144. [2018-12-08 17:29:18,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 17:29:18,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2018-12-08 17:29:18,977 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 80 [2018-12-08 17:29:18,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:18,977 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2018-12-08 17:29:18,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 17:29:18,977 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2018-12-08 17:29:18,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 17:29:18,978 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:18,978 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:18,978 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:18,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:18,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1359709994, now seen corresponding path program 1 times [2018-12-08 17:29:18,978 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:18,978 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:18,991 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:29:19,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:19,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:19,694 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:19,694 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:22,019 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:22,020 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:22,020 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:22,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:22,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:22,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:22,848 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:22,848 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:23,971 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:29:23,971 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 16] total 31 [2018-12-08 17:29:23,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-12-08 17:29:23,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-12-08 17:29:23,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=937, Unknown=0, NotChecked=0, Total=1122 [2018-12-08 17:29:23,971 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand 31 states. [2018-12-08 17:29:26,252 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 38 [2018-12-08 17:29:27,761 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-12-08 17:29:28,739 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 36 [2018-12-08 17:29:29,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:29,140 INFO L93 Difference]: Finished difference Result 198 states and 248 transitions. [2018-12-08 17:29:29,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 17:29:29,142 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 80 [2018-12-08 17:29:29,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:29,142 INFO L225 Difference]: With dead ends: 198 [2018-12-08 17:29:29,142 INFO L226 Difference]: Without dead ends: 173 [2018-12-08 17:29:29,143 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 213 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=412, Invalid=2038, Unknown=0, NotChecked=0, Total=2450 [2018-12-08 17:29:29,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-08 17:29:29,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 142. [2018-12-08 17:29:29,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 17:29:29,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 178 transitions. [2018-12-08 17:29:29,160 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 178 transitions. Word has length 80 [2018-12-08 17:29:29,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:29,161 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 178 transitions. [2018-12-08 17:29:29,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-12-08 17:29:29,161 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 178 transitions. [2018-12-08 17:29:29,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 17:29:29,161 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:29,161 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:29,161 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:29,161 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:29,161 INFO L82 PathProgramCache]: Analyzing trace with hash -1037358574, now seen corresponding path program 2 times [2018-12-08 17:29:29,161 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:29,162 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:29,174 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:29:29,271 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:29:29,271 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:29:29,273 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:29,898 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:29,898 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:32,196 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:32,197 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:32,198 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:32,203 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:29:32,357 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:29:32,357 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:29:32,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:33,600 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:33,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:33,955 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 17:29:34,120 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-08 17:29:35,799 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-12-08 17:29:35,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18] total 35 [2018-12-08 17:29:35,799 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-08 17:29:35,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-08 17:29:35,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=1422, Unknown=0, NotChecked=0, Total=1640 [2018-12-08 17:29:35,800 INFO L87 Difference]: Start difference. First operand 142 states and 178 transitions. Second operand 35 states. [2018-12-08 17:29:36,558 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 38 [2018-12-08 17:29:37,240 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 39 [2018-12-08 17:29:38,710 WARN L180 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 39 [2018-12-08 17:29:39,049 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 42 [2018-12-08 17:29:40,055 WARN L180 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-12-08 17:29:40,508 WARN L180 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 38 [2018-12-08 17:29:43,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:43,078 INFO L93 Difference]: Finished difference Result 196 states and 241 transitions. [2018-12-08 17:29:43,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 17:29:43,079 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 80 [2018-12-08 17:29:43,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:43,080 INFO L225 Difference]: With dead ends: 196 [2018-12-08 17:29:43,080 INFO L226 Difference]: Without dead ends: 176 [2018-12-08 17:29:43,081 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 211 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 638 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=475, Invalid=2831, Unknown=0, NotChecked=0, Total=3306 [2018-12-08 17:29:43,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-08 17:29:43,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 162. [2018-12-08 17:29:43,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-08 17:29:43,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 202 transitions. [2018-12-08 17:29:43,101 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 202 transitions. Word has length 80 [2018-12-08 17:29:43,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:43,102 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 202 transitions. [2018-12-08 17:29:43,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-08 17:29:43,102 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 202 transitions. [2018-12-08 17:29:43,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 17:29:43,102 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:43,102 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:43,102 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:43,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:43,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1128172057, now seen corresponding path program 1 times [2018-12-08 17:29:43,103 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:43,103 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:43,115 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:29:43,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:43,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:43,194 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 17 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:43,194 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:43,343 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:43,344 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:43,344 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:43,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:43,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:43,368 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:43,373 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:43,373 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:43,423 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:43,437 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:29:43,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10] total 18 [2018-12-08 17:29:43,438 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 17:29:43,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 17:29:43,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-12-08 17:29:43,438 INFO L87 Difference]: Start difference. First operand 162 states and 202 transitions. Second operand 18 states. [2018-12-08 17:29:43,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:43,815 INFO L93 Difference]: Finished difference Result 173 states and 214 transitions. [2018-12-08 17:29:43,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 17:29:43,816 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-12-08 17:29:43,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:43,816 INFO L225 Difference]: With dead ends: 173 [2018-12-08 17:29:43,816 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 17:29:43,817 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 333 GetRequests, 310 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2018-12-08 17:29:43,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 17:29:43,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-12-08 17:29:43,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 17:29:43,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 181 transitions. [2018-12-08 17:29:43,838 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 181 transitions. Word has length 81 [2018-12-08 17:29:43,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:43,838 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 181 transitions. [2018-12-08 17:29:43,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 17:29:43,838 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 181 transitions. [2018-12-08 17:29:43,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 17:29:43,839 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:43,839 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:43,839 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:43,839 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:43,840 INFO L82 PathProgramCache]: Analyzing trace with hash 1949643741, now seen corresponding path program 2 times [2018-12-08 17:29:43,840 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:43,840 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 81 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:43,856 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:29:43,893 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:29:43,893 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:29:43,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:43,963 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:43,964 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:44,103 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 17:29:44,104 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 17:29:44,104 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 17 [2018-12-08 17:29:44,104 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-08 17:29:44,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-08 17:29:44,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-12-08 17:29:44,105 INFO L87 Difference]: Start difference. First operand 143 states and 181 transitions. Second operand 17 states. [2018-12-08 17:29:44,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:44,607 INFO L93 Difference]: Finished difference Result 154 states and 192 transitions. [2018-12-08 17:29:44,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 17:29:44,608 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 81 [2018-12-08 17:29:44,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:44,608 INFO L225 Difference]: With dead ends: 154 [2018-12-08 17:29:44,609 INFO L226 Difference]: Without dead ends: 113 [2018-12-08 17:29:44,609 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 149 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=468, Unknown=0, NotChecked=0, Total=552 [2018-12-08 17:29:44,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-08 17:29:44,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 110. [2018-12-08 17:29:44,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-12-08 17:29:44,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 144 transitions. [2018-12-08 17:29:44,624 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 144 transitions. Word has length 81 [2018-12-08 17:29:44,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:44,624 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 144 transitions. [2018-12-08 17:29:44,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-08 17:29:44,624 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 144 transitions. [2018-12-08 17:29:44,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 17:29:44,625 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:44,625 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:44,625 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:44,625 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:44,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1581370087, now seen corresponding path program 1 times [2018-12-08 17:29:44,625 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:44,625 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 82 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:44,640 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:29:44,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:44,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:44,736 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:44,737 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:44,887 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:44,888 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:44,888 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:44,894 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:44,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:44,911 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:44,917 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:44,917 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:44,986 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:45,000 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:29:45,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-12-08 17:29:45,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 17:29:45,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 17:29:45,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:29:45,001 INFO L87 Difference]: Start difference. First operand 110 states and 144 transitions. Second operand 15 states. [2018-12-08 17:29:45,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:29:45,498 INFO L93 Difference]: Finished difference Result 119 states and 152 transitions. [2018-12-08 17:29:45,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 17:29:45,498 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-08 17:29:45,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:29:45,499 INFO L225 Difference]: With dead ends: 119 [2018-12-08 17:29:45,499 INFO L226 Difference]: Without dead ends: 106 [2018-12-08 17:29:45,500 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 305 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-12-08 17:29:45,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-08 17:29:45,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-08 17:29:45,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-08 17:29:45,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 138 transitions. [2018-12-08 17:29:45,517 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 138 transitions. Word has length 81 [2018-12-08 17:29:45,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:29:45,518 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 138 transitions. [2018-12-08 17:29:45,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 17:29:45,518 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 138 transitions. [2018-12-08 17:29:45,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-08 17:29:45,518 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:29:45,519 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:29:45,519 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:29:45,519 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:29:45,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1716375510, now seen corresponding path program 1 times [2018-12-08 17:29:45,519 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:29:45,519 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 84 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:29:45,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:45,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:45,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:46,813 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:46,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:47,079 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 49 [2018-12-08 17:29:49,049 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 17:29:51,236 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:51,238 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:29:51,238 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:29:51,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:29:51,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:29:51,398 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:29:51,668 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:29:51,668 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:29:52,856 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 17:29:53,131 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-08 17:29:53,213 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:29:53,228 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:29:53,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 21, 18, 21] total 40 [2018-12-08 17:29:53,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-08 17:29:53,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-08 17:29:53,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1393, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 17:29:53,229 INFO L87 Difference]: Start difference. First operand 106 states and 138 transitions. Second operand 40 states. [2018-12-08 17:29:54,593 WARN L180 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 52 [2018-12-08 17:29:55,454 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 33 [2018-12-08 17:29:56,309 WARN L180 SmtUtils]: Spent 403.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 75 [2018-12-08 17:29:58,102 WARN L180 SmtUtils]: Spent 1.23 s on a formula simplification. DAG size of input: 108 DAG size of output: 106 [2018-12-08 17:29:59,090 WARN L180 SmtUtils]: Spent 477.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2018-12-08 17:30:00,801 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-12-08 17:30:01,580 WARN L180 SmtUtils]: Spent 225.00 ms on a formula simplification that was a NOOP. DAG size: 83 [2018-12-08 17:30:01,964 WARN L180 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-12-08 17:30:03,494 WARN L180 SmtUtils]: Spent 729.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 106 [2018-12-08 17:30:05,146 WARN L180 SmtUtils]: Spent 241.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 62 [2018-12-08 17:30:06,731 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 47 [2018-12-08 17:30:09,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:30:09,018 INFO L93 Difference]: Finished difference Result 143 states and 183 transitions. [2018-12-08 17:30:09,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-12-08 17:30:09,018 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 78 [2018-12-08 17:30:09,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:30:09,019 INFO L225 Difference]: With dead ends: 143 [2018-12-08 17:30:09,019 INFO L226 Difference]: Without dead ends: 126 [2018-12-08 17:30:09,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 268 SyntacticMatches, 4 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 887 ImplicationChecksByTransitivity, 16.4s TimeCoverageRelationStatistics Valid=639, Invalid=4911, Unknown=0, NotChecked=0, Total=5550 [2018-12-08 17:30:09,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-08 17:30:09,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 114. [2018-12-08 17:30:09,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-08 17:30:09,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 146 transitions. [2018-12-08 17:30:09,036 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 146 transitions. Word has length 78 [2018-12-08 17:30:09,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:30:09,036 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 146 transitions. [2018-12-08 17:30:09,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-08 17:30:09,036 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 146 transitions. [2018-12-08 17:30:09,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 17:30:09,036 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:30:09,036 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:30:09,037 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:30:09,037 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:30:09,037 INFO L82 PathProgramCache]: Analyzing trace with hash -178410659, now seen corresponding path program 2 times [2018-12-08 17:30:09,037 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:30:09,037 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 86 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:30:09,049 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:09,084 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:09,084 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:09,086 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:09,156 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:09,156 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:09,281 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:09,282 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:30:09,282 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:30:09,288 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:09,307 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:09,307 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:09,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:09,314 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:09,314 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:09,372 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:09,387 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:30:09,387 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-12-08 17:30:09,387 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 17:30:09,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 17:30:09,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-08 17:30:09,387 INFO L87 Difference]: Start difference. First operand 114 states and 146 transitions. Second operand 15 states. [2018-12-08 17:30:09,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:30:09,823 INFO L93 Difference]: Finished difference Result 121 states and 152 transitions. [2018-12-08 17:30:09,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 17:30:09,824 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-08 17:30:09,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:30:09,824 INFO L225 Difference]: With dead ends: 121 [2018-12-08 17:30:09,824 INFO L226 Difference]: Without dead ends: 100 [2018-12-08 17:30:09,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 304 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2018-12-08 17:30:09,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-08 17:30:09,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 94. [2018-12-08 17:30:09,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-08 17:30:09,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 119 transitions. [2018-12-08 17:30:09,838 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 119 transitions. Word has length 81 [2018-12-08 17:30:09,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:30:09,838 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 119 transitions. [2018-12-08 17:30:09,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 17:30:09,838 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 119 transitions. [2018-12-08 17:30:09,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-08 17:30:09,839 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:30:09,839 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:30:09,839 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:30:09,839 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:30:09,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1512796842, now seen corresponding path program 2 times [2018-12-08 17:30:09,839 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:30:09,839 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 88 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:30:09,852 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:09,943 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:09,943 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:09,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:10,576 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:30:10,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:10,679 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2018-12-08 17:30:12,846 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:12,847 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:30:12,847 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:30:12,853 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:13,016 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:13,016 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:13,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:14,634 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 17:30:14,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:18,831 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 17:30:18,846 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:30:18,846 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18, 21] total 51 [2018-12-08 17:30:18,846 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-12-08 17:30:18,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-12-08 17:30:18,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=2279, Unknown=0, NotChecked=0, Total=2550 [2018-12-08 17:30:18,847 INFO L87 Difference]: Start difference. First operand 94 states and 119 transitions. Second operand 51 states. [2018-12-08 17:30:19,766 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 55 [2018-12-08 17:30:20,899 WARN L180 SmtUtils]: Spent 251.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 68 [2018-12-08 17:30:23,070 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 42 [2018-12-08 17:30:23,411 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-12-08 17:30:23,723 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-12-08 17:30:24,030 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2018-12-08 17:30:25,664 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-12-08 17:30:26,000 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-12-08 17:30:27,260 WARN L180 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 40 [2018-12-08 17:30:27,662 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 40 [2018-12-08 17:30:28,142 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 41 [2018-12-08 17:30:28,594 WARN L180 SmtUtils]: Spent 242.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 40 [2018-12-08 17:30:29,058 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 41 [2018-12-08 17:30:30,010 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 45 [2018-12-08 17:30:30,365 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 48 [2018-12-08 17:30:31,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:30:31,555 INFO L93 Difference]: Finished difference Result 123 states and 153 transitions. [2018-12-08 17:30:31,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-12-08 17:30:31,557 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 78 [2018-12-08 17:30:31,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:30:31,558 INFO L225 Difference]: With dead ends: 123 [2018-12-08 17:30:31,558 INFO L226 Difference]: Without dead ends: 110 [2018-12-08 17:30:31,559 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 339 GetRequests, 255 SyntacticMatches, 6 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1357 ImplicationChecksByTransitivity, 14.6s TimeCoverageRelationStatistics Valid=884, Invalid=5436, Unknown=0, NotChecked=0, Total=6320 [2018-12-08 17:30:31,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-08 17:30:31,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 89. [2018-12-08 17:30:31,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-12-08 17:30:31,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 112 transitions. [2018-12-08 17:30:31,577 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 112 transitions. Word has length 78 [2018-12-08 17:30:31,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:30:31,577 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 112 transitions. [2018-12-08 17:30:31,578 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-12-08 17:30:31,578 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 112 transitions. [2018-12-08 17:30:31,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-08 17:30:31,578 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:30:31,578 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:30:31,578 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:30:31,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:30:31,578 INFO L82 PathProgramCache]: Analyzing trace with hash -1418902222, now seen corresponding path program 1 times [2018-12-08 17:30:31,578 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:30:31,578 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 90 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:30:31,591 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:30:32,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:30:32,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:33,559 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:30:33,559 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:35,242 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:30:35,242 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:30:35,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:30:35,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:30:36,000 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:36,030 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:30:36,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:36,684 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:30:36,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-12-08 17:30:36,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 17:30:36,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 17:30:36,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=593, Unknown=0, NotChecked=0, Total=650 [2018-12-08 17:30:36,684 INFO L87 Difference]: Start difference. First operand 89 states and 112 transitions. Second operand 20 states. [2018-12-08 17:30:40,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:30:40,570 INFO L93 Difference]: Finished difference Result 103 states and 127 transitions. [2018-12-08 17:30:40,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 17:30:40,571 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 83 [2018-12-08 17:30:40,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:30:40,571 INFO L225 Difference]: With dead ends: 103 [2018-12-08 17:30:40,572 INFO L226 Difference]: Without dead ends: 94 [2018-12-08 17:30:40,572 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=129, Invalid=1431, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 17:30:40,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-12-08 17:30:40,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 89. [2018-12-08 17:30:40,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-12-08 17:30:40,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 111 transitions. [2018-12-08 17:30:40,585 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 111 transitions. Word has length 83 [2018-12-08 17:30:40,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:30:40,585 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 111 transitions. [2018-12-08 17:30:40,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 17:30:40,585 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 111 transitions. [2018-12-08 17:30:40,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-08 17:30:40,585 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:30:40,585 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:30:40,586 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:30:40,586 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:30:40,586 INFO L82 PathProgramCache]: Analyzing trace with hash -1912539214, now seen corresponding path program 2 times [2018-12-08 17:30:40,586 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:30:40,586 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 92 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:30:40,603 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:41,012 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:41,012 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:41,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:42,635 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:30:42,635 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:43,195 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-12-08 17:30:44,303 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:30:44,303 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:30:44,311 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:30:45,143 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:30:45,143 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:30:45,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:45,493 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 17:30:45,493 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:45,762 WARN L180 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-08 17:30:45,948 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 17:30:46,902 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:30:46,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 22] total 22 [2018-12-08 17:30:46,902 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 17:30:46,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 17:30:46,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=746, Unknown=0, NotChecked=0, Total=812 [2018-12-08 17:30:46,902 INFO L87 Difference]: Start difference. First operand 89 states and 111 transitions. Second operand 22 states. [2018-12-08 17:30:51,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:30:51,540 INFO L93 Difference]: Finished difference Result 105 states and 128 transitions. [2018-12-08 17:30:51,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 17:30:51,542 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 83 [2018-12-08 17:30:51,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:30:51,542 INFO L225 Difference]: With dead ends: 105 [2018-12-08 17:30:51,542 INFO L226 Difference]: Without dead ends: 96 [2018-12-08 17:30:51,543 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 157 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=144, Invalid=1748, Unknown=0, NotChecked=0, Total=1892 [2018-12-08 17:30:51,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-12-08 17:30:51,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 87. [2018-12-08 17:30:51,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-08 17:30:51,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 106 transitions. [2018-12-08 17:30:51,560 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 106 transitions. Word has length 83 [2018-12-08 17:30:51,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:30:51,560 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 106 transitions. [2018-12-08 17:30:51,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 17:30:51,560 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 106 transitions. [2018-12-08 17:30:51,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 17:30:51,560 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:30:51,560 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:30:51,561 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:30:51,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:30:51,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1984707855, now seen corresponding path program 1 times [2018-12-08 17:30:51,561 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:30:51,561 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 94 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:30:51,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:30:51,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:30:51,693 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:52,190 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:30:52,190 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:54,084 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 17:30:54,086 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:30:54,086 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:30:54,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:30:54,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:30:54,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:30:56,601 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 11 proven. 16 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 17:30:56,601 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:30:56,808 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2018-12-08 17:30:57,908 WARN L180 SmtUtils]: Spent 263.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-08 17:30:59,372 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-08 17:30:59,387 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:30:59,387 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 21, 16] total 43 [2018-12-08 17:30:59,387 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-12-08 17:30:59,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-12-08 17:30:59,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=1584, Unknown=0, NotChecked=0, Total=1806 [2018-12-08 17:30:59,387 INFO L87 Difference]: Start difference. First operand 87 states and 106 transitions. Second operand 43 states. [2018-12-08 17:31:01,231 WARN L180 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 41 [2018-12-08 17:31:01,667 WARN L180 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-08 17:31:02,048 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 33 [2018-12-08 17:31:02,472 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 41 [2018-12-08 17:31:04,635 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 38 [2018-12-08 17:31:07,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:31:07,186 INFO L93 Difference]: Finished difference Result 116 states and 140 transitions. [2018-12-08 17:31:07,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-12-08 17:31:07,187 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 84 [2018-12-08 17:31:07,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:31:07,187 INFO L225 Difference]: With dead ends: 116 [2018-12-08 17:31:07,187 INFO L226 Difference]: Without dead ends: 87 [2018-12-08 17:31:07,188 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 358 GetRequests, 289 SyntacticMatches, 4 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1022 ImplicationChecksByTransitivity, 10.0s TimeCoverageRelationStatistics Valid=615, Invalid=3807, Unknown=0, NotChecked=0, Total=4422 [2018-12-08 17:31:07,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-08 17:31:07,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 80. [2018-12-08 17:31:07,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-08 17:31:07,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 97 transitions. [2018-12-08 17:31:07,199 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 97 transitions. Word has length 84 [2018-12-08 17:31:07,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:31:07,199 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 97 transitions. [2018-12-08 17:31:07,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-12-08 17:31:07,199 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 97 transitions. [2018-12-08 17:31:07,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 17:31:07,199 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:31:07,199 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:31:07,199 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:31:07,199 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:31:07,200 INFO L82 PathProgramCache]: Analyzing trace with hash -107585423, now seen corresponding path program 2 times [2018-12-08 17:31:07,200 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:31:07,200 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 96 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:31:07,213 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:31:07,316 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:31:07,316 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:31:07,318 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:07,805 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:31:07,805 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:07,920 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-12-08 17:31:09,817 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 17:31:09,818 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:31:09,818 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:31:09,824 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:31:10,044 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:31:10,044 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:31:10,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:11,793 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:31:11,793 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:12,033 WARN L180 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 66 [2018-12-08 17:31:12,685 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 17:31:12,700 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-12-08 17:31:12,700 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 19, 14] total 34 [2018-12-08 17:31:12,701 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-12-08 17:31:12,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-12-08 17:31:12,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=968, Unknown=0, NotChecked=0, Total=1122 [2018-12-08 17:31:12,701 INFO L87 Difference]: Start difference. First operand 80 states and 97 transitions. Second operand 34 states. [2018-12-08 17:31:13,937 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification that was a NOOP. DAG size: 63 [2018-12-08 17:31:15,487 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 36 [2018-12-08 17:31:15,873 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 38 [2018-12-08 17:31:16,750 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 35 [2018-12-08 17:31:17,031 WARN L180 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 35 [2018-12-08 17:31:17,936 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 35 [2018-12-08 17:31:18,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:31:18,894 INFO L93 Difference]: Finished difference Result 117 states and 137 transitions. [2018-12-08 17:31:18,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-12-08 17:31:18,895 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 84 [2018-12-08 17:31:18,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:31:18,896 INFO L225 Difference]: With dead ends: 117 [2018-12-08 17:31:18,896 INFO L226 Difference]: Without dead ends: 73 [2018-12-08 17:31:18,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 302 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 746 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=513, Invalid=3027, Unknown=0, NotChecked=0, Total=3540 [2018-12-08 17:31:18,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-12-08 17:31:18,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-12-08 17:31:18,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-12-08 17:31:18,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 87 transitions. [2018-12-08 17:31:18,905 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 87 transitions. Word has length 84 [2018-12-08 17:31:18,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:31:18,905 INFO L480 AbstractCegarLoop]: Abstraction has 73 states and 87 transitions. [2018-12-08 17:31:18,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-12-08 17:31:18,905 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 87 transitions. [2018-12-08 17:31:18,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 17:31:18,905 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:31:18,905 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:31:18,905 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:31:18,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:31:18,905 INFO L82 PathProgramCache]: Analyzing trace with hash 593862840, now seen corresponding path program 1 times [2018-12-08 17:31:18,905 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:31:18,905 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 98 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:31:18,922 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 17:31:19,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:31:19,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:21,339 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:31:21,339 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:21,746 WARN L180 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2018-12-08 17:31:23,047 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:31:23,047 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:31:23,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 17:31:23,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 17:31:23,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:26,558 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 17:31:26,558 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:26,775 WARN L180 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 65 [2018-12-08 17:31:28,517 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:31:28,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 32 [2018-12-08 17:31:28,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-08 17:31:28,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-08 17:31:28,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1612, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 17:31:28,518 INFO L87 Difference]: Start difference. First operand 73 states and 87 transitions. Second operand 32 states. [2018-12-08 17:31:34,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:31:34,033 INFO L93 Difference]: Finished difference Result 82 states and 96 transitions. [2018-12-08 17:31:34,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 17:31:34,034 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 85 [2018-12-08 17:31:34,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:31:34,035 INFO L225 Difference]: With dead ends: 82 [2018-12-08 17:31:34,035 INFO L226 Difference]: Without dead ends: 71 [2018-12-08 17:31:34,035 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 151 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 10.9s TimeCoverageRelationStatistics Valid=210, Invalid=3212, Unknown=0, NotChecked=0, Total=3422 [2018-12-08 17:31:34,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-08 17:31:34,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-08 17:31:34,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-08 17:31:34,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 83 transitions. [2018-12-08 17:31:34,043 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 83 transitions. Word has length 85 [2018-12-08 17:31:34,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:31:34,043 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 83 transitions. [2018-12-08 17:31:34,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-08 17:31:34,043 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 83 transitions. [2018-12-08 17:31:34,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 17:31:34,044 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 17:31:34,044 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 17:31:34,044 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 17:31:34,044 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 17:31:34,044 INFO L82 PathProgramCache]: Analyzing trace with hash 516304508, now seen corresponding path program 2 times [2018-12-08 17:31:34,044 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 17:31:34,044 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/cvc4 Starting monitored process 100 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 17:31:34,057 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 17:31:34,318 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:31:34,319 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:31:34,321 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:36,396 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 17:31:36,396 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:36,836 WARN L180 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-12-08 17:31:38,225 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 17:31:38,225 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/z3 Starting monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 17:31:38,231 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 17:31:38,904 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 17:31:38,904 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 17:31:38,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 17:31:41,273 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 17:31:41,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 17:31:41,528 WARN L180 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-12-08 17:31:42,099 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 17:31:42,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 31 [2018-12-08 17:31:42,100 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-12-08 17:31:42,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-12-08 17:31:42,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=1243, Unknown=0, NotChecked=0, Total=1332 [2018-12-08 17:31:42,100 INFO L87 Difference]: Start difference. First operand 71 states and 83 transitions. Second operand 31 states. [2018-12-08 17:31:47,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 17:31:47,551 INFO L93 Difference]: Finished difference Result 71 states and 83 transitions. [2018-12-08 17:31:47,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 17:31:47,553 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 85 [2018-12-08 17:31:47,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 17:31:47,553 INFO L225 Difference]: With dead ends: 71 [2018-12-08 17:31:47,553 INFO L226 Difference]: Without dead ends: 0 [2018-12-08 17:31:47,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 155 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=181, Invalid=2681, Unknown=0, NotChecked=0, Total=2862 [2018-12-08 17:31:47,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-12-08 17:31:47,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-12-08 17:31:47,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-12-08 17:31:47,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-12-08 17:31:47,555 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 85 [2018-12-08 17:31:47,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 17:31:47,555 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-12-08 17:31:47,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-12-08 17:31:47,555 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-12-08 17:31:47,555 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-12-08 17:31:47,558 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-12-08 17:31:47,685 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:48,309 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 397 DAG size of output: 365 [2018-12-08 17:31:48,311 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:48,311 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:48,422 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 313 DAG size of output: 286 [2018-12-08 17:31:48,780 WARN L180 SmtUtils]: Spent 357.00 ms on a formula simplification. DAG size of input: 421 DAG size of output: 399 [2018-12-08 17:31:49,032 WARN L180 SmtUtils]: Spent 251.00 ms on a formula simplification. DAG size of input: 394 DAG size of output: 365 [2018-12-08 17:31:49,054 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:49,057 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:49,289 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 314 DAG size of output: 296 [2018-12-08 17:31:49,465 WARN L180 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 293 DAG size of output: 273 [2018-12-08 17:31:49,604 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 269 DAG size of output: 253 [2018-12-08 17:31:49,767 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 294 DAG size of output: 275 [2018-12-08 17:31:50,190 WARN L180 SmtUtils]: Spent 418.00 ms on a formula simplification. DAG size of input: 445 DAG size of output: 414 [2018-12-08 17:31:50,192 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:50,402 WARN L180 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 299 DAG size of output: 282 [2018-12-08 17:31:50,598 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 358 DAG size of output: 341 [2018-12-08 17:31:50,886 WARN L180 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 314 DAG size of output: 296 [2018-12-08 17:31:51,069 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 406 DAG size of output: 375 [2018-12-08 17:31:51,212 WARN L180 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 311 DAG size of output: 293 [2018-12-08 17:31:51,213 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:51,214 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:51,528 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 352 DAG size of output: 323 [2018-12-08 17:31:51,608 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:31:51,925 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 366 DAG size of output: 338 [2018-12-08 17:31:52,107 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 17:33:09,281 WARN L180 SmtUtils]: Spent 1.28 m on a formula simplification. DAG size of input: 348 DAG size of output: 69 [2018-12-08 17:33:09,419 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 1 [2018-12-08 17:36:09,869 WARN L180 SmtUtils]: Spent 3.01 m on a formula simplification. DAG size of input: 786 DAG size of output: 201 [2018-12-08 17:36:12,853 WARN L180 SmtUtils]: Spent 2.98 s on a formula simplification. DAG size of input: 170 DAG size of output: 88 [2018-12-08 17:39:03,095 WARN L180 SmtUtils]: Spent 2.84 m on a formula simplification. DAG size of input: 519 DAG size of output: 133 [2018-12-08 17:39:03,098 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-12-08 17:39:03,098 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L19(lines 19 24) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L48(lines 47 62) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point L69(lines 18 71) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L28(lines 27 42) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L49(lines 47 62) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L37(lines 37 41) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point L37-1(lines 27 42) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L25(lines 25 65) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point base2fltENTRY(lines 14 72) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point base2fltFINAL(lines 14 72) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point L63(lines 25 65) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point base2fltEXIT(lines 14 72) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point L47-2(lines 47 62) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 214 252) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 214 252) no Hoare annotation was computed. [2018-12-08 17:39:03,099 INFO L448 ceAbstractionStarter]: For program point L236(lines 236 245) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L444 ceAbstractionStarter]: At program point L234(line 234) the Hoare annotation is: (let ((.cse24 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~b~0))) (.cse18 (bvlshr main_~b~0 (_ bv24 32))) (.cse5 (bvlshr main_~a~0 (_ bv24 32)))) (let ((.cse23 (bvlshr .cse24 (bvadd (bvneg (bvadd .cse18 (_ bv4294967168 32))) .cse5 (_ bv4294967168 32)))) (.cse25 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~a~0)))) (let ((.cse21 (bvlshr .cse25 (bvadd .cse18 (bvneg (bvadd .cse5 (_ bv4294967168 32))) (_ bv4294967168 32)))) (.cse4 (bvadd .cse25 .cse23))) (let ((.cse14 (= main_~a~0 (_ bv0 32))) (.cse13 (= (bvadd .cse18 (_ bv4294967041 32)) (_ bv0 32))) (.cse8 (= (bvand (_ bv33554432 32) .cse4) (_ bv0 32))) (.cse17 (bvadd .cse21 .cse24))) (let ((.cse15 (= (_ bv0 32) (bvand (_ bv33554432 32) .cse17))) (.cse10 (= (bvadd .cse5 (_ bv4294967041 32)) (_ bv0 32))) (.cse9 (not .cse8)) (.cse19 (not .cse13)) (.cse20 (= main_~b~0 (_ bv0 32))) (.cse16 (not .cse14)) (.cse1 (= .cse23 (_ bv0 32)))) (let ((.cse3 (let ((.cse22 (and .cse19 (not .cse20) .cse16 (not .cse1)))) (or (and .cse22 (not .cse10) .cse9) (and .cse8 .cse22 (= (bvor (bvand (_ bv16777215 32) .cse4) (bvshl .cse5 (_ bv24 32))) main_~r_add1~0))))) (.cse11 (= (_ bv4294967295 32) main_~r_add1~0)) (.cse7 (= main_~b~0 main_~r_add1~0)) (.cse6 (= .cse21 (_ bv0 32))) (.cse2 (bvult main_~a~0 main_~b~0)) (.cse12 (not .cse15)) (.cse0 (= main_~a~0 main_~r_add1~0))) (or (and .cse0 .cse1 (not .cse2)) (and .cse3 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse4 (_ bv1 32))) (bvshl (bvadd .cse5 (_ bv1 32)) (_ bv24 32))))) (and .cse6 .cse2 .cse7) (and .cse8 .cse3) (and .cse9 .cse10 .cse11) (and .cse12 .cse13 .cse11) (and .cse14 .cse7) (and .cse15 .cse16 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) .cse17) (bvshl .cse18 (_ bv24 32)))) (not .cse6)) (and .cse19 .cse16 .cse2 .cse12 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse17 (_ bv1 32))) (bvshl (bvadd .cse18 (_ bv1 32)) (_ bv24 32))))) (and .cse20 .cse0)))))))) [2018-12-08 17:39:03,100 INFO L444 ceAbstractionStarter]: At program point L236-2(lines 236 245) the Hoare annotation is: (and (= main_~tmp___0~0 (_ bv0 32)) (= main_~tmp~2 (_ bv0 32))) [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L234-1(line 234) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L451 ceAbstractionStarter]: At program point L232(line 232) the Hoare annotation is: true [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L232-1(line 232) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L451 ceAbstractionStarter]: At program point L230(line 230) the Hoare annotation is: true [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L230-1(line 230) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 214 252) the Hoare annotation is: true [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L247(line 247) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L239(lines 239 243) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L239-2(lines 239 243) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L451 ceAbstractionStarter]: At program point L233(line 233) the Hoare annotation is: true [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L233-1(line 233) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L451 ceAbstractionStarter]: At program point L231(line 231) the Hoare annotation is: true [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L231-1(line 231) no Hoare annotation was computed. [2018-12-08 17:39:03,100 INFO L448 ceAbstractionStarter]: For program point L128(line 128) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L451 ceAbstractionStarter]: At program point addfltENTRY(lines 73 136) the Hoare annotation is: true [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point addfltFINAL(lines 73 136) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point L116(lines 116 121) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point L108(lines 108 113) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L444 ceAbstractionStarter]: At program point L104(line 104) the Hoare annotation is: (let ((.cse6 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse1 (bvadd .cse6 (_ bv4294967168 32))) (.cse2 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse3 (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32))) (.cse0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse4 (= addflt_~a |addflt_#in~a|))) (and (or (and (= .cse0 addflt_~ma~0) (= .cse1 addflt_~ea~0) (= .cse2 addflt_~mb~0) (= .cse3 addflt_~eb~0)) .cse4) (or (and (= .cse1 addflt_~eb~0) (= .cse2 addflt_~ma~0)) (let ((.cse5 (bvlshr .cse2 (bvadd .cse6 (bvneg .cse3) (_ bv4294967168 32))))) (and (not (= .cse5 (_ bv0 32))) (= (bvand (_ bv33554432 32) (bvadd .cse5 .cse0)) (_ bv0 32))))) (or (bvult |addflt_#in~a| |addflt_#in~b|) (and (= .cse0 addflt_~mb~0) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (or (and (= addflt_~b |addflt_#in~a|) (= addflt_~a |addflt_#in~b|)) (and (and (not (= (_ bv0 32) |addflt_#in~b|)) (exists ((addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (and (= (bvadd addflt_~eb~0 (_ bv128 32)) (bvlshr addflt_~b (_ bv24 32))) (not (bvult addflt_~a addflt_~b)) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (not (bvult addflt_~a addflt_~b))) .cse4 (= addflt_~b |addflt_#in~b|))) (not (= (_ bv0 32) |addflt_#in~a|))))) [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point L104-1(line 104) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L444 ceAbstractionStarter]: At program point L133(lines 83 135) the Hoare annotation is: (let ((.cse28 (bvlshr |addflt_#in~b| (_ bv24 32))) (.cse26 (bvlshr |addflt_#in~a| (_ bv24 32)))) (let ((.cse40 (bvadd .cse26 (_ bv4294967168 32))) (.cse37 (bvadd .cse28 (_ bv4294967168 32)))) (let ((.cse43 (= addflt_~a |addflt_#in~b|)) (.cse33 (= addflt_~b |addflt_#in~b|)) (.cse35 (= (_ bv0 32) |addflt_#in~b|)) (.cse29 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse39 (bvneg .cse37)) (.cse8 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse30 (bvneg .cse40))) (let ((.cse34 (not (= (bvadd |addflt_#in~a| (_ bv1 32)) (_ bv0 32)))) (.cse36 (bvlshr .cse8 (bvadd .cse28 .cse30 (_ bv4294967168 32)))) (.cse6 (bvlshr .cse29 (bvadd .cse26 .cse39 (_ bv4294967168 32)))) (.cse42 (let ((.cse45 (and (not .cse35) (not (bvult addflt_~a addflt_~b))))) (or (and .cse45 .cse43) (and .cse33 .cse45)))) (.cse2 (= addflt_~a |addflt_#in~a|))) (let ((.cse4 (bvult |addflt_#in~a| |addflt_#in~b|)) (.cse32 (let ((.cse44 (and (or (and .cse42 .cse43) (and .cse42 .cse2)) (not (bvult addflt_~a |addflt_#in~a|))))) (or (and .cse44 (= addflt_~b |addflt_#in~a|)) (and .cse44 .cse2)))) (.cse25 (bvadd .cse6 .cse8)) (.cse38 (bvadd .cse36 .cse29)) (.cse21 (= (_ bv0 32) |addflt_#in~a|)) (.cse1 (and .cse42 (or (= (bvadd |addflt_#res| (_ bv1 32)) (_ bv0 32)) .cse34) (= addflt_~__retres10~0 |addflt_#in~b|) .cse43)) (.cse41 (bvlshr .cse29 (bvadd .cse39 addflt_~ea~0)))) (let ((.cse5 (not (= (_ bv255 32) .cse26))) (.cse11 (and (and (and (not (bvult addflt_~__retres10~0 |addflt_#in~b|)) .cse42) (not (bvult addflt_~__retres10~0 |addflt_#in~a|))) (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))))) (.cse10 (= addflt_~mb~0 .cse41)) (.cse12 (and .cse21 .cse1)) (.cse13 (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse38) (bvshl .cse28 (_ bv24 32))))) (.cse16 (not (= (_ bv127 32) addflt_~ea~0))) (.cse9 (bvadd .cse41 .cse8)) (.cse7 (= .cse40 addflt_~ea~0)) (.cse15 (= (bvlshr .cse29 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse39 (_ bv4294967168 32))) addflt_~mb~0)) (.cse14 (= (bvand (_ bv33554432 32) .cse25) (_ bv0 32))) (.cse17 (= (bvor (bvand (_ bv16777215 32) .cse25) (bvshl .cse26 (_ bv24 32))) addflt_~__retres10~0)) (.cse0 (= (bvand (_ bv33554432 32) .cse38) (_ bv0 32))) (.cse23 (= .cse37 addflt_~ea~0)) (.cse20 (= .cse36 addflt_~mb~0)) (.cse19 (= .cse36 (_ bv0 32))) (.cse3 (and .cse2 .cse35 .cse33 (= addflt_~__retres10~0 |addflt_#in~a|))) (.cse18 (and .cse4 .cse32)) (.cse31 (not (= (_ bv4294967295 32) |addflt_#in~b|)))) (and (or .cse0 .cse1 .cse2) (or .cse3 (and .cse4 .cse5) (and (not (= .cse6 (_ bv0 32))) (exists ((addflt_~a (_ BitVec 32))) (and (not (bvult addflt_~a |addflt_#in~b|)) (= (_ bv0 32) (bvand (_ bv33554432 32) (bvadd (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)) (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|)) (bvadd (bvneg (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv4294967168 32))) (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32))))))))))) (and .cse7 (= .cse8 addflt_~ma~0)) (and (not (= (_ bv0 32) (bvand (_ bv33554432 32) .cse9))) .cse10)) (or .cse2 .cse11 .cse12 .cse13) (or .cse3 (and (not .cse14) .cse5) (and .cse11 (not (bvult addflt_~ma~0 (_ bv33554432 32)))) (and .cse15 (or .cse16 (= (bvand (_ bv33554432 32) (bvadd addflt_~mb~0 addflt_~ma~0)) (_ bv0 32))) .cse10 .cse17) .cse18) (let ((.cse22 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) (.cse27 (= (bvadd addflt_~__retres10~0 (_ bv1 32)) (_ bv0 32))) (.cse24 (not .cse0))) (or .cse12 (and (and (not .cse19) .cse20 (not .cse21)) .cse22 .cse0 .cse23 .cse13) (and (or .cse16 .cse22) (or .cse22 .cse24) .cse15 (= (bvor (bvand (_ bv16777215 32) (bvlshr .cse25 (_ bv1 32))) (bvshl (bvadd .cse26 (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0) .cse2) .cse3 (and (= .cse9 addflt_~ma~0) .cse27 (or (not (= (_ bv0 32) (bvlshr addflt_~mb~0 (bvadd addflt_~ea~0 (bvneg addflt_~eb~0))))) (not (= (bvadd .cse28 (_ bv4294967041 32)) (_ bv0 32)))) .cse7 (= (bvadd .cse26 (_ bv4294967041 32)) (_ bv0 32)) .cse15) (and .cse14 .cse22 .cse17) (and (= .cse29 addflt_~ma~0) .cse19 .cse23 .cse1 .cse20) (and .cse27 .cse4 .cse24))) (or (and .cse23 .cse20 (= (bvadd .cse29 (bvlshr .cse8 (bvadd .cse30 addflt_~ea~0))) addflt_~ma~0)) .cse31 .cse19) (or (and .cse32 .cse33) .cse3 .cse18) (or .cse31 (= (_ bv127 32) addflt_~eb~0) .cse34)))))))) [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point addfltEXIT(lines 73 136) no Hoare annotation was computed. [2018-12-08 17:39:03,101 INFO L448 ceAbstractionStarter]: For program point L84(lines 84 90) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point L115(lines 115 126) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point L84-2(lines 83 135) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L444 ceAbstractionStarter]: At program point L115-2(lines 115 126) the Hoare annotation is: (let ((.cse3 (bvlshr |addflt_#in~a| (_ bv24 32))) (.cse28 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse21 (bvadd .cse28 (_ bv4294967168 32))) (.cse15 (bvadd .cse3 (_ bv4294967168 32)))) (let ((.cse9 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvlshr (bvadd (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (_ bv1 32)) addflt_~ma~0))) (.cse4 (= addflt_~a |addflt_#in~a|)) (.cse11 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) (.cse10 (and (not (= (_ bv0 32) addflt_~b)) (and (not (= (_ bv0 32) |addflt_#in~b|)) (not (bvult addflt_~a addflt_~b))))) (.cse1 (= addflt_~b |addflt_#in~b|)) (.cse12 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))))) (.cse14 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse22 (bvneg .cse15)) (.cse7 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse8 (bvneg .cse21))) (let ((.cse13 (bvlshr .cse7 (bvadd .cse8 addflt_~ea~0))) (.cse19 (bvlshr .cse7 (bvadd .cse3 .cse8 (_ bv4294967168 32)))) (.cse6 (bvlshr .cse14 (bvadd .cse28 .cse22 (_ bv4294967168 32)))) (.cse18 (let ((.cse23 (let ((.cse25 (= addflt_~a |addflt_#in~b|)) (.cse26 (not (bvult addflt_~a |addflt_#in~a|)))) (or (and .cse9 (and (let ((.cse24 (or (and .cse10 .cse1) (and .cse10 .cse25)))) (or (and .cse24 .cse4) (and .cse24 .cse25))) .cse26)) (and (and (let ((.cse27 (or (and .cse11 .cse10 .cse25) (and .cse11 .cse10 .cse1)))) (or (and .cse27 .cse25) (and .cse27 .cse4))) .cse26) .cse12))))) (or (and .cse23 (= addflt_~b |addflt_#in~a|)) (and .cse23 .cse4))))) (let ((.cse17 (let ((.cse20 (bvlshr .cse14 (bvadd .cse22 addflt_~ea~0)))) (and (and (not (= (_ bv0 32) .cse20)) (and (= .cse6 addflt_~mb~0) .cse18) (= .cse21 addflt_~ea~0)) (= (bvadd .cse7 .cse20) addflt_~ma~0)))) (.cse16 (bvadd .cse19 .cse14)) (.cse5 (= addflt_~mb~0 .cse13))) (and (let ((.cse0 (or (and .cse9 .cse10) (and (and .cse11 .cse10) .cse12))) (.cse2 (= (bvlshr .cse7 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse8 (_ bv4294967168 32))) addflt_~mb~0))) (or (and .cse0 .cse1 .cse2 (not (= (bvadd .cse3 (_ bv4294967041 32)) (_ bv0 32))) .cse4) (and .cse0 .cse2 .cse4 .cse5) (and (= (bvand (_ bv33554432 32) (bvadd .cse6 .cse7)) (_ bv0 32)) (bvult |addflt_#in~a| |addflt_#in~b|)))) (or (and (= (bvadd .cse13 .cse14) addflt_~ma~0) (= .cse15 addflt_~ea~0)) (and (= (bvlshr .cse16 (_ bv1 32)) addflt_~ma~0) (= (bvadd .cse3 (_ bv4294967169 32)) addflt_~ea~0)) .cse17) (or .cse17 (not (= (bvand (_ bv33554432 32) .cse16) (_ bv0 32))) (and .cse18 (not (= .cse19 (_ bv0 32))) .cse5)))))))) [2018-12-08 17:39:03,102 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 5 10) the Hoare annotation is: true [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 5 10) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point L6(lines 6 8) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 7) no Hoare annotation was computed. [2018-12-08 17:39:03,102 INFO L448 ceAbstractionStarter]: For program point L6-2(lines 5 10) no Hoare annotation was computed. [2018-12-08 17:39:03,110 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,111 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,111 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,111 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,128 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,128 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,128 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,129 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,129 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,129 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,129 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,129 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,130 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,136 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 05:39:03 BoogieIcfgContainer [2018-12-08 17:39:03,136 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 17:39:03,136 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 17:39:03,136 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 17:39:03,136 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 17:39:03,137 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 05:26:32" (3/4) ... [2018-12-08 17:39:03,140 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-12-08 17:39:03,146 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-12-08 17:39:03,146 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure base2flt [2018-12-08 17:39:03,147 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-12-08 17:39:03,147 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure addflt [2018-12-08 17:39:03,147 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-12-08 17:39:03,151 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 11 nodes and edges [2018-12-08 17:39:03,151 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2018-12-08 17:39:03,152 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-12-08 17:39:03,170 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 || ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b))) || a == \old(a)) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || (~bvult64(\old(a), \old(b)) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && (\exists addflt_~a : bv32 :: !~bvult64(addflt_~a, \old(b)) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)), ~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32))))))))) || (~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma)) || (!(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))))) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) && (((a == \old(a) || (((!~bvult64(__retres10, \old(b)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))))) || (0bv32 == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b))) || __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || ((((!~bvult64(__retres10, \old(b)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(ma, 33554432bv32))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (!(127bv32 == ea) || ~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || (~bvult64(\old(a), \old(b)) && ((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a)))))) && ((((((((0bv32 == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) || ((((((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10) && a == \old(a))) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a))) || (((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((~bvadd64(__retres10, 1bv32) == 0bv32 && ~bvult64(\old(a), \old(b))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)))) && ((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma) || !(4294967295bv32 == \old(b))) || ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (((((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a))) && b == \old(b)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a))) || (~bvult64(\old(a), \old(b)) && ((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a)))))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) [2018-12-08 17:39:03,186 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_fa70dfc2-6807-491b-b754-8c4762e91894/bin-2019/utaipan/witness.graphml [2018-12-08 17:39:03,186 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 17:39:03,186 INFO L168 Benchmark]: Toolchain (without parser) took 751137.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.3 MB). Free memory was 944.7 MB in the beginning and 946.6 MB in the end (delta: -1.9 MB). Peak memory consumption was 134.4 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: CACSL2BoogieTranslator took 162.66 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 928.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.19 ms. Allocated memory is still 1.0 GB. Free memory is still 928.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: Boogie Preprocessor took 50.01 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 928.6 MB in the beginning and 1.1 GB in the end (delta: -193.9 MB). Peak memory consumption was 13.8 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: RCFGBuilder took 191.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.0 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,187 INFO L168 Benchmark]: TraceAbstraction took 750665.66 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 2.1 MB). Free memory was 1.1 GB in the beginning and 953.4 MB in the end (delta: 151.1 MB). Peak memory consumption was 331.9 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,188 INFO L168 Benchmark]: Witness Printer took 49.93 ms. Allocated memory is still 1.2 GB. Free memory was 953.4 MB in the beginning and 946.6 MB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-12-08 17:39:03,189 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 162.66 ms. Allocated memory is still 1.0 GB. Free memory was 944.7 MB in the beginning and 928.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.19 ms. Allocated memory is still 1.0 GB. Free memory is still 928.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.01 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 928.6 MB in the beginning and 1.1 GB in the end (delta: -193.9 MB). Peak memory consumption was 13.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 191.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.0 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 750665.66 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 2.1 MB). Free memory was 1.1 GB in the beginning and 953.4 MB in the end (delta: 151.1 MB). Peak memory consumption was 331.9 MB. Max. memory is 11.5 GB. * Witness Printer took 49.93 ms. Allocated memory is still 1.2 GB. Free memory was 953.4 MB in the beginning and 946.6 MB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 7]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 25]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 18]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 83]: Loop Invariant [2018-12-08 17:39:03,191 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,191 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,191 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,192 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,195 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,195 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,195 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,195 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,195 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,196 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 17:39:03,196 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 17:39:03,196 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 17:39:03,196 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] Derived loop invariant: ((((((((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32 || ((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b))) || a == \old(a)) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || (~bvult64(\old(a), \old(b)) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || (!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && (\exists addflt_~a : bv32 :: !~bvult64(addflt_~a, \old(b)) && 0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)), ~bvneg32(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ~bvlshr64(addflt_~a, 24bv32), 4294967168bv32))))))))) || (~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma)) || (!(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))))) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) && (((a == \old(a) || (((!~bvult64(__retres10, \old(b)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))))) || (0bv32 == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b))) || __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) || ((((!~bvult64(__retres10, \old(b)) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(ma, 33554432bv32))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (!(127bv32 == ea) || ~bvand64(33554432bv32, ~bvadd64(mb, ma)) == 0bv32)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || (~bvult64(\old(a), \old(b)) && ((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a)))))) && ((((((((0bv32 == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) || ((((((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == \old(a))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10) && a == \old(a))) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a))) || (((((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && (~bvadd64(\result, 1bv32) == 0bv32 || !(~bvadd64(\old(a), 1bv32) == 0bv32))) && __retres10 == \old(b)) && a == \old(b)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((~bvadd64(__retres10, 1bv32) == 0bv32 && ~bvult64(\old(a), \old(b))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)))) && ((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma) || !(4294967295bv32 == \old(b))) || ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (((((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a))) && b == \old(b)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a))) || (~bvult64(\old(a), \old(b)) && ((((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && b == \old(a)) || (((((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || ((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(a))) && !~bvult64(a, \old(a))) && a == \old(a)))))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) - InvariantResult [Line: 47]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 27]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. SAFE Result, 750.5s OverallTime, 58 OverallIterations, 5 TraceHistogramMax, 190.4s AutomataDifference, 0.0s DeadEndRemovalTime, 435.5s HoareAnnotationTime, HoareTripleCheckerStatistics: 4202 SDtfs, 4466 SDslu, 41970 SDs, 0 SdLazy, 20818 SolverSat, 2160 SolverUnsat, 22 SolverUnknown, 0 SolverNotchecked, 96.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 11266 GetRequests, 9584 SyntacticMatches, 117 SemanticMatches, 1565 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 10140 ImplicationChecksByTransitivity, 178.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=228occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.9s AutomataMinimizationTime, 58 MinimizatonAttempts, 952 StatesRemovedByMinimization, 50 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 20 LocationsWithAnnotation, 342 PreInvPairs, 1332 NumberOfFragments, 4537 HoareAnnotationTreeSize, 342 FomulaSimplifications, 2213792316 FormulaSimplificationTreeSizeReduction, 4.6s HoareSimplificationTime, 20 FomulaSimplificationsInter, 92664640 FormulaSimplificationTreeSizeReductionInter, 430.8s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 7.9s SatisfiabilityAnalysisTime, 113.2s InterpolantComputationTime, 6572 NumberOfCodeBlocks, 6554 NumberOfCodeBlocksAsserted, 130 NumberOfCheckSat, 10398 ConstructedInterpolants, 138 QuantifiedInterpolants, 4945838 SizeOfPredicates, 1032 NumberOfNonLiveVariables, 11712 ConjunctsInSsa, 1907 ConjunctsInUnsatCore, 160 InterpolantComputations, 20 PerfectInterpolantSequences, 4650/5625 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...