./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin000_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin000_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6b9587c6020262ab57ddfec61db9cd4fba3d13a7 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 10:00:27,767 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 10:00:27,768 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 10:00:27,774 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 10:00:27,774 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 10:00:27,775 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 10:00:27,775 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 10:00:27,776 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 10:00:27,777 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 10:00:27,777 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 10:00:27,778 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 10:00:27,778 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 10:00:27,778 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 10:00:27,779 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 10:00:27,779 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 10:00:27,780 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 10:00:27,780 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 10:00:27,781 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 10:00:27,782 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 10:00:27,782 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 10:00:27,783 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 10:00:27,783 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 10:00:27,785 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 10:00:27,785 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 10:00:27,785 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 10:00:27,785 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 10:00:27,786 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 10:00:27,786 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 10:00:27,787 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 10:00:27,787 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 10:00:27,787 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 10:00:27,787 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 10:00:27,788 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 10:00:27,788 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 10:00:27,788 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 10:00:27,789 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 10:00:27,789 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-12-09 10:00:27,796 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 10:00:27,796 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 10:00:27,796 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-09 10:00:27,797 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Explicit value domain=true [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Octagon Domain=false [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-12-09 10:00:27,797 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-09 10:00:27,798 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 10:00:27,798 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 10:00:27,799 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 10:00:27,799 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-09 10:00:27,799 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6b9587c6020262ab57ddfec61db9cd4fba3d13a7 [2018-12-09 10:00:27,817 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 10:00:27,824 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 10:00:27,827 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 10:00:27,828 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 10:00:27,829 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 10:00:27,829 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/thin000_power.opt_false-unreach-call.i [2018-12-09 10:00:27,864 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/data/767159e2f/54fb291c6e0c47c186d5e22f83553891/FLAGb2caa0ac5 [2018-12-09 10:00:28,355 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 10:00:28,355 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/sv-benchmarks/c/pthread-wmm/thin000_power.opt_false-unreach-call.i [2018-12-09 10:00:28,361 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/data/767159e2f/54fb291c6e0c47c186d5e22f83553891/FLAGb2caa0ac5 [2018-12-09 10:00:28,372 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/data/767159e2f/54fb291c6e0c47c186d5e22f83553891 [2018-12-09 10:00:28,374 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 10:00:28,375 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 10:00:28,376 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 10:00:28,376 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 10:00:28,378 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 10:00:28,378 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,380 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ab2707f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28, skipping insertion in model container [2018-12-09 10:00:28,380 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,385 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 10:00:28,415 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 10:00:28,604 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 10:00:28,612 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 10:00:28,693 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 10:00:28,723 INFO L195 MainTranslator]: Completed translation [2018-12-09 10:00:28,724 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28 WrapperNode [2018-12-09 10:00:28,724 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 10:00:28,724 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 10:00:28,724 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 10:00:28,724 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 10:00:28,730 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,741 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,757 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 10:00:28,757 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 10:00:28,757 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 10:00:28,757 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 10:00:28,763 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,763 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,766 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,766 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,772 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,775 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,776 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... [2018-12-09 10:00:28,779 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 10:00:28,779 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 10:00:28,779 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 10:00:28,779 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 10:00:28,780 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 10:00:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-09 10:00:28,817 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-09 10:00:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-09 10:00:28,817 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-09 10:00:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-09 10:00:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-09 10:00:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 10:00:28,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 10:00:28,818 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-09 10:00:29,205 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 10:00:29,205 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-09 10:00:29,205 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 10:00:29 BoogieIcfgContainer [2018-12-09 10:00:29,205 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 10:00:29,206 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 10:00:29,206 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 10:00:29,209 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 10:00:29,209 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 10:00:28" (1/3) ... [2018-12-09 10:00:29,209 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2265d3c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 10:00:29, skipping insertion in model container [2018-12-09 10:00:29,209 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 10:00:28" (2/3) ... [2018-12-09 10:00:29,210 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2265d3c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 10:00:29, skipping insertion in model container [2018-12-09 10:00:29,210 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 10:00:29" (3/3) ... [2018-12-09 10:00:29,211 INFO L112 eAbstractionObserver]: Analyzing ICFG thin000_power.opt_false-unreach-call.i [2018-12-09 10:00:29,240 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,241 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,242 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,243 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,244 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,245 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,246 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,247 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,248 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,249 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,250 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,251 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,252 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,253 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,253 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,253 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,253 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,253 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,254 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,255 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,256 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,257 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,258 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,259 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,260 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,261 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,262 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,263 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,264 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,265 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,266 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,267 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,268 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,269 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,270 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,271 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-09 10:00:29,276 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-09 10:00:29,276 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 10:00:29,282 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-09 10:00:29,291 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-09 10:00:29,307 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 10:00:29,307 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 10:00:29,307 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 10:00:29,307 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 10:00:29,307 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 10:00:29,307 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 10:00:29,307 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 10:00:29,307 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 10:00:29,316 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 200places, 259 transitions [2018-12-09 10:00:32,851 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 65314 states. [2018-12-09 10:00:32,852 INFO L276 IsEmpty]: Start isEmpty. Operand 65314 states. [2018-12-09 10:00:32,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-09 10:00:32,857 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:32,857 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:32,859 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:32,862 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:32,862 INFO L82 PathProgramCache]: Analyzing trace with hash -1016272846, now seen corresponding path program 1 times [2018-12-09 10:00:32,863 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:32,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:32,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:32,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:32,899 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:32,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:33,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:33,019 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:33,019 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:00:33,019 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:33,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:00:33,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:00:33,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:00:33,036 INFO L87 Difference]: Start difference. First operand 65314 states. Second operand 4 states. [2018-12-09 10:00:33,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:33,820 INFO L93 Difference]: Finished difference Result 113402 states and 445073 transitions. [2018-12-09 10:00:33,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 10:00:33,821 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2018-12-09 10:00:33,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:34,099 INFO L225 Difference]: With dead ends: 113402 [2018-12-09 10:00:34,099 INFO L226 Difference]: Without dead ends: 86242 [2018-12-09 10:00:34,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:00:34,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86242 states. [2018-12-09 10:00:35,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86242 to 53058. [2018-12-09 10:00:35,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53058 states. [2018-12-09 10:00:35,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53058 states to 53058 states and 208767 transitions. [2018-12-09 10:00:35,506 INFO L78 Accepts]: Start accepts. Automaton has 53058 states and 208767 transitions. Word has length 49 [2018-12-09 10:00:35,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:35,506 INFO L480 AbstractCegarLoop]: Abstraction has 53058 states and 208767 transitions. [2018-12-09 10:00:35,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:00:35,506 INFO L276 IsEmpty]: Start isEmpty. Operand 53058 states and 208767 transitions. [2018-12-09 10:00:35,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-09 10:00:35,512 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:35,512 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:35,513 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:35,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:35,513 INFO L82 PathProgramCache]: Analyzing trace with hash -267205330, now seen corresponding path program 1 times [2018-12-09 10:00:35,513 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:35,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:35,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:35,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:35,516 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:35,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:35,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:35,557 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:35,558 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 10:00:35,558 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:35,559 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 10:00:35,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 10:00:35,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:00:35,560 INFO L87 Difference]: Start difference. First operand 53058 states and 208767 transitions. Second operand 3 states. [2018-12-09 10:00:35,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:35,958 INFO L93 Difference]: Finished difference Result 53058 states and 208358 transitions. [2018-12-09 10:00:35,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 10:00:35,958 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2018-12-09 10:00:35,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:36,089 INFO L225 Difference]: With dead ends: 53058 [2018-12-09 10:00:36,089 INFO L226 Difference]: Without dead ends: 53058 [2018-12-09 10:00:36,090 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:00:36,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53058 states. [2018-12-09 10:00:36,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53058 to 53058. [2018-12-09 10:00:36,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53058 states. [2018-12-09 10:00:36,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53058 states to 53058 states and 208358 transitions. [2018-12-09 10:00:36,964 INFO L78 Accepts]: Start accepts. Automaton has 53058 states and 208358 transitions. Word has length 61 [2018-12-09 10:00:36,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:36,964 INFO L480 AbstractCegarLoop]: Abstraction has 53058 states and 208358 transitions. [2018-12-09 10:00:36,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 10:00:36,964 INFO L276 IsEmpty]: Start isEmpty. Operand 53058 states and 208358 transitions. [2018-12-09 10:00:36,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-09 10:00:36,967 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:36,968 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:36,968 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:36,968 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:36,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1475605005, now seen corresponding path program 1 times [2018-12-09 10:00:36,968 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:36,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:36,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:36,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:36,970 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:36,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:37,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:37,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:37,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:00:37,013 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:37,013 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:00:37,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:00:37,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:00:37,014 INFO L87 Difference]: Start difference. First operand 53058 states and 208358 transitions. Second operand 5 states. [2018-12-09 10:00:37,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:37,885 INFO L93 Difference]: Finished difference Result 120766 states and 451890 transitions. [2018-12-09 10:00:37,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 10:00:37,885 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2018-12-09 10:00:37,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:38,152 INFO L225 Difference]: With dead ends: 120766 [2018-12-09 10:00:38,152 INFO L226 Difference]: Without dead ends: 119910 [2018-12-09 10:00:38,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:00:38,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119910 states. [2018-12-09 10:00:39,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119910 to 81756. [2018-12-09 10:00:39,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81756 states. [2018-12-09 10:00:39,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81756 states to 81756 states and 306102 transitions. [2018-12-09 10:00:39,749 INFO L78 Accepts]: Start accepts. Automaton has 81756 states and 306102 transitions. Word has length 61 [2018-12-09 10:00:39,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:39,750 INFO L480 AbstractCegarLoop]: Abstraction has 81756 states and 306102 transitions. [2018-12-09 10:00:39,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:00:39,750 INFO L276 IsEmpty]: Start isEmpty. Operand 81756 states and 306102 transitions. [2018-12-09 10:00:39,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 10:00:39,754 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:39,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:39,754 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:39,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:39,754 INFO L82 PathProgramCache]: Analyzing trace with hash 1874201971, now seen corresponding path program 1 times [2018-12-09 10:00:39,754 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:39,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:39,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:39,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:39,756 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:39,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:39,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:39,812 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:39,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:00:39,812 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:39,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:00:39,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:00:39,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:00:39,813 INFO L87 Difference]: Start difference. First operand 81756 states and 306102 transitions. Second operand 6 states. [2018-12-09 10:00:40,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:40,943 INFO L93 Difference]: Finished difference Result 194640 states and 716858 transitions. [2018-12-09 10:00:40,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 10:00:40,943 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2018-12-09 10:00:40,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:41,316 INFO L225 Difference]: With dead ends: 194640 [2018-12-09 10:00:41,316 INFO L226 Difference]: Without dead ends: 193624 [2018-12-09 10:00:41,316 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2018-12-09 10:00:41,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193624 states. [2018-12-09 10:00:44,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193624 to 91024. [2018-12-09 10:00:44,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91024 states. [2018-12-09 10:00:44,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91024 states to 91024 states and 338411 transitions. [2018-12-09 10:00:44,970 INFO L78 Accepts]: Start accepts. Automaton has 91024 states and 338411 transitions. Word has length 62 [2018-12-09 10:00:44,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:44,970 INFO L480 AbstractCegarLoop]: Abstraction has 91024 states and 338411 transitions. [2018-12-09 10:00:44,970 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:00:44,970 INFO L276 IsEmpty]: Start isEmpty. Operand 91024 states and 338411 transitions. [2018-12-09 10:00:44,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-09 10:00:44,977 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:44,977 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:44,978 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:44,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:44,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1781281892, now seen corresponding path program 1 times [2018-12-09 10:00:44,978 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:44,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:44,979 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:44,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:44,979 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:44,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:45,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:45,000 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:45,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 10:00:45,000 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:45,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 10:00:45,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 10:00:45,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:00:45,001 INFO L87 Difference]: Start difference. First operand 91024 states and 338411 transitions. Second operand 3 states. [2018-12-09 10:00:45,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:45,441 INFO L93 Difference]: Finished difference Result 120751 states and 443372 transitions. [2018-12-09 10:00:45,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 10:00:45,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2018-12-09 10:00:45,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:45,674 INFO L225 Difference]: With dead ends: 120751 [2018-12-09 10:00:45,674 INFO L226 Difference]: Without dead ends: 120751 [2018-12-09 10:00:45,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:00:46,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120751 states. [2018-12-09 10:00:47,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120751 to 101531. [2018-12-09 10:00:47,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101531 states. [2018-12-09 10:00:47,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101531 states to 101531 states and 373619 transitions. [2018-12-09 10:00:47,570 INFO L78 Accepts]: Start accepts. Automaton has 101531 states and 373619 transitions. Word has length 64 [2018-12-09 10:00:47,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:47,570 INFO L480 AbstractCegarLoop]: Abstraction has 101531 states and 373619 transitions. [2018-12-09 10:00:47,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 10:00:47,571 INFO L276 IsEmpty]: Start isEmpty. Operand 101531 states and 373619 transitions. [2018-12-09 10:00:47,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-09 10:00:47,585 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:47,586 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:47,586 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:47,586 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:47,586 INFO L82 PathProgramCache]: Analyzing trace with hash -571649263, now seen corresponding path program 1 times [2018-12-09 10:00:47,586 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:47,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:47,588 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:47,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:47,588 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:47,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:47,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:47,723 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:47,723 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 10:00:47,723 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:47,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 10:00:47,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 10:00:47,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-09 10:00:47,724 INFO L87 Difference]: Start difference. First operand 101531 states and 373619 transitions. Second operand 10 states. [2018-12-09 10:00:49,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:49,375 INFO L93 Difference]: Finished difference Result 162636 states and 583282 transitions. [2018-12-09 10:00:49,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-12-09 10:00:49,375 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 68 [2018-12-09 10:00:49,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:49,684 INFO L225 Difference]: With dead ends: 162636 [2018-12-09 10:00:49,685 INFO L226 Difference]: Without dead ends: 161372 [2018-12-09 10:00:49,685 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=343, Invalid=1063, Unknown=0, NotChecked=0, Total=1406 [2018-12-09 10:00:50,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161372 states. [2018-12-09 10:00:51,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161372 to 108947. [2018-12-09 10:00:51,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108947 states. [2018-12-09 10:00:52,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108947 states to 108947 states and 398508 transitions. [2018-12-09 10:00:52,034 INFO L78 Accepts]: Start accepts. Automaton has 108947 states and 398508 transitions. Word has length 68 [2018-12-09 10:00:52,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:52,035 INFO L480 AbstractCegarLoop]: Abstraction has 108947 states and 398508 transitions. [2018-12-09 10:00:52,035 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 10:00:52,035 INFO L276 IsEmpty]: Start isEmpty. Operand 108947 states and 398508 transitions. [2018-12-09 10:00:52,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-09 10:00:52,056 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:52,056 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:52,056 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:52,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:52,056 INFO L82 PathProgramCache]: Analyzing trace with hash 540269240, now seen corresponding path program 1 times [2018-12-09 10:00:52,056 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:52,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:52,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:52,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:52,058 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:52,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:52,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:52,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:52,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:00:52,116 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:52,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:00:52,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:00:52,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:00:52,116 INFO L87 Difference]: Start difference. First operand 108947 states and 398508 transitions. Second operand 6 states. [2018-12-09 10:00:53,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:53,009 INFO L93 Difference]: Finished difference Result 136498 states and 489586 transitions. [2018-12-09 10:00:53,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 10:00:53,009 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2018-12-09 10:00:53,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:53,265 INFO L225 Difference]: With dead ends: 136498 [2018-12-09 10:00:53,265 INFO L226 Difference]: Without dead ends: 135590 [2018-12-09 10:00:53,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:00:53,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135590 states. [2018-12-09 10:00:55,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135590 to 131562. [2018-12-09 10:00:55,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131562 states. [2018-12-09 10:00:55,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131562 states to 131562 states and 473807 transitions. [2018-12-09 10:00:55,448 INFO L78 Accepts]: Start accepts. Automaton has 131562 states and 473807 transitions. Word has length 70 [2018-12-09 10:00:55,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:00:55,448 INFO L480 AbstractCegarLoop]: Abstraction has 131562 states and 473807 transitions. [2018-12-09 10:00:55,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:00:55,448 INFO L276 IsEmpty]: Start isEmpty. Operand 131562 states and 473807 transitions. [2018-12-09 10:00:55,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-09 10:00:55,471 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:00:55,471 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:00:55,471 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:00:55,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:00:55,472 INFO L82 PathProgramCache]: Analyzing trace with hash 246866233, now seen corresponding path program 1 times [2018-12-09 10:00:55,472 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:00:55,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:55,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:00:55,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:00:55,474 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:00:55,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:00:55,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:00:55,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:00:55,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 10:00:55,544 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:00:55,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 10:00:55,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 10:00:55,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:00:55,545 INFO L87 Difference]: Start difference. First operand 131562 states and 473807 transitions. Second operand 7 states. [2018-12-09 10:00:56,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:00:56,789 INFO L93 Difference]: Finished difference Result 190988 states and 665826 transitions. [2018-12-09 10:00:56,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 10:00:56,789 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2018-12-09 10:00:56,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:00:57,155 INFO L225 Difference]: With dead ends: 190988 [2018-12-09 10:00:57,155 INFO L226 Difference]: Without dead ends: 190988 [2018-12-09 10:00:57,155 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-09 10:00:57,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190988 states. [2018-12-09 10:00:59,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190988 to 162964. [2018-12-09 10:00:59,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162964 states. [2018-12-09 10:01:00,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162964 states to 162964 states and 575510 transitions. [2018-12-09 10:01:00,069 INFO L78 Accepts]: Start accepts. Automaton has 162964 states and 575510 transitions. Word has length 70 [2018-12-09 10:01:00,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:00,069 INFO L480 AbstractCegarLoop]: Abstraction has 162964 states and 575510 transitions. [2018-12-09 10:01:00,069 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 10:01:00,069 INFO L276 IsEmpty]: Start isEmpty. Operand 162964 states and 575510 transitions. [2018-12-09 10:01:00,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-09 10:01:00,094 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:00,094 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:00,094 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:00,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:00,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1560588230, now seen corresponding path program 1 times [2018-12-09 10:01:00,094 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:00,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:00,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:00,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:00,096 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:00,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:00,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:00,124 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:00,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:00,125 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:00,125 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:00,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:00,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:00,125 INFO L87 Difference]: Start difference. First operand 162964 states and 575510 transitions. Second operand 4 states. [2018-12-09 10:01:00,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:00,223 INFO L93 Difference]: Finished difference Result 31092 states and 99229 transitions. [2018-12-09 10:01:00,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 10:01:00,224 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2018-12-09 10:01:00,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:00,262 INFO L225 Difference]: With dead ends: 31092 [2018-12-09 10:01:00,262 INFO L226 Difference]: Without dead ends: 27988 [2018-12-09 10:01:00,262 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:00,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27988 states. [2018-12-09 10:01:00,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27988 to 27932. [2018-12-09 10:01:00,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27932 states. [2018-12-09 10:01:00,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27932 states to 27932 states and 89022 transitions. [2018-12-09 10:01:00,573 INFO L78 Accepts]: Start accepts. Automaton has 27932 states and 89022 transitions. Word has length 70 [2018-12-09 10:01:00,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:00,574 INFO L480 AbstractCegarLoop]: Abstraction has 27932 states and 89022 transitions. [2018-12-09 10:01:00,574 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:00,574 INFO L276 IsEmpty]: Start isEmpty. Operand 27932 states and 89022 transitions. [2018-12-09 10:01:00,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 10:01:00,578 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:00,578 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:00,578 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:00,579 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:00,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1407972401, now seen corresponding path program 1 times [2018-12-09 10:01:00,579 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:00,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:00,580 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:00,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:00,580 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:00,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:00,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:00,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:00,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:00,627 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:00,628 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:00,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:00,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:00,628 INFO L87 Difference]: Start difference. First operand 27932 states and 89022 transitions. Second operand 4 states. [2018-12-09 10:01:00,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:00,763 INFO L93 Difference]: Finished difference Result 30580 states and 97292 transitions. [2018-12-09 10:01:00,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 10:01:00,764 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-12-09 10:01:00,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:00,843 INFO L225 Difference]: With dead ends: 30580 [2018-12-09 10:01:00,843 INFO L226 Difference]: Without dead ends: 30580 [2018-12-09 10:01:00,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:00,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30580 states. [2018-12-09 10:01:01,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30580 to 29760. [2018-12-09 10:01:01,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29760 states. [2018-12-09 10:01:01,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29760 states to 29760 states and 94685 transitions. [2018-12-09 10:01:01,154 INFO L78 Accepts]: Start accepts. Automaton has 29760 states and 94685 transitions. Word has length 76 [2018-12-09 10:01:01,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:01,154 INFO L480 AbstractCegarLoop]: Abstraction has 29760 states and 94685 transitions. [2018-12-09 10:01:01,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:01,154 INFO L276 IsEmpty]: Start isEmpty. Operand 29760 states and 94685 transitions. [2018-12-09 10:01:01,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 10:01:01,159 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:01,159 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:01,159 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:01,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:01,159 INFO L82 PathProgramCache]: Analyzing trace with hash -1144184560, now seen corresponding path program 1 times [2018-12-09 10:01:01,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:01,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:01,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:01,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:01,160 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:01,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:01,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:01,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:01,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 10:01:01,229 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:01,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 10:01:01,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 10:01:01,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:01,230 INFO L87 Difference]: Start difference. First operand 29760 states and 94685 transitions. Second operand 7 states. [2018-12-09 10:01:01,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:01,725 INFO L93 Difference]: Finished difference Result 51085 states and 161924 transitions. [2018-12-09 10:01:01,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 10:01:01,725 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2018-12-09 10:01:01,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:01,795 INFO L225 Difference]: With dead ends: 51085 [2018-12-09 10:01:01,795 INFO L226 Difference]: Without dead ends: 51014 [2018-12-09 10:01:01,796 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-12-09 10:01:01,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51014 states. [2018-12-09 10:01:02,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51014 to 32286. [2018-12-09 10:01:02,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32286 states. [2018-12-09 10:01:02,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32286 states to 32286 states and 102215 transitions. [2018-12-09 10:01:02,255 INFO L78 Accepts]: Start accepts. Automaton has 32286 states and 102215 transitions. Word has length 76 [2018-12-09 10:01:02,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:02,256 INFO L480 AbstractCegarLoop]: Abstraction has 32286 states and 102215 transitions. [2018-12-09 10:01:02,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 10:01:02,256 INFO L276 IsEmpty]: Start isEmpty. Operand 32286 states and 102215 transitions. [2018-12-09 10:01:02,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 10:01:02,264 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:02,265 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:02,265 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:02,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:02,265 INFO L82 PathProgramCache]: Analyzing trace with hash 2040421375, now seen corresponding path program 1 times [2018-12-09 10:01:02,265 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:02,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:02,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:02,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:02,266 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:02,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:02,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:02,289 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:02,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 10:01:02,289 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:02,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 10:01:02,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 10:01:02,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:01:02,289 INFO L87 Difference]: Start difference. First operand 32286 states and 102215 transitions. Second operand 3 states. [2018-12-09 10:01:02,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:02,501 INFO L93 Difference]: Finished difference Result 33202 states and 104622 transitions. [2018-12-09 10:01:02,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 10:01:02,502 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2018-12-09 10:01:02,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:02,547 INFO L225 Difference]: With dead ends: 33202 [2018-12-09 10:01:02,547 INFO L226 Difference]: Without dead ends: 33202 [2018-12-09 10:01:02,547 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:01:02,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33202 states. [2018-12-09 10:01:02,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33202 to 32869. [2018-12-09 10:01:02,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32869 states. [2018-12-09 10:01:02,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32869 states to 32869 states and 103706 transitions. [2018-12-09 10:01:02,900 INFO L78 Accepts]: Start accepts. Automaton has 32869 states and 103706 transitions. Word has length 82 [2018-12-09 10:01:02,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:02,900 INFO L480 AbstractCegarLoop]: Abstraction has 32869 states and 103706 transitions. [2018-12-09 10:01:02,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 10:01:02,900 INFO L276 IsEmpty]: Start isEmpty. Operand 32869 states and 103706 transitions. [2018-12-09 10:01:02,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 10:01:02,908 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:02,908 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:02,908 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:02,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:02,909 INFO L82 PathProgramCache]: Analyzing trace with hash 691673262, now seen corresponding path program 1 times [2018-12-09 10:01:02,909 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:02,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:02,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:02,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:02,910 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:02,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:02,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:02,943 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:02,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:02,943 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:02,943 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:02,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:02,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:02,944 INFO L87 Difference]: Start difference. First operand 32869 states and 103706 transitions. Second operand 4 states. [2018-12-09 10:01:03,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:03,250 INFO L93 Difference]: Finished difference Result 40300 states and 125281 transitions. [2018-12-09 10:01:03,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 10:01:03,250 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2018-12-09 10:01:03,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:03,298 INFO L225 Difference]: With dead ends: 40300 [2018-12-09 10:01:03,298 INFO L226 Difference]: Without dead ends: 40300 [2018-12-09 10:01:03,299 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:03,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40300 states. [2018-12-09 10:01:03,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40300 to 36355. [2018-12-09 10:01:03,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36355 states. [2018-12-09 10:01:03,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36355 states to 36355 states and 113635 transitions. [2018-12-09 10:01:03,705 INFO L78 Accepts]: Start accepts. Automaton has 36355 states and 113635 transitions. Word has length 82 [2018-12-09 10:01:03,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:03,705 INFO L480 AbstractCegarLoop]: Abstraction has 36355 states and 113635 transitions. [2018-12-09 10:01:03,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:03,705 INFO L276 IsEmpty]: Start isEmpty. Operand 36355 states and 113635 transitions. [2018-12-09 10:01:03,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:03,717 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:03,718 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:03,718 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:03,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:03,718 INFO L82 PathProgramCache]: Analyzing trace with hash 1307367553, now seen corresponding path program 1 times [2018-12-09 10:01:03,718 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:03,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:03,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:03,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:03,719 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:03,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:03,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:03,761 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:03,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:03,761 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:03,762 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:03,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:03,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:03,762 INFO L87 Difference]: Start difference. First operand 36355 states and 113635 transitions. Second operand 6 states. [2018-12-09 10:01:04,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:04,740 INFO L93 Difference]: Finished difference Result 45905 states and 141213 transitions. [2018-12-09 10:01:04,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:04,740 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-09 10:01:04,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:04,797 INFO L225 Difference]: With dead ends: 45905 [2018-12-09 10:01:04,797 INFO L226 Difference]: Without dead ends: 45874 [2018-12-09 10:01:04,797 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:04,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45874 states. [2018-12-09 10:01:05,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45874 to 39677. [2018-12-09 10:01:05,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39677 states. [2018-12-09 10:01:05,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39677 states to 39677 states and 123151 transitions. [2018-12-09 10:01:05,253 INFO L78 Accepts]: Start accepts. Automaton has 39677 states and 123151 transitions. Word has length 84 [2018-12-09 10:01:05,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:05,253 INFO L480 AbstractCegarLoop]: Abstraction has 39677 states and 123151 transitions. [2018-12-09 10:01:05,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:05,253 INFO L276 IsEmpty]: Start isEmpty. Operand 39677 states and 123151 transitions. [2018-12-09 10:01:05,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:05,266 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:05,266 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:05,266 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:05,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:05,266 INFO L82 PathProgramCache]: Analyzing trace with hash -2025985726, now seen corresponding path program 1 times [2018-12-09 10:01:05,266 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:05,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:05,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:05,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:05,268 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:05,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:05,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:05,323 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:05,323 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:05,323 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:05,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:05,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:05,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:05,323 INFO L87 Difference]: Start difference. First operand 39677 states and 123151 transitions. Second operand 6 states. [2018-12-09 10:01:05,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:05,719 INFO L93 Difference]: Finished difference Result 43621 states and 132259 transitions. [2018-12-09 10:01:05,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 10:01:05,719 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-09 10:01:05,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:05,769 INFO L225 Difference]: With dead ends: 43621 [2018-12-09 10:01:05,769 INFO L226 Difference]: Without dead ends: 43621 [2018-12-09 10:01:05,770 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-09 10:01:05,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43621 states. [2018-12-09 10:01:06,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43621 to 40234. [2018-12-09 10:01:06,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40234 states. [2018-12-09 10:01:06,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40234 states to 40234 states and 123358 transitions. [2018-12-09 10:01:06,211 INFO L78 Accepts]: Start accepts. Automaton has 40234 states and 123358 transitions. Word has length 84 [2018-12-09 10:01:06,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:06,211 INFO L480 AbstractCegarLoop]: Abstraction has 40234 states and 123358 transitions. [2018-12-09 10:01:06,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:06,211 INFO L276 IsEmpty]: Start isEmpty. Operand 40234 states and 123358 transitions. [2018-12-09 10:01:06,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:06,224 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:06,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:06,224 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:06,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:06,224 INFO L82 PathProgramCache]: Analyzing trace with hash -781221245, now seen corresponding path program 1 times [2018-12-09 10:01:06,224 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:06,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:06,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:06,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:06,225 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:06,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:06,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:06,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:06,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:06,274 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:06,274 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:06,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:06,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:06,274 INFO L87 Difference]: Start difference. First operand 40234 states and 123358 transitions. Second operand 5 states. [2018-12-09 10:01:06,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:06,592 INFO L93 Difference]: Finished difference Result 48057 states and 145245 transitions. [2018-12-09 10:01:06,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:06,592 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-09 10:01:06,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:06,648 INFO L225 Difference]: With dead ends: 48057 [2018-12-09 10:01:06,648 INFO L226 Difference]: Without dead ends: 48057 [2018-12-09 10:01:06,649 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:06,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48057 states. [2018-12-09 10:01:07,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48057 to 43901. [2018-12-09 10:01:07,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43901 states. [2018-12-09 10:01:07,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43901 states to 43901 states and 132803 transitions. [2018-12-09 10:01:07,132 INFO L78 Accepts]: Start accepts. Automaton has 43901 states and 132803 transitions. Word has length 84 [2018-12-09 10:01:07,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:07,132 INFO L480 AbstractCegarLoop]: Abstraction has 43901 states and 132803 transitions. [2018-12-09 10:01:07,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:07,132 INFO L276 IsEmpty]: Start isEmpty. Operand 43901 states and 132803 transitions. [2018-12-09 10:01:07,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:07,145 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:07,145 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:07,145 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:07,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:07,145 INFO L82 PathProgramCache]: Analyzing trace with hash -1778293598, now seen corresponding path program 1 times [2018-12-09 10:01:07,145 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:07,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:07,146 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:07,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:07,146 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:07,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:07,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:07,198 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:07,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:07,198 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:07,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:07,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:07,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:07,199 INFO L87 Difference]: Start difference. First operand 43901 states and 132803 transitions. Second operand 5 states. [2018-12-09 10:01:07,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:07,642 INFO L93 Difference]: Finished difference Result 60790 states and 183246 transitions. [2018-12-09 10:01:07,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 10:01:07,643 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-09 10:01:07,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:07,721 INFO L225 Difference]: With dead ends: 60790 [2018-12-09 10:01:07,721 INFO L226 Difference]: Without dead ends: 60790 [2018-12-09 10:01:07,721 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:01:07,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60790 states. [2018-12-09 10:01:08,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60790 to 47649. [2018-12-09 10:01:08,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47649 states. [2018-12-09 10:01:08,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47649 states to 47649 states and 143369 transitions. [2018-12-09 10:01:08,324 INFO L78 Accepts]: Start accepts. Automaton has 47649 states and 143369 transitions. Word has length 84 [2018-12-09 10:01:08,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:08,324 INFO L480 AbstractCegarLoop]: Abstraction has 47649 states and 143369 transitions. [2018-12-09 10:01:08,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:08,324 INFO L276 IsEmpty]: Start isEmpty. Operand 47649 states and 143369 transitions. [2018-12-09 10:01:08,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:08,337 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:08,337 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:08,337 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:08,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:08,338 INFO L82 PathProgramCache]: Analyzing trace with hash 719722339, now seen corresponding path program 1 times [2018-12-09 10:01:08,338 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:08,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:08,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:08,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:08,339 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:08,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:08,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:08,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:08,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:08,381 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:08,381 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:08,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:08,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:08,381 INFO L87 Difference]: Start difference. First operand 47649 states and 143369 transitions. Second operand 4 states. [2018-12-09 10:01:08,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:08,914 INFO L93 Difference]: Finished difference Result 60253 states and 181234 transitions. [2018-12-09 10:01:08,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 10:01:08,915 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2018-12-09 10:01:08,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:08,991 INFO L225 Difference]: With dead ends: 60253 [2018-12-09 10:01:08,991 INFO L226 Difference]: Without dead ends: 59825 [2018-12-09 10:01:08,992 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:09,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59825 states. [2018-12-09 10:01:09,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59825 to 56001. [2018-12-09 10:01:09,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56001 states. [2018-12-09 10:01:09,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56001 states to 56001 states and 168841 transitions. [2018-12-09 10:01:09,647 INFO L78 Accepts]: Start accepts. Automaton has 56001 states and 168841 transitions. Word has length 84 [2018-12-09 10:01:09,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:09,647 INFO L480 AbstractCegarLoop]: Abstraction has 56001 states and 168841 transitions. [2018-12-09 10:01:09,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:09,647 INFO L276 IsEmpty]: Start isEmpty. Operand 56001 states and 168841 transitions. [2018-12-09 10:01:09,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-09 10:01:09,662 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:09,662 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:09,662 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:09,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:09,663 INFO L82 PathProgramCache]: Analyzing trace with hash 426319332, now seen corresponding path program 1 times [2018-12-09 10:01:09,663 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:09,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:09,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:09,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:09,664 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:09,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:09,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:09,695 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:09,695 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:09,695 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:09,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:09,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:09,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:09,696 INFO L87 Difference]: Start difference. First operand 56001 states and 168841 transitions. Second operand 5 states. [2018-12-09 10:01:09,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:09,745 INFO L93 Difference]: Finished difference Result 12621 states and 29962 transitions. [2018-12-09 10:01:09,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 10:01:09,745 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-09 10:01:09,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:09,752 INFO L225 Difference]: With dead ends: 12621 [2018-12-09 10:01:09,752 INFO L226 Difference]: Without dead ends: 10165 [2018-12-09 10:01:09,752 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:09,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10165 states. [2018-12-09 10:01:09,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10165 to 8860. [2018-12-09 10:01:09,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8860 states. [2018-12-09 10:01:09,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8860 states to 8860 states and 20404 transitions. [2018-12-09 10:01:09,822 INFO L78 Accepts]: Start accepts. Automaton has 8860 states and 20404 transitions. Word has length 84 [2018-12-09 10:01:09,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:09,822 INFO L480 AbstractCegarLoop]: Abstraction has 8860 states and 20404 transitions. [2018-12-09 10:01:09,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:09,823 INFO L276 IsEmpty]: Start isEmpty. Operand 8860 states and 20404 transitions. [2018-12-09 10:01:09,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-09 10:01:09,827 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:09,828 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:09,828 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:09,828 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:09,828 INFO L82 PathProgramCache]: Analyzing trace with hash -371203702, now seen corresponding path program 1 times [2018-12-09 10:01:09,828 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:09,829 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:09,829 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:09,829 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:09,829 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:09,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:09,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:09,856 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:09,856 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:09,856 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:09,856 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:09,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:09,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:09,856 INFO L87 Difference]: Start difference. First operand 8860 states and 20404 transitions. Second operand 5 states. [2018-12-09 10:01:09,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:09,954 INFO L93 Difference]: Finished difference Result 10299 states and 23671 transitions. [2018-12-09 10:01:09,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 10:01:09,954 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2018-12-09 10:01:09,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:09,961 INFO L225 Difference]: With dead ends: 10299 [2018-12-09 10:01:09,961 INFO L226 Difference]: Without dead ends: 10299 [2018-12-09 10:01:09,961 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-09 10:01:09,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10299 states. [2018-12-09 10:01:10,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10299 to 9297. [2018-12-09 10:01:10,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9297 states. [2018-12-09 10:01:10,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9297 states to 9297 states and 21406 transitions. [2018-12-09 10:01:10,029 INFO L78 Accepts]: Start accepts. Automaton has 9297 states and 21406 transitions. Word has length 88 [2018-12-09 10:01:10,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:10,029 INFO L480 AbstractCegarLoop]: Abstraction has 9297 states and 21406 transitions. [2018-12-09 10:01:10,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:10,029 INFO L276 IsEmpty]: Start isEmpty. Operand 9297 states and 21406 transitions. [2018-12-09 10:01:10,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-09 10:01:10,034 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:10,034 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:10,034 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:10,034 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:10,034 INFO L82 PathProgramCache]: Analyzing trace with hash 1371606633, now seen corresponding path program 1 times [2018-12-09 10:01:10,034 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:10,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:10,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,035 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:10,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:10,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:10,096 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:10,096 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:10,096 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:10,096 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:10,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:10,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:10,097 INFO L87 Difference]: Start difference. First operand 9297 states and 21406 transitions. Second operand 6 states. [2018-12-09 10:01:10,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:10,400 INFO L93 Difference]: Finished difference Result 12636 states and 28984 transitions. [2018-12-09 10:01:10,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 10:01:10,401 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 88 [2018-12-09 10:01:10,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:10,408 INFO L225 Difference]: With dead ends: 12636 [2018-12-09 10:01:10,409 INFO L226 Difference]: Without dead ends: 12517 [2018-12-09 10:01:10,409 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-09 10:01:10,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12517 states. [2018-12-09 10:01:10,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12517 to 9995. [2018-12-09 10:01:10,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9995 states. [2018-12-09 10:01:10,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9995 states to 9995 states and 23011 transitions. [2018-12-09 10:01:10,491 INFO L78 Accepts]: Start accepts. Automaton has 9995 states and 23011 transitions. Word has length 88 [2018-12-09 10:01:10,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:10,491 INFO L480 AbstractCegarLoop]: Abstraction has 9995 states and 23011 transitions. [2018-12-09 10:01:10,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:10,491 INFO L276 IsEmpty]: Start isEmpty. Operand 9995 states and 23011 transitions. [2018-12-09 10:01:10,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-09 10:01:10,498 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:10,498 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:10,498 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:10,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:10,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1024178531, now seen corresponding path program 1 times [2018-12-09 10:01:10,499 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:10,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:10,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,500 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:10,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:10,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:10,536 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:10,536 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:10,536 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:10,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:10,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:10,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:10,537 INFO L87 Difference]: Start difference. First operand 9995 states and 23011 transitions. Second operand 4 states. [2018-12-09 10:01:10,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:10,741 INFO L93 Difference]: Finished difference Result 14091 states and 32163 transitions. [2018-12-09 10:01:10,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 10:01:10,742 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-09 10:01:10,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:10,751 INFO L225 Difference]: With dead ends: 14091 [2018-12-09 10:01:10,751 INFO L226 Difference]: Without dead ends: 14091 [2018-12-09 10:01:10,751 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:10,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14091 states. [2018-12-09 10:01:10,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14091 to 10917. [2018-12-09 10:01:10,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10917 states. [2018-12-09 10:01:10,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10917 states to 10917 states and 24843 transitions. [2018-12-09 10:01:10,844 INFO L78 Accepts]: Start accepts. Automaton has 10917 states and 24843 transitions. Word has length 109 [2018-12-09 10:01:10,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:10,844 INFO L480 AbstractCegarLoop]: Abstraction has 10917 states and 24843 transitions. [2018-12-09 10:01:10,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:10,844 INFO L276 IsEmpty]: Start isEmpty. Operand 10917 states and 24843 transitions. [2018-12-09 10:01:10,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-09 10:01:10,851 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:10,851 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:10,851 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:10,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:10,851 INFO L82 PathProgramCache]: Analyzing trace with hash -974628703, now seen corresponding path program 2 times [2018-12-09 10:01:10,852 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:10,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:10,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:10,852 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:10,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:10,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:10,887 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:10,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:10,887 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:10,887 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:10,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:10,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:10,888 INFO L87 Difference]: Start difference. First operand 10917 states and 24843 transitions. Second operand 4 states. [2018-12-09 10:01:11,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:11,067 INFO L93 Difference]: Finished difference Result 11029 states and 24959 transitions. [2018-12-09 10:01:11,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 10:01:11,067 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-09 10:01:11,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:11,075 INFO L225 Difference]: With dead ends: 11029 [2018-12-09 10:01:11,075 INFO L226 Difference]: Without dead ends: 11029 [2018-12-09 10:01:11,075 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:11,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11029 states. [2018-12-09 10:01:11,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11029 to 10494. [2018-12-09 10:01:11,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10494 states. [2018-12-09 10:01:11,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10494 states to 10494 states and 23767 transitions. [2018-12-09 10:01:11,152 INFO L78 Accepts]: Start accepts. Automaton has 10494 states and 23767 transitions. Word has length 109 [2018-12-09 10:01:11,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:11,152 INFO L480 AbstractCegarLoop]: Abstraction has 10494 states and 23767 transitions. [2018-12-09 10:01:11,152 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:11,152 INFO L276 IsEmpty]: Start isEmpty. Operand 10494 states and 23767 transitions. [2018-12-09 10:01:11,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-09 10:01:11,159 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:11,159 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:11,159 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:11,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:11,159 INFO L82 PathProgramCache]: Analyzing trace with hash 1577580156, now seen corresponding path program 1 times [2018-12-09 10:01:11,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:11,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,160 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 10:01:11,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,160 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:11,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:11,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:11,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:11,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:11,212 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:11,212 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:11,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:11,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:11,213 INFO L87 Difference]: Start difference. First operand 10494 states and 23767 transitions. Second operand 4 states. [2018-12-09 10:01:11,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:11,288 INFO L93 Difference]: Finished difference Result 11286 states and 25384 transitions. [2018-12-09 10:01:11,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 10:01:11,288 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-09 10:01:11,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:11,295 INFO L225 Difference]: With dead ends: 11286 [2018-12-09 10:01:11,295 INFO L226 Difference]: Without dead ends: 11286 [2018-12-09 10:01:11,296 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:11,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11286 states. [2018-12-09 10:01:11,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11286 to 10632. [2018-12-09 10:01:11,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10632 states. [2018-12-09 10:01:11,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10632 states to 10632 states and 23991 transitions. [2018-12-09 10:01:11,378 INFO L78 Accepts]: Start accepts. Automaton has 10632 states and 23991 transitions. Word has length 109 [2018-12-09 10:01:11,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:11,378 INFO L480 AbstractCegarLoop]: Abstraction has 10632 states and 23991 transitions. [2018-12-09 10:01:11,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:11,378 INFO L276 IsEmpty]: Start isEmpty. Operand 10632 states and 23991 transitions. [2018-12-09 10:01:11,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:11,384 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:11,384 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:11,384 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:11,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:11,385 INFO L82 PathProgramCache]: Analyzing trace with hash 2126539237, now seen corresponding path program 1 times [2018-12-09 10:01:11,385 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:11,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:11,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,386 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:11,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:11,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:11,421 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:11,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:11,421 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:11,422 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:11,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:11,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:11,422 INFO L87 Difference]: Start difference. First operand 10632 states and 23991 transitions. Second operand 5 states. [2018-12-09 10:01:11,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:11,571 INFO L93 Difference]: Finished difference Result 14125 states and 31666 transitions. [2018-12-09 10:01:11,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 10:01:11,571 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-09 10:01:11,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:11,581 INFO L225 Difference]: With dead ends: 14125 [2018-12-09 10:01:11,581 INFO L226 Difference]: Without dead ends: 14125 [2018-12-09 10:01:11,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:01:11,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14125 states. [2018-12-09 10:01:11,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14125 to 11534. [2018-12-09 10:01:11,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11534 states. [2018-12-09 10:01:11,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11534 states to 11534 states and 25913 transitions. [2018-12-09 10:01:11,678 INFO L78 Accepts]: Start accepts. Automaton has 11534 states and 25913 transitions. Word has length 111 [2018-12-09 10:01:11,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:11,678 INFO L480 AbstractCegarLoop]: Abstraction has 11534 states and 25913 transitions. [2018-12-09 10:01:11,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:11,678 INFO L276 IsEmpty]: Start isEmpty. Operand 11534 states and 25913 transitions. [2018-12-09 10:01:11,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:11,686 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:11,686 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:11,686 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:11,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:11,687 INFO L82 PathProgramCache]: Analyzing trace with hash 2137855364, now seen corresponding path program 1 times [2018-12-09 10:01:11,687 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:11,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:11,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:11,688 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:11,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:11,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:11,728 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:11,728 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 10:01:11,728 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:11,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 10:01:11,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 10:01:11,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:11,729 INFO L87 Difference]: Start difference. First operand 11534 states and 25913 transitions. Second operand 5 states. [2018-12-09 10:01:12,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:12,100 INFO L93 Difference]: Finished difference Result 18523 states and 41989 transitions. [2018-12-09 10:01:12,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:12,100 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-09 10:01:12,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:12,113 INFO L225 Difference]: With dead ends: 18523 [2018-12-09 10:01:12,113 INFO L226 Difference]: Without dead ends: 18523 [2018-12-09 10:01:12,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:12,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18523 states. [2018-12-09 10:01:12,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18523 to 12483. [2018-12-09 10:01:12,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12483 states. [2018-12-09 10:01:12,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12483 states to 12483 states and 28014 transitions. [2018-12-09 10:01:12,239 INFO L78 Accepts]: Start accepts. Automaton has 12483 states and 28014 transitions. Word has length 111 [2018-12-09 10:01:12,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:12,239 INFO L480 AbstractCegarLoop]: Abstraction has 12483 states and 28014 transitions. [2018-12-09 10:01:12,239 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 10:01:12,239 INFO L276 IsEmpty]: Start isEmpty. Operand 12483 states and 28014 transitions. [2018-12-09 10:01:12,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:12,248 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:12,248 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:12,249 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:12,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:12,249 INFO L82 PathProgramCache]: Analyzing trace with hash 60646021, now seen corresponding path program 1 times [2018-12-09 10:01:12,249 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:12,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:12,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:12,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:12,250 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:12,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:12,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:12,337 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:12,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 10:01:12,338 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:12,338 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 10:01:12,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 10:01:12,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:01:12,338 INFO L87 Difference]: Start difference. First operand 12483 states and 28014 transitions. Second operand 8 states. [2018-12-09 10:01:12,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:12,708 INFO L93 Difference]: Finished difference Result 15724 states and 35222 transitions. [2018-12-09 10:01:12,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 10:01:12,708 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-09 10:01:12,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:12,719 INFO L225 Difference]: With dead ends: 15724 [2018-12-09 10:01:12,719 INFO L226 Difference]: Without dead ends: 15692 [2018-12-09 10:01:12,719 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2018-12-09 10:01:12,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15692 states. [2018-12-09 10:01:12,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15692 to 14135. [2018-12-09 10:01:12,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14135 states. [2018-12-09 10:01:12,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14135 states to 14135 states and 31639 transitions. [2018-12-09 10:01:12,842 INFO L78 Accepts]: Start accepts. Automaton has 14135 states and 31639 transitions. Word has length 111 [2018-12-09 10:01:12,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:12,842 INFO L480 AbstractCegarLoop]: Abstraction has 14135 states and 31639 transitions. [2018-12-09 10:01:12,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 10:01:12,842 INFO L276 IsEmpty]: Start isEmpty. Operand 14135 states and 31639 transitions. [2018-12-09 10:01:12,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:12,852 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:12,852 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:12,852 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:12,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:12,853 INFO L82 PathProgramCache]: Analyzing trace with hash -232756986, now seen corresponding path program 1 times [2018-12-09 10:01:12,853 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:12,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:12,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:12,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:12,854 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:12,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:12,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:12,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:12,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-09 10:01:12,908 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:12,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 10:01:12,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 10:01:12,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:01:12,909 INFO L87 Difference]: Start difference. First operand 14135 states and 31639 transitions. Second operand 8 states. [2018-12-09 10:01:13,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:13,507 INFO L93 Difference]: Finished difference Result 22043 states and 50243 transitions. [2018-12-09 10:01:13,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 10:01:13,508 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-09 10:01:13,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:13,531 INFO L225 Difference]: With dead ends: 22043 [2018-12-09 10:01:13,531 INFO L226 Difference]: Without dead ends: 22043 [2018-12-09 10:01:13,531 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-09 10:01:13,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22043 states. [2018-12-09 10:01:13,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22043 to 15684. [2018-12-09 10:01:13,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15684 states. [2018-12-09 10:01:13,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15684 states to 15684 states and 35336 transitions. [2018-12-09 10:01:13,688 INFO L78 Accepts]: Start accepts. Automaton has 15684 states and 35336 transitions. Word has length 111 [2018-12-09 10:01:13,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:13,689 INFO L480 AbstractCegarLoop]: Abstraction has 15684 states and 35336 transitions. [2018-12-09 10:01:13,689 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 10:01:13,689 INFO L276 IsEmpty]: Start isEmpty. Operand 15684 states and 35336 transitions. [2018-12-09 10:01:13,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:13,700 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:13,700 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:13,701 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:13,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:13,701 INFO L82 PathProgramCache]: Analyzing trace with hash -2040211449, now seen corresponding path program 1 times [2018-12-09 10:01:13,701 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:13,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:13,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:13,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:13,702 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:13,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:13,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:13,754 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:13,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:13,754 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:13,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:13,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:13,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:13,754 INFO L87 Difference]: Start difference. First operand 15684 states and 35336 transitions. Second operand 6 states. [2018-12-09 10:01:13,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:13,804 INFO L93 Difference]: Finished difference Result 18948 states and 42712 transitions. [2018-12-09 10:01:13,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 10:01:13,804 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 111 [2018-12-09 10:01:13,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:13,818 INFO L225 Difference]: With dead ends: 18948 [2018-12-09 10:01:13,818 INFO L226 Difference]: Without dead ends: 18948 [2018-12-09 10:01:13,818 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:13,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18948 states. [2018-12-09 10:01:13,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18948 to 15912. [2018-12-09 10:01:13,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15912 states. [2018-12-09 10:01:13,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15912 states to 15912 states and 35656 transitions. [2018-12-09 10:01:13,957 INFO L78 Accepts]: Start accepts. Automaton has 15912 states and 35656 transitions. Word has length 111 [2018-12-09 10:01:13,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:13,958 INFO L480 AbstractCegarLoop]: Abstraction has 15912 states and 35656 transitions. [2018-12-09 10:01:13,958 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:13,958 INFO L276 IsEmpty]: Start isEmpty. Operand 15912 states and 35656 transitions. [2018-12-09 10:01:13,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:13,969 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:13,969 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:13,970 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:13,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:13,970 INFO L82 PathProgramCache]: Analyzing trace with hash -578631450, now seen corresponding path program 1 times [2018-12-09 10:01:13,970 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:13,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:13,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:13,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:13,971 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:13,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:14,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:14,055 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:14,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 10:01:14,055 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:14,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 10:01:14,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 10:01:14,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-12-09 10:01:14,055 INFO L87 Difference]: Start difference. First operand 15912 states and 35656 transitions. Second operand 9 states. [2018-12-09 10:01:14,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:14,512 INFO L93 Difference]: Finished difference Result 19964 states and 45075 transitions. [2018-12-09 10:01:14,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 10:01:14,512 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 111 [2018-12-09 10:01:14,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:14,524 INFO L225 Difference]: With dead ends: 19964 [2018-12-09 10:01:14,525 INFO L226 Difference]: Without dead ends: 19964 [2018-12-09 10:01:14,525 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-12-09 10:01:14,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19964 states. [2018-12-09 10:01:14,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19964 to 16906. [2018-12-09 10:01:14,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16906 states. [2018-12-09 10:01:14,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16906 states to 16906 states and 37835 transitions. [2018-12-09 10:01:14,666 INFO L78 Accepts]: Start accepts. Automaton has 16906 states and 37835 transitions. Word has length 111 [2018-12-09 10:01:14,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:14,667 INFO L480 AbstractCegarLoop]: Abstraction has 16906 states and 37835 transitions. [2018-12-09 10:01:14,667 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 10:01:14,667 INFO L276 IsEmpty]: Start isEmpty. Operand 16906 states and 37835 transitions. [2018-12-09 10:01:14,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 10:01:14,679 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:14,679 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:14,679 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:14,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:14,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1440173926, now seen corresponding path program 1 times [2018-12-09 10:01:14,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:14,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:14,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:14,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:14,680 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:14,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:14,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:14,747 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:14,747 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:14,747 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:14,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:14,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:14,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:14,747 INFO L87 Difference]: Start difference. First operand 16906 states and 37835 transitions. Second operand 6 states. [2018-12-09 10:01:14,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:14,863 INFO L93 Difference]: Finished difference Result 17573 states and 38689 transitions. [2018-12-09 10:01:14,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:14,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 111 [2018-12-09 10:01:14,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:14,874 INFO L225 Difference]: With dead ends: 17573 [2018-12-09 10:01:14,874 INFO L226 Difference]: Without dead ends: 17573 [2018-12-09 10:01:14,875 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-12-09 10:01:14,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17573 states. [2018-12-09 10:01:14,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17573 to 12118. [2018-12-09 10:01:14,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12118 states. [2018-12-09 10:01:15,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12118 states to 12118 states and 26805 transitions. [2018-12-09 10:01:15,001 INFO L78 Accepts]: Start accepts. Automaton has 12118 states and 26805 transitions. Word has length 111 [2018-12-09 10:01:15,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:15,001 INFO L480 AbstractCegarLoop]: Abstraction has 12118 states and 26805 transitions. [2018-12-09 10:01:15,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:15,001 INFO L276 IsEmpty]: Start isEmpty. Operand 12118 states and 26805 transitions. [2018-12-09 10:01:15,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 10:01:15,009 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:15,009 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:15,009 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:15,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:15,010 INFO L82 PathProgramCache]: Analyzing trace with hash 21007216, now seen corresponding path program 1 times [2018-12-09 10:01:15,010 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:15,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:15,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,011 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:15,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:15,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:15,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:15,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:15,049 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:15,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:15,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:15,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:15,049 INFO L87 Difference]: Start difference. First operand 12118 states and 26805 transitions. Second operand 6 states. [2018-12-09 10:01:15,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:15,273 INFO L93 Difference]: Finished difference Result 13897 states and 30584 transitions. [2018-12-09 10:01:15,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 10:01:15,274 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2018-12-09 10:01:15,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:15,282 INFO L225 Difference]: With dead ends: 13897 [2018-12-09 10:01:15,283 INFO L226 Difference]: Without dead ends: 13897 [2018-12-09 10:01:15,283 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-12-09 10:01:15,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13897 states. [2018-12-09 10:01:15,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13897 to 12264. [2018-12-09 10:01:15,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12264 states. [2018-12-09 10:01:15,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12264 states to 12264 states and 27118 transitions. [2018-12-09 10:01:15,382 INFO L78 Accepts]: Start accepts. Automaton has 12264 states and 27118 transitions. Word has length 113 [2018-12-09 10:01:15,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:15,382 INFO L480 AbstractCegarLoop]: Abstraction has 12264 states and 27118 transitions. [2018-12-09 10:01:15,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:15,382 INFO L276 IsEmpty]: Start isEmpty. Operand 12264 states and 27118 transitions. [2018-12-09 10:01:15,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 10:01:15,391 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:15,391 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:15,392 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:15,392 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:15,392 INFO L82 PathProgramCache]: Analyzing trace with hash -1989096625, now seen corresponding path program 1 times [2018-12-09 10:01:15,392 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:15,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:15,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,393 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:15,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:15,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:15,424 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:15,424 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 10:01:15,424 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:15,424 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 10:01:15,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 10:01:15,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 10:01:15,425 INFO L87 Difference]: Start difference. First operand 12264 states and 27118 transitions. Second operand 4 states. [2018-12-09 10:01:15,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:15,611 INFO L93 Difference]: Finished difference Result 14299 states and 31531 transitions. [2018-12-09 10:01:15,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 10:01:15,611 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-09 10:01:15,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:15,620 INFO L225 Difference]: With dead ends: 14299 [2018-12-09 10:01:15,620 INFO L226 Difference]: Without dead ends: 14204 [2018-12-09 10:01:15,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 10:01:15,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14204 states. [2018-12-09 10:01:15,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14204 to 12647. [2018-12-09 10:01:15,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12647 states. [2018-12-09 10:01:15,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12647 states to 12647 states and 27936 transitions. [2018-12-09 10:01:15,725 INFO L78 Accepts]: Start accepts. Automaton has 12647 states and 27936 transitions. Word has length 113 [2018-12-09 10:01:15,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:15,725 INFO L480 AbstractCegarLoop]: Abstraction has 12647 states and 27936 transitions. [2018-12-09 10:01:15,725 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 10:01:15,725 INFO L276 IsEmpty]: Start isEmpty. Operand 12647 states and 27936 transitions. [2018-12-09 10:01:15,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 10:01:15,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:15,734 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:15,735 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:15,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:15,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1027482608, now seen corresponding path program 1 times [2018-12-09 10:01:15,735 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:15,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:15,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:15,736 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:15,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:15,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:15,825 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:15,825 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 10:01:15,825 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:15,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 10:01:15,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 10:01:15,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-09 10:01:15,826 INFO L87 Difference]: Start difference. First operand 12647 states and 27936 transitions. Second operand 10 states. [2018-12-09 10:01:16,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:16,124 INFO L93 Difference]: Finished difference Result 17397 states and 38845 transitions. [2018-12-09 10:01:16,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 10:01:16,124 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 113 [2018-12-09 10:01:16,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:16,135 INFO L225 Difference]: With dead ends: 17397 [2018-12-09 10:01:16,135 INFO L226 Difference]: Without dead ends: 17397 [2018-12-09 10:01:16,135 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=201, Unknown=0, NotChecked=0, Total=272 [2018-12-09 10:01:16,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17397 states. [2018-12-09 10:01:16,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17397 to 12647. [2018-12-09 10:01:16,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12647 states. [2018-12-09 10:01:16,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12647 states to 12647 states and 27920 transitions. [2018-12-09 10:01:16,254 INFO L78 Accepts]: Start accepts. Automaton has 12647 states and 27920 transitions. Word has length 113 [2018-12-09 10:01:16,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:16,255 INFO L480 AbstractCegarLoop]: Abstraction has 12647 states and 27920 transitions. [2018-12-09 10:01:16,255 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 10:01:16,255 INFO L276 IsEmpty]: Start isEmpty. Operand 12647 states and 27920 transitions. [2018-12-09 10:01:16,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 10:01:16,264 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:16,264 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:16,265 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:16,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:16,265 INFO L82 PathProgramCache]: Analyzing trace with hash 1460030225, now seen corresponding path program 1 times [2018-12-09 10:01:16,265 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:16,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:16,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,266 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:16,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:16,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:16,322 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:16,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 10:01:16,322 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:16,322 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 10:01:16,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 10:01:16,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:16,322 INFO L87 Difference]: Start difference. First operand 12647 states and 27920 transitions. Second operand 7 states. [2018-12-09 10:01:16,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:16,447 INFO L93 Difference]: Finished difference Result 14520 states and 32099 transitions. [2018-12-09 10:01:16,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:16,447 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 113 [2018-12-09 10:01:16,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:16,456 INFO L225 Difference]: With dead ends: 14520 [2018-12-09 10:01:16,456 INFO L226 Difference]: Without dead ends: 14520 [2018-12-09 10:01:16,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-09 10:01:16,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14520 states. [2018-12-09 10:01:16,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14520 to 10774. [2018-12-09 10:01:16,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10774 states. [2018-12-09 10:01:16,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10774 states to 10774 states and 23781 transitions. [2018-12-09 10:01:16,547 INFO L78 Accepts]: Start accepts. Automaton has 10774 states and 23781 transitions. Word has length 113 [2018-12-09 10:01:16,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:16,547 INFO L480 AbstractCegarLoop]: Abstraction has 10774 states and 23781 transitions. [2018-12-09 10:01:16,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 10:01:16,547 INFO L276 IsEmpty]: Start isEmpty. Operand 10774 states and 23781 transitions. [2018-12-09 10:01:16,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 10:01:16,555 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:16,555 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:16,555 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:16,555 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:16,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1590172590, now seen corresponding path program 1 times [2018-12-09 10:01:16,555 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:16,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,556 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:16,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:16,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:16,576 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:16,576 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 10:01:16,576 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:16,576 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 10:01:16,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 10:01:16,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:01:16,576 INFO L87 Difference]: Start difference. First operand 10774 states and 23781 transitions. Second operand 3 states. [2018-12-09 10:01:16,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:16,591 INFO L93 Difference]: Finished difference Result 10774 states and 23765 transitions. [2018-12-09 10:01:16,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 10:01:16,592 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2018-12-09 10:01:16,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:16,598 INFO L225 Difference]: With dead ends: 10774 [2018-12-09 10:01:16,598 INFO L226 Difference]: Without dead ends: 10774 [2018-12-09 10:01:16,598 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 10:01:16,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10774 states. [2018-12-09 10:01:16,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10774 to 10774. [2018-12-09 10:01:16,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10774 states. [2018-12-09 10:01:16,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10774 states to 10774 states and 23765 transitions. [2018-12-09 10:01:16,674 INFO L78 Accepts]: Start accepts. Automaton has 10774 states and 23765 transitions. Word has length 113 [2018-12-09 10:01:16,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:16,674 INFO L480 AbstractCegarLoop]: Abstraction has 10774 states and 23765 transitions. [2018-12-09 10:01:16,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 10:01:16,674 INFO L276 IsEmpty]: Start isEmpty. Operand 10774 states and 23765 transitions. [2018-12-09 10:01:16,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:16,681 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:16,681 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:16,682 INFO L423 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:16,682 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:16,682 INFO L82 PathProgramCache]: Analyzing trace with hash 1851971030, now seen corresponding path program 1 times [2018-12-09 10:01:16,682 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:16,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:16,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:16,683 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:16,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:16,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:16,759 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:16,759 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 10:01:16,759 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:16,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 10:01:16,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 10:01:16,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-09 10:01:16,759 INFO L87 Difference]: Start difference. First operand 10774 states and 23765 transitions. Second operand 9 states. [2018-12-09 10:01:17,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:17,022 INFO L93 Difference]: Finished difference Result 13057 states and 28866 transitions. [2018-12-09 10:01:17,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 10:01:17,022 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 115 [2018-12-09 10:01:17,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:17,024 INFO L225 Difference]: With dead ends: 13057 [2018-12-09 10:01:17,024 INFO L226 Difference]: Without dead ends: 2409 [2018-12-09 10:01:17,024 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-09 10:01:17,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2409 states. [2018-12-09 10:01:17,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2409 to 2409. [2018-12-09 10:01:17,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2409 states. [2018-12-09 10:01:17,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2409 states to 2409 states and 5340 transitions. [2018-12-09 10:01:17,038 INFO L78 Accepts]: Start accepts. Automaton has 2409 states and 5340 transitions. Word has length 115 [2018-12-09 10:01:17,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:17,038 INFO L480 AbstractCegarLoop]: Abstraction has 2409 states and 5340 transitions. [2018-12-09 10:01:17,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 10:01:17,039 INFO L276 IsEmpty]: Start isEmpty. Operand 2409 states and 5340 transitions. [2018-12-09 10:01:17,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:17,040 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:17,040 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:17,040 INFO L423 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:17,041 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:17,041 INFO L82 PathProgramCache]: Analyzing trace with hash 686518171, now seen corresponding path program 1 times [2018-12-09 10:01:17,041 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:17,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,041 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:17,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,042 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:17,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:17,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:17,083 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:17,083 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:17,083 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:17,083 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:17,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:17,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:17,083 INFO L87 Difference]: Start difference. First operand 2409 states and 5340 transitions. Second operand 6 states. [2018-12-09 10:01:17,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:17,194 INFO L93 Difference]: Finished difference Result 2369 states and 5157 transitions. [2018-12-09 10:01:17,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 10:01:17,195 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-09 10:01:17,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:17,196 INFO L225 Difference]: With dead ends: 2369 [2018-12-09 10:01:17,196 INFO L226 Difference]: Without dead ends: 2369 [2018-12-09 10:01:17,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:17,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2369 states. [2018-12-09 10:01:17,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2369 to 1937. [2018-12-09 10:01:17,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2018-12-09 10:01:17,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 4209 transitions. [2018-12-09 10:01:17,209 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 4209 transitions. Word has length 115 [2018-12-09 10:01:17,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:17,209 INFO L480 AbstractCegarLoop]: Abstraction has 1937 states and 4209 transitions. [2018-12-09 10:01:17,209 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:17,209 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 4209 transitions. [2018-12-09 10:01:17,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:17,210 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:17,211 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:17,211 INFO L423 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:17,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:17,211 INFO L82 PathProgramCache]: Analyzing trace with hash 1865893307, now seen corresponding path program 1 times [2018-12-09 10:01:17,211 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:17,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:17,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,212 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:17,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:17,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:17,280 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:17,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 10:01:17,280 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:17,280 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 10:01:17,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 10:01:17,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 10:01:17,281 INFO L87 Difference]: Start difference. First operand 1937 states and 4209 transitions. Second operand 6 states. [2018-12-09 10:01:17,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:17,355 INFO L93 Difference]: Finished difference Result 2162 states and 4658 transitions. [2018-12-09 10:01:17,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 10:01:17,355 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-09 10:01:17,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:17,356 INFO L225 Difference]: With dead ends: 2162 [2018-12-09 10:01:17,356 INFO L226 Difference]: Without dead ends: 2131 [2018-12-09 10:01:17,356 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 10:01:17,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2131 states. [2018-12-09 10:01:17,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2131 to 1835. [2018-12-09 10:01:17,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1835 states. [2018-12-09 10:01:17,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1835 states to 1835 states and 3986 transitions. [2018-12-09 10:01:17,368 INFO L78 Accepts]: Start accepts. Automaton has 1835 states and 3986 transitions. Word has length 115 [2018-12-09 10:01:17,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:17,368 INFO L480 AbstractCegarLoop]: Abstraction has 1835 states and 3986 transitions. [2018-12-09 10:01:17,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 10:01:17,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1835 states and 3986 transitions. [2018-12-09 10:01:17,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:17,369 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:17,370 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:17,370 INFO L423 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:17,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:17,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1735972292, now seen corresponding path program 2 times [2018-12-09 10:01:17,370 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:17,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,371 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:17,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,371 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:17,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:17,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:17,529 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:17,529 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-09 10:01:17,529 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:17,529 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-09 10:01:17,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-09 10:01:17,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-12-09 10:01:17,530 INFO L87 Difference]: Start difference. First operand 1835 states and 3986 transitions. Second operand 17 states. [2018-12-09 10:01:17,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:17,834 INFO L93 Difference]: Finished difference Result 1991 states and 4324 transitions. [2018-12-09 10:01:17,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 10:01:17,834 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 115 [2018-12-09 10:01:17,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:17,836 INFO L225 Difference]: With dead ends: 1991 [2018-12-09 10:01:17,836 INFO L226 Difference]: Without dead ends: 1895 [2018-12-09 10:01:17,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2018-12-09 10:01:17,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1895 states. [2018-12-09 10:01:17,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1895 to 1835. [2018-12-09 10:01:17,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1835 states. [2018-12-09 10:01:17,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1835 states to 1835 states and 3970 transitions. [2018-12-09 10:01:17,847 INFO L78 Accepts]: Start accepts. Automaton has 1835 states and 3970 transitions. Word has length 115 [2018-12-09 10:01:17,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:17,848 INFO L480 AbstractCegarLoop]: Abstraction has 1835 states and 3970 transitions. [2018-12-09 10:01:17,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-09 10:01:17,848 INFO L276 IsEmpty]: Start isEmpty. Operand 1835 states and 3970 transitions. [2018-12-09 10:01:17,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:17,849 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:17,849 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:17,850 INFO L423 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:17,850 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:17,850 INFO L82 PathProgramCache]: Analyzing trace with hash 816184669, now seen corresponding path program 1 times [2018-12-09 10:01:17,850 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:17,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,851 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 10:01:17,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:17,851 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:17,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 10:01:18,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 10:01:18,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 10:01:18,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-12-09 10:01:18,188 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-09 10:01:18,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-09 10:01:18,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-09 10:01:18,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=539, Unknown=0, NotChecked=0, Total=600 [2018-12-09 10:01:18,188 INFO L87 Difference]: Start difference. First operand 1835 states and 3970 transitions. Second operand 25 states. [2018-12-09 10:01:18,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 10:01:18,979 INFO L93 Difference]: Finished difference Result 3256 states and 7125 transitions. [2018-12-09 10:01:18,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-09 10:01:18,979 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 115 [2018-12-09 10:01:18,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 10:01:18,981 INFO L225 Difference]: With dead ends: 3256 [2018-12-09 10:01:18,981 INFO L226 Difference]: Without dead ends: 2289 [2018-12-09 10:01:18,981 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=351, Invalid=1811, Unknown=0, NotChecked=0, Total=2162 [2018-12-09 10:01:18,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2289 states. [2018-12-09 10:01:18,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2289 to 1898. [2018-12-09 10:01:18,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1898 states. [2018-12-09 10:01:18,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1898 states to 1898 states and 4096 transitions. [2018-12-09 10:01:18,994 INFO L78 Accepts]: Start accepts. Automaton has 1898 states and 4096 transitions. Word has length 115 [2018-12-09 10:01:18,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 10:01:18,995 INFO L480 AbstractCegarLoop]: Abstraction has 1898 states and 4096 transitions. [2018-12-09 10:01:18,995 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-09 10:01:18,995 INFO L276 IsEmpty]: Start isEmpty. Operand 1898 states and 4096 transitions. [2018-12-09 10:01:18,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 10:01:18,996 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 10:01:18,996 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 10:01:18,996 INFO L423 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 10:01:18,996 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 10:01:18,996 INFO L82 PathProgramCache]: Analyzing trace with hash 1119572719, now seen corresponding path program 2 times [2018-12-09 10:01:18,997 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-09 10:01:18,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:18,997 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 10:01:18,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 10:01:18,998 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-09 10:01:19,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 10:01:19,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 10:01:19,043 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 10:01:19,140 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-09 10:01:19,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 10:01:19 BasicIcfg [2018-12-09 10:01:19,141 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 10:01:19,142 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 10:01:19,142 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 10:01:19,142 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 10:01:19,142 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 10:00:29" (3/4) ... [2018-12-09 10:01:19,144 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 10:01:19,247 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_d52d7736-658d-4ca0-95fc-d738abca80a6/bin-2019/utaipan/witness.graphml [2018-12-09 10:01:19,247 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 10:01:19,247 INFO L168 Benchmark]: Toolchain (without parser) took 50872.90 ms. Allocated memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: 4.3 GB). Free memory was 945.9 MB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,248 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 10:01:19,248 INFO L168 Benchmark]: CACSL2BoogieTranslator took 347.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 945.9 MB in the beginning and 1.1 GB in the end (delta: -168.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,249 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,249 INFO L168 Benchmark]: Boogie Preprocessor took 21.95 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 10:01:19,249 INFO L168 Benchmark]: RCFGBuilder took 426.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.5 MB). Peak memory consumption was 65.5 MB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,249 INFO L168 Benchmark]: TraceAbstraction took 49935.14 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,250 INFO L168 Benchmark]: Witness Printer took 105.23 ms. Allocated memory is still 5.3 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 46.4 MB). Peak memory consumption was 46.4 MB. Max. memory is 11.5 GB. [2018-12-09 10:01:19,251 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 973.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 347.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 945.9 MB in the beginning and 1.1 GB in the end (delta: -168.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 32.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 21.95 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 426.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.5 MB). Peak memory consumption was 65.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49935.14 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. * Witness Printer took 105.23 ms. Allocated memory is still 5.3 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 46.4 MB). Peak memory consumption was 46.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L676] -1 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L682] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L683] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L684] -1 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L685] -1 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L686] -1 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L687] -1 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L688] -1 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L689] -1 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L690] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L691] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L693] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}] [L694] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0] [L695] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0] [L696] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L697] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L698] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L699] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L700] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L701] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L702] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L703] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L704] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L705] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L706] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L707] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L709] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L710] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L711] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L712] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L788] -1 pthread_t t2669; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK -1 pthread_create(&t2669, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L790] -1 pthread_t t2670; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L791] FCALL, FORK -1 pthread_create(&t2670, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L745] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L746] 0 x$flush_delayed = weak$$choice2 [L747] EXPR 0 \read(x) [L747] 0 x$mem_tmp = x [L748] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L749] EXPR 0 \read(x) [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L750] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L750] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L751] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L751] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L752] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L753] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L753] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L754] EXPR 0 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L754] 0 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L755] EXPR 0 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={7:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L755] 0 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L756] 0 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L757] 0 __unbuffered_p1_EAX$read_delayed_var = &x [L758] EXPR 0 \read(x) [L758] 0 __unbuffered_p1_EAX = x [L759] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=1, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L759] 0 x = x$flush_delayed ? x$mem_tmp : x [L760] 0 x$flush_delayed = (_Bool)0 [L763] 0 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L716] 1 __unbuffered_p0_EAX = y [L719] 1 x$w_buff1 = x$w_buff0 [L720] 1 x$w_buff0 = 1 [L721] 1 x$w_buff1_used = x$w_buff0_used [L722] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L766] EXPR 0 \read(x) [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L724] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L725] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L726] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L727] 1 x$r_buff0_thd1 = (_Bool)1 VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L768] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L769] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L770] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L734] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L737] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L797] EXPR -1 \read(x) [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L805] EXPR -1 \read(*__unbuffered_p1_EAX$read_delayed_var) [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] -1 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L806] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 318 locations, 3 error locations. UNSAFE Result, 49.8s OverallTime, 42 OverallIterations, 1 TraceHistogramMax, 19.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 14727 SDtfs, 19396 SDslu, 36738 SDs, 0 SdLazy, 15077 SolverSat, 1147 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 480 GetRequests, 104 SyntacticMatches, 33 SemanticMatches, 343 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=162964occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 23.2s AutomataMinimizationTime, 41 MinimizatonAttempts, 382375 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 3930 NumberOfCodeBlocks, 3930 NumberOfCodeBlocksAsserted, 42 NumberOfCheckSat, 3774 ConstructedInterpolants, 0 QuantifiedInterpolants, 1046355 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 41 InterpolantComputations, 41 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...