java -ea -Xmx16000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--gpu--drm--mgag200--mgag200.ko-entry_point_false-unreach-call.cil.out.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c6a52e0 [2018-11-19 17:08:37,929 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-19 17:08:37,931 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-19 17:08:37,942 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-19 17:08:37,942 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-19 17:08:37,943 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-19 17:08:37,944 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-19 17:08:37,946 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-19 17:08:37,947 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-19 17:08:37,948 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-19 17:08:37,949 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-19 17:08:37,949 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-19 17:08:37,950 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-19 17:08:37,951 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-19 17:08:37,952 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-19 17:08:37,953 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-19 17:08:37,954 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-19 17:08:37,955 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-19 17:08:37,958 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-19 17:08:37,959 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-19 17:08:37,960 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-19 17:08:37,962 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-19 17:08:37,964 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-19 17:08:37,964 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-19 17:08:37,964 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-19 17:08:37,965 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-19 17:08:37,966 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-19 17:08:37,967 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-19 17:08:37,968 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-19 17:08:37,969 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-19 17:08:37,969 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-19 17:08:37,970 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-19 17:08:37,970 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-19 17:08:37,970 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-19 17:08:37,971 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-19 17:08:37,972 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-19 17:08:37,972 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-11-19 17:08:37,986 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-19 17:08:37,986 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-19 17:08:37,987 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-19 17:08:37,987 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-19 17:08:37,987 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-19 17:08:37,988 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-19 17:08:37,988 INFO L133 SettingsManager]: * Use SBE=true [2018-11-19 17:08:37,988 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-19 17:08:37,988 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-19 17:08:37,988 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-19 17:08:37,989 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-19 17:08:37,990 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-19 17:08:37,990 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-19 17:08:37,990 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-19 17:08:37,990 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-19 17:08:37,990 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 17:08:37,991 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-19 17:08:37,991 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-19 17:08:37,992 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-11-19 17:08:38,034 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-19 17:08:38,047 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-19 17:08:38,051 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-19 17:08:38,053 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-19 17:08:38,053 INFO L276 PluginConnector]: CDTParser initialized [2018-11-19 17:08:38,054 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--gpu--drm--mgag200--mgag200.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 17:08:38,109 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ecd20b76d/602ca7f19b5c430cb8947e8d49e57405/FLAG5eea829d5 [2018-11-19 17:08:38,832 INFO L307 CDTParser]: Found 1 translation units. [2018-11-19 17:08:38,833 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--gpu--drm--mgag200--mgag200.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 17:08:38,877 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ecd20b76d/602ca7f19b5c430cb8947e8d49e57405/FLAG5eea829d5 [2018-11-19 17:08:39,080 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ecd20b76d/602ca7f19b5c430cb8947e8d49e57405 [2018-11-19 17:08:39,088 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-19 17:08:39,090 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-19 17:08:39,091 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-19 17:08:39,091 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-19 17:08:39,094 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-19 17:08:39,096 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 05:08:39" (1/1) ... [2018-11-19 17:08:39,099 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59c247db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:39, skipping insertion in model container [2018-11-19 17:08:39,099 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 05:08:39" (1/1) ... [2018-11-19 17:08:39,110 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-19 17:08:39,267 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-19 17:08:42,961 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 17:08:42,998 INFO L191 MainTranslator]: Completed pre-run [2018-11-19 17:08:43,480 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 17:08:44,344 INFO L195 MainTranslator]: Completed translation [2018-11-19 17:08:44,345 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44 WrapperNode [2018-11-19 17:08:44,345 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-19 17:08:44,345 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-19 17:08:44,346 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-19 17:08:44,346 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-19 17:08:44,356 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,357 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,437 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,438 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,718 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,752 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,823 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... [2018-11-19 17:08:44,881 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-19 17:08:44,881 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-19 17:08:44,881 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-19 17:08:44,882 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-19 17:08:44,883 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 17:08:44,945 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-19 17:08:44,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-19 17:08:44,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 17:08:44,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~TO~VOID [2018-11-19 17:08:44,946 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_sub_and_test [2018-11-19 17:08:44,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-19 17:08:44,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-19 17:08:44,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2018-11-19 17:08:44,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2018-11-19 17:08:44,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2018-11-19 17:08:44,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ptr [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ulong [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2018-11-19 17:08:44,948 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2018-11-19 17:08:44,949 INFO L138 BoogieDeclarations]: Found implementation of procedure kref_sub [2018-11-19 17:08:44,949 INFO L138 BoogieDeclarations]: Found implementation of procedure kref_put [2018-11-19 17:08:44,949 INFO L138 BoogieDeclarations]: Found implementation of procedure devm_kzalloc [2018-11-19 17:08:44,949 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_dword [2018-11-19 17:08:44,949 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_apertures [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_vma_node_offset_addr [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_gem_object_unreference [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_gem_object_unreference_unlocked [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_user_framebuffer_destroy [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_framebuffer_init [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_user_framebuffer_create [2018-11-19 17:08:44,950 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_probe_vram [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vram_init [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_device_init [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_driver_load [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_driver_unload [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_gem_create [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_dumb_create [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_unref [2018-11-19 17:08:44,951 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_gem_free_object [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_mmap_offset [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_dumb_mmap_offset [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_15 [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_14 [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ERR_PTR [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_5 [2018-11-19 17:08:44,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_6 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_7 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_8 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_9 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_10 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_11 [2018-11-19 17:08:44,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_12 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_13 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_14 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_15 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_16 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_17 [2018-11-19 17:08:44,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put_mutex_19 [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_20 [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_21 [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_22 [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_read [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_dword [2018-11-19 17:08:44,955 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock_interruptible [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_trylock [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_encoder_find [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_crtc_helper_add [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_encoder_helper_add [2018-11-19 17:08:44,956 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_connector_helper_add [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure __ttm_bo_reserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure ttm_bo_reserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure __ttm_bo_unreserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure ttm_bo_unreserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_reserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_unreserve [2018-11-19 17:08:44,957 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_load_lut [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_wait_vsync [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_wait_busy [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_mode_fixup [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200se_set_plls [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200wb_set_plls [2018-11-19 17:08:44,958 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200ev_set_plls [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200eh_set_plls [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200er_set_plls [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_set_plls [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200wb_prepare [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_g200wb_commit [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_set_start_address [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_do_set_base [2018-11-19 17:08:44,959 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_mode_set_base [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_mode_set [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_dpms [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_prepare [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_commit [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_gamma_set [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_destroy [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_disable [2018-11-19 17:08:44,960 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_init [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_fb_gamma_set [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_fb_gamma_get [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_mode_fixup [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_mode_set [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_dpms [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_prepare [2018-11-19 17:08:44,961 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_commit [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_destroy [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_encoder_init [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vga_get_modes [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vga_calculate_mode_bandwidth [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vga_mode_valid [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_connector_best_encoder [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vga_detect [2018-11-19 17:08:44,962 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_connector_destroy [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_vga_init [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_modeset_init [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_modeset_fini [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_crtc_helper_funcs_12 [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_connector_funcs_8 [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_crtc_funcs_13 [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_connector_helper_funcs_9 [2018-11-19 17:08:44,963 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_encoder_helper_funcs_11 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_8 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_11 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_13 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_10 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_9 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_12 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_44 [2018-11-19 17:08:44,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_45 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_46 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_47 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_48 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_49 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_50 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_51 [2018-11-19 17:08:44,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_52 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_53 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_54 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_55 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_56 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_59 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock___0 [2018-11-19 17:08:44,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock_interruptible___0 [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_trylock___0 [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure __ttm_bo_reserve___0 [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure ttm_bo_reserve___0 [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_reserve___0 [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_hide_cursor [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_cursor_set [2018-11-19 17:08:44,967 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_crtc_cursor_move [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_79 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_80 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_81 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_82 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_83 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_84 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_85 [2018-11-19 17:08:44,968 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_86 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_87 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_88 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_89 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_90 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_91 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_94 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_95 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_96 [2018-11-19 17:08:44,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_97 [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_get_drvdata [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_kick_out_firmware_fb [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_pci_probe [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_pci_remove [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_init [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_exit [2018-11-19 17:08:44,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_pci_driver_5 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_file_operations_7 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_driver_6 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_120 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_121 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_122 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_123 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_124 [2018-11-19 17:08:44,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_125 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_126 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_127 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_128 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_129 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_130 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_131 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_132 [2018-11-19 17:08:44,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_135 [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_save_flags [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_irqs_disabled_flags [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure preempt_count [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-19 17:08:44,973 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_lock_interruptible___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ww_mutex_trylock___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_can_sleep [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure __ttm_bo_reserve___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ttm_bo_reserve___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_gem_object_unreference_unlocked___0 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_reserve___1 [2018-11-19 17:08:44,974 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_dirty_update [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_fillrect [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_copyarea [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_imageblit [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200fb_create_object [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200fb_create [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_fbdev_destroy [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_fbdev_init [2018-11-19 17:08:44,975 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_fbdev_fini [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_drm_fb_helper_funcs_3 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_fb_ops_4 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_4 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_3 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_155 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_156 [2018-11-19 17:08:44,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_157 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_158 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_159 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_160 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_161 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_162 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_163 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_164 [2018-11-19 17:08:44,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_165 [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_166 [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_167 [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_170 [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure i2c_set_adapdata [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_i2c_read_gpio [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_i2c_set_gpio [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_i2c_set [2018-11-19 17:08:44,978 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_gpio_setsda [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_gpio_setscl [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_gpio_getsda [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure mga_gpio_getscl [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_i2c_create [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_i2c_destroy [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_190 [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_191 [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_192 [2018-11-19 17:08:44,979 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_193 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_194 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_195 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_196 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_197 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_198 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_199 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_200 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_201 [2018-11-19 17:08:44,980 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_202 [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_205 [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure drm_vma_node_verify_access [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bdev [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_mem_global_init [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_mem_global_release [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_global_init [2018-11-19 17:08:44,981 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_global_release [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_ttm_destroy [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_bo_is_mgag200_bo [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_init_mem_type [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_evict_flags [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_verify_access [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_io_mem_reserve [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_io_mem_free [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_move [2018-11-19 17:08:44,982 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_backend_destroy [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_tt_create [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_tt_populate [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_tt_unpopulate [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_mm_init [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_mm_fini [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_ttm_placement [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_create [2018-11-19 17:08:44,983 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_gpu_offset [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_pin [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_unpin [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_bo_push_sysram [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure mgag200_mmap [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ttm_bo_driver_1 [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_1 [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_main_exported_2 [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_225 [2018-11-19 17:08:44,984 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_226 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_227 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_228 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_229 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_230 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_231 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_232 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_233 [2018-11-19 17:08:44,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_234 [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_235 [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_236 [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_237 [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_240 [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int_negative [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2018-11-19 17:08:44,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_err_ptr [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_ptr_err [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err_or_null [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_base_of_ww_mutex [2018-11-19 17:08:44,987 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_base_of_ww_mutex [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_base_of_ww_mutex [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_base_of_ww_mutex [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_base_of_ww_mutex [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_i_mutex_of_inode [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_i_mutex_of_inode [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_i_mutex_of_inode [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_i_mutex_of_inode [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_i_mutex_of_inode [2018-11-19 17:08:44,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_i_mutex_of_inode [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_lock [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_lock [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_lock [2018-11-19 17:08:44,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_lock [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_lock_of_fb_info [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_lock_of_fb_info [2018-11-19 17:08:44,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_lock_of_fb_info [2018-11-19 17:08:44,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_mutex_of_device [2018-11-19 17:08:44,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_mutex_of_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_mutex_of_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_struct_mutex_of_drm_device [2018-11-19 17:08:44,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_struct_mutex_of_drm_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_struct_mutex_of_drm_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_struct_mutex_of_drm_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_struct_mutex_of_drm_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_update_lock_of_backlight_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_update_lock_of_backlight_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_update_lock_of_backlight_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_update_lock_of_backlight_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_update_lock_of_backlight_device [2018-11-19 17:08:44,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_update_lock_of_backlight_device [2018-11-19 17:08:44,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2018-11-19 17:08:44,996 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-19 17:08:44,996 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-19 17:08:44,996 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-19 17:08:44,996 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_strcpy [2018-11-19 17:08:44,996 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-19 17:08:44,996 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-19 17:08:44,996 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_err_ptr [2018-11-19 17:08:44,996 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure ERR_PTR [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_sub_and_test [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure lock_acquire [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure lock_release [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_trylock [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_8 [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_17 [2018-11-19 17:08:44,997 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_6 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_9 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_10 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_13 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_14 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_20 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_22 [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-19 17:08:44,998 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-19 17:08:44,999 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ptr [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ulong [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_interruptible [2018-11-19 17:08:45,000 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_16 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_5 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_7 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_11 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_12 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_15 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_21 [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_base_of_ww_mutex [2018-11-19 17:08:45,001 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_base_of_ww_mutex [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_base_of_ww_mutex [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_i_mutex_of_inode [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_i_mutex_of_inode [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_lock [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_lock [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_lock_of_fb_info [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_mutex_of_device [2018-11-19 17:08:45,002 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_mutex_of_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_mutex_of_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_struct_mutex_of_drm_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_struct_mutex_of_drm_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_update_lock_of_backlight_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_update_lock_of_backlight_device [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure __devm_request_region [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ioread8 [2018-11-19 17:08:45,003 INFO L130 BoogieDeclarations]: Found specification of procedure ioread16 [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure ioread32 [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure iowrite16 [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure pci_iounmap [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure pci_iomap [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2018-11-19 17:08:45,004 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure kref_sub [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure kref_put [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put_mutex_19 [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure devm_kmalloc [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure devm_kzalloc [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure dev_err [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure dev_warn [2018-11-19 17:08:45,005 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_dword [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_dword [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure pcim_iomap [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_apertures [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure remove_conflicting_framebuffers [2018-11-19 17:08:45,006 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_config_init [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_config_cleanup [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_framebuffer_init [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_framebuffer_cleanup [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_vma_node_offset_addr [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_err [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_helper_mode_fill_fb_struct [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_unref [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_free [2018-11-19 17:08:45,007 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_unreference [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_unreference_unlocked [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_handle_create [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_lookup [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_modeset_init [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_modeset_fini [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_fbdev_fini [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_framebuffer_init [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_driver_load [2018-11-19 17:08:45,008 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_driver_unload [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_gem_create [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_dumb_create [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_gem_free_object [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_dumb_mmap_offset [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_create [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_mm_init [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_mm_fini [2018-11-19 17:08:45,009 INFO L130 BoogieDeclarations]: Found specification of procedure mga_user_framebuffer_destroy [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_user_framebuffer_create [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mga_probe_vram [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vram_init [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_device_init [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_unref [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_mmap_offset [2018-11-19 17:08:45,010 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_15 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_15 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_14 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure printk [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_read [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_47 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_56 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_45 [2018-11-19 17:08:45,011 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_48 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_49 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_52 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_53 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_59 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_55 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_44 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_46 [2018-11-19 17:08:45,012 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_50 [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_51 [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_54 [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure iowrite8 [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure iowrite32 [2018-11-19 17:08:45,013 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_crtc_helper_funcs_12 [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_connector_funcs_8 [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_crtc_funcs_13 [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_connector_helper_funcs_9 [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_encoder_helper_funcs_11 [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_dword [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_dword [2018-11-19 17:08:45,014 INFO L130 BoogieDeclarations]: Found specification of procedure __ww_mutex_lock [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure __ww_mutex_lock_interruptible [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock_interruptible [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_unlock [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_trylock [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure drm_crtc_cleanup [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure drm_connector_init [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure drm_connector_register [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure drm_connector_cleanup [2018-11-19 17:08:45,015 INFO L130 BoogieDeclarations]: Found specification of procedure drm_encoder_init [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_encoder_cleanup [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_get_edid [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_add_edid_modes [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_connector_update_edid_property [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_connector_attach_encoder [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_crtc_set_gamma_size [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_object_find [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_encoder_find [2018-11-19 17:08:45,016 INFO L130 BoogieDeclarations]: Found specification of procedure drm_ut_debug_printk [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_crtc_helper_set_config [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_helper_connector_dpms [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_crtc_helper_add [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_encoder_helper_add [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_connector_helper_add [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_helper_probe_single_connector_modes [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure drm_crtc_init [2018-11-19 17:08:45,017 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_add_to_lru [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_kmap [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_del_sub_from_lru [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure __ttm_bo_reserve [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_reserve [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure __ttm_bo_unreserve [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_unreserve [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_fb_gamma_set [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_fb_gamma_get [2018-11-19 17:08:45,018 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_fbdev_init [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_i2c_create [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_i2c_destroy [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_reserve [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_unreserve [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_pin [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_push_sysram [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_cursor_set [2018-11-19 17:08:45,019 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_cursor_move [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_load_lut [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_wait_vsync [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_wait_busy [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_mode_fixup [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200se_set_plls [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200wb_set_plls [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200ev_set_plls [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200eh_set_plls [2018-11-19 17:08:45,020 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200er_set_plls [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_set_plls [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200wb_prepare [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_g200wb_commit [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_set_start_address [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_do_set_base [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_mode_set_base [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_mode_set [2018-11-19 17:08:45,021 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_dpms [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_prepare [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_commit [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~TO~VOID [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_gamma_set [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_destroy [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_disable [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_crtc_init [2018-11-19 17:08:45,022 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_mode_fixup [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_mode_set [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_dpms [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_prepare [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_commit [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_destroy [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_encoder_init [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vga_get_modes [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vga_calculate_mode_bandwidth [2018-11-19 17:08:45,023 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vga_mode_valid [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure mga_connector_best_encoder [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vga_detect [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure mga_connector_destroy [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure mga_vga_init [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_13 [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_release_12 [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_bind_12 [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_10 [2018-11-19 17:08:45,024 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_8 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_connect_12 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_8 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_11 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_13 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_10 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_9 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_12 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_82 [2018-11-19 17:08:45,025 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_91 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_80 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_83 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_84 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_87 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_88 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_94 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_96 [2018-11-19 17:08:45,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_97 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_90 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_79 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_81 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_85 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_86 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_89 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_95 [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure _dev_info [2018-11-19 17:08:45,027 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock_interruptible___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_trylock___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_kunmap [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure __ttm_bo_reserve___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_reserve___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_reserve___0 [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_unpin [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure mga_hide_cursor [2018-11-19 17:08:45,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_123 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_132 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_121 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_124 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_125 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_128 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_129 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_135 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_131 [2018-11-19 17:08:45,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_120 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_122 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_126 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_127 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_130 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_pci_driver_5 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_file_operations_7 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_fb_helper_funcs_3 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_drm_driver_6 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_fb_ops_4 [2018-11-19 17:08:45,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ttm_bo_driver_1 [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure vgacon_text_force [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure pci_get_drvdata [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_ioctl [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_compat_ioctl [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_open [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_read [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_release [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_poll [2018-11-19 17:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure drm_put_dev [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure drm_pci_init [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure drm_pci_exit [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure drm_get_pci_dev [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure drm_pci_set_busid [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_dumb_destroy [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_mmap [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_kick_out_firmware_fb [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure mga_pci_probe [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure mga_pci_remove [2018-11-19 17:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_init [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_exit [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_shutdown_5 [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_1 [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_2 [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_4 [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_main_exported_3 [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-19 17:08:45,033 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_size_call_parameter [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure strcpy [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_save_flags [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure arch_irqs_disabled_flags [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_158 [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_167 [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_156 [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_159 [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_160 [2018-11-19 17:08:45,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_163 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_164 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_170 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_166 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_155 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_157 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_161 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_162 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_165 [2018-11-19 17:08:45,035 INFO L130 BoogieDeclarations]: Found specification of procedure preempt_count [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure vmalloc [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure vfree [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure sys_fillrect [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure sys_copyarea [2018-11-19 17:08:45,036 INFO L130 BoogieDeclarations]: Found specification of procedure sys_imageblit [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_framebuffer [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure framebuffer_alloc [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure framebuffer_release [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure fb_alloc_cmap [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure fb_dealloc_cmap [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock___1 [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_lock_interruptible___1 [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure ww_mutex_trylock___1 [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure drm_framebuffer_unregister_private [2018-11-19 17:08:45,037 INFO L130 BoogieDeclarations]: Found specification of procedure drm_mode_legacy_fb_format [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_can_sleep [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_prepare [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_init [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_fini [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_blank [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_pan_display [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_set_par [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_check_var [2018-11-19 17:08:45,038 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_fill_var [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_fill_fix [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_setcmap [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_initial_config [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_fb_helper_single_add_all_connectors [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_helper_disable_unused_functions [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure __ttm_bo_reserve___1 [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_reserve___1 [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_unreference_unlocked___0 [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_reserve___1 [2018-11-19 17:08:45,039 INFO L130 BoogieDeclarations]: Found specification of procedure mga_dirty_update [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mga_fillrect [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mga_copyarea [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mga_imageblit [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200fb_create_object [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200fb_create [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_strcpy [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure mga_fbdev_destroy [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure snprintf [2018-11-19 17:08:45,040 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_193 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_202 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_191 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_194 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_195 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_198 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_199 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_205 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_201 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_190 [2018-11-19 17:08:45,041 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_192 [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_196 [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_197 [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_200 [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure i2c_set_adapdata [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure i2c_del_adapter [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure i2c_bit_add_bus [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure mga_i2c_read_gpio [2018-11-19 17:08:45,042 INFO L130 BoogieDeclarations]: Found specification of procedure mga_i2c_set_gpio [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure mga_i2c_set [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure mga_gpio_setsda [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure mga_gpio_setscl [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure mga_gpio_getsda [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure mga_gpio_getscl [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_228 [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_237 [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_226 [2018-11-19 17:08:45,043 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_229 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_230 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_233 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_234 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_240 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_236 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_225 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_227 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_231 [2018-11-19 17:08:45,044 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_232 [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_235 [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure arch_phys_wc_add [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure arch_phys_wc_del [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure drm_global_item_ref [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure drm_global_item_unref [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure drm_vma_node_is_allowed [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure drm_vma_node_verify_access [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_validate [2018-11-19 17:08:45,045 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_dma_acc_size [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_init [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_init_mm [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_mmap [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_mem_global_init [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_mem_global_release [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_tt_init [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_tt_fini [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_global_release [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_global_init [2018-11-19 17:08:45,046 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_device_release [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_device_init [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_bo_move_memcpy [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_release [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure drm_gem_object_init [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_placement [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_pool_populate [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure ttm_pool_unpopulate [2018-11-19 17:08:45,047 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bdev [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_mem_global_init [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_mem_global_release [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_global_init [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_global_release [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_ttm_destroy [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_bo_is_mgag200_bo [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_init_mem_type [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_evict_flags [2018-11-19 17:08:45,048 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_verify_access [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_io_mem_reserve [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_io_mem_free [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_move [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_backend_destroy [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_tt_create [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_tt_populate [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_ttm_tt_unpopulate [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure mgag200_bo_gpu_offset [2018-11-19 17:08:45,049 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_2 [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int_negative [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_ptr_err [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err_or_null [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_base_of_ww_mutex [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_base_of_ww_mutex [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_base_of_ww_mutex [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_base_of_ww_mutex [2018-11-19 17:08:45,050 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_base_of_ww_mutex [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_base_of_ww_mutex [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_base_of_ww_mutex [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_base_of_ww_mutex [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_i_mutex_of_inode [2018-11-19 17:08:45,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_i_mutex_of_inode [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_i_mutex_of_inode [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_i_mutex_of_inode [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_lock [2018-11-19 17:08:45,052 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_lock [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_lock [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_lock [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_lock_of_fb_info [2018-11-19 17:08:45,053 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_lock_of_fb_info [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_lock_of_fb_info [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_lock_of_fb_info [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_mutex_of_device [2018-11-19 17:08:45,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_mutex_of_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_struct_mutex_of_drm_device [2018-11-19 17:08:45,055 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_struct_mutex_of_drm_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_update_lock_of_backlight_device [2018-11-19 17:08:45,056 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-19 17:08:45,057 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-19 17:08:45,057 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-19 17:09:02,241 INFO L271 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-19 17:09:02,242 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 05:09:02 BoogieIcfgContainer [2018-11-19 17:09:02,242 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-19 17:09:02,243 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-19 17:09:02,243 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-19 17:09:02,246 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-19 17:09:02,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.11 05:08:39" (1/3) ... [2018-11-19 17:09:02,247 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21f9bc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 05:09:02, skipping insertion in model container [2018-11-19 17:09:02,247 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:08:44" (2/3) ... [2018-11-19 17:09:02,248 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21f9bc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 05:09:02, skipping insertion in model container [2018-11-19 17:09:02,248 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 05:09:02" (3/3) ... [2018-11-19 17:09:02,249 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-4.2-rc1.tar.xz-32_7a-drivers--gpu--drm--mgag200--mgag200.ko-entry_point_false-unreach-call.cil.out.c [2018-11-19 17:09:02,259 INFO L147 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-19 17:09:02,270 INFO L159 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-19 17:09:02,284 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-19 17:09:02,325 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-19 17:09:02,325 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-19 17:09:02,326 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-19 17:09:02,326 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-19 17:09:02,326 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-19 17:09:02,326 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-19 17:09:02,326 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-19 17:09:02,326 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-19 17:09:02,326 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-19 17:09:02,392 INFO L276 IsEmpty]: Start isEmpty. Operand 3055 states. [2018-11-19 17:09:02,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-19 17:09:02,409 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:09:02,410 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:09:02,412 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:09:02,416 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:09:02,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1948027360, now seen corresponding path program 1 times [2018-11-19 17:09:02,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:09:02,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:09:02,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:09:02,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:09:02,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:09:02,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:09:04,359 INFO L256 TraceCheckUtils]: 0: Hoare triple {3058#true} call ULTIMATE.init(); {3058#true} is VALID [2018-11-19 17:09:04,360 INFO L273 TraceCheckUtils]: 1: Hoare triple {3058#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {3058#true} is VALID [2018-11-19 17:09:04,367 INFO L273 TraceCheckUtils]: 2: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,367 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3058#true} {3058#true} #7183#return; {3058#true} is VALID [2018-11-19 17:09:04,367 INFO L256 TraceCheckUtils]: 4: Hoare triple {3058#true} call #t~ret1890 := main(); {3058#true} is VALID [2018-11-19 17:09:04,368 INFO L273 TraceCheckUtils]: 5: Hoare triple {3058#true} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {3058#true} is VALID [2018-11-19 17:09:04,368 INFO L256 TraceCheckUtils]: 6: Hoare triple {3058#true} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {3058#true} is VALID [2018-11-19 17:09:04,368 INFO L273 TraceCheckUtils]: 7: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,369 INFO L256 TraceCheckUtils]: 8: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,369 INFO L273 TraceCheckUtils]: 9: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,369 INFO L273 TraceCheckUtils]: 10: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,370 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,370 INFO L273 TraceCheckUtils]: 12: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,370 INFO L273 TraceCheckUtils]: 13: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,371 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {3058#true} {3058#true} #6963#return; {3058#true} is VALID [2018-11-19 17:09:04,371 INFO L273 TraceCheckUtils]: 15: Hoare triple {3058#true} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {3058#true} is VALID [2018-11-19 17:09:04,371 INFO L256 TraceCheckUtils]: 16: Hoare triple {3058#true} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {3058#true} is VALID [2018-11-19 17:09:04,371 INFO L273 TraceCheckUtils]: 17: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,372 INFO L256 TraceCheckUtils]: 18: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,372 INFO L273 TraceCheckUtils]: 19: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,373 INFO L273 TraceCheckUtils]: 20: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,373 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,373 INFO L273 TraceCheckUtils]: 22: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,373 INFO L273 TraceCheckUtils]: 23: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,374 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {3058#true} {3058#true} #6965#return; {3058#true} is VALID [2018-11-19 17:09:04,374 INFO L273 TraceCheckUtils]: 25: Hoare triple {3058#true} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {3058#true} is VALID [2018-11-19 17:09:04,374 INFO L256 TraceCheckUtils]: 26: Hoare triple {3058#true} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {3058#true} is VALID [2018-11-19 17:09:04,375 INFO L273 TraceCheckUtils]: 27: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,375 INFO L256 TraceCheckUtils]: 28: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,375 INFO L273 TraceCheckUtils]: 29: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,375 INFO L273 TraceCheckUtils]: 30: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,376 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,376 INFO L273 TraceCheckUtils]: 32: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,376 INFO L273 TraceCheckUtils]: 33: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,377 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {3058#true} {3058#true} #6967#return; {3058#true} is VALID [2018-11-19 17:09:04,377 INFO L273 TraceCheckUtils]: 35: Hoare triple {3058#true} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {3058#true} is VALID [2018-11-19 17:09:04,377 INFO L256 TraceCheckUtils]: 36: Hoare triple {3058#true} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {3058#true} is VALID [2018-11-19 17:09:04,377 INFO L273 TraceCheckUtils]: 37: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,378 INFO L256 TraceCheckUtils]: 38: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,378 INFO L273 TraceCheckUtils]: 39: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,378 INFO L273 TraceCheckUtils]: 40: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,379 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,379 INFO L273 TraceCheckUtils]: 42: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,379 INFO L273 TraceCheckUtils]: 43: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,379 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {3058#true} {3058#true} #6969#return; {3058#true} is VALID [2018-11-19 17:09:04,380 INFO L273 TraceCheckUtils]: 45: Hoare triple {3058#true} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {3058#true} is VALID [2018-11-19 17:09:04,380 INFO L256 TraceCheckUtils]: 46: Hoare triple {3058#true} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {3058#true} is VALID [2018-11-19 17:09:04,380 INFO L273 TraceCheckUtils]: 47: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,380 INFO L256 TraceCheckUtils]: 48: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,381 INFO L273 TraceCheckUtils]: 49: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,381 INFO L273 TraceCheckUtils]: 50: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,381 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,382 INFO L273 TraceCheckUtils]: 52: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,382 INFO L273 TraceCheckUtils]: 53: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,382 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {3058#true} {3058#true} #6971#return; {3058#true} is VALID [2018-11-19 17:09:04,382 INFO L273 TraceCheckUtils]: 55: Hoare triple {3058#true} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {3058#true} is VALID [2018-11-19 17:09:04,383 INFO L256 TraceCheckUtils]: 56: Hoare triple {3058#true} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {3058#true} is VALID [2018-11-19 17:09:04,383 INFO L273 TraceCheckUtils]: 57: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,383 INFO L256 TraceCheckUtils]: 58: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,384 INFO L273 TraceCheckUtils]: 59: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,384 INFO L273 TraceCheckUtils]: 60: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,384 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,385 INFO L273 TraceCheckUtils]: 62: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,385 INFO L273 TraceCheckUtils]: 63: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,385 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {3058#true} {3058#true} #6973#return; {3058#true} is VALID [2018-11-19 17:09:04,385 INFO L273 TraceCheckUtils]: 65: Hoare triple {3058#true} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {3058#true} is VALID [2018-11-19 17:09:04,386 INFO L256 TraceCheckUtils]: 66: Hoare triple {3058#true} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {3058#true} is VALID [2018-11-19 17:09:04,386 INFO L273 TraceCheckUtils]: 67: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,386 INFO L256 TraceCheckUtils]: 68: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,387 INFO L273 TraceCheckUtils]: 69: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,387 INFO L273 TraceCheckUtils]: 70: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,387 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,387 INFO L273 TraceCheckUtils]: 72: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,388 INFO L273 TraceCheckUtils]: 73: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,388 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {3058#true} {3058#true} #6975#return; {3058#true} is VALID [2018-11-19 17:09:04,388 INFO L273 TraceCheckUtils]: 75: Hoare triple {3058#true} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,389 INFO L256 TraceCheckUtils]: 76: Hoare triple {3058#true} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {3058#true} is VALID [2018-11-19 17:09:04,389 INFO L273 TraceCheckUtils]: 77: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,389 INFO L256 TraceCheckUtils]: 78: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,390 INFO L273 TraceCheckUtils]: 79: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,390 INFO L273 TraceCheckUtils]: 80: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,390 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,390 INFO L273 TraceCheckUtils]: 82: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,391 INFO L273 TraceCheckUtils]: 83: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,391 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {3058#true} {3058#true} #6977#return; {3058#true} is VALID [2018-11-19 17:09:04,391 INFO L273 TraceCheckUtils]: 85: Hoare triple {3058#true} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,391 INFO L256 TraceCheckUtils]: 86: Hoare triple {3058#true} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {3058#true} is VALID [2018-11-19 17:09:04,392 INFO L273 TraceCheckUtils]: 87: Hoare triple {3058#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,392 INFO L256 TraceCheckUtils]: 88: Hoare triple {3058#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,392 INFO L273 TraceCheckUtils]: 89: Hoare triple {3058#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3058#true} is VALID [2018-11-19 17:09:04,392 INFO L273 TraceCheckUtils]: 90: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,393 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {3058#true} {3058#true} #6937#return; {3058#true} is VALID [2018-11-19 17:09:04,393 INFO L273 TraceCheckUtils]: 92: Hoare triple {3058#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3058#true} is VALID [2018-11-19 17:09:04,393 INFO L273 TraceCheckUtils]: 93: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,394 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {3058#true} {3058#true} #6979#return; {3058#true} is VALID [2018-11-19 17:09:04,394 INFO L273 TraceCheckUtils]: 95: Hoare triple {3058#true} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {3058#true} is VALID [2018-11-19 17:09:04,394 INFO L256 TraceCheckUtils]: 96: Hoare triple {3058#true} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {3058#true} is VALID [2018-11-19 17:09:04,394 INFO L273 TraceCheckUtils]: 97: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,395 INFO L256 TraceCheckUtils]: 98: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,395 INFO L273 TraceCheckUtils]: 99: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,395 INFO L273 TraceCheckUtils]: 100: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,396 INFO L273 TraceCheckUtils]: 101: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,396 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,396 INFO L273 TraceCheckUtils]: 103: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,396 INFO L273 TraceCheckUtils]: 104: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,397 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {3058#true} {3058#true} #6981#return; {3058#true} is VALID [2018-11-19 17:09:04,397 INFO L273 TraceCheckUtils]: 106: Hoare triple {3058#true} havoc #t~ret1298.base, #t~ret1298.offset; {3058#true} is VALID [2018-11-19 17:09:04,397 INFO L256 TraceCheckUtils]: 107: Hoare triple {3058#true} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {3058#true} is VALID [2018-11-19 17:09:04,398 INFO L273 TraceCheckUtils]: 108: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,398 INFO L256 TraceCheckUtils]: 109: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,398 INFO L273 TraceCheckUtils]: 110: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,398 INFO L273 TraceCheckUtils]: 111: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,399 INFO L273 TraceCheckUtils]: 112: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,399 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,399 INFO L273 TraceCheckUtils]: 114: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,400 INFO L273 TraceCheckUtils]: 115: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,400 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {3058#true} {3058#true} #6983#return; {3058#true} is VALID [2018-11-19 17:09:04,400 INFO L273 TraceCheckUtils]: 117: Hoare triple {3058#true} havoc #t~ret1299.base, #t~ret1299.offset; {3058#true} is VALID [2018-11-19 17:09:04,400 INFO L256 TraceCheckUtils]: 118: Hoare triple {3058#true} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {3058#true} is VALID [2018-11-19 17:09:04,401 INFO L273 TraceCheckUtils]: 119: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,401 INFO L256 TraceCheckUtils]: 120: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,401 INFO L273 TraceCheckUtils]: 121: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,401 INFO L273 TraceCheckUtils]: 122: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,402 INFO L273 TraceCheckUtils]: 123: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,402 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,402 INFO L273 TraceCheckUtils]: 125: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,403 INFO L273 TraceCheckUtils]: 126: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,403 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {3058#true} {3058#true} #6985#return; {3058#true} is VALID [2018-11-19 17:09:04,403 INFO L273 TraceCheckUtils]: 128: Hoare triple {3058#true} havoc #t~ret1300.base, #t~ret1300.offset; {3058#true} is VALID [2018-11-19 17:09:04,403 INFO L256 TraceCheckUtils]: 129: Hoare triple {3058#true} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {3058#true} is VALID [2018-11-19 17:09:04,404 INFO L273 TraceCheckUtils]: 130: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,404 INFO L256 TraceCheckUtils]: 131: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,404 INFO L273 TraceCheckUtils]: 132: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,404 INFO L273 TraceCheckUtils]: 133: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,405 INFO L273 TraceCheckUtils]: 134: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,405 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,405 INFO L273 TraceCheckUtils]: 136: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,405 INFO L273 TraceCheckUtils]: 137: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,406 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {3058#true} {3058#true} #6987#return; {3058#true} is VALID [2018-11-19 17:09:04,406 INFO L273 TraceCheckUtils]: 139: Hoare triple {3058#true} havoc #t~ret1301.base, #t~ret1301.offset; {3058#true} is VALID [2018-11-19 17:09:04,406 INFO L256 TraceCheckUtils]: 140: Hoare triple {3058#true} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {3058#true} is VALID [2018-11-19 17:09:04,406 INFO L273 TraceCheckUtils]: 141: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,407 INFO L256 TraceCheckUtils]: 142: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,407 INFO L273 TraceCheckUtils]: 143: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,407 INFO L273 TraceCheckUtils]: 144: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,407 INFO L273 TraceCheckUtils]: 145: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,408 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,408 INFO L273 TraceCheckUtils]: 147: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,408 INFO L273 TraceCheckUtils]: 148: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,409 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {3058#true} {3058#true} #6989#return; {3058#true} is VALID [2018-11-19 17:09:04,409 INFO L273 TraceCheckUtils]: 150: Hoare triple {3058#true} havoc #t~ret1302.base, #t~ret1302.offset; {3058#true} is VALID [2018-11-19 17:09:04,409 INFO L256 TraceCheckUtils]: 151: Hoare triple {3058#true} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {3058#true} is VALID [2018-11-19 17:09:04,409 INFO L273 TraceCheckUtils]: 152: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,410 INFO L256 TraceCheckUtils]: 153: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,410 INFO L273 TraceCheckUtils]: 154: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,410 INFO L273 TraceCheckUtils]: 155: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,410 INFO L273 TraceCheckUtils]: 156: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,411 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,411 INFO L273 TraceCheckUtils]: 158: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,411 INFO L273 TraceCheckUtils]: 159: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,411 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {3058#true} {3058#true} #6991#return; {3058#true} is VALID [2018-11-19 17:09:04,412 INFO L273 TraceCheckUtils]: 161: Hoare triple {3058#true} havoc #t~ret1303.base, #t~ret1303.offset; {3058#true} is VALID [2018-11-19 17:09:04,412 INFO L256 TraceCheckUtils]: 162: Hoare triple {3058#true} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {3058#true} is VALID [2018-11-19 17:09:04,412 INFO L273 TraceCheckUtils]: 163: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,413 INFO L256 TraceCheckUtils]: 164: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,413 INFO L273 TraceCheckUtils]: 165: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,413 INFO L273 TraceCheckUtils]: 166: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,413 INFO L273 TraceCheckUtils]: 167: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,414 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,414 INFO L273 TraceCheckUtils]: 169: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,414 INFO L273 TraceCheckUtils]: 170: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,414 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {3058#true} {3058#true} #6993#return; {3058#true} is VALID [2018-11-19 17:09:04,415 INFO L273 TraceCheckUtils]: 172: Hoare triple {3058#true} havoc #t~ret1304.base, #t~ret1304.offset; {3058#true} is VALID [2018-11-19 17:09:04,415 INFO L256 TraceCheckUtils]: 173: Hoare triple {3058#true} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {3058#true} is VALID [2018-11-19 17:09:04,415 INFO L273 TraceCheckUtils]: 174: Hoare triple {3058#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,415 INFO L256 TraceCheckUtils]: 175: Hoare triple {3058#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3058#true} is VALID [2018-11-19 17:09:04,416 INFO L273 TraceCheckUtils]: 176: Hoare triple {3058#true} #t~loopctr1891 := 0; {3058#true} is VALID [2018-11-19 17:09:04,416 INFO L273 TraceCheckUtils]: 177: Hoare triple {3058#true} assume !(#t~loopctr1891 < #amount); {3058#true} is VALID [2018-11-19 17:09:04,416 INFO L273 TraceCheckUtils]: 178: Hoare triple {3058#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3058#true} is VALID [2018-11-19 17:09:04,416 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {3058#true} {3058#true} #7575#return; {3058#true} is VALID [2018-11-19 17:09:04,417 INFO L273 TraceCheckUtils]: 180: Hoare triple {3058#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {3058#true} is VALID [2018-11-19 17:09:04,417 INFO L273 TraceCheckUtils]: 181: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,417 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {3058#true} {3058#true} #6995#return; {3058#true} is VALID [2018-11-19 17:09:04,425 INFO L273 TraceCheckUtils]: 183: Hoare triple {3058#true} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,426 INFO L273 TraceCheckUtils]: 184: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,428 INFO L273 TraceCheckUtils]: 185: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,428 INFO L273 TraceCheckUtils]: 186: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,430 INFO L273 TraceCheckUtils]: 187: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,433 INFO L273 TraceCheckUtils]: 188: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,437 INFO L273 TraceCheckUtils]: 189: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume #t~switch1307; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,438 INFO L273 TraceCheckUtils]: 190: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,443 INFO L273 TraceCheckUtils]: 191: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume #t~switch1325; {3060#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:09:04,448 INFO L273 TraceCheckUtils]: 192: Hoare triple {3060#(= 1 ~ldv_state_variable_0~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {3059#false} is VALID [2018-11-19 17:09:04,449 INFO L256 TraceCheckUtils]: 193: Hoare triple {3059#false} call mgag200_exit(); {3058#true} is VALID [2018-11-19 17:09:04,449 INFO L273 TraceCheckUtils]: 194: Hoare triple {3058#true} call drm_pci_exit(~#driver~0.base, ~#driver~0.offset, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset); {3058#true} is VALID [2018-11-19 17:09:04,449 INFO L273 TraceCheckUtils]: 195: Hoare triple {3058#true} assume true; {3058#true} is VALID [2018-11-19 17:09:04,449 INFO L268 TraceCheckUtils]: 196: Hoare quadruple {3058#true} {3059#false} #7009#return; {3059#false} is VALID [2018-11-19 17:09:04,450 INFO L273 TraceCheckUtils]: 197: Hoare triple {3059#false} ~ldv_state_variable_0~0 := 2; {3059#false} is VALID [2018-11-19 17:09:04,450 INFO L256 TraceCheckUtils]: 198: Hoare triple {3059#false} call ldv_check_final_state(); {3059#false} is VALID [2018-11-19 17:09:04,450 INFO L273 TraceCheckUtils]: 199: Hoare triple {3059#false} assume 1 != ~ldv_mutex_base_of_ww_mutex~0; {3059#false} is VALID [2018-11-19 17:09:04,450 INFO L256 TraceCheckUtils]: 200: Hoare triple {3059#false} call ldv_error(); {3059#false} is VALID [2018-11-19 17:09:04,451 INFO L273 TraceCheckUtils]: 201: Hoare triple {3059#false} assume !false; {3059#false} is VALID [2018-11-19 17:09:04,490 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:09:04,493 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:09:04,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:09:04,500 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2018-11-19 17:09:04,504 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:09:04,509 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:09:04,735 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:09:04,736 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:09:04,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:09:04,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:09:04,748 INFO L87 Difference]: Start difference. First operand 3055 states. Second operand 3 states. [2018-11-19 17:09:28,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:09:28,236 INFO L93 Difference]: Finished difference Result 7203 states and 10186 transitions. [2018-11-19 17:09:28,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:09:28,237 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2018-11-19 17:09:28,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:09:28,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:09:28,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 10186 transitions. [2018-11-19 17:09:28,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:09:29,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 10186 transitions. [2018-11-19 17:09:29,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 10186 transitions. [2018-11-19 17:09:38,313 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 10186 edges. 10186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:09:39,566 INFO L225 Difference]: With dead ends: 7203 [2018-11-19 17:09:39,567 INFO L226 Difference]: Without dead ends: 4708 [2018-11-19 17:09:39,581 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:09:39,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4708 states. [2018-11-19 17:09:40,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4708 to 4701. [2018-11-19 17:09:40,978 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:09:40,979 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4708 states. Second operand 4701 states. [2018-11-19 17:09:40,979 INFO L74 IsIncluded]: Start isIncluded. First operand 4708 states. Second operand 4701 states. [2018-11-19 17:09:40,979 INFO L87 Difference]: Start difference. First operand 4708 states. Second operand 4701 states. [2018-11-19 17:09:42,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:09:42,195 INFO L93 Difference]: Finished difference Result 4708 states and 6497 transitions. [2018-11-19 17:09:42,195 INFO L276 IsEmpty]: Start isEmpty. Operand 4708 states and 6497 transitions. [2018-11-19 17:09:42,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:09:42,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:09:42,222 INFO L74 IsIncluded]: Start isIncluded. First operand 4701 states. Second operand 4708 states. [2018-11-19 17:09:42,223 INFO L87 Difference]: Start difference. First operand 4701 states. Second operand 4708 states. [2018-11-19 17:09:43,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:09:43,432 INFO L93 Difference]: Finished difference Result 4708 states and 6497 transitions. [2018-11-19 17:09:43,432 INFO L276 IsEmpty]: Start isEmpty. Operand 4708 states and 6497 transitions. [2018-11-19 17:09:43,452 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:09:43,452 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:09:43,453 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:09:43,453 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:09:43,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4701 states. [2018-11-19 17:09:44,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4701 states to 4701 states and 6491 transitions. [2018-11-19 17:09:44,654 INFO L78 Accepts]: Start accepts. Automaton has 4701 states and 6491 transitions. Word has length 202 [2018-11-19 17:09:44,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:09:44,654 INFO L480 AbstractCegarLoop]: Abstraction has 4701 states and 6491 transitions. [2018-11-19 17:09:44,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:09:44,655 INFO L276 IsEmpty]: Start isEmpty. Operand 4701 states and 6491 transitions. [2018-11-19 17:09:44,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-11-19 17:09:44,660 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:09:44,660 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:09:44,660 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:09:44,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:09:44,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1393232970, now seen corresponding path program 1 times [2018-11-19 17:09:44,661 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:09:44,661 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:09:44,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:09:44,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:09:44,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:09:44,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:09:46,094 INFO L256 TraceCheckUtils]: 0: Hoare triple {28363#true} call ULTIMATE.init(); {28363#true} is VALID [2018-11-19 17:09:46,095 INFO L273 TraceCheckUtils]: 1: Hoare triple {28363#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {28363#true} is VALID [2018-11-19 17:09:46,096 INFO L273 TraceCheckUtils]: 2: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,097 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {28363#true} {28363#true} #7183#return; {28363#true} is VALID [2018-11-19 17:09:46,097 INFO L256 TraceCheckUtils]: 4: Hoare triple {28363#true} call #t~ret1890 := main(); {28363#true} is VALID [2018-11-19 17:09:46,097 INFO L273 TraceCheckUtils]: 5: Hoare triple {28363#true} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {28363#true} is VALID [2018-11-19 17:09:46,097 INFO L256 TraceCheckUtils]: 6: Hoare triple {28363#true} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {28363#true} is VALID [2018-11-19 17:09:46,098 INFO L273 TraceCheckUtils]: 7: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,098 INFO L256 TraceCheckUtils]: 8: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,098 INFO L273 TraceCheckUtils]: 9: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,098 INFO L273 TraceCheckUtils]: 10: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,098 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,099 INFO L273 TraceCheckUtils]: 12: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,099 INFO L273 TraceCheckUtils]: 13: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,099 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {28363#true} {28363#true} #6963#return; {28363#true} is VALID [2018-11-19 17:09:46,099 INFO L273 TraceCheckUtils]: 15: Hoare triple {28363#true} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {28363#true} is VALID [2018-11-19 17:09:46,100 INFO L256 TraceCheckUtils]: 16: Hoare triple {28363#true} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {28363#true} is VALID [2018-11-19 17:09:46,100 INFO L273 TraceCheckUtils]: 17: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,100 INFO L256 TraceCheckUtils]: 18: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,100 INFO L273 TraceCheckUtils]: 19: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,101 INFO L273 TraceCheckUtils]: 20: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,101 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,101 INFO L273 TraceCheckUtils]: 22: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,101 INFO L273 TraceCheckUtils]: 23: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,102 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {28363#true} {28363#true} #6965#return; {28363#true} is VALID [2018-11-19 17:09:46,102 INFO L273 TraceCheckUtils]: 25: Hoare triple {28363#true} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {28363#true} is VALID [2018-11-19 17:09:46,102 INFO L256 TraceCheckUtils]: 26: Hoare triple {28363#true} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {28363#true} is VALID [2018-11-19 17:09:46,102 INFO L273 TraceCheckUtils]: 27: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,102 INFO L256 TraceCheckUtils]: 28: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,103 INFO L273 TraceCheckUtils]: 29: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,103 INFO L273 TraceCheckUtils]: 30: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,103 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,103 INFO L273 TraceCheckUtils]: 32: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,103 INFO L273 TraceCheckUtils]: 33: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,104 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {28363#true} {28363#true} #6967#return; {28363#true} is VALID [2018-11-19 17:09:46,104 INFO L273 TraceCheckUtils]: 35: Hoare triple {28363#true} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {28363#true} is VALID [2018-11-19 17:09:46,104 INFO L256 TraceCheckUtils]: 36: Hoare triple {28363#true} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {28363#true} is VALID [2018-11-19 17:09:46,104 INFO L273 TraceCheckUtils]: 37: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,104 INFO L256 TraceCheckUtils]: 38: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L273 TraceCheckUtils]: 39: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L273 TraceCheckUtils]: 40: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L273 TraceCheckUtils]: 42: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L273 TraceCheckUtils]: 43: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {28363#true} {28363#true} #6969#return; {28363#true} is VALID [2018-11-19 17:09:46,105 INFO L273 TraceCheckUtils]: 45: Hoare triple {28363#true} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {28363#true} is VALID [2018-11-19 17:09:46,106 INFO L256 TraceCheckUtils]: 46: Hoare triple {28363#true} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {28363#true} is VALID [2018-11-19 17:09:46,106 INFO L273 TraceCheckUtils]: 47: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,106 INFO L256 TraceCheckUtils]: 48: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,106 INFO L273 TraceCheckUtils]: 49: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,106 INFO L273 TraceCheckUtils]: 50: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,107 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,107 INFO L273 TraceCheckUtils]: 52: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,107 INFO L273 TraceCheckUtils]: 53: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,107 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {28363#true} {28363#true} #6971#return; {28363#true} is VALID [2018-11-19 17:09:46,107 INFO L273 TraceCheckUtils]: 55: Hoare triple {28363#true} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {28363#true} is VALID [2018-11-19 17:09:46,108 INFO L256 TraceCheckUtils]: 56: Hoare triple {28363#true} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {28363#true} is VALID [2018-11-19 17:09:46,108 INFO L273 TraceCheckUtils]: 57: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,108 INFO L256 TraceCheckUtils]: 58: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,108 INFO L273 TraceCheckUtils]: 59: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,108 INFO L273 TraceCheckUtils]: 60: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,109 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,109 INFO L273 TraceCheckUtils]: 62: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,109 INFO L273 TraceCheckUtils]: 63: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,109 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {28363#true} {28363#true} #6973#return; {28363#true} is VALID [2018-11-19 17:09:46,109 INFO L273 TraceCheckUtils]: 65: Hoare triple {28363#true} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L256 TraceCheckUtils]: 66: Hoare triple {28363#true} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L273 TraceCheckUtils]: 67: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L256 TraceCheckUtils]: 68: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L273 TraceCheckUtils]: 69: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L273 TraceCheckUtils]: 70: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,110 INFO L273 TraceCheckUtils]: 72: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L273 TraceCheckUtils]: 73: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {28363#true} {28363#true} #6975#return; {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L273 TraceCheckUtils]: 75: Hoare triple {28363#true} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L256 TraceCheckUtils]: 76: Hoare triple {28363#true} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L273 TraceCheckUtils]: 77: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L256 TraceCheckUtils]: 78: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,111 INFO L273 TraceCheckUtils]: 79: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L273 TraceCheckUtils]: 80: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L273 TraceCheckUtils]: 82: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L273 TraceCheckUtils]: 83: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {28363#true} {28363#true} #6977#return; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L273 TraceCheckUtils]: 85: Hoare triple {28363#true} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,112 INFO L256 TraceCheckUtils]: 86: Hoare triple {28363#true} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L273 TraceCheckUtils]: 87: Hoare triple {28363#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L256 TraceCheckUtils]: 88: Hoare triple {28363#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L273 TraceCheckUtils]: 89: Hoare triple {28363#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L273 TraceCheckUtils]: 90: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {28363#true} {28363#true} #6937#return; {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L273 TraceCheckUtils]: 92: Hoare triple {28363#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L273 TraceCheckUtils]: 93: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,113 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {28363#true} {28363#true} #6979#return; {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L273 TraceCheckUtils]: 95: Hoare triple {28363#true} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L256 TraceCheckUtils]: 96: Hoare triple {28363#true} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L273 TraceCheckUtils]: 97: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L256 TraceCheckUtils]: 98: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L273 TraceCheckUtils]: 99: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L273 TraceCheckUtils]: 100: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,114 INFO L273 TraceCheckUtils]: 101: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L273 TraceCheckUtils]: 103: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L273 TraceCheckUtils]: 104: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {28363#true} {28363#true} #6981#return; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L273 TraceCheckUtils]: 106: Hoare triple {28363#true} havoc #t~ret1298.base, #t~ret1298.offset; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L256 TraceCheckUtils]: 107: Hoare triple {28363#true} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L273 TraceCheckUtils]: 108: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,115 INFO L256 TraceCheckUtils]: 109: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L273 TraceCheckUtils]: 110: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L273 TraceCheckUtils]: 111: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L273 TraceCheckUtils]: 112: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L273 TraceCheckUtils]: 114: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L273 TraceCheckUtils]: 115: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,116 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {28363#true} {28363#true} #6983#return; {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L273 TraceCheckUtils]: 117: Hoare triple {28363#true} havoc #t~ret1299.base, #t~ret1299.offset; {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L256 TraceCheckUtils]: 118: Hoare triple {28363#true} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L273 TraceCheckUtils]: 119: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L256 TraceCheckUtils]: 120: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L273 TraceCheckUtils]: 121: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L273 TraceCheckUtils]: 122: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,117 INFO L273 TraceCheckUtils]: 123: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L273 TraceCheckUtils]: 125: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L273 TraceCheckUtils]: 126: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {28363#true} {28363#true} #6985#return; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L273 TraceCheckUtils]: 128: Hoare triple {28363#true} havoc #t~ret1300.base, #t~ret1300.offset; {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L256 TraceCheckUtils]: 129: Hoare triple {28363#true} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {28363#true} is VALID [2018-11-19 17:09:46,118 INFO L273 TraceCheckUtils]: 130: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,119 INFO L256 TraceCheckUtils]: 131: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,119 INFO L273 TraceCheckUtils]: 132: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,119 INFO L273 TraceCheckUtils]: 133: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,119 INFO L273 TraceCheckUtils]: 134: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,119 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,120 INFO L273 TraceCheckUtils]: 136: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,120 INFO L273 TraceCheckUtils]: 137: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,120 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {28363#true} {28363#true} #6987#return; {28363#true} is VALID [2018-11-19 17:09:46,120 INFO L273 TraceCheckUtils]: 139: Hoare triple {28363#true} havoc #t~ret1301.base, #t~ret1301.offset; {28363#true} is VALID [2018-11-19 17:09:46,120 INFO L256 TraceCheckUtils]: 140: Hoare triple {28363#true} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {28363#true} is VALID [2018-11-19 17:09:46,121 INFO L273 TraceCheckUtils]: 141: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,121 INFO L256 TraceCheckUtils]: 142: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,121 INFO L273 TraceCheckUtils]: 143: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,121 INFO L273 TraceCheckUtils]: 144: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,121 INFO L273 TraceCheckUtils]: 145: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,122 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,122 INFO L273 TraceCheckUtils]: 147: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,122 INFO L273 TraceCheckUtils]: 148: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,122 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {28363#true} {28363#true} #6989#return; {28363#true} is VALID [2018-11-19 17:09:46,122 INFO L273 TraceCheckUtils]: 150: Hoare triple {28363#true} havoc #t~ret1302.base, #t~ret1302.offset; {28363#true} is VALID [2018-11-19 17:09:46,123 INFO L256 TraceCheckUtils]: 151: Hoare triple {28363#true} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {28363#true} is VALID [2018-11-19 17:09:46,123 INFO L273 TraceCheckUtils]: 152: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,123 INFO L256 TraceCheckUtils]: 153: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,123 INFO L273 TraceCheckUtils]: 154: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,123 INFO L273 TraceCheckUtils]: 155: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,124 INFO L273 TraceCheckUtils]: 156: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,124 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,124 INFO L273 TraceCheckUtils]: 158: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,124 INFO L273 TraceCheckUtils]: 159: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,124 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {28363#true} {28363#true} #6991#return; {28363#true} is VALID [2018-11-19 17:09:46,125 INFO L273 TraceCheckUtils]: 161: Hoare triple {28363#true} havoc #t~ret1303.base, #t~ret1303.offset; {28363#true} is VALID [2018-11-19 17:09:46,125 INFO L256 TraceCheckUtils]: 162: Hoare triple {28363#true} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {28363#true} is VALID [2018-11-19 17:09:46,125 INFO L273 TraceCheckUtils]: 163: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,125 INFO L256 TraceCheckUtils]: 164: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,125 INFO L273 TraceCheckUtils]: 165: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,126 INFO L273 TraceCheckUtils]: 166: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,126 INFO L273 TraceCheckUtils]: 167: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,126 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,126 INFO L273 TraceCheckUtils]: 169: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,127 INFO L273 TraceCheckUtils]: 170: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,127 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {28363#true} {28363#true} #6993#return; {28363#true} is VALID [2018-11-19 17:09:46,127 INFO L273 TraceCheckUtils]: 172: Hoare triple {28363#true} havoc #t~ret1304.base, #t~ret1304.offset; {28363#true} is VALID [2018-11-19 17:09:46,127 INFO L256 TraceCheckUtils]: 173: Hoare triple {28363#true} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {28363#true} is VALID [2018-11-19 17:09:46,127 INFO L273 TraceCheckUtils]: 174: Hoare triple {28363#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,128 INFO L256 TraceCheckUtils]: 175: Hoare triple {28363#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {28363#true} is VALID [2018-11-19 17:09:46,128 INFO L273 TraceCheckUtils]: 176: Hoare triple {28363#true} #t~loopctr1891 := 0; {28363#true} is VALID [2018-11-19 17:09:46,128 INFO L273 TraceCheckUtils]: 177: Hoare triple {28363#true} assume !(#t~loopctr1891 < #amount); {28363#true} is VALID [2018-11-19 17:09:46,128 INFO L273 TraceCheckUtils]: 178: Hoare triple {28363#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {28363#true} is VALID [2018-11-19 17:09:46,128 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {28363#true} {28363#true} #7575#return; {28363#true} is VALID [2018-11-19 17:09:46,129 INFO L273 TraceCheckUtils]: 180: Hoare triple {28363#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {28363#true} is VALID [2018-11-19 17:09:46,129 INFO L273 TraceCheckUtils]: 181: Hoare triple {28363#true} assume true; {28363#true} is VALID [2018-11-19 17:09:46,129 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {28363#true} {28363#true} #6995#return; {28363#true} is VALID [2018-11-19 17:09:46,132 INFO L273 TraceCheckUtils]: 183: Hoare triple {28363#true} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,133 INFO L273 TraceCheckUtils]: 184: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,133 INFO L273 TraceCheckUtils]: 185: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,137 INFO L273 TraceCheckUtils]: 186: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,138 INFO L273 TraceCheckUtils]: 187: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,139 INFO L273 TraceCheckUtils]: 188: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,139 INFO L273 TraceCheckUtils]: 189: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 5 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,139 INFO L273 TraceCheckUtils]: 190: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 6 == ~tmp___8~2; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,141 INFO L273 TraceCheckUtils]: 191: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume #t~switch1307; {28365#(= ~ldv_state_variable_6~0 0)} is VALID [2018-11-19 17:09:46,141 INFO L273 TraceCheckUtils]: 192: Hoare triple {28365#(= ~ldv_state_variable_6~0 0)} assume 0 != ~ldv_state_variable_6~0;assume -2147483648 <= #t~nondet1327 && #t~nondet1327 <= 2147483647;~tmp___11~1 := #t~nondet1327;havoc #t~nondet1327;#t~switch1328 := 0 == ~tmp___11~1; {28364#false} is VALID [2018-11-19 17:09:46,141 INFO L273 TraceCheckUtils]: 193: Hoare triple {28364#false} assume !#t~switch1328;#t~switch1328 := #t~switch1328 || 1 == ~tmp___11~1; {28364#false} is VALID [2018-11-19 17:09:46,142 INFO L273 TraceCheckUtils]: 194: Hoare triple {28364#false} assume !#t~switch1328;#t~switch1328 := #t~switch1328 || 2 == ~tmp___11~1; {28364#false} is VALID [2018-11-19 17:09:46,142 INFO L273 TraceCheckUtils]: 195: Hoare triple {28364#false} assume #t~switch1328; {28364#false} is VALID [2018-11-19 17:09:46,142 INFO L273 TraceCheckUtils]: 196: Hoare triple {28364#false} assume 1 == ~ldv_state_variable_6~0;call #t~mem1333 := read~int(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 4); {28364#false} is VALID [2018-11-19 17:09:46,142 INFO L256 TraceCheckUtils]: 197: Hoare triple {28364#false} call #t~ret1334 := mgag200_dumb_mmap_offset(~driver_group0~0.base, ~driver_group0~0.offset, ~driver_group1~0.base, ~driver_group1~0.offset, #t~mem1333, ~ldvarg38~0.base, ~ldvarg38~0.offset); {28364#false} is VALID [2018-11-19 17:09:46,142 INFO L273 TraceCheckUtils]: 198: Hoare triple {28364#false} ~file.base, ~file.offset := #in~file.base, #in~file.offset;~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~handle := #in~handle;~offset.base, ~offset.offset := #in~offset.base, #in~offset.offset;havoc ~obj~1.base, ~obj~1.offset;havoc ~ret~5;havoc ~bo~0.base, ~bo~0.offset;havoc ~__mptr~2.base, ~__mptr~2.offset; {28364#false} is VALID [2018-11-19 17:09:46,143 INFO L256 TraceCheckUtils]: 199: Hoare triple {28364#false} call ldv_mutex_lock_21(~dev.base, 92 + ~dev.offset); {28364#false} is VALID [2018-11-19 17:09:46,143 INFO L273 TraceCheckUtils]: 200: Hoare triple {28364#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset; {28364#false} is VALID [2018-11-19 17:09:46,143 INFO L256 TraceCheckUtils]: 201: Hoare triple {28364#false} call ldv_mutex_lock_struct_mutex_of_drm_device(~ldv_func_arg1.base, ~ldv_func_arg1.offset); {28364#false} is VALID [2018-11-19 17:09:46,143 INFO L273 TraceCheckUtils]: 202: Hoare triple {28364#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {28364#false} is VALID [2018-11-19 17:09:46,144 INFO L273 TraceCheckUtils]: 203: Hoare triple {28364#false} assume 1 != ~ldv_mutex_struct_mutex_of_drm_device~0; {28364#false} is VALID [2018-11-19 17:09:46,144 INFO L256 TraceCheckUtils]: 204: Hoare triple {28364#false} call ldv_error(); {28364#false} is VALID [2018-11-19 17:09:46,144 INFO L273 TraceCheckUtils]: 205: Hoare triple {28364#false} assume !false; {28364#false} is VALID [2018-11-19 17:09:46,165 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:09:46,166 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:09:46,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:09:46,168 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 206 [2018-11-19 17:09:46,169 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:09:46,169 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:09:46,374 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:09:46,374 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:09:46,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:09:46,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:09:46,375 INFO L87 Difference]: Start difference. First operand 4701 states and 6491 transitions. Second operand 3 states. [2018-11-19 17:10:11,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:10:11,903 INFO L93 Difference]: Finished difference Result 13408 states and 18545 transitions. [2018-11-19 17:10:11,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:10:11,903 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 206 [2018-11-19 17:10:11,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:10:11,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:10:12,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9537 transitions. [2018-11-19 17:10:12,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:10:12,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9537 transitions. [2018-11-19 17:10:12,385 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 9537 transitions. [2018-11-19 17:10:20,053 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 9537 edges. 9537 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:10:23,591 INFO L225 Difference]: With dead ends: 13408 [2018-11-19 17:10:23,591 INFO L226 Difference]: Without dead ends: 8747 [2018-11-19 17:10:23,603 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:10:23,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8747 states. [2018-11-19 17:10:26,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8747 to 8719. [2018-11-19 17:10:26,804 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:10:26,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8747 states. Second operand 8719 states. [2018-11-19 17:10:26,804 INFO L74 IsIncluded]: Start isIncluded. First operand 8747 states. Second operand 8719 states. [2018-11-19 17:10:26,804 INFO L87 Difference]: Start difference. First operand 8747 states. Second operand 8719 states. [2018-11-19 17:10:29,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:10:29,840 INFO L93 Difference]: Finished difference Result 8747 states and 12109 transitions. [2018-11-19 17:10:29,840 INFO L276 IsEmpty]: Start isEmpty. Operand 8747 states and 12109 transitions. [2018-11-19 17:10:29,862 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:10:29,862 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:10:29,862 INFO L74 IsIncluded]: Start isIncluded. First operand 8719 states. Second operand 8747 states. [2018-11-19 17:10:29,862 INFO L87 Difference]: Start difference. First operand 8719 states. Second operand 8747 states. [2018-11-19 17:10:32,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:10:32,910 INFO L93 Difference]: Finished difference Result 8747 states and 12109 transitions. [2018-11-19 17:10:32,910 INFO L276 IsEmpty]: Start isEmpty. Operand 8747 states and 12109 transitions. [2018-11-19 17:10:32,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:10:32,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:10:32,930 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:10:32,930 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:10:32,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8719 states. [2018-11-19 17:10:36,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8719 states to 8719 states and 12076 transitions. [2018-11-19 17:10:36,752 INFO L78 Accepts]: Start accepts. Automaton has 8719 states and 12076 transitions. Word has length 206 [2018-11-19 17:10:36,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:10:36,752 INFO L480 AbstractCegarLoop]: Abstraction has 8719 states and 12076 transitions. [2018-11-19 17:10:36,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:10:36,753 INFO L276 IsEmpty]: Start isEmpty. Operand 8719 states and 12076 transitions. [2018-11-19 17:10:36,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-11-19 17:10:36,756 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:10:36,756 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:10:36,756 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:10:36,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:10:36,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1908769329, now seen corresponding path program 1 times [2018-11-19 17:10:36,756 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:10:36,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:10:36,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:10:36,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:10:36,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:10:36,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:10:38,182 INFO L256 TraceCheckUtils]: 0: Hoare triple {75333#true} call ULTIMATE.init(); {75333#true} is VALID [2018-11-19 17:10:38,205 INFO L273 TraceCheckUtils]: 1: Hoare triple {75333#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,206 INFO L273 TraceCheckUtils]: 2: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume true; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,207 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} {75333#true} #7183#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,207 INFO L256 TraceCheckUtils]: 4: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1890 := main(); {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,208 INFO L273 TraceCheckUtils]: 5: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,208 INFO L256 TraceCheckUtils]: 6: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {75333#true} is VALID [2018-11-19 17:10:38,208 INFO L273 TraceCheckUtils]: 7: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,208 INFO L256 TraceCheckUtils]: 8: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,208 INFO L273 TraceCheckUtils]: 9: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,209 INFO L273 TraceCheckUtils]: 10: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,209 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,209 INFO L273 TraceCheckUtils]: 12: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,209 INFO L273 TraceCheckUtils]: 13: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,210 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6963#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,221 INFO L273 TraceCheckUtils]: 15: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,221 INFO L256 TraceCheckUtils]: 16: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L273 TraceCheckUtils]: 17: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L256 TraceCheckUtils]: 18: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L273 TraceCheckUtils]: 19: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L273 TraceCheckUtils]: 20: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L273 TraceCheckUtils]: 22: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,222 INFO L273 TraceCheckUtils]: 23: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,223 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6965#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,223 INFO L273 TraceCheckUtils]: 25: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,224 INFO L256 TraceCheckUtils]: 26: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L273 TraceCheckUtils]: 27: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L256 TraceCheckUtils]: 28: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L273 TraceCheckUtils]: 29: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L273 TraceCheckUtils]: 30: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L273 TraceCheckUtils]: 32: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,224 INFO L273 TraceCheckUtils]: 33: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,225 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6967#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,225 INFO L273 TraceCheckUtils]: 35: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,225 INFO L256 TraceCheckUtils]: 36: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L273 TraceCheckUtils]: 37: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L256 TraceCheckUtils]: 38: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L273 TraceCheckUtils]: 39: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L273 TraceCheckUtils]: 40: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L273 TraceCheckUtils]: 42: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,226 INFO L273 TraceCheckUtils]: 43: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,228 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6969#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,228 INFO L273 TraceCheckUtils]: 45: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,228 INFO L256 TraceCheckUtils]: 46: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {75333#true} is VALID [2018-11-19 17:10:38,228 INFO L273 TraceCheckUtils]: 47: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,228 INFO L256 TraceCheckUtils]: 48: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,229 INFO L273 TraceCheckUtils]: 49: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,229 INFO L273 TraceCheckUtils]: 50: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,229 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,229 INFO L273 TraceCheckUtils]: 52: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,229 INFO L273 TraceCheckUtils]: 53: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,230 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6971#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,231 INFO L273 TraceCheckUtils]: 55: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,231 INFO L256 TraceCheckUtils]: 56: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {75333#true} is VALID [2018-11-19 17:10:38,231 INFO L273 TraceCheckUtils]: 57: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,231 INFO L256 TraceCheckUtils]: 58: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,232 INFO L273 TraceCheckUtils]: 59: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,232 INFO L273 TraceCheckUtils]: 60: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,232 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,232 INFO L273 TraceCheckUtils]: 62: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,233 INFO L273 TraceCheckUtils]: 63: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,233 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6973#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,235 INFO L273 TraceCheckUtils]: 65: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,235 INFO L256 TraceCheckUtils]: 66: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {75333#true} is VALID [2018-11-19 17:10:38,235 INFO L273 TraceCheckUtils]: 67: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,235 INFO L256 TraceCheckUtils]: 68: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,235 INFO L273 TraceCheckUtils]: 69: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,235 INFO L273 TraceCheckUtils]: 70: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,235 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,236 INFO L273 TraceCheckUtils]: 72: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,236 INFO L273 TraceCheckUtils]: 73: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,237 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6975#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,237 INFO L273 TraceCheckUtils]: 75: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,237 INFO L256 TraceCheckUtils]: 76: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {75333#true} is VALID [2018-11-19 17:10:38,237 INFO L273 TraceCheckUtils]: 77: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,238 INFO L256 TraceCheckUtils]: 78: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,238 INFO L273 TraceCheckUtils]: 79: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,238 INFO L273 TraceCheckUtils]: 80: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,238 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,238 INFO L273 TraceCheckUtils]: 82: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,239 INFO L273 TraceCheckUtils]: 83: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,242 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6977#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,242 INFO L273 TraceCheckUtils]: 85: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,243 INFO L256 TraceCheckUtils]: 86: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {75333#true} is VALID [2018-11-19 17:10:38,243 INFO L273 TraceCheckUtils]: 87: Hoare triple {75333#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,243 INFO L256 TraceCheckUtils]: 88: Hoare triple {75333#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,243 INFO L273 TraceCheckUtils]: 89: Hoare triple {75333#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {75333#true} is VALID [2018-11-19 17:10:38,244 INFO L273 TraceCheckUtils]: 90: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,244 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {75333#true} {75333#true} #6937#return; {75333#true} is VALID [2018-11-19 17:10:38,244 INFO L273 TraceCheckUtils]: 92: Hoare triple {75333#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {75333#true} is VALID [2018-11-19 17:10:38,244 INFO L273 TraceCheckUtils]: 93: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,246 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6979#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,246 INFO L273 TraceCheckUtils]: 95: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,246 INFO L256 TraceCheckUtils]: 96: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {75333#true} is VALID [2018-11-19 17:10:38,246 INFO L273 TraceCheckUtils]: 97: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,247 INFO L256 TraceCheckUtils]: 98: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,247 INFO L273 TraceCheckUtils]: 99: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,247 INFO L273 TraceCheckUtils]: 100: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,247 INFO L273 TraceCheckUtils]: 101: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,248 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,248 INFO L273 TraceCheckUtils]: 103: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,248 INFO L273 TraceCheckUtils]: 104: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,261 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6981#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,261 INFO L273 TraceCheckUtils]: 106: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1298.base, #t~ret1298.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,261 INFO L256 TraceCheckUtils]: 107: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L273 TraceCheckUtils]: 108: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L256 TraceCheckUtils]: 109: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L273 TraceCheckUtils]: 110: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L273 TraceCheckUtils]: 111: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L273 TraceCheckUtils]: 112: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,262 INFO L273 TraceCheckUtils]: 114: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,263 INFO L273 TraceCheckUtils]: 115: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,263 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6983#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,264 INFO L273 TraceCheckUtils]: 117: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1299.base, #t~ret1299.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,264 INFO L256 TraceCheckUtils]: 118: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {75333#true} is VALID [2018-11-19 17:10:38,264 INFO L273 TraceCheckUtils]: 119: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,264 INFO L256 TraceCheckUtils]: 120: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,264 INFO L273 TraceCheckUtils]: 121: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,264 INFO L273 TraceCheckUtils]: 122: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,264 INFO L273 TraceCheckUtils]: 123: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,265 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,265 INFO L273 TraceCheckUtils]: 125: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,265 INFO L273 TraceCheckUtils]: 126: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,265 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6985#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,266 INFO L273 TraceCheckUtils]: 128: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1300.base, #t~ret1300.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,266 INFO L256 TraceCheckUtils]: 129: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {75333#true} is VALID [2018-11-19 17:10:38,266 INFO L273 TraceCheckUtils]: 130: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,266 INFO L256 TraceCheckUtils]: 131: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,266 INFO L273 TraceCheckUtils]: 132: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,266 INFO L273 TraceCheckUtils]: 133: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,267 INFO L273 TraceCheckUtils]: 134: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,267 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,267 INFO L273 TraceCheckUtils]: 136: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,267 INFO L273 TraceCheckUtils]: 137: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,268 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6987#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,268 INFO L273 TraceCheckUtils]: 139: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1301.base, #t~ret1301.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,268 INFO L256 TraceCheckUtils]: 140: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {75333#true} is VALID [2018-11-19 17:10:38,268 INFO L273 TraceCheckUtils]: 141: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,268 INFO L256 TraceCheckUtils]: 142: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L273 TraceCheckUtils]: 143: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L273 TraceCheckUtils]: 144: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L273 TraceCheckUtils]: 145: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L273 TraceCheckUtils]: 147: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,269 INFO L273 TraceCheckUtils]: 148: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,272 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6989#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,272 INFO L273 TraceCheckUtils]: 150: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1302.base, #t~ret1302.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,272 INFO L256 TraceCheckUtils]: 151: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {75333#true} is VALID [2018-11-19 17:10:38,272 INFO L273 TraceCheckUtils]: 152: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,272 INFO L256 TraceCheckUtils]: 153: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L273 TraceCheckUtils]: 154: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L273 TraceCheckUtils]: 155: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L273 TraceCheckUtils]: 156: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L273 TraceCheckUtils]: 158: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,273 INFO L273 TraceCheckUtils]: 159: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,274 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6991#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,275 INFO L273 TraceCheckUtils]: 161: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1303.base, #t~ret1303.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,275 INFO L256 TraceCheckUtils]: 162: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {75333#true} is VALID [2018-11-19 17:10:38,275 INFO L273 TraceCheckUtils]: 163: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,275 INFO L256 TraceCheckUtils]: 164: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,275 INFO L273 TraceCheckUtils]: 165: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,275 INFO L273 TraceCheckUtils]: 166: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,275 INFO L273 TraceCheckUtils]: 167: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,276 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,276 INFO L273 TraceCheckUtils]: 169: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,276 INFO L273 TraceCheckUtils]: 170: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,278 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6993#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,278 INFO L273 TraceCheckUtils]: 172: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1304.base, #t~ret1304.offset; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,279 INFO L256 TraceCheckUtils]: 173: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L273 TraceCheckUtils]: 174: Hoare triple {75333#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L256 TraceCheckUtils]: 175: Hoare triple {75333#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L273 TraceCheckUtils]: 176: Hoare triple {75333#true} #t~loopctr1891 := 0; {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L273 TraceCheckUtils]: 177: Hoare triple {75333#true} assume !(#t~loopctr1891 < #amount); {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L273 TraceCheckUtils]: 178: Hoare triple {75333#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {75333#true} {75333#true} #7575#return; {75333#true} is VALID [2018-11-19 17:10:38,279 INFO L273 TraceCheckUtils]: 180: Hoare triple {75333#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {75333#true} is VALID [2018-11-19 17:10:38,280 INFO L273 TraceCheckUtils]: 181: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,281 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #6995#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,281 INFO L273 TraceCheckUtils]: 183: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,283 INFO L273 TraceCheckUtils]: 184: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,283 INFO L273 TraceCheckUtils]: 185: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,286 INFO L273 TraceCheckUtils]: 186: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,286 INFO L273 TraceCheckUtils]: 187: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,288 INFO L273 TraceCheckUtils]: 188: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,288 INFO L273 TraceCheckUtils]: 189: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume #t~switch1307; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,291 INFO L273 TraceCheckUtils]: 190: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,291 INFO L273 TraceCheckUtils]: 191: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,294 INFO L273 TraceCheckUtils]: 192: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume #t~switch1325; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,294 INFO L273 TraceCheckUtils]: 193: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume 1 == ~ldv_state_variable_0~0; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,294 INFO L256 TraceCheckUtils]: 194: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call #t~ret1326 := mgag200_init(); {75333#true} is VALID [2018-11-19 17:10:38,294 INFO L273 TraceCheckUtils]: 195: Hoare triple {75333#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {75333#true} is VALID [2018-11-19 17:10:38,294 INFO L273 TraceCheckUtils]: 196: Hoare triple {75333#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {75333#true} is VALID [2018-11-19 17:10:38,295 INFO L273 TraceCheckUtils]: 197: Hoare triple {75333#true} assume true; {75333#true} is VALID [2018-11-19 17:10:38,295 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {75333#true} {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} #7011#return; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,295 INFO L273 TraceCheckUtils]: 199: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,296 INFO L273 TraceCheckUtils]: 200: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume !(0 == ~ldv_retval_1~0); {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,297 INFO L273 TraceCheckUtils]: 201: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,299 INFO L256 TraceCheckUtils]: 202: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} call ldv_check_final_state(); {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} is VALID [2018-11-19 17:10:38,299 INFO L273 TraceCheckUtils]: 203: Hoare triple {75335#(= 1 ~ldv_mutex_base_of_ww_mutex~0)} assume 1 != ~ldv_mutex_base_of_ww_mutex~0; {75334#false} is VALID [2018-11-19 17:10:38,300 INFO L256 TraceCheckUtils]: 204: Hoare triple {75334#false} call ldv_error(); {75334#false} is VALID [2018-11-19 17:10:38,300 INFO L273 TraceCheckUtils]: 205: Hoare triple {75334#false} assume !false; {75334#false} is VALID [2018-11-19 17:10:38,320 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:10:38,320 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:10:38,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:10:38,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 206 [2018-11-19 17:10:38,321 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:10:38,321 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:10:38,486 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:10:38,486 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:10:38,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:10:38,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:10:38,487 INFO L87 Difference]: Start difference. First operand 8719 states and 12076 transitions. Second operand 3 states. [2018-11-19 17:11:21,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:11:21,894 INFO L93 Difference]: Finished difference Result 17292 states and 24455 transitions. [2018-11-19 17:11:21,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:11:21,894 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 206 [2018-11-19 17:11:21,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:11:21,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:11:22,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6731 transitions. [2018-11-19 17:11:22,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:11:22,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6731 transitions. [2018-11-19 17:11:22,338 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 6731 transitions. [2018-11-19 17:11:28,227 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 6731 edges. 6731 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:11:41,801 INFO L225 Difference]: With dead ends: 17292 [2018-11-19 17:11:41,801 INFO L226 Difference]: Without dead ends: 17286 [2018-11-19 17:11:41,805 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:11:41,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17286 states. [2018-11-19 17:12:03,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17286 to 17282. [2018-11-19 17:12:03,591 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:12:03,591 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17286 states. Second operand 17282 states. [2018-11-19 17:12:03,591 INFO L74 IsIncluded]: Start isIncluded. First operand 17286 states. Second operand 17282 states. [2018-11-19 17:12:03,591 INFO L87 Difference]: Start difference. First operand 17286 states. Second operand 17282 states. [2018-11-19 17:12:15,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:12:15,264 INFO L93 Difference]: Finished difference Result 17286 states and 24437 transitions. [2018-11-19 17:12:15,264 INFO L276 IsEmpty]: Start isEmpty. Operand 17286 states and 24437 transitions. [2018-11-19 17:12:15,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:12:15,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:12:15,298 INFO L74 IsIncluded]: Start isIncluded. First operand 17282 states. Second operand 17286 states. [2018-11-19 17:12:15,298 INFO L87 Difference]: Start difference. First operand 17282 states. Second operand 17286 states. [2018-11-19 17:12:25,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:12:25,061 INFO L93 Difference]: Finished difference Result 17286 states and 24437 transitions. [2018-11-19 17:12:25,061 INFO L276 IsEmpty]: Start isEmpty. Operand 17286 states and 24437 transitions. [2018-11-19 17:12:25,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:12:25,091 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:12:25,091 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:12:25,092 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:12:25,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17282 states. [2018-11-19 17:12:40,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17282 states to 17282 states and 24434 transitions. [2018-11-19 17:12:40,097 INFO L78 Accepts]: Start accepts. Automaton has 17282 states and 24434 transitions. Word has length 206 [2018-11-19 17:12:40,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:12:40,098 INFO L480 AbstractCegarLoop]: Abstraction has 17282 states and 24434 transitions. [2018-11-19 17:12:40,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:12:40,098 INFO L276 IsEmpty]: Start isEmpty. Operand 17282 states and 24434 transitions. [2018-11-19 17:12:40,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2018-11-19 17:12:40,101 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:12:40,101 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:12:40,101 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:12:40,101 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:12:40,102 INFO L82 PathProgramCache]: Analyzing trace with hash 956519062, now seen corresponding path program 1 times [2018-11-19 17:12:40,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:12:40,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:12:40,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:12:40,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:12:40,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:12:40,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:12:41,709 INFO L256 TraceCheckUtils]: 0: Hoare triple {155976#true} call ULTIMATE.init(); {155976#true} is VALID [2018-11-19 17:12:41,713 INFO L273 TraceCheckUtils]: 1: Hoare triple {155976#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,714 INFO L273 TraceCheckUtils]: 2: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume true; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,716 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} {155976#true} #7183#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,716 INFO L256 TraceCheckUtils]: 4: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1890 := main(); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,724 INFO L273 TraceCheckUtils]: 5: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,724 INFO L256 TraceCheckUtils]: 6: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {155976#true} is VALID [2018-11-19 17:12:41,724 INFO L273 TraceCheckUtils]: 7: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,724 INFO L256 TraceCheckUtils]: 8: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,725 INFO L273 TraceCheckUtils]: 9: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,725 INFO L273 TraceCheckUtils]: 10: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,725 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,725 INFO L273 TraceCheckUtils]: 12: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,725 INFO L273 TraceCheckUtils]: 13: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,729 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6963#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,729 INFO L273 TraceCheckUtils]: 15: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,730 INFO L256 TraceCheckUtils]: 16: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {155976#true} is VALID [2018-11-19 17:12:41,730 INFO L273 TraceCheckUtils]: 17: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,730 INFO L256 TraceCheckUtils]: 18: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,730 INFO L273 TraceCheckUtils]: 19: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,730 INFO L273 TraceCheckUtils]: 20: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,730 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,731 INFO L273 TraceCheckUtils]: 22: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,731 INFO L273 TraceCheckUtils]: 23: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,733 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6965#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,733 INFO L273 TraceCheckUtils]: 25: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,733 INFO L256 TraceCheckUtils]: 26: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L273 TraceCheckUtils]: 27: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L256 TraceCheckUtils]: 28: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L273 TraceCheckUtils]: 29: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L273 TraceCheckUtils]: 30: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,734 INFO L273 TraceCheckUtils]: 32: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,735 INFO L273 TraceCheckUtils]: 33: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,735 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6967#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,736 INFO L273 TraceCheckUtils]: 35: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,736 INFO L256 TraceCheckUtils]: 36: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {155976#true} is VALID [2018-11-19 17:12:41,736 INFO L273 TraceCheckUtils]: 37: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L256 TraceCheckUtils]: 38: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L273 TraceCheckUtils]: 39: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L273 TraceCheckUtils]: 40: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L273 TraceCheckUtils]: 42: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,737 INFO L273 TraceCheckUtils]: 43: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,738 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6969#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,739 INFO L273 TraceCheckUtils]: 45: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,739 INFO L256 TraceCheckUtils]: 46: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {155976#true} is VALID [2018-11-19 17:12:41,739 INFO L273 TraceCheckUtils]: 47: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,739 INFO L256 TraceCheckUtils]: 48: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,739 INFO L273 TraceCheckUtils]: 49: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,740 INFO L273 TraceCheckUtils]: 50: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,740 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,740 INFO L273 TraceCheckUtils]: 52: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,740 INFO L273 TraceCheckUtils]: 53: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,746 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6971#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,746 INFO L273 TraceCheckUtils]: 55: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,746 INFO L256 TraceCheckUtils]: 56: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {155976#true} is VALID [2018-11-19 17:12:41,747 INFO L273 TraceCheckUtils]: 57: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,747 INFO L256 TraceCheckUtils]: 58: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,747 INFO L273 TraceCheckUtils]: 59: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,747 INFO L273 TraceCheckUtils]: 60: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,747 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,748 INFO L273 TraceCheckUtils]: 62: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,748 INFO L273 TraceCheckUtils]: 63: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,748 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6973#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,749 INFO L273 TraceCheckUtils]: 65: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,749 INFO L256 TraceCheckUtils]: 66: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {155976#true} is VALID [2018-11-19 17:12:41,749 INFO L273 TraceCheckUtils]: 67: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,749 INFO L256 TraceCheckUtils]: 68: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,750 INFO L273 TraceCheckUtils]: 69: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,750 INFO L273 TraceCheckUtils]: 70: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,750 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,750 INFO L273 TraceCheckUtils]: 72: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,750 INFO L273 TraceCheckUtils]: 73: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,751 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6975#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,752 INFO L273 TraceCheckUtils]: 75: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,752 INFO L256 TraceCheckUtils]: 76: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {155976#true} is VALID [2018-11-19 17:12:41,752 INFO L273 TraceCheckUtils]: 77: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,752 INFO L256 TraceCheckUtils]: 78: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,752 INFO L273 TraceCheckUtils]: 79: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,753 INFO L273 TraceCheckUtils]: 80: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,753 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,753 INFO L273 TraceCheckUtils]: 82: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,753 INFO L273 TraceCheckUtils]: 83: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,754 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6977#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,754 INFO L273 TraceCheckUtils]: 85: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,754 INFO L256 TraceCheckUtils]: 86: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L273 TraceCheckUtils]: 87: Hoare triple {155976#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L256 TraceCheckUtils]: 88: Hoare triple {155976#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L273 TraceCheckUtils]: 89: Hoare triple {155976#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L273 TraceCheckUtils]: 90: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {155976#true} {155976#true} #6937#return; {155976#true} is VALID [2018-11-19 17:12:41,755 INFO L273 TraceCheckUtils]: 92: Hoare triple {155976#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {155976#true} is VALID [2018-11-19 17:12:41,756 INFO L273 TraceCheckUtils]: 93: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,756 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6979#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,757 INFO L273 TraceCheckUtils]: 95: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,757 INFO L256 TraceCheckUtils]: 96: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {155976#true} is VALID [2018-11-19 17:12:41,757 INFO L273 TraceCheckUtils]: 97: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,757 INFO L256 TraceCheckUtils]: 98: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,758 INFO L273 TraceCheckUtils]: 99: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,758 INFO L273 TraceCheckUtils]: 100: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,758 INFO L273 TraceCheckUtils]: 101: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,758 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,758 INFO L273 TraceCheckUtils]: 103: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,759 INFO L273 TraceCheckUtils]: 104: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,760 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6981#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,760 INFO L273 TraceCheckUtils]: 106: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1298.base, #t~ret1298.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,760 INFO L256 TraceCheckUtils]: 107: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {155976#true} is VALID [2018-11-19 17:12:41,760 INFO L273 TraceCheckUtils]: 108: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L256 TraceCheckUtils]: 109: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L273 TraceCheckUtils]: 110: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L273 TraceCheckUtils]: 111: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L273 TraceCheckUtils]: 112: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,761 INFO L273 TraceCheckUtils]: 114: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,762 INFO L273 TraceCheckUtils]: 115: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,763 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6983#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,763 INFO L273 TraceCheckUtils]: 117: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1299.base, #t~ret1299.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,763 INFO L256 TraceCheckUtils]: 118: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {155976#true} is VALID [2018-11-19 17:12:41,763 INFO L273 TraceCheckUtils]: 119: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L256 TraceCheckUtils]: 120: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L273 TraceCheckUtils]: 121: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L273 TraceCheckUtils]: 122: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L273 TraceCheckUtils]: 123: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,764 INFO L273 TraceCheckUtils]: 125: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,765 INFO L273 TraceCheckUtils]: 126: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,766 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6985#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,766 INFO L273 TraceCheckUtils]: 128: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1300.base, #t~ret1300.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,766 INFO L256 TraceCheckUtils]: 129: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {155976#true} is VALID [2018-11-19 17:12:41,766 INFO L273 TraceCheckUtils]: 130: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,767 INFO L256 TraceCheckUtils]: 131: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,767 INFO L273 TraceCheckUtils]: 132: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,767 INFO L273 TraceCheckUtils]: 133: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,767 INFO L273 TraceCheckUtils]: 134: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,767 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,768 INFO L273 TraceCheckUtils]: 136: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,768 INFO L273 TraceCheckUtils]: 137: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,769 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6987#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,769 INFO L273 TraceCheckUtils]: 139: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1301.base, #t~ret1301.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,769 INFO L256 TraceCheckUtils]: 140: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L273 TraceCheckUtils]: 141: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L256 TraceCheckUtils]: 142: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L273 TraceCheckUtils]: 143: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L273 TraceCheckUtils]: 144: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L273 TraceCheckUtils]: 145: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,770 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,771 INFO L273 TraceCheckUtils]: 147: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,771 INFO L273 TraceCheckUtils]: 148: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,772 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6989#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,772 INFO L273 TraceCheckUtils]: 150: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1302.base, #t~ret1302.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,772 INFO L256 TraceCheckUtils]: 151: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {155976#true} is VALID [2018-11-19 17:12:41,773 INFO L273 TraceCheckUtils]: 152: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,773 INFO L256 TraceCheckUtils]: 153: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,773 INFO L273 TraceCheckUtils]: 154: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,773 INFO L273 TraceCheckUtils]: 155: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,773 INFO L273 TraceCheckUtils]: 156: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,774 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,774 INFO L273 TraceCheckUtils]: 158: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,774 INFO L273 TraceCheckUtils]: 159: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,775 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6991#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,776 INFO L273 TraceCheckUtils]: 161: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1303.base, #t~ret1303.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,776 INFO L256 TraceCheckUtils]: 162: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {155976#true} is VALID [2018-11-19 17:12:41,776 INFO L273 TraceCheckUtils]: 163: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L256 TraceCheckUtils]: 164: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L273 TraceCheckUtils]: 165: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L273 TraceCheckUtils]: 166: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L273 TraceCheckUtils]: 167: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,777 INFO L273 TraceCheckUtils]: 169: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,778 INFO L273 TraceCheckUtils]: 170: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,779 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6993#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,779 INFO L273 TraceCheckUtils]: 172: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1304.base, #t~ret1304.offset; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,779 INFO L256 TraceCheckUtils]: 173: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {155976#true} is VALID [2018-11-19 17:12:41,779 INFO L273 TraceCheckUtils]: 174: Hoare triple {155976#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,780 INFO L256 TraceCheckUtils]: 175: Hoare triple {155976#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {155976#true} is VALID [2018-11-19 17:12:41,780 INFO L273 TraceCheckUtils]: 176: Hoare triple {155976#true} #t~loopctr1891 := 0; {155976#true} is VALID [2018-11-19 17:12:41,780 INFO L273 TraceCheckUtils]: 177: Hoare triple {155976#true} assume !(#t~loopctr1891 < #amount); {155976#true} is VALID [2018-11-19 17:12:41,780 INFO L273 TraceCheckUtils]: 178: Hoare triple {155976#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {155976#true} is VALID [2018-11-19 17:12:41,780 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {155976#true} {155976#true} #7575#return; {155976#true} is VALID [2018-11-19 17:12:41,781 INFO L273 TraceCheckUtils]: 180: Hoare triple {155976#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {155976#true} is VALID [2018-11-19 17:12:41,781 INFO L273 TraceCheckUtils]: 181: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,782 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #6995#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,782 INFO L273 TraceCheckUtils]: 183: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,783 INFO L273 TraceCheckUtils]: 184: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,783 INFO L273 TraceCheckUtils]: 185: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,783 INFO L273 TraceCheckUtils]: 186: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,784 INFO L273 TraceCheckUtils]: 187: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,784 INFO L273 TraceCheckUtils]: 188: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,785 INFO L273 TraceCheckUtils]: 189: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume #t~switch1307; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,785 INFO L273 TraceCheckUtils]: 190: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,786 INFO L273 TraceCheckUtils]: 191: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,786 INFO L273 TraceCheckUtils]: 192: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume #t~switch1325; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,786 INFO L273 TraceCheckUtils]: 193: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume 1 == ~ldv_state_variable_0~0; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,787 INFO L256 TraceCheckUtils]: 194: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call #t~ret1326 := mgag200_init(); {155976#true} is VALID [2018-11-19 17:12:41,787 INFO L273 TraceCheckUtils]: 195: Hoare triple {155976#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {155976#true} is VALID [2018-11-19 17:12:41,787 INFO L273 TraceCheckUtils]: 196: Hoare triple {155976#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {155976#true} is VALID [2018-11-19 17:12:41,787 INFO L273 TraceCheckUtils]: 197: Hoare triple {155976#true} assume true; {155976#true} is VALID [2018-11-19 17:12:41,788 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {155976#true} {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} #7011#return; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,788 INFO L273 TraceCheckUtils]: 199: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,789 INFO L273 TraceCheckUtils]: 200: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !(0 == ~ldv_retval_1~0); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,789 INFO L273 TraceCheckUtils]: 201: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,790 INFO L256 TraceCheckUtils]: 202: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} call ldv_check_final_state(); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,790 INFO L273 TraceCheckUtils]: 203: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume !(1 != ~ldv_mutex_base_of_ww_mutex~0); {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} is VALID [2018-11-19 17:12:41,791 INFO L273 TraceCheckUtils]: 204: Hoare triple {155978#(= ~ldv_mutex_i_mutex_of_inode~0 1)} assume 1 != ~ldv_mutex_i_mutex_of_inode~0; {155977#false} is VALID [2018-11-19 17:12:41,791 INFO L256 TraceCheckUtils]: 205: Hoare triple {155977#false} call ldv_error(); {155977#false} is VALID [2018-11-19 17:12:41,791 INFO L273 TraceCheckUtils]: 206: Hoare triple {155977#false} assume !false; {155977#false} is VALID [2018-11-19 17:12:41,817 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:12:41,817 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:12:41,817 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:12:41,818 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 207 [2018-11-19 17:12:41,818 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:12:41,818 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:12:41,989 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:12:41,989 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:12:41,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:12:41,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:12:41,990 INFO L87 Difference]: Start difference. First operand 17282 states and 24434 transitions. Second operand 3 states. [2018-11-19 17:13:56,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:13:56,401 INFO L93 Difference]: Finished difference Result 17284 states and 24435 transitions. [2018-11-19 17:13:56,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:13:56,401 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 207 [2018-11-19 17:13:56,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:13:56,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:13:56,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3355 transitions. [2018-11-19 17:13:56,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:13:56,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3355 transitions. [2018-11-19 17:13:56,575 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3355 transitions. [2018-11-19 17:13:59,530 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3355 edges. 3355 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:14:12,847 INFO L225 Difference]: With dead ends: 17284 [2018-11-19 17:14:12,847 INFO L226 Difference]: Without dead ends: 17281 [2018-11-19 17:14:12,851 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:14:12,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17281 states. [2018-11-19 17:14:49,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17281 to 17281. [2018-11-19 17:14:49,156 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:14:49,156 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17281 states. Second operand 17281 states. [2018-11-19 17:14:49,156 INFO L74 IsIncluded]: Start isIncluded. First operand 17281 states. Second operand 17281 states. [2018-11-19 17:14:49,156 INFO L87 Difference]: Start difference. First operand 17281 states. Second operand 17281 states. [2018-11-19 17:14:59,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:14:59,775 INFO L93 Difference]: Finished difference Result 17281 states and 24432 transitions. [2018-11-19 17:14:59,775 INFO L276 IsEmpty]: Start isEmpty. Operand 17281 states and 24432 transitions. [2018-11-19 17:14:59,805 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:14:59,805 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:14:59,805 INFO L74 IsIncluded]: Start isIncluded. First operand 17281 states. Second operand 17281 states. [2018-11-19 17:14:59,806 INFO L87 Difference]: Start difference. First operand 17281 states. Second operand 17281 states. [2018-11-19 17:15:11,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:15:11,709 INFO L93 Difference]: Finished difference Result 17281 states and 24432 transitions. [2018-11-19 17:15:11,709 INFO L276 IsEmpty]: Start isEmpty. Operand 17281 states and 24432 transitions. [2018-11-19 17:15:11,739 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:15:11,739 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:15:11,739 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:15:11,739 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:15:11,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17281 states. [2018-11-19 17:15:26,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17281 states to 17281 states and 24432 transitions. [2018-11-19 17:15:26,654 INFO L78 Accepts]: Start accepts. Automaton has 17281 states and 24432 transitions. Word has length 207 [2018-11-19 17:15:26,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:15:26,654 INFO L480 AbstractCegarLoop]: Abstraction has 17281 states and 24432 transitions. [2018-11-19 17:15:26,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:15:26,654 INFO L276 IsEmpty]: Start isEmpty. Operand 17281 states and 24432 transitions. [2018-11-19 17:15:26,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-11-19 17:15:26,656 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:15:26,656 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:15:26,656 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:15:26,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:15:26,656 INFO L82 PathProgramCache]: Analyzing trace with hash -413849166, now seen corresponding path program 1 times [2018-11-19 17:15:26,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:15:26,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:15:26,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:15:26,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:15:26,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:15:26,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:15:27,959 INFO L256 TraceCheckUtils]: 0: Hoare triple {236592#true} call ULTIMATE.init(); {236592#true} is VALID [2018-11-19 17:15:27,959 INFO L273 TraceCheckUtils]: 1: Hoare triple {236592#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,960 INFO L273 TraceCheckUtils]: 2: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume true; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,962 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {236594#(= ~ldv_mutex_lock~0 1)} {236592#true} #7183#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,962 INFO L256 TraceCheckUtils]: 4: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1890 := main(); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,963 INFO L273 TraceCheckUtils]: 5: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,963 INFO L256 TraceCheckUtils]: 6: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {236592#true} is VALID [2018-11-19 17:15:27,963 INFO L273 TraceCheckUtils]: 7: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,964 INFO L256 TraceCheckUtils]: 8: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,964 INFO L273 TraceCheckUtils]: 9: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,964 INFO L273 TraceCheckUtils]: 10: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,964 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,964 INFO L273 TraceCheckUtils]: 12: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,965 INFO L273 TraceCheckUtils]: 13: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,966 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6963#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,966 INFO L273 TraceCheckUtils]: 15: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,966 INFO L256 TraceCheckUtils]: 16: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {236592#true} is VALID [2018-11-19 17:15:27,967 INFO L273 TraceCheckUtils]: 17: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,967 INFO L256 TraceCheckUtils]: 18: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,967 INFO L273 TraceCheckUtils]: 19: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,967 INFO L273 TraceCheckUtils]: 20: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,968 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,968 INFO L273 TraceCheckUtils]: 22: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,968 INFO L273 TraceCheckUtils]: 23: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,973 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6965#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,973 INFO L273 TraceCheckUtils]: 25: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,973 INFO L256 TraceCheckUtils]: 26: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {236592#true} is VALID [2018-11-19 17:15:27,973 INFO L273 TraceCheckUtils]: 27: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,973 INFO L256 TraceCheckUtils]: 28: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,974 INFO L273 TraceCheckUtils]: 29: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,974 INFO L273 TraceCheckUtils]: 30: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,974 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,974 INFO L273 TraceCheckUtils]: 32: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,974 INFO L273 TraceCheckUtils]: 33: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,975 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6967#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,975 INFO L273 TraceCheckUtils]: 35: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,975 INFO L256 TraceCheckUtils]: 36: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {236592#true} is VALID [2018-11-19 17:15:27,975 INFO L273 TraceCheckUtils]: 37: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,975 INFO L256 TraceCheckUtils]: 38: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,975 INFO L273 TraceCheckUtils]: 39: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,975 INFO L273 TraceCheckUtils]: 40: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,976 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,976 INFO L273 TraceCheckUtils]: 42: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,976 INFO L273 TraceCheckUtils]: 43: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,976 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6969#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,977 INFO L273 TraceCheckUtils]: 45: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,977 INFO L256 TraceCheckUtils]: 46: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L273 TraceCheckUtils]: 47: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L256 TraceCheckUtils]: 48: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L273 TraceCheckUtils]: 49: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L273 TraceCheckUtils]: 50: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,977 INFO L273 TraceCheckUtils]: 52: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,978 INFO L273 TraceCheckUtils]: 53: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,978 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6971#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,978 INFO L273 TraceCheckUtils]: 55: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,979 INFO L256 TraceCheckUtils]: 56: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L273 TraceCheckUtils]: 57: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L256 TraceCheckUtils]: 58: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L273 TraceCheckUtils]: 59: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L273 TraceCheckUtils]: 60: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L273 TraceCheckUtils]: 62: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,979 INFO L273 TraceCheckUtils]: 63: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,980 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6973#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,980 INFO L273 TraceCheckUtils]: 65: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,980 INFO L256 TraceCheckUtils]: 66: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {236592#true} is VALID [2018-11-19 17:15:27,980 INFO L273 TraceCheckUtils]: 67: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L256 TraceCheckUtils]: 68: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L273 TraceCheckUtils]: 69: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L273 TraceCheckUtils]: 70: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L273 TraceCheckUtils]: 72: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,981 INFO L273 TraceCheckUtils]: 73: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,982 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6975#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,982 INFO L273 TraceCheckUtils]: 75: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,982 INFO L256 TraceCheckUtils]: 76: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {236592#true} is VALID [2018-11-19 17:15:27,982 INFO L273 TraceCheckUtils]: 77: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,982 INFO L256 TraceCheckUtils]: 78: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,982 INFO L273 TraceCheckUtils]: 79: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,983 INFO L273 TraceCheckUtils]: 80: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,983 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,983 INFO L273 TraceCheckUtils]: 82: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,983 INFO L273 TraceCheckUtils]: 83: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,986 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6977#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,986 INFO L273 TraceCheckUtils]: 85: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,986 INFO L256 TraceCheckUtils]: 86: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {236592#true} is VALID [2018-11-19 17:15:27,986 INFO L273 TraceCheckUtils]: 87: Hoare triple {236592#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,987 INFO L256 TraceCheckUtils]: 88: Hoare triple {236592#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,987 INFO L273 TraceCheckUtils]: 89: Hoare triple {236592#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {236592#true} is VALID [2018-11-19 17:15:27,987 INFO L273 TraceCheckUtils]: 90: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,987 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {236592#true} {236592#true} #6937#return; {236592#true} is VALID [2018-11-19 17:15:27,987 INFO L273 TraceCheckUtils]: 92: Hoare triple {236592#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {236592#true} is VALID [2018-11-19 17:15:27,988 INFO L273 TraceCheckUtils]: 93: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,988 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6979#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,989 INFO L273 TraceCheckUtils]: 95: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,989 INFO L256 TraceCheckUtils]: 96: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {236592#true} is VALID [2018-11-19 17:15:27,989 INFO L273 TraceCheckUtils]: 97: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,989 INFO L256 TraceCheckUtils]: 98: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L273 TraceCheckUtils]: 99: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L273 TraceCheckUtils]: 100: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L273 TraceCheckUtils]: 101: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L273 TraceCheckUtils]: 103: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,990 INFO L273 TraceCheckUtils]: 104: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,991 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6981#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,993 INFO L273 TraceCheckUtils]: 106: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1298.base, #t~ret1298.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,993 INFO L256 TraceCheckUtils]: 107: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {236592#true} is VALID [2018-11-19 17:15:27,993 INFO L273 TraceCheckUtils]: 108: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,993 INFO L256 TraceCheckUtils]: 109: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,993 INFO L273 TraceCheckUtils]: 110: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:27,993 INFO L273 TraceCheckUtils]: 111: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:27,993 INFO L273 TraceCheckUtils]: 112: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:27,994 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:27,994 INFO L273 TraceCheckUtils]: 114: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,994 INFO L273 TraceCheckUtils]: 115: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:27,994 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6983#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,995 INFO L273 TraceCheckUtils]: 117: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1299.base, #t~ret1299.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:27,995 INFO L256 TraceCheckUtils]: 118: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {236592#true} is VALID [2018-11-19 17:15:27,995 INFO L273 TraceCheckUtils]: 119: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,995 INFO L256 TraceCheckUtils]: 120: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:27,995 INFO L273 TraceCheckUtils]: 121: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:27,995 INFO L273 TraceCheckUtils]: 122: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:27,996 INFO L273 TraceCheckUtils]: 123: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:27,996 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:27,996 INFO L273 TraceCheckUtils]: 125: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:27,996 INFO L273 TraceCheckUtils]: 126: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,000 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6985#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,000 INFO L273 TraceCheckUtils]: 128: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1300.base, #t~ret1300.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,000 INFO L256 TraceCheckUtils]: 129: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {236592#true} is VALID [2018-11-19 17:15:28,000 INFO L273 TraceCheckUtils]: 130: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,000 INFO L256 TraceCheckUtils]: 131: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L273 TraceCheckUtils]: 132: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L273 TraceCheckUtils]: 133: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L273 TraceCheckUtils]: 134: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L273 TraceCheckUtils]: 136: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,001 INFO L273 TraceCheckUtils]: 137: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,002 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6987#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,003 INFO L273 TraceCheckUtils]: 139: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1301.base, #t~ret1301.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,003 INFO L256 TraceCheckUtils]: 140: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {236592#true} is VALID [2018-11-19 17:15:28,003 INFO L273 TraceCheckUtils]: 141: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,003 INFO L256 TraceCheckUtils]: 142: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:28,003 INFO L273 TraceCheckUtils]: 143: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:28,004 INFO L273 TraceCheckUtils]: 144: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:28,004 INFO L273 TraceCheckUtils]: 145: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:28,004 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:28,004 INFO L273 TraceCheckUtils]: 147: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,004 INFO L273 TraceCheckUtils]: 148: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,005 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6989#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,005 INFO L273 TraceCheckUtils]: 150: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1302.base, #t~ret1302.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,005 INFO L256 TraceCheckUtils]: 151: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {236592#true} is VALID [2018-11-19 17:15:28,005 INFO L273 TraceCheckUtils]: 152: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L256 TraceCheckUtils]: 153: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L273 TraceCheckUtils]: 154: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L273 TraceCheckUtils]: 155: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L273 TraceCheckUtils]: 156: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:28,006 INFO L273 TraceCheckUtils]: 158: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,007 INFO L273 TraceCheckUtils]: 159: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,008 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6991#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,008 INFO L273 TraceCheckUtils]: 161: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1303.base, #t~ret1303.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,008 INFO L256 TraceCheckUtils]: 162: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {236592#true} is VALID [2018-11-19 17:15:28,008 INFO L273 TraceCheckUtils]: 163: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,008 INFO L256 TraceCheckUtils]: 164: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:28,008 INFO L273 TraceCheckUtils]: 165: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:28,009 INFO L273 TraceCheckUtils]: 166: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:28,009 INFO L273 TraceCheckUtils]: 167: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:28,009 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:28,009 INFO L273 TraceCheckUtils]: 169: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,009 INFO L273 TraceCheckUtils]: 170: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,010 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6993#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,010 INFO L273 TraceCheckUtils]: 172: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1304.base, #t~ret1304.offset; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,010 INFO L256 TraceCheckUtils]: 173: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {236592#true} is VALID [2018-11-19 17:15:28,010 INFO L273 TraceCheckUtils]: 174: Hoare triple {236592#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,010 INFO L256 TraceCheckUtils]: 175: Hoare triple {236592#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L273 TraceCheckUtils]: 176: Hoare triple {236592#true} #t~loopctr1891 := 0; {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L273 TraceCheckUtils]: 177: Hoare triple {236592#true} assume !(#t~loopctr1891 < #amount); {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L273 TraceCheckUtils]: 178: Hoare triple {236592#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {236592#true} {236592#true} #7575#return; {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L273 TraceCheckUtils]: 180: Hoare triple {236592#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {236592#true} is VALID [2018-11-19 17:15:28,011 INFO L273 TraceCheckUtils]: 181: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,016 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #6995#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,016 INFO L273 TraceCheckUtils]: 183: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,017 INFO L273 TraceCheckUtils]: 184: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,017 INFO L273 TraceCheckUtils]: 185: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,017 INFO L273 TraceCheckUtils]: 186: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,018 INFO L273 TraceCheckUtils]: 187: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,018 INFO L273 TraceCheckUtils]: 188: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,019 INFO L273 TraceCheckUtils]: 189: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume #t~switch1307; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,020 INFO L273 TraceCheckUtils]: 190: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,020 INFO L273 TraceCheckUtils]: 191: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,021 INFO L273 TraceCheckUtils]: 192: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume #t~switch1325; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,021 INFO L273 TraceCheckUtils]: 193: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_state_variable_0~0; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,022 INFO L256 TraceCheckUtils]: 194: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call #t~ret1326 := mgag200_init(); {236592#true} is VALID [2018-11-19 17:15:28,022 INFO L273 TraceCheckUtils]: 195: Hoare triple {236592#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {236592#true} is VALID [2018-11-19 17:15:28,022 INFO L273 TraceCheckUtils]: 196: Hoare triple {236592#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {236592#true} is VALID [2018-11-19 17:15:28,022 INFO L273 TraceCheckUtils]: 197: Hoare triple {236592#true} assume true; {236592#true} is VALID [2018-11-19 17:15:28,025 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {236592#true} {236594#(= ~ldv_mutex_lock~0 1)} #7011#return; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,025 INFO L273 TraceCheckUtils]: 199: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,026 INFO L273 TraceCheckUtils]: 200: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !(0 == ~ldv_retval_1~0); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,034 INFO L273 TraceCheckUtils]: 201: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,035 INFO L256 TraceCheckUtils]: 202: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} call ldv_check_final_state(); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,035 INFO L273 TraceCheckUtils]: 203: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !(1 != ~ldv_mutex_base_of_ww_mutex~0); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,036 INFO L273 TraceCheckUtils]: 204: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume !(1 != ~ldv_mutex_i_mutex_of_inode~0); {236594#(= ~ldv_mutex_lock~0 1)} is VALID [2018-11-19 17:15:28,036 INFO L273 TraceCheckUtils]: 205: Hoare triple {236594#(= ~ldv_mutex_lock~0 1)} assume 1 != ~ldv_mutex_lock~0; {236593#false} is VALID [2018-11-19 17:15:28,036 INFO L256 TraceCheckUtils]: 206: Hoare triple {236593#false} call ldv_error(); {236593#false} is VALID [2018-11-19 17:15:28,036 INFO L273 TraceCheckUtils]: 207: Hoare triple {236593#false} assume !false; {236593#false} is VALID [2018-11-19 17:15:28,060 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:15:28,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:15:28,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:15:28,061 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 208 [2018-11-19 17:15:28,061 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:15:28,061 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:15:28,229 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:15:28,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:15:28,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:15:28,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:15:28,230 INFO L87 Difference]: Start difference. First operand 17281 states and 24432 transitions. Second operand 3 states. [2018-11-19 17:17:00,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:17:00,976 INFO L93 Difference]: Finished difference Result 17283 states and 24433 transitions. [2018-11-19 17:17:00,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:17:00,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 208 [2018-11-19 17:17:00,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:17:00,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:17:01,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3353 transitions. [2018-11-19 17:17:01,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:17:01,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3353 transitions. [2018-11-19 17:17:01,142 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3353 transitions. [2018-11-19 17:17:04,192 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3353 edges. 3353 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:17:19,023 INFO L225 Difference]: With dead ends: 17283 [2018-11-19 17:17:19,024 INFO L226 Difference]: Without dead ends: 17280 [2018-11-19 17:17:19,027 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:17:19,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17280 states. [2018-11-19 17:18:10,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17280 to 17280. [2018-11-19 17:18:10,090 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:18:10,090 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17280 states. Second operand 17280 states. [2018-11-19 17:18:10,090 INFO L74 IsIncluded]: Start isIncluded. First operand 17280 states. Second operand 17280 states. [2018-11-19 17:18:10,090 INFO L87 Difference]: Start difference. First operand 17280 states. Second operand 17280 states. [2018-11-19 17:18:21,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:18:21,906 INFO L93 Difference]: Finished difference Result 17280 states and 24430 transitions. [2018-11-19 17:18:21,906 INFO L276 IsEmpty]: Start isEmpty. Operand 17280 states and 24430 transitions. [2018-11-19 17:18:21,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:18:21,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:18:21,935 INFO L74 IsIncluded]: Start isIncluded. First operand 17280 states. Second operand 17280 states. [2018-11-19 17:18:21,935 INFO L87 Difference]: Start difference. First operand 17280 states. Second operand 17280 states. [2018-11-19 17:18:32,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:18:32,895 INFO L93 Difference]: Finished difference Result 17280 states and 24430 transitions. [2018-11-19 17:18:32,895 INFO L276 IsEmpty]: Start isEmpty. Operand 17280 states and 24430 transitions. [2018-11-19 17:18:32,919 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:18:32,919 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:18:32,919 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:18:32,920 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:18:32,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17280 states. [2018-11-19 17:18:46,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17280 states to 17280 states and 24430 transitions. [2018-11-19 17:18:46,138 INFO L78 Accepts]: Start accepts. Automaton has 17280 states and 24430 transitions. Word has length 208 [2018-11-19 17:18:46,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:18:46,138 INFO L480 AbstractCegarLoop]: Abstraction has 17280 states and 24430 transitions. [2018-11-19 17:18:46,138 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:18:46,138 INFO L276 IsEmpty]: Start isEmpty. Operand 17280 states and 24430 transitions. [2018-11-19 17:18:46,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2018-11-19 17:18:46,139 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:18:46,140 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:18:46,140 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:18:46,140 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:18:46,140 INFO L82 PathProgramCache]: Analyzing trace with hash 54413593, now seen corresponding path program 1 times [2018-11-19 17:18:46,140 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:18:46,141 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:18:46,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:18:46,146 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:18:46,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:18:46,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:18:47,584 INFO L256 TraceCheckUtils]: 0: Hoare triple {317202#true} call ULTIMATE.init(); {317202#true} is VALID [2018-11-19 17:18:47,585 INFO L273 TraceCheckUtils]: 1: Hoare triple {317202#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,586 INFO L273 TraceCheckUtils]: 2: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume true; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,586 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} {317202#true} #7183#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,587 INFO L256 TraceCheckUtils]: 4: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1890 := main(); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,587 INFO L273 TraceCheckUtils]: 5: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,587 INFO L256 TraceCheckUtils]: 6: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {317202#true} is VALID [2018-11-19 17:18:47,587 INFO L273 TraceCheckUtils]: 7: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L256 TraceCheckUtils]: 8: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L273 TraceCheckUtils]: 9: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L273 TraceCheckUtils]: 10: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L273 TraceCheckUtils]: 12: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,588 INFO L273 TraceCheckUtils]: 13: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,589 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6963#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,589 INFO L273 TraceCheckUtils]: 15: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,590 INFO L256 TraceCheckUtils]: 16: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {317202#true} is VALID [2018-11-19 17:18:47,590 INFO L273 TraceCheckUtils]: 17: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,590 INFO L256 TraceCheckUtils]: 18: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,590 INFO L273 TraceCheckUtils]: 19: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,590 INFO L273 TraceCheckUtils]: 20: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,590 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,591 INFO L273 TraceCheckUtils]: 22: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,591 INFO L273 TraceCheckUtils]: 23: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,591 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6965#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,592 INFO L273 TraceCheckUtils]: 25: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,592 INFO L256 TraceCheckUtils]: 26: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {317202#true} is VALID [2018-11-19 17:18:47,592 INFO L273 TraceCheckUtils]: 27: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,592 INFO L256 TraceCheckUtils]: 28: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,592 INFO L273 TraceCheckUtils]: 29: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,593 INFO L273 TraceCheckUtils]: 30: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,593 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,593 INFO L273 TraceCheckUtils]: 32: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,593 INFO L273 TraceCheckUtils]: 33: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,594 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6967#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,595 INFO L273 TraceCheckUtils]: 35: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,595 INFO L256 TraceCheckUtils]: 36: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {317202#true} is VALID [2018-11-19 17:18:47,595 INFO L273 TraceCheckUtils]: 37: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,595 INFO L256 TraceCheckUtils]: 38: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,595 INFO L273 TraceCheckUtils]: 39: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,596 INFO L273 TraceCheckUtils]: 40: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,596 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,596 INFO L273 TraceCheckUtils]: 42: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,596 INFO L273 TraceCheckUtils]: 43: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,599 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6969#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,603 INFO L273 TraceCheckUtils]: 45: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,603 INFO L256 TraceCheckUtils]: 46: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {317202#true} is VALID [2018-11-19 17:18:47,603 INFO L273 TraceCheckUtils]: 47: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,603 INFO L256 TraceCheckUtils]: 48: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,604 INFO L273 TraceCheckUtils]: 49: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,604 INFO L273 TraceCheckUtils]: 50: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,604 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,604 INFO L273 TraceCheckUtils]: 52: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,604 INFO L273 TraceCheckUtils]: 53: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,605 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6971#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,607 INFO L273 TraceCheckUtils]: 55: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,607 INFO L256 TraceCheckUtils]: 56: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {317202#true} is VALID [2018-11-19 17:18:47,607 INFO L273 TraceCheckUtils]: 57: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,607 INFO L256 TraceCheckUtils]: 58: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,607 INFO L273 TraceCheckUtils]: 59: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,608 INFO L273 TraceCheckUtils]: 60: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,608 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,608 INFO L273 TraceCheckUtils]: 62: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,608 INFO L273 TraceCheckUtils]: 63: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,611 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6973#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,615 INFO L273 TraceCheckUtils]: 65: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,615 INFO L256 TraceCheckUtils]: 66: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {317202#true} is VALID [2018-11-19 17:18:47,615 INFO L273 TraceCheckUtils]: 67: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,615 INFO L256 TraceCheckUtils]: 68: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,615 INFO L273 TraceCheckUtils]: 69: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,616 INFO L273 TraceCheckUtils]: 70: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,616 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,616 INFO L273 TraceCheckUtils]: 72: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,616 INFO L273 TraceCheckUtils]: 73: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,619 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6975#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,623 INFO L273 TraceCheckUtils]: 75: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,623 INFO L256 TraceCheckUtils]: 76: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {317202#true} is VALID [2018-11-19 17:18:47,623 INFO L273 TraceCheckUtils]: 77: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,623 INFO L256 TraceCheckUtils]: 78: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,624 INFO L273 TraceCheckUtils]: 79: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,624 INFO L273 TraceCheckUtils]: 80: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,624 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,624 INFO L273 TraceCheckUtils]: 82: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,624 INFO L273 TraceCheckUtils]: 83: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,627 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6977#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,629 INFO L273 TraceCheckUtils]: 85: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,629 INFO L256 TraceCheckUtils]: 86: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {317202#true} is VALID [2018-11-19 17:18:47,629 INFO L273 TraceCheckUtils]: 87: Hoare triple {317202#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,630 INFO L256 TraceCheckUtils]: 88: Hoare triple {317202#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,630 INFO L273 TraceCheckUtils]: 89: Hoare triple {317202#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {317202#true} is VALID [2018-11-19 17:18:47,630 INFO L273 TraceCheckUtils]: 90: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,630 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {317202#true} {317202#true} #6937#return; {317202#true} is VALID [2018-11-19 17:18:47,630 INFO L273 TraceCheckUtils]: 92: Hoare triple {317202#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {317202#true} is VALID [2018-11-19 17:18:47,631 INFO L273 TraceCheckUtils]: 93: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,631 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6979#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,639 INFO L273 TraceCheckUtils]: 95: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,639 INFO L256 TraceCheckUtils]: 96: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {317202#true} is VALID [2018-11-19 17:18:47,639 INFO L273 TraceCheckUtils]: 97: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,639 INFO L256 TraceCheckUtils]: 98: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,640 INFO L273 TraceCheckUtils]: 99: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,640 INFO L273 TraceCheckUtils]: 100: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,640 INFO L273 TraceCheckUtils]: 101: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,640 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,641 INFO L273 TraceCheckUtils]: 103: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,641 INFO L273 TraceCheckUtils]: 104: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,642 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6981#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,643 INFO L273 TraceCheckUtils]: 106: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1298.base, #t~ret1298.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,643 INFO L256 TraceCheckUtils]: 107: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {317202#true} is VALID [2018-11-19 17:18:47,643 INFO L273 TraceCheckUtils]: 108: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,643 INFO L256 TraceCheckUtils]: 109: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,644 INFO L273 TraceCheckUtils]: 110: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,644 INFO L273 TraceCheckUtils]: 111: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,644 INFO L273 TraceCheckUtils]: 112: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,644 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,645 INFO L273 TraceCheckUtils]: 114: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,645 INFO L273 TraceCheckUtils]: 115: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,645 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6983#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,646 INFO L273 TraceCheckUtils]: 117: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1299.base, #t~ret1299.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,646 INFO L256 TraceCheckUtils]: 118: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {317202#true} is VALID [2018-11-19 17:18:47,646 INFO L273 TraceCheckUtils]: 119: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,646 INFO L256 TraceCheckUtils]: 120: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,646 INFO L273 TraceCheckUtils]: 121: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,646 INFO L273 TraceCheckUtils]: 122: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,646 INFO L273 TraceCheckUtils]: 123: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,647 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,647 INFO L273 TraceCheckUtils]: 125: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,647 INFO L273 TraceCheckUtils]: 126: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,647 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6985#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,648 INFO L273 TraceCheckUtils]: 128: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1300.base, #t~ret1300.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,648 INFO L256 TraceCheckUtils]: 129: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {317202#true} is VALID [2018-11-19 17:18:47,648 INFO L273 TraceCheckUtils]: 130: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,648 INFO L256 TraceCheckUtils]: 131: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,648 INFO L273 TraceCheckUtils]: 132: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,648 INFO L273 TraceCheckUtils]: 133: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,648 INFO L273 TraceCheckUtils]: 134: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,649 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,649 INFO L273 TraceCheckUtils]: 136: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,649 INFO L273 TraceCheckUtils]: 137: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,649 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6987#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,650 INFO L273 TraceCheckUtils]: 139: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1301.base, #t~ret1301.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,650 INFO L256 TraceCheckUtils]: 140: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {317202#true} is VALID [2018-11-19 17:18:47,650 INFO L273 TraceCheckUtils]: 141: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,650 INFO L256 TraceCheckUtils]: 142: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,650 INFO L273 TraceCheckUtils]: 143: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,650 INFO L273 TraceCheckUtils]: 144: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,650 INFO L273 TraceCheckUtils]: 145: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,651 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,651 INFO L273 TraceCheckUtils]: 147: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,651 INFO L273 TraceCheckUtils]: 148: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,651 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6989#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,652 INFO L273 TraceCheckUtils]: 150: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1302.base, #t~ret1302.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,652 INFO L256 TraceCheckUtils]: 151: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L273 TraceCheckUtils]: 152: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L256 TraceCheckUtils]: 153: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L273 TraceCheckUtils]: 154: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L273 TraceCheckUtils]: 155: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L273 TraceCheckUtils]: 156: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,652 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,653 INFO L273 TraceCheckUtils]: 158: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,653 INFO L273 TraceCheckUtils]: 159: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,653 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6991#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,654 INFO L273 TraceCheckUtils]: 161: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1303.base, #t~ret1303.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,654 INFO L256 TraceCheckUtils]: 162: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L273 TraceCheckUtils]: 163: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L256 TraceCheckUtils]: 164: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L273 TraceCheckUtils]: 165: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L273 TraceCheckUtils]: 166: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L273 TraceCheckUtils]: 167: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,654 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,655 INFO L273 TraceCheckUtils]: 169: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,655 INFO L273 TraceCheckUtils]: 170: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,655 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6993#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,656 INFO L273 TraceCheckUtils]: 172: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1304.base, #t~ret1304.offset; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,656 INFO L256 TraceCheckUtils]: 173: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L273 TraceCheckUtils]: 174: Hoare triple {317202#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L256 TraceCheckUtils]: 175: Hoare triple {317202#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L273 TraceCheckUtils]: 176: Hoare triple {317202#true} #t~loopctr1891 := 0; {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L273 TraceCheckUtils]: 177: Hoare triple {317202#true} assume !(#t~loopctr1891 < #amount); {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L273 TraceCheckUtils]: 178: Hoare triple {317202#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {317202#true} is VALID [2018-11-19 17:18:47,656 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {317202#true} {317202#true} #7575#return; {317202#true} is VALID [2018-11-19 17:18:47,657 INFO L273 TraceCheckUtils]: 180: Hoare triple {317202#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {317202#true} is VALID [2018-11-19 17:18:47,657 INFO L273 TraceCheckUtils]: 181: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,657 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #6995#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,658 INFO L273 TraceCheckUtils]: 183: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,658 INFO L273 TraceCheckUtils]: 184: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,658 INFO L273 TraceCheckUtils]: 185: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,658 INFO L273 TraceCheckUtils]: 186: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,659 INFO L273 TraceCheckUtils]: 187: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,659 INFO L273 TraceCheckUtils]: 188: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,659 INFO L273 TraceCheckUtils]: 189: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume #t~switch1307; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,660 INFO L273 TraceCheckUtils]: 190: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,660 INFO L273 TraceCheckUtils]: 191: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,660 INFO L273 TraceCheckUtils]: 192: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume #t~switch1325; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,661 INFO L273 TraceCheckUtils]: 193: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume 1 == ~ldv_state_variable_0~0; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,661 INFO L256 TraceCheckUtils]: 194: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call #t~ret1326 := mgag200_init(); {317202#true} is VALID [2018-11-19 17:18:47,661 INFO L273 TraceCheckUtils]: 195: Hoare triple {317202#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {317202#true} is VALID [2018-11-19 17:18:47,661 INFO L273 TraceCheckUtils]: 196: Hoare triple {317202#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {317202#true} is VALID [2018-11-19 17:18:47,661 INFO L273 TraceCheckUtils]: 197: Hoare triple {317202#true} assume true; {317202#true} is VALID [2018-11-19 17:18:47,662 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {317202#true} {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} #7011#return; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,662 INFO L273 TraceCheckUtils]: 199: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,663 INFO L273 TraceCheckUtils]: 200: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !(0 == ~ldv_retval_1~0); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,663 INFO L273 TraceCheckUtils]: 201: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,663 INFO L256 TraceCheckUtils]: 202: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} call ldv_check_final_state(); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,664 INFO L273 TraceCheckUtils]: 203: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !(1 != ~ldv_mutex_base_of_ww_mutex~0); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,664 INFO L273 TraceCheckUtils]: 204: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !(1 != ~ldv_mutex_i_mutex_of_inode~0); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,664 INFO L273 TraceCheckUtils]: 205: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume !(1 != ~ldv_mutex_lock~0); {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} is VALID [2018-11-19 17:18:47,665 INFO L273 TraceCheckUtils]: 206: Hoare triple {317204#(= ~ldv_mutex_lock_of_fb_info~0 1)} assume 1 != ~ldv_mutex_lock_of_fb_info~0; {317203#false} is VALID [2018-11-19 17:18:47,665 INFO L256 TraceCheckUtils]: 207: Hoare triple {317203#false} call ldv_error(); {317203#false} is VALID [2018-11-19 17:18:47,665 INFO L273 TraceCheckUtils]: 208: Hoare triple {317203#false} assume !false; {317203#false} is VALID [2018-11-19 17:18:47,681 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:18:47,681 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:18:47,681 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:18:47,682 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 209 [2018-11-19 17:18:47,682 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:18:47,682 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:18:47,829 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 97 edges. 97 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:18:47,830 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:18:47,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:18:47,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:18:47,830 INFO L87 Difference]: Start difference. First operand 17280 states and 24430 transitions. Second operand 3 states. [2018-11-19 17:20:18,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:20:18,312 INFO L93 Difference]: Finished difference Result 17282 states and 24431 transitions. [2018-11-19 17:20:18,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:20:18,312 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 209 [2018-11-19 17:20:18,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:20:18,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:20:18,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3351 transitions. [2018-11-19 17:20:18,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:20:18,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3351 transitions. [2018-11-19 17:20:18,455 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3351 transitions. [2018-11-19 17:20:21,405 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3351 edges. 3351 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:20:35,823 INFO L225 Difference]: With dead ends: 17282 [2018-11-19 17:20:35,823 INFO L226 Difference]: Without dead ends: 17279 [2018-11-19 17:20:35,828 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:20:35,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17279 states. [2018-11-19 17:21:48,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17279 to 17279. [2018-11-19 17:21:48,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:21:48,474 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17279 states. Second operand 17279 states. [2018-11-19 17:21:48,475 INFO L74 IsIncluded]: Start isIncluded. First operand 17279 states. Second operand 17279 states. [2018-11-19 17:21:48,475 INFO L87 Difference]: Start difference. First operand 17279 states. Second operand 17279 states. [2018-11-19 17:22:00,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:22:00,492 INFO L93 Difference]: Finished difference Result 17279 states and 24428 transitions. [2018-11-19 17:22:00,492 INFO L276 IsEmpty]: Start isEmpty. Operand 17279 states and 24428 transitions. [2018-11-19 17:22:00,521 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:22:00,521 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:22:00,521 INFO L74 IsIncluded]: Start isIncluded. First operand 17279 states. Second operand 17279 states. [2018-11-19 17:22:00,521 INFO L87 Difference]: Start difference. First operand 17279 states. Second operand 17279 states. [2018-11-19 17:22:12,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:22:12,603 INFO L93 Difference]: Finished difference Result 17279 states and 24428 transitions. [2018-11-19 17:22:12,603 INFO L276 IsEmpty]: Start isEmpty. Operand 17279 states and 24428 transitions. [2018-11-19 17:22:12,633 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:22:12,633 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:22:12,633 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:22:12,633 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:22:12,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17279 states. [2018-11-19 17:22:27,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17279 states to 17279 states and 24428 transitions. [2018-11-19 17:22:27,695 INFO L78 Accepts]: Start accepts. Automaton has 17279 states and 24428 transitions. Word has length 209 [2018-11-19 17:22:27,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:22:27,695 INFO L480 AbstractCegarLoop]: Abstraction has 17279 states and 24428 transitions. [2018-11-19 17:22:27,695 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:22:27,696 INFO L276 IsEmpty]: Start isEmpty. Operand 17279 states and 24428 transitions. [2018-11-19 17:22:27,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2018-11-19 17:22:27,697 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:22:27,697 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:22:27,697 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:22:27,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:22:27,697 INFO L82 PathProgramCache]: Analyzing trace with hash 1685662101, now seen corresponding path program 1 times [2018-11-19 17:22:27,697 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:22:27,698 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:22:27,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:22:27,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:22:27,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:22:27,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:22:29,005 INFO L256 TraceCheckUtils]: 0: Hoare triple {397806#true} call ULTIMATE.init(); {397806#true} is VALID [2018-11-19 17:22:29,006 INFO L273 TraceCheckUtils]: 1: Hoare triple {397806#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,007 INFO L273 TraceCheckUtils]: 2: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume true; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,008 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} {397806#true} #7183#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,008 INFO L256 TraceCheckUtils]: 4: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1890 := main(); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,010 INFO L273 TraceCheckUtils]: 5: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,010 INFO L256 TraceCheckUtils]: 6: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {397806#true} is VALID [2018-11-19 17:22:29,010 INFO L273 TraceCheckUtils]: 7: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,010 INFO L256 TraceCheckUtils]: 8: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,011 INFO L273 TraceCheckUtils]: 9: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,011 INFO L273 TraceCheckUtils]: 10: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,011 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,011 INFO L273 TraceCheckUtils]: 12: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,011 INFO L273 TraceCheckUtils]: 13: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,012 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6963#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,012 INFO L273 TraceCheckUtils]: 15: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,013 INFO L256 TraceCheckUtils]: 16: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L273 TraceCheckUtils]: 17: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L256 TraceCheckUtils]: 18: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L273 TraceCheckUtils]: 19: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L273 TraceCheckUtils]: 20: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L273 TraceCheckUtils]: 22: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,013 INFO L273 TraceCheckUtils]: 23: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,014 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6965#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,014 INFO L273 TraceCheckUtils]: 25: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,014 INFO L256 TraceCheckUtils]: 26: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L273 TraceCheckUtils]: 27: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L256 TraceCheckUtils]: 28: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L273 TraceCheckUtils]: 29: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L273 TraceCheckUtils]: 30: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,015 INFO L273 TraceCheckUtils]: 32: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,016 INFO L273 TraceCheckUtils]: 33: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,016 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6967#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,017 INFO L273 TraceCheckUtils]: 35: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,017 INFO L256 TraceCheckUtils]: 36: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {397806#true} is VALID [2018-11-19 17:22:29,017 INFO L273 TraceCheckUtils]: 37: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,017 INFO L256 TraceCheckUtils]: 38: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,017 INFO L273 TraceCheckUtils]: 39: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,017 INFO L273 TraceCheckUtils]: 40: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,018 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,018 INFO L273 TraceCheckUtils]: 42: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,018 INFO L273 TraceCheckUtils]: 43: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,019 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6969#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,019 INFO L273 TraceCheckUtils]: 45: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,019 INFO L256 TraceCheckUtils]: 46: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {397806#true} is VALID [2018-11-19 17:22:29,020 INFO L273 TraceCheckUtils]: 47: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,020 INFO L256 TraceCheckUtils]: 48: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,020 INFO L273 TraceCheckUtils]: 49: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,020 INFO L273 TraceCheckUtils]: 50: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,020 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,021 INFO L273 TraceCheckUtils]: 52: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,021 INFO L273 TraceCheckUtils]: 53: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,021 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6971#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,022 INFO L273 TraceCheckUtils]: 55: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,022 INFO L256 TraceCheckUtils]: 56: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {397806#true} is VALID [2018-11-19 17:22:29,022 INFO L273 TraceCheckUtils]: 57: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,022 INFO L256 TraceCheckUtils]: 58: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,023 INFO L273 TraceCheckUtils]: 59: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,023 INFO L273 TraceCheckUtils]: 60: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,023 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,023 INFO L273 TraceCheckUtils]: 62: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,023 INFO L273 TraceCheckUtils]: 63: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,027 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6973#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,032 INFO L273 TraceCheckUtils]: 65: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,032 INFO L256 TraceCheckUtils]: 66: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {397806#true} is VALID [2018-11-19 17:22:29,032 INFO L273 TraceCheckUtils]: 67: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,032 INFO L256 TraceCheckUtils]: 68: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,032 INFO L273 TraceCheckUtils]: 69: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,032 INFO L273 TraceCheckUtils]: 70: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,033 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,033 INFO L273 TraceCheckUtils]: 72: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,033 INFO L273 TraceCheckUtils]: 73: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,034 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6975#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,034 INFO L273 TraceCheckUtils]: 75: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,034 INFO L256 TraceCheckUtils]: 76: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {397806#true} is VALID [2018-11-19 17:22:29,034 INFO L273 TraceCheckUtils]: 77: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L256 TraceCheckUtils]: 78: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L273 TraceCheckUtils]: 79: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L273 TraceCheckUtils]: 80: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L273 TraceCheckUtils]: 82: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,035 INFO L273 TraceCheckUtils]: 83: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,041 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6977#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,041 INFO L273 TraceCheckUtils]: 85: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,041 INFO L256 TraceCheckUtils]: 86: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L273 TraceCheckUtils]: 87: Hoare triple {397806#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L256 TraceCheckUtils]: 88: Hoare triple {397806#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L273 TraceCheckUtils]: 89: Hoare triple {397806#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L273 TraceCheckUtils]: 90: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {397806#true} {397806#true} #6937#return; {397806#true} is VALID [2018-11-19 17:22:29,042 INFO L273 TraceCheckUtils]: 92: Hoare triple {397806#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {397806#true} is VALID [2018-11-19 17:22:29,043 INFO L273 TraceCheckUtils]: 93: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,043 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6979#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,044 INFO L273 TraceCheckUtils]: 95: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,044 INFO L256 TraceCheckUtils]: 96: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {397806#true} is VALID [2018-11-19 17:22:29,044 INFO L273 TraceCheckUtils]: 97: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,044 INFO L256 TraceCheckUtils]: 98: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,044 INFO L273 TraceCheckUtils]: 99: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,045 INFO L273 TraceCheckUtils]: 100: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,045 INFO L273 TraceCheckUtils]: 101: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,045 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,045 INFO L273 TraceCheckUtils]: 103: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,045 INFO L273 TraceCheckUtils]: 104: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,046 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6981#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,046 INFO L273 TraceCheckUtils]: 106: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1298.base, #t~ret1298.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,047 INFO L256 TraceCheckUtils]: 107: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {397806#true} is VALID [2018-11-19 17:22:29,047 INFO L273 TraceCheckUtils]: 108: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,047 INFO L256 TraceCheckUtils]: 109: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,047 INFO L273 TraceCheckUtils]: 110: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,047 INFO L273 TraceCheckUtils]: 111: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,047 INFO L273 TraceCheckUtils]: 112: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,048 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,048 INFO L273 TraceCheckUtils]: 114: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,048 INFO L273 TraceCheckUtils]: 115: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,052 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6983#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,052 INFO L273 TraceCheckUtils]: 117: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1299.base, #t~ret1299.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,052 INFO L256 TraceCheckUtils]: 118: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L273 TraceCheckUtils]: 119: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L256 TraceCheckUtils]: 120: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L273 TraceCheckUtils]: 121: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L273 TraceCheckUtils]: 122: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L273 TraceCheckUtils]: 123: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,053 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,054 INFO L273 TraceCheckUtils]: 125: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,054 INFO L273 TraceCheckUtils]: 126: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,056 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6985#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,060 INFO L273 TraceCheckUtils]: 128: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1300.base, #t~ret1300.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,060 INFO L256 TraceCheckUtils]: 129: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {397806#true} is VALID [2018-11-19 17:22:29,060 INFO L273 TraceCheckUtils]: 130: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,060 INFO L256 TraceCheckUtils]: 131: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,060 INFO L273 TraceCheckUtils]: 132: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,061 INFO L273 TraceCheckUtils]: 133: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,061 INFO L273 TraceCheckUtils]: 134: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,061 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,061 INFO L273 TraceCheckUtils]: 136: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,061 INFO L273 TraceCheckUtils]: 137: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,062 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6987#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,066 INFO L273 TraceCheckUtils]: 139: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1301.base, #t~ret1301.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,066 INFO L256 TraceCheckUtils]: 140: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {397806#true} is VALID [2018-11-19 17:22:29,066 INFO L273 TraceCheckUtils]: 141: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,066 INFO L256 TraceCheckUtils]: 142: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,066 INFO L273 TraceCheckUtils]: 143: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,066 INFO L273 TraceCheckUtils]: 144: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,067 INFO L273 TraceCheckUtils]: 145: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,067 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,067 INFO L273 TraceCheckUtils]: 147: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,067 INFO L273 TraceCheckUtils]: 148: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,068 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6989#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,068 INFO L273 TraceCheckUtils]: 150: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1302.base, #t~ret1302.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,068 INFO L256 TraceCheckUtils]: 151: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {397806#true} is VALID [2018-11-19 17:22:29,068 INFO L273 TraceCheckUtils]: 152: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L256 TraceCheckUtils]: 153: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L273 TraceCheckUtils]: 154: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L273 TraceCheckUtils]: 155: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L273 TraceCheckUtils]: 156: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,069 INFO L273 TraceCheckUtils]: 158: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,070 INFO L273 TraceCheckUtils]: 159: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,070 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6991#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,071 INFO L273 TraceCheckUtils]: 161: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1303.base, #t~ret1303.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,071 INFO L256 TraceCheckUtils]: 162: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {397806#true} is VALID [2018-11-19 17:22:29,071 INFO L273 TraceCheckUtils]: 163: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,071 INFO L256 TraceCheckUtils]: 164: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,071 INFO L273 TraceCheckUtils]: 165: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,072 INFO L273 TraceCheckUtils]: 166: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,072 INFO L273 TraceCheckUtils]: 167: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,072 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,072 INFO L273 TraceCheckUtils]: 169: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,072 INFO L273 TraceCheckUtils]: 170: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,073 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6993#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,074 INFO L273 TraceCheckUtils]: 172: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1304.base, #t~ret1304.offset; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,074 INFO L256 TraceCheckUtils]: 173: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {397806#true} is VALID [2018-11-19 17:22:29,074 INFO L273 TraceCheckUtils]: 174: Hoare triple {397806#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,074 INFO L256 TraceCheckUtils]: 175: Hoare triple {397806#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {397806#true} is VALID [2018-11-19 17:22:29,074 INFO L273 TraceCheckUtils]: 176: Hoare triple {397806#true} #t~loopctr1891 := 0; {397806#true} is VALID [2018-11-19 17:22:29,074 INFO L273 TraceCheckUtils]: 177: Hoare triple {397806#true} assume !(#t~loopctr1891 < #amount); {397806#true} is VALID [2018-11-19 17:22:29,075 INFO L273 TraceCheckUtils]: 178: Hoare triple {397806#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {397806#true} is VALID [2018-11-19 17:22:29,075 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {397806#true} {397806#true} #7575#return; {397806#true} is VALID [2018-11-19 17:22:29,075 INFO L273 TraceCheckUtils]: 180: Hoare triple {397806#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {397806#true} is VALID [2018-11-19 17:22:29,075 INFO L273 TraceCheckUtils]: 181: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,076 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #6995#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,076 INFO L273 TraceCheckUtils]: 183: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,077 INFO L273 TraceCheckUtils]: 184: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,077 INFO L273 TraceCheckUtils]: 185: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,077 INFO L273 TraceCheckUtils]: 186: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,078 INFO L273 TraceCheckUtils]: 187: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,078 INFO L273 TraceCheckUtils]: 188: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,078 INFO L273 TraceCheckUtils]: 189: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume #t~switch1307; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,079 INFO L273 TraceCheckUtils]: 190: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,079 INFO L273 TraceCheckUtils]: 191: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,080 INFO L273 TraceCheckUtils]: 192: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume #t~switch1325; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,080 INFO L273 TraceCheckUtils]: 193: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume 1 == ~ldv_state_variable_0~0; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,080 INFO L256 TraceCheckUtils]: 194: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call #t~ret1326 := mgag200_init(); {397806#true} is VALID [2018-11-19 17:22:29,080 INFO L273 TraceCheckUtils]: 195: Hoare triple {397806#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {397806#true} is VALID [2018-11-19 17:22:29,080 INFO L273 TraceCheckUtils]: 196: Hoare triple {397806#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {397806#true} is VALID [2018-11-19 17:22:29,081 INFO L273 TraceCheckUtils]: 197: Hoare triple {397806#true} assume true; {397806#true} is VALID [2018-11-19 17:22:29,081 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {397806#true} {397808#(= ~ldv_mutex_mutex_of_device~0 1)} #7011#return; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,081 INFO L273 TraceCheckUtils]: 199: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,082 INFO L273 TraceCheckUtils]: 200: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !(0 == ~ldv_retval_1~0); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,082 INFO L273 TraceCheckUtils]: 201: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,083 INFO L256 TraceCheckUtils]: 202: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} call ldv_check_final_state(); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,084 INFO L273 TraceCheckUtils]: 203: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !(1 != ~ldv_mutex_base_of_ww_mutex~0); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,090 INFO L273 TraceCheckUtils]: 204: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !(1 != ~ldv_mutex_i_mutex_of_inode~0); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,092 INFO L273 TraceCheckUtils]: 205: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !(1 != ~ldv_mutex_lock~0); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,094 INFO L273 TraceCheckUtils]: 206: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume !(1 != ~ldv_mutex_lock_of_fb_info~0); {397808#(= ~ldv_mutex_mutex_of_device~0 1)} is VALID [2018-11-19 17:22:29,094 INFO L273 TraceCheckUtils]: 207: Hoare triple {397808#(= ~ldv_mutex_mutex_of_device~0 1)} assume 1 != ~ldv_mutex_mutex_of_device~0; {397807#false} is VALID [2018-11-19 17:22:29,094 INFO L256 TraceCheckUtils]: 208: Hoare triple {397807#false} call ldv_error(); {397807#false} is VALID [2018-11-19 17:22:29,094 INFO L273 TraceCheckUtils]: 209: Hoare triple {397807#false} assume !false; {397807#false} is VALID [2018-11-19 17:22:29,114 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:22:29,114 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:22:29,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:22:29,115 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 210 [2018-11-19 17:22:29,115 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:22:29,115 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:22:29,271 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:22:29,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:22:29,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:22:29,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:22:29,272 INFO L87 Difference]: Start difference. First operand 17279 states and 24428 transitions. Second operand 3 states. [2018-11-19 17:24:07,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:24:07,978 INFO L93 Difference]: Finished difference Result 17281 states and 24429 transitions. [2018-11-19 17:24:07,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:24:07,978 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 210 [2018-11-19 17:24:07,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:24:07,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:24:08,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3349 transitions. [2018-11-19 17:24:08,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:24:08,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3349 transitions. [2018-11-19 17:24:08,127 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3349 transitions. [2018-11-19 17:24:11,041 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 3349 edges. 3349 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:24:24,625 INFO L225 Difference]: With dead ends: 17281 [2018-11-19 17:24:24,625 INFO L226 Difference]: Without dead ends: 17278 [2018-11-19 17:24:24,629 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:24:24,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17278 states. [2018-11-19 17:25:32,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17278 to 17278. [2018-11-19 17:25:32,516 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:25:32,516 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17278 states. Second operand 17278 states. [2018-11-19 17:25:32,516 INFO L74 IsIncluded]: Start isIncluded. First operand 17278 states. Second operand 17278 states. [2018-11-19 17:25:32,517 INFO L87 Difference]: Start difference. First operand 17278 states. Second operand 17278 states. [2018-11-19 17:25:44,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:25:44,206 INFO L93 Difference]: Finished difference Result 17278 states and 24426 transitions. [2018-11-19 17:25:44,206 INFO L276 IsEmpty]: Start isEmpty. Operand 17278 states and 24426 transitions. [2018-11-19 17:25:44,235 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:25:44,236 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:25:44,236 INFO L74 IsIncluded]: Start isIncluded. First operand 17278 states. Second operand 17278 states. [2018-11-19 17:25:44,236 INFO L87 Difference]: Start difference. First operand 17278 states. Second operand 17278 states. [2018-11-19 17:25:56,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:25:56,397 INFO L93 Difference]: Finished difference Result 17278 states and 24426 transitions. [2018-11-19 17:25:56,397 INFO L276 IsEmpty]: Start isEmpty. Operand 17278 states and 24426 transitions. [2018-11-19 17:25:56,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:25:56,427 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:25:56,427 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:25:56,427 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:25:56,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17278 states. [2018-11-19 17:26:11,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17278 states to 17278 states and 24426 transitions. [2018-11-19 17:26:11,619 INFO L78 Accepts]: Start accepts. Automaton has 17278 states and 24426 transitions. Word has length 210 [2018-11-19 17:26:11,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:26:11,620 INFO L480 AbstractCegarLoop]: Abstraction has 17278 states and 24426 transitions. [2018-11-19 17:26:11,620 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:26:11,620 INFO L276 IsEmpty]: Start isEmpty. Operand 17278 states and 24426 transitions. [2018-11-19 17:26:11,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-11-19 17:26:11,621 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:26:11,621 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:26:11,622 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:26:11,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:26:11,622 INFO L82 PathProgramCache]: Analyzing trace with hash 714763164, now seen corresponding path program 1 times [2018-11-19 17:26:11,622 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:26:11,622 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:26:11,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:26:11,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:26:11,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:26:11,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:26:13,024 INFO L256 TraceCheckUtils]: 0: Hoare triple {478404#true} call ULTIMATE.init(); {478404#true} is VALID [2018-11-19 17:26:13,047 INFO L273 TraceCheckUtils]: 1: Hoare triple {478404#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string53.base, #t~string53.offset := #Ultimate.alloc(21);call #t~string104.base, #t~string104.offset := #Ultimate.alloc(33);call #t~string141.base, #t~string141.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string141.base,#t~string141.offset := 109];#memory_int := #memory_int[#t~string141.base,1 + #t~string141.offset := 103];#memory_int := #memory_int[#t~string141.base,2 + #t~string141.offset := 97];#memory_int := #memory_int[#t~string141.base,3 + #t~string141.offset := 102];#memory_int := #memory_int[#t~string141.base,4 + #t~string141.offset := 98];#memory_int := #memory_int[#t~string141.base,5 + #t~string141.offset := 0];call #t~string147.base, #t~string147.offset := #Ultimate.alloc(14);call #t~string149.base, #t~string149.offset := #Ultimate.alloc(20);call #t~string184.base, #t~string184.offset := #Ultimate.alloc(14);call #t~string186.base, #t~string186.offset := #Ultimate.alloc(30);call #t~string200.base, #t~string200.offset := #Ultimate.alloc(33);call #t~string209.base, #t~string209.offset := #Ultimate.alloc(37);call #t~string218.base, #t~string218.offset := #Ultimate.alloc(67);call #t~string222.base, #t~string222.offset := #Ultimate.alloc(31);call #t~string329.base, #t~string329.offset := #Ultimate.alloc(32);call #t~string340.base, #t~string340.offset := #Ultimate.alloc(32);call #t~string349.base, #t~string349.offset := #Ultimate.alloc(19);call #t~string382.base, #t~string382.offset := #Ultimate.alloc(22);call #t~string604.base, #t~string604.offset := #Ultimate.alloc(218);call #t~string626.base, #t~string626.offset := #Ultimate.alloc(22);call #t~string867.base, #t~string867.offset := #Ultimate.alloc(17);call #t~string868.base, #t~string868.offset := #Ultimate.alloc(2);#memory_int := #memory_int[#t~string868.base,#t~string868.offset := 10];#memory_int := #memory_int[#t~string868.base,1 + #t~string868.offset := 0];call #t~string961.base, #t~string961.offset := #Ultimate.alloc(23);call #t~string968.base, #t~string968.offset := #Ultimate.alloc(25);call #t~string971.base, #t~string971.offset := #Ultimate.alloc(21);call #t~string974.base, #t~string974.offset := #Ultimate.alloc(23);call #t~string1105.base, #t~string1105.offset := #Ultimate.alloc(32);call #t~string1116.base, #t~string1116.offset := #Ultimate.alloc(32);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(19);call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(27);call #t~string1164.base, #t~string1164.offset := #Ultimate.alloc(36);call #t~string1169.base, #t~string1169.offset := #Ultimate.alloc(63);call #t~string1171.base, #t~string1171.offset := #Ultimate.alloc(31);call #t~string1174.base, #t~string1174.offset := #Ultimate.alloc(57);call #t~string1176.base, #t~string1176.offset := #Ultimate.alloc(31);call #t~string1192.base, #t~string1192.offset := #Ultimate.alloc(31);call #t~string1274.base, #t~string1274.offset := #Ultimate.alloc(13);call #t~string1278.base, #t~string1278.offset := #Ultimate.alloc(8);call #t~string1279.base, #t~string1279.offset := #Ultimate.alloc(12);call #t~string1280.base, #t~string1280.offset := #Ultimate.alloc(9);call #t~string1281.base, #t~string1281.offset := #Ultimate.alloc(8);call #t~string1420.base, #t~string1420.offset := #Ultimate.alloc(32);call #t~string1431.base, #t~string1431.offset := #Ultimate.alloc(32);call #t~string1438.base, #t~string1438.offset := #Ultimate.alloc(19);call #t~string1456.base, #t~string1456.offset := #Ultimate.alloc(27);call #t~string1493.base, #t~string1493.offset := #Ultimate.alloc(42);call #t~string1500.base, #t~string1500.offset := #Ultimate.alloc(30);call #t~string1501.base, #t~string1501.offset := #Ultimate.alloc(9);call #t~string1515.base, #t~string1515.offset := #Ultimate.alloc(17);call #t~string1516.base, #t~string1516.offset := #Ultimate.alloc(17);call #t~string1535.base, #t~string1535.offset := #Ultimate.alloc(30);call #t~string1628.base, #t~string1628.offset := #Ultimate.alloc(8);call #t~string1701.base, #t~string1701.offset := #Ultimate.alloc(52);call #t~string1704.base, #t~string1704.offset := #Ultimate.alloc(37);call #t~string1708.base, #t~string1708.offset := #Ultimate.alloc(28);call #t~string1737.base, #t~string1737.offset := #Ultimate.alloc(34);call #t~string1740.base, #t~string1740.offset := #Ultimate.alloc(26);call #t~string1772.base, #t~string1772.offset := #Ultimate.alloc(14);call #t~string1779.base, #t~string1779.offset := #Ultimate.alloc(14);call #t~string1786.base, #t~string1786.offset := #Ultimate.alloc(24);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_8~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_10~0 := 0;~pci_counter~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_13~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~mgag200_modeset~0 := -1;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_mutex_base_of_ww_mutex~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_lock_of_fb_info~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_struct_mutex_of_drm_device~0 := 1;~ldv_mutex_update_lock_of_backlight_device~0 := 1;call ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_user_framebuffer_destroy.base, #funAddr~mga_user_framebuffer_destroy.offset, ~#mga_fb_funcs~0.base, ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 8 + ~#mga_fb_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_funcs~0.base, 16 + ~#mga_fb_funcs~0.offset, 8);call ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset := #Ultimate.alloc(56);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_user_framebuffer_create.base, #funAddr~mgag200_user_framebuffer_create.offset, ~#mga_mode_funcs~0.base, ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 8 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 16 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 24 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 32 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 40 + ~#mga_mode_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_mode_funcs~0.base, 48 + ~#mga_mode_funcs~0.offset, 8);call ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset := #Ultimate.alloc(120);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 8 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 16 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_set.base, #funAddr~mga_crtc_cursor_set.offset, ~#mga_crtc_funcs~0.base, 24 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 32 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_cursor_move.base, #funAddr~mga_crtc_cursor_move.offset, ~#mga_crtc_funcs~0.base, 40 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_gamma_set.base, #funAddr~mga_crtc_gamma_set.offset, ~#mga_crtc_funcs~0.base, 48 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_destroy.base, #funAddr~mga_crtc_destroy.offset, ~#mga_crtc_funcs~0.base, 56 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_crtc_helper_set_config.base, #funAddr~drm_crtc_helper_set_config.offset, ~#mga_crtc_funcs~0.base, 64 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 72 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 80 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 88 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 96 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 104 + ~#mga_crtc_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_crtc_funcs~0.base, 112 + ~#mga_crtc_funcs~0.offset, 8);call ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset := #Ultimate.alloc(112);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_dpms.base, #funAddr~mga_crtc_dpms.offset, ~#mga_helper_funcs~0.base, ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_prepare.base, #funAddr~mga_crtc_prepare.offset, ~#mga_helper_funcs~0.base, 8 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_commit.base, #funAddr~mga_crtc_commit.offset, ~#mga_helper_funcs~0.base, 16 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_fixup.base, #funAddr~mga_crtc_mode_fixup.offset, ~#mga_helper_funcs~0.base, 24 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set.base, #funAddr~mga_crtc_mode_set.offset, ~#mga_helper_funcs~0.base, 32 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 40 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_mode_set_base.base, #funAddr~mga_crtc_mode_set_base.offset, ~#mga_helper_funcs~0.base, 48 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 56 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_load_lut.base, #funAddr~mga_crtc_load_lut.offset, ~#mga_helper_funcs~0.base, 64 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_disable.base, #funAddr~mga_crtc_disable.offset, ~#mga_helper_funcs~0.base, 72 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 80 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 88 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 96 + ~#mga_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_helper_funcs~0.base, 104 + ~#mga_helper_funcs~0.offset, 8);call ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset := #Ultimate.alloc(96);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_dpms.base, #funAddr~mga_encoder_dpms.offset, ~#mga_encoder_helper_funcs~0.base, ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 8 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 16 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_fixup.base, #funAddr~mga_encoder_mode_fixup.offset, ~#mga_encoder_helper_funcs~0.base, 24 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_prepare.base, #funAddr~mga_encoder_prepare.offset, ~#mga_encoder_helper_funcs~0.base, 32 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_commit.base, #funAddr~mga_encoder_commit.offset, ~#mga_encoder_helper_funcs~0.base, 40 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_mode_set.base, #funAddr~mga_encoder_mode_set.offset, ~#mga_encoder_helper_funcs~0.base, 48 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 56 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 64 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 72 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 80 + ~#mga_encoder_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_helper_funcs~0.base, 88 + ~#mga_encoder_helper_funcs~0.offset, 8);call ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset := #Ultimate.alloc(16);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_encoder_encoder_funcs~0.base, ~#mga_encoder_encoder_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_encoder_destroy.base, #funAddr~mga_encoder_destroy.offset, ~#mga_encoder_encoder_funcs~0.base, 8 + ~#mga_encoder_encoder_funcs~0.offset, 8);call ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_get_modes.base, #funAddr~mga_vga_get_modes.offset, ~#mga_vga_connector_helper_funcs~0.base, ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_mode_valid.base, #funAddr~mga_vga_mode_valid.offset, ~#mga_vga_connector_helper_funcs~0.base, 8 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_best_encoder.base, #funAddr~mga_connector_best_encoder.offset, ~#mga_vga_connector_helper_funcs~0.base, 16 + ~#mga_vga_connector_helper_funcs~0.offset, 8);call ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_connector_dpms.base, #funAddr~drm_helper_connector_dpms.offset, ~#mga_vga_connector_funcs~0.base, ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 8 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 16 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 24 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_vga_detect.base, #funAddr~mga_vga_detect.offset, ~#mga_vga_connector_funcs~0.base, 32 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~drm_helper_probe_single_connector_modes.base, #funAddr~drm_helper_probe_single_connector_modes.offset, ~#mga_vga_connector_funcs~0.base, 40 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 48 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_connector_destroy.base, #funAddr~mga_connector_destroy.offset, ~#mga_vga_connector_funcs~0.base, 56 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 64 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 72 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 80 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 88 + ~#mga_vga_connector_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_vga_connector_funcs~0.base, 96 + ~#mga_vga_connector_funcs~0.offset, 8);~warn_transparent~0 := 1;~warn_palette~0 := 1;~mga_vga_connector_funcs_group0~0.base, ~mga_vga_connector_funcs_group0~0.offset := 0, 0;~mga_crtc_funcs_group0~0.base, ~mga_crtc_funcs_group0~0.offset := 0, 0;~mga_vga_connector_helper_funcs_group0~0.base, ~mga_vga_connector_helper_funcs_group0~0.offset := 0, 0;~mgag200_driver_fops_group1~0.base, ~mgag200_driver_fops_group1~0.offset := 0, 0;~mga_encoder_helper_funcs_group1~0.base, ~mga_encoder_helper_funcs_group1~0.offset := 0, 0;~mga_fb_helper_funcs_group0~0.base, ~mga_fb_helper_funcs_group0~0.offset := 0, 0;~mgag200fb_ops_group1~0.base, ~mgag200fb_ops_group1~0.offset := 0, 0;~mgag200_bo_driver_group2~0.base, ~mgag200_bo_driver_group2~0.offset := 0, 0;~mga_helper_funcs_group1~0.base, ~mga_helper_funcs_group1~0.offset := 0, 0;~driver_group0~0.base, ~driver_group0~0.offset := 0, 0;~mgag200_bo_driver_group1~0.base, ~mgag200_bo_driver_group1~0.offset := 0, 0;~mgag200_pci_driver_group1~0.base, ~mgag200_pci_driver_group1~0.offset := 0, 0;~mgag200_bo_driver_group0~0.base, ~mgag200_bo_driver_group0~0.offset := 0, 0;~driver_group1~0.base, ~driver_group1~0.offset := 0, 0;~mgag200_driver_fops_group2~0.base, ~mgag200_driver_fops_group2~0.offset := 0, 0;~mgag200_bo_driver_group3~0.base, ~mgag200_bo_driver_group3~0.offset := 0, 0;~mga_helper_funcs_group2~0.base, ~mga_helper_funcs_group2~0.offset := 0, 0;~mgag200fb_ops_group0~0.base, ~mgag200fb_ops_group0~0.offset := 0, 0;~mga_encoder_helper_funcs_group0~0.base, ~mga_encoder_helper_funcs_group0~0.offset := 0, 0;~mga_helper_funcs_group0~0.base, ~mga_helper_funcs_group0~0.offset := 0, 0;call ~#pciidlist~0.base, ~#pciidlist~0.offset := #Ultimate.alloc(224);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pciidlist~0.base);call write~unchecked~int(4139, ~#pciidlist~0.base, ~#pciidlist~0.offset, 4);call write~unchecked~int(1314, ~#pciidlist~0.base, 4 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 8 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 12 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 16 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 20 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 24 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 32 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1316, ~#pciidlist~0.base, 36 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 40 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 44 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 48 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 52 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1, ~#pciidlist~0.base, 56 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 64 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1328, ~#pciidlist~0.base, 68 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 72 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 76 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 80 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 84 + ~#pciidlist~0.offset, 4);call write~unchecked~int(3, ~#pciidlist~0.base, 88 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 96 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1330, ~#pciidlist~0.base, 100 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 104 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 108 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 112 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 116 + ~#pciidlist~0.offset, 4);call write~unchecked~int(2, ~#pciidlist~0.base, 120 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 128 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1331, ~#pciidlist~0.base, 132 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 136 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 140 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 144 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 148 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4, ~#pciidlist~0.base, 152 + ~#pciidlist~0.offset, 8);call write~unchecked~int(4139, ~#pciidlist~0.base, 160 + ~#pciidlist~0.offset, 4);call write~unchecked~int(1332, ~#pciidlist~0.base, 164 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 168 + ~#pciidlist~0.offset, 4);call write~unchecked~int(4294967295, ~#pciidlist~0.base, 172 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 176 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 180 + ~#pciidlist~0.offset, 4);call write~unchecked~int(5, ~#pciidlist~0.base, 184 + ~#pciidlist~0.offset, 8);call write~unchecked~int(0, ~#pciidlist~0.base, 192 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 196 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 200 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 204 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 208 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 212 + ~#pciidlist~0.offset, 4);call write~unchecked~int(0, ~#pciidlist~0.base, 216 + ~#pciidlist~0.offset, 8);~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[0 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[0 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[0 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[0 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[0 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[0 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[0 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[1 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[1 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[1 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[1 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[1 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[1 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[1 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[2 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[2 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[2 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[2 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[2 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[2 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[2 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[3 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[3 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[3 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[3 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[3 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[3 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[3 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[4 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[4 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[4 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[4 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[4 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[4 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[4 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[5 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[5 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[5 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[5 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[5 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[5 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[5 := 0];~__mod_pci__pciidlist_device_table~0.vendor := ~__mod_pci__pciidlist_device_table~0.vendor[6 := 0];~__mod_pci__pciidlist_device_table~0.device := ~__mod_pci__pciidlist_device_table~0.device[6 := 0];~__mod_pci__pciidlist_device_table~0.subvendor := ~__mod_pci__pciidlist_device_table~0.subvendor[6 := 0];~__mod_pci__pciidlist_device_table~0.subdevice := ~__mod_pci__pciidlist_device_table~0.subdevice[6 := 0];~__mod_pci__pciidlist_device_table~0.class := ~__mod_pci__pciidlist_device_table~0.class[6 := 0];~__mod_pci__pciidlist_device_table~0.class_mask := ~__mod_pci__pciidlist_device_table~0.class_mask[6 := 0];~__mod_pci__pciidlist_device_table~0.driver_data := ~__mod_pci__pciidlist_device_table~0.driver_data[6 := 0];call ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset := #Ultimate.alloc(224);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 8 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_read.base, #funAddr~drm_read.offset, ~#mgag200_driver_fops~0.base, 16 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 24 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 32 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 40 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 48 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_poll.base, #funAddr~drm_poll.offset, ~#mgag200_driver_fops~0.base, 56 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_ioctl.base, #funAddr~drm_ioctl.offset, ~#mgag200_driver_fops~0.base, 64 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_compat_ioctl.base, #funAddr~drm_compat_ioctl.offset, ~#mgag200_driver_fops~0.base, 72 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_mmap.base, #funAddr~mgag200_mmap.offset, ~#mgag200_driver_fops~0.base, 80 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 88 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_open.base, #funAddr~drm_open.offset, ~#mgag200_driver_fops~0.base, 96 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 104 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(#funAddr~drm_release.base, #funAddr~drm_release.offset, ~#mgag200_driver_fops~0.base, 112 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 120 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 128 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 136 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 144 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 152 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 160 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 168 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 176 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 184 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 192 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 200 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 208 + ~#mgag200_driver_fops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_driver_fops~0.base, 216 + ~#mgag200_driver_fops~0.offset, 8);call ~#driver~0.base, ~#driver~0.offset := #Ultimate.alloc(472);call write~$Pointer$(0, 0, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_load.base, #funAddr~mgag200_driver_load.offset, ~#driver~0.base, ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 8 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 16 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 24 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 32 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 40 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_driver_unload.base, #funAddr~mgag200_driver_unload.offset, ~#driver~0.base, 48 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 56 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 64 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 72 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 80 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 88 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_pci_set_busid.base, #funAddr~drm_pci_set_busid.offset, ~#driver~0.base, 96 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 104 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 112 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 120 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 128 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 136 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 144 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 152 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 160 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 168 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 176 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 184 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 192 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 200 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 208 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 216 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 224 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_gem_free_object.base, #funAddr~mgag200_gem_free_object.offset, ~#driver~0.base, 232 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 240 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 248 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 256 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 264 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 272 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 280 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 288 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 296 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 304 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 312 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 320 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 328 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 336 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 344 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 352 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_create.base, #funAddr~mgag200_dumb_create.offset, ~#driver~0.base, 360 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_dumb_mmap_offset.base, #funAddr~mgag200_dumb_mmap_offset.offset, ~#driver~0.base, 368 + ~#driver~0.offset, 8);call write~$Pointer$(#funAddr~drm_gem_dumb_destroy.base, #funAddr~drm_gem_dumb_destroy.offset, ~#driver~0.base, 376 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 384 + ~#driver~0.offset, 8);call write~unchecked~int(1, ~#driver~0.base, 392 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 396 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 400 + ~#driver~0.offset, 4);call write~$Pointer$(#t~string1278.base, #t~string1278.offset, ~#driver~0.base, 404 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1279.base, #t~string1279.offset, ~#driver~0.base, 412 + ~#driver~0.offset, 8);call write~$Pointer$(#t~string1280.base, #t~string1280.offset, ~#driver~0.base, 420 + ~#driver~0.offset, 8);call write~unchecked~int(12288, ~#driver~0.base, 428 + ~#driver~0.offset, 4);call write~unchecked~int(0, ~#driver~0.base, 432 + ~#driver~0.offset, 4);call write~$Pointer$(0, 0, ~#driver~0.base, 436 + ~#driver~0.offset, 8);call write~unchecked~int(0, ~#driver~0.base, 444 + ~#driver~0.offset, 4);call write~$Pointer$(~#mgag200_driver_fops~0.base, ~#mgag200_driver_fops~0.offset, ~#driver~0.base, 448 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 456 + ~#driver~0.offset, 8);call write~$Pointer$(0, 0, ~#driver~0.base, 464 + ~#driver~0.offset, 8);call ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset := #Ultimate.alloc(305);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#mgag200_pci_driver~0.base);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 8 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#t~string1281.base, #t~string1281.offset, ~#mgag200_pci_driver~0.base, 16 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(~#pciidlist~0.base, ~#pciidlist~0.offset, ~#mgag200_pci_driver~0.base, 24 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_probe.base, #funAddr~mga_pci_probe.offset, ~#mgag200_pci_driver~0.base, 32 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(#funAddr~mga_pci_remove.base, #funAddr~mga_pci_remove.offset, ~#mgag200_pci_driver~0.base, 40 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 48 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 56 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 64 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 72 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 80 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 88 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 96 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 104 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 112 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 120 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 128 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 136 + ~#mgag200_pci_driver~0.offset, 1);call write~int(0, ~#mgag200_pci_driver~0.base, 137 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 141 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 149 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 157 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 165 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 173 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 181 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 189 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 197 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 205 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 213 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 221 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 225 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 229 + ~#mgag200_pci_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 233 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 241 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 249 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 257 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 265 + ~#mgag200_pci_driver~0.offset, 8);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 273 + ~#mgag200_pci_driver~0.offset, 4);call write~unchecked~int(0, ~#mgag200_pci_driver~0.base, 277 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 289 + ~#mgag200_pci_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_pci_driver~0.base, 297 + ~#mgag200_pci_driver~0.offset, 8);call ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset := #Ultimate.alloc(192);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mgag200fb_ops~0.base, ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 8 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 16 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 24 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 32 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_check_var.base, #funAddr~drm_fb_helper_check_var.offset, ~#mgag200fb_ops~0.base, 40 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_set_par.base, #funAddr~drm_fb_helper_set_par.offset, ~#mgag200fb_ops~0.base, 48 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 56 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_setcmap.base, #funAddr~drm_fb_helper_setcmap.offset, ~#mgag200fb_ops~0.base, 64 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_blank.base, #funAddr~drm_fb_helper_blank.offset, ~#mgag200fb_ops~0.base, 72 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~drm_fb_helper_pan_display.base, #funAddr~drm_fb_helper_pan_display.offset, ~#mgag200fb_ops~0.base, 80 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_fillrect.base, #funAddr~mga_fillrect.offset, ~#mgag200fb_ops~0.base, 88 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_copyarea.base, #funAddr~mga_copyarea.offset, ~#mgag200fb_ops~0.base, 96 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(#funAddr~mga_imageblit.base, #funAddr~mga_imageblit.offset, ~#mgag200fb_ops~0.base, 104 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 112 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 120 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 128 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 136 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 144 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 152 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 160 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 168 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 176 + ~#mgag200fb_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200fb_ops~0.base, 184 + ~#mgag200fb_ops~0.offset, 8);call ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset := #Ultimate.alloc(32);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_set.base, #funAddr~mga_crtc_fb_gamma_set.offset, ~#mga_fb_helper_funcs~0.base, ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mga_crtc_fb_gamma_get.base, #funAddr~mga_crtc_fb_gamma_get.offset, ~#mga_fb_helper_funcs~0.base, 8 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(#funAddr~mgag200fb_create.base, #funAddr~mgag200fb_create.offset, ~#mga_fb_helper_funcs~0.base, 16 + ~#mga_fb_helper_funcs~0.offset, 8);call write~$Pointer$(0, 0, ~#mga_fb_helper_funcs~0.base, 24 + ~#mga_fb_helper_funcs~0.offset, 8);call ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset := #Ultimate.alloc(24);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_tt_backend_func~0.base, 8 + ~#mgag200_tt_backend_func~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_backend_destroy.base, #funAddr~mgag200_ttm_backend_destroy.offset, ~#mgag200_tt_backend_func~0.base, 16 + ~#mgag200_tt_backend_func~0.offset, 8);call ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset := #Ultimate.alloc(104);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_create.base, #funAddr~mgag200_ttm_tt_create.offset, ~#mgag200_bo_driver~0.base, ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_populate.base, #funAddr~mgag200_ttm_tt_populate.offset, ~#mgag200_bo_driver~0.base, 8 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_tt_unpopulate.base, #funAddr~mgag200_ttm_tt_unpopulate.offset, ~#mgag200_bo_driver~0.base, 16 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 24 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_init_mem_type.base, #funAddr~mgag200_bo_init_mem_type.offset, ~#mgag200_bo_driver~0.base, 32 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_evict_flags.base, #funAddr~mgag200_bo_evict_flags.offset, ~#mgag200_bo_driver~0.base, 40 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_move.base, #funAddr~mgag200_bo_move.offset, ~#mgag200_bo_driver~0.base, 48 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_bo_verify_access.base, #funAddr~mgag200_bo_verify_access.offset, ~#mgag200_bo_driver~0.base, 56 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 64 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 72 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#mgag200_bo_driver~0.base, 80 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_reserve.base, #funAddr~mgag200_ttm_io_mem_reserve.offset, ~#mgag200_bo_driver~0.base, 88 + ~#mgag200_bo_driver~0.offset, 8);call write~$Pointer$(#funAddr~mgag200_ttm_io_mem_free.base, #funAddr~mgag200_ttm_io_mem_free.offset, ~#mgag200_bo_driver~0.base, 96 + ~#mgag200_bo_driver~0.offset, 8); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,048 INFO L273 TraceCheckUtils]: 2: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume true; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,048 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} {478404#true} #7183#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,049 INFO L256 TraceCheckUtils]: 4: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1890 := main(); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,049 INFO L273 TraceCheckUtils]: 5: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc ~ldvarg11~0.base, ~ldvarg11~0.offset;havoc ~tmp~83.base, ~tmp~83.offset;call ~#ldvarg7~0.base, ~#ldvarg7~0.offset := #Ultimate.alloc(8);call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(8);havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___0~48.base, ~tmp___0~48.offset;havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___1~24.base, ~tmp___1~24.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);call ~#ldvarg4~0.base, ~#ldvarg4~0.offset := #Ultimate.alloc(4);call ~#ldvarg10~0.base, ~#ldvarg10~0.offset := #Ultimate.alloc(4);havoc ~ldvarg9~0.base, ~ldvarg9~0.offset;havoc ~tmp___2~16.base, ~tmp___2~16.offset;call ~#ldvarg39~0.base, ~#ldvarg39~0.offset := #Ultimate.alloc(4);havoc ~ldvarg37~0.base, ~ldvarg37~0.offset;havoc ~tmp___3~11.base, ~tmp___3~11.offset;havoc ~ldvarg35~0.base, ~ldvarg35~0.offset;havoc ~tmp___4~7.base, ~tmp___4~7.offset;call ~#ldvarg41~0.base, ~#ldvarg41~0.offset := #Ultimate.alloc(8);havoc ~ldvarg36~0.base, ~ldvarg36~0.offset;havoc ~tmp___5~3.base, ~tmp___5~3.offset;call ~#ldvarg40~0.base, ~#ldvarg40~0.offset := #Ultimate.alloc(4);havoc ~ldvarg38~0.base, ~ldvarg38~0.offset;havoc ~tmp___6~3.base, ~tmp___6~3.offset;havoc ~ldvarg74~0.base, ~ldvarg74~0.offset;havoc ~tmp___7~2.base, ~tmp___7~2.offset;havoc ~tmp___8~2;havoc ~tmp___9~1;havoc ~tmp___10~1;havoc ~tmp___11~1;havoc ~tmp___12~1; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,049 INFO L256 TraceCheckUtils]: 6: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1289.base, #t~ret1289.offset := ldv_init_zalloc(1); {478404#true} is VALID [2018-11-19 17:26:13,049 INFO L273 TraceCheckUtils]: 7: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L256 TraceCheckUtils]: 8: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L273 TraceCheckUtils]: 9: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L273 TraceCheckUtils]: 10: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L273 TraceCheckUtils]: 12: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,050 INFO L273 TraceCheckUtils]: 13: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,051 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6963#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,051 INFO L273 TraceCheckUtils]: 15: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp~83.base, ~tmp~83.offset := #t~ret1289.base, #t~ret1289.offset;havoc #t~ret1289.base, #t~ret1289.offset;~ldvarg11~0.base, ~ldvarg11~0.offset := ~tmp~83.base, ~tmp~83.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,051 INFO L256 TraceCheckUtils]: 16: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1290.base, #t~ret1290.offset := ldv_init_zalloc(184); {478404#true} is VALID [2018-11-19 17:26:13,051 INFO L273 TraceCheckUtils]: 17: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,051 INFO L256 TraceCheckUtils]: 18: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,051 INFO L273 TraceCheckUtils]: 19: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,051 INFO L273 TraceCheckUtils]: 20: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,052 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,052 INFO L273 TraceCheckUtils]: 22: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,052 INFO L273 TraceCheckUtils]: 23: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,052 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6965#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,053 INFO L273 TraceCheckUtils]: 25: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___0~48.base, ~tmp___0~48.offset := #t~ret1290.base, #t~ret1290.offset;havoc #t~ret1290.base, #t~ret1290.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___0~48.base, ~tmp___0~48.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,054 INFO L256 TraceCheckUtils]: 26: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1291.base, #t~ret1291.offset := ldv_init_zalloc(16); {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L273 TraceCheckUtils]: 27: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L256 TraceCheckUtils]: 28: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L273 TraceCheckUtils]: 29: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L273 TraceCheckUtils]: 30: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L273 TraceCheckUtils]: 32: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,054 INFO L273 TraceCheckUtils]: 33: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,055 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6967#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,055 INFO L273 TraceCheckUtils]: 35: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___1~24.base, ~tmp___1~24.offset := #t~ret1291.base, #t~ret1291.offset;havoc #t~ret1291.base, #t~ret1291.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___1~24.base, ~tmp___1~24.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,055 INFO L256 TraceCheckUtils]: 36: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1292.base, #t~ret1292.offset := ldv_init_zalloc(8); {478404#true} is VALID [2018-11-19 17:26:13,055 INFO L273 TraceCheckUtils]: 37: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L256 TraceCheckUtils]: 38: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L273 TraceCheckUtils]: 39: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L273 TraceCheckUtils]: 40: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L273 TraceCheckUtils]: 42: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,056 INFO L273 TraceCheckUtils]: 43: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,057 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6969#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,057 INFO L273 TraceCheckUtils]: 45: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___2~16.base, ~tmp___2~16.offset := #t~ret1292.base, #t~ret1292.offset;havoc #t~ret1292.base, #t~ret1292.offset;~ldvarg9~0.base, ~ldvarg9~0.offset := ~tmp___2~16.base, ~tmp___2~16.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,057 INFO L256 TraceCheckUtils]: 46: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1293.base, #t~ret1293.offset := ldv_init_zalloc(352); {478404#true} is VALID [2018-11-19 17:26:13,057 INFO L273 TraceCheckUtils]: 47: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,057 INFO L256 TraceCheckUtils]: 48: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,057 INFO L273 TraceCheckUtils]: 49: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,057 INFO L273 TraceCheckUtils]: 50: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,058 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,058 INFO L273 TraceCheckUtils]: 52: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,058 INFO L273 TraceCheckUtils]: 53: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,058 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6971#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 55: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___3~11.base, ~tmp___3~11.offset := #t~ret1293.base, #t~ret1293.offset;havoc #t~ret1293.base, #t~ret1293.offset;~ldvarg37~0.base, ~ldvarg37~0.offset := ~tmp___3~11.base, ~tmp___3~11.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,059 INFO L256 TraceCheckUtils]: 56: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1294.base, #t~ret1294.offset := ldv_init_zalloc(248); {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 57: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L256 TraceCheckUtils]: 58: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 59: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 60: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 62: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,059 INFO L273 TraceCheckUtils]: 63: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,060 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6973#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,061 INFO L273 TraceCheckUtils]: 65: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___4~7.base, ~tmp___4~7.offset := #t~ret1294.base, #t~ret1294.offset;havoc #t~ret1294.base, #t~ret1294.offset;~ldvarg35~0.base, ~ldvarg35~0.offset := ~tmp___4~7.base, ~tmp___4~7.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,061 INFO L256 TraceCheckUtils]: 66: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1295.base, #t~ret1295.offset := ldv_init_zalloc(32); {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L273 TraceCheckUtils]: 67: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L256 TraceCheckUtils]: 68: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L273 TraceCheckUtils]: 69: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L273 TraceCheckUtils]: 70: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,061 INFO L273 TraceCheckUtils]: 72: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,062 INFO L273 TraceCheckUtils]: 73: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,062 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6975#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,062 INFO L273 TraceCheckUtils]: 75: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___5~3.base, ~tmp___5~3.offset := #t~ret1295.base, #t~ret1295.offset;havoc #t~ret1295.base, #t~ret1295.offset;~ldvarg36~0.base, ~ldvarg36~0.offset := ~tmp___5~3.base, ~tmp___5~3.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,062 INFO L256 TraceCheckUtils]: 76: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1296.base, #t~ret1296.offset := ldv_init_zalloc(8); {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L273 TraceCheckUtils]: 77: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L256 TraceCheckUtils]: 78: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L273 TraceCheckUtils]: 79: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L273 TraceCheckUtils]: 80: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L273 TraceCheckUtils]: 82: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,063 INFO L273 TraceCheckUtils]: 83: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,064 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6977#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,064 INFO L273 TraceCheckUtils]: 85: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___6~3.base, ~tmp___6~3.offset := #t~ret1296.base, #t~ret1296.offset;havoc #t~ret1296.base, #t~ret1296.offset;~ldvarg38~0.base, ~ldvarg38~0.offset := ~tmp___6~3.base, ~tmp___6~3.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,064 INFO L256 TraceCheckUtils]: 86: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1297.base, #t~ret1297.offset := ldv_init_zalloc(32); {478404#true} is VALID [2018-11-19 17:26:13,064 INFO L273 TraceCheckUtils]: 87: Hoare triple {478404#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc25.base, #t~malloc25.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,064 INFO L256 TraceCheckUtils]: 88: Hoare triple {478404#true} call #Ultimate.meminit(#t~malloc25.base, #t~malloc25.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,065 INFO L273 TraceCheckUtils]: 89: Hoare triple {478404#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {478404#true} is VALID [2018-11-19 17:26:13,065 INFO L273 TraceCheckUtils]: 90: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,065 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {478404#true} {478404#true} #6937#return; {478404#true} is VALID [2018-11-19 17:26:13,065 INFO L273 TraceCheckUtils]: 92: Hoare triple {478404#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc25.base, #t~malloc25.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {478404#true} is VALID [2018-11-19 17:26:13,065 INFO L273 TraceCheckUtils]: 93: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,066 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6979#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,067 INFO L273 TraceCheckUtils]: 95: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} ~tmp___7~2.base, ~tmp___7~2.offset := #t~ret1297.base, #t~ret1297.offset;havoc #t~ret1297.base, #t~ret1297.offset;~ldvarg74~0.base, ~ldvarg74~0.offset := ~tmp___7~2.base, ~tmp___7~2.offset;call ldv_initialize(); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,067 INFO L256 TraceCheckUtils]: 96: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1298.base, #t~ret1298.offset := ldv_memset(~#ldvarg7~0.base, ~#ldvarg7~0.offset, 0, 8); {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L273 TraceCheckUtils]: 97: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L256 TraceCheckUtils]: 98: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L273 TraceCheckUtils]: 99: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L273 TraceCheckUtils]: 100: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L273 TraceCheckUtils]: 101: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,067 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,068 INFO L273 TraceCheckUtils]: 103: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,068 INFO L273 TraceCheckUtils]: 104: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,069 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6981#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,069 INFO L273 TraceCheckUtils]: 106: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1298.base, #t~ret1298.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,069 INFO L256 TraceCheckUtils]: 107: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1299.base, #t~ret1299.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 8); {478404#true} is VALID [2018-11-19 17:26:13,069 INFO L273 TraceCheckUtils]: 108: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,069 INFO L256 TraceCheckUtils]: 109: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,069 INFO L273 TraceCheckUtils]: 110: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,070 INFO L273 TraceCheckUtils]: 111: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,070 INFO L273 TraceCheckUtils]: 112: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,070 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,070 INFO L273 TraceCheckUtils]: 114: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,070 INFO L273 TraceCheckUtils]: 115: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,071 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6983#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,075 INFO L273 TraceCheckUtils]: 117: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1299.base, #t~ret1299.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,075 INFO L256 TraceCheckUtils]: 118: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1300.base, #t~ret1300.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {478404#true} is VALID [2018-11-19 17:26:13,075 INFO L273 TraceCheckUtils]: 119: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,075 INFO L256 TraceCheckUtils]: 120: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L273 TraceCheckUtils]: 121: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L273 TraceCheckUtils]: 122: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L273 TraceCheckUtils]: 123: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L273 TraceCheckUtils]: 125: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,076 INFO L273 TraceCheckUtils]: 126: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,077 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6985#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,077 INFO L273 TraceCheckUtils]: 128: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1300.base, #t~ret1300.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,077 INFO L256 TraceCheckUtils]: 129: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1301.base, #t~ret1301.offset := ldv_memset(~#ldvarg4~0.base, ~#ldvarg4~0.offset, 0, 4); {478404#true} is VALID [2018-11-19 17:26:13,077 INFO L273 TraceCheckUtils]: 130: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L256 TraceCheckUtils]: 131: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L273 TraceCheckUtils]: 132: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L273 TraceCheckUtils]: 133: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L273 TraceCheckUtils]: 134: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L273 TraceCheckUtils]: 136: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,078 INFO L273 TraceCheckUtils]: 137: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,079 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6987#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,079 INFO L273 TraceCheckUtils]: 139: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1301.base, #t~ret1301.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,079 INFO L256 TraceCheckUtils]: 140: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1302.base, #t~ret1302.offset := ldv_memset(~#ldvarg10~0.base, ~#ldvarg10~0.offset, 0, 8); {478404#true} is VALID [2018-11-19 17:26:13,079 INFO L273 TraceCheckUtils]: 141: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,079 INFO L256 TraceCheckUtils]: 142: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L273 TraceCheckUtils]: 143: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L273 TraceCheckUtils]: 144: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L273 TraceCheckUtils]: 145: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L273 TraceCheckUtils]: 147: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,080 INFO L273 TraceCheckUtils]: 148: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,081 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6989#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,081 INFO L273 TraceCheckUtils]: 150: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1302.base, #t~ret1302.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,081 INFO L256 TraceCheckUtils]: 151: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1303.base, #t~ret1303.offset := ldv_memset(~#ldvarg39~0.base, ~#ldvarg39~0.offset, 0, 4); {478404#true} is VALID [2018-11-19 17:26:13,081 INFO L273 TraceCheckUtils]: 152: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,081 INFO L256 TraceCheckUtils]: 153: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L273 TraceCheckUtils]: 154: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L273 TraceCheckUtils]: 155: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L273 TraceCheckUtils]: 156: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L273 TraceCheckUtils]: 158: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,082 INFO L273 TraceCheckUtils]: 159: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,083 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6991#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,083 INFO L273 TraceCheckUtils]: 161: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1303.base, #t~ret1303.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,083 INFO L256 TraceCheckUtils]: 162: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1304.base, #t~ret1304.offset := ldv_memset(~#ldvarg41~0.base, ~#ldvarg41~0.offset, 0, 8); {478404#true} is VALID [2018-11-19 17:26:13,083 INFO L273 TraceCheckUtils]: 163: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,083 INFO L256 TraceCheckUtils]: 164: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,083 INFO L273 TraceCheckUtils]: 165: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,084 INFO L273 TraceCheckUtils]: 166: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,084 INFO L273 TraceCheckUtils]: 167: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,084 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,084 INFO L273 TraceCheckUtils]: 169: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,084 INFO L273 TraceCheckUtils]: 170: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,085 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6993#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,086 INFO L273 TraceCheckUtils]: 172: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1304.base, #t~ret1304.offset; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,086 INFO L256 TraceCheckUtils]: 173: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1305.base, #t~ret1305.offset := ldv_memset(~#ldvarg40~0.base, ~#ldvarg40~0.offset, 0, 4); {478404#true} is VALID [2018-11-19 17:26:13,086 INFO L273 TraceCheckUtils]: 174: Hoare triple {478404#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,086 INFO L256 TraceCheckUtils]: 175: Hoare triple {478404#true} call #t~memset~res26.base, #t~memset~res26.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {478404#true} is VALID [2018-11-19 17:26:13,086 INFO L273 TraceCheckUtils]: 176: Hoare triple {478404#true} #t~loopctr1891 := 0; {478404#true} is VALID [2018-11-19 17:26:13,086 INFO L273 TraceCheckUtils]: 177: Hoare triple {478404#true} assume !(#t~loopctr1891 < #amount); {478404#true} is VALID [2018-11-19 17:26:13,086 INFO L273 TraceCheckUtils]: 178: Hoare triple {478404#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {478404#true} is VALID [2018-11-19 17:26:13,087 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {478404#true} {478404#true} #7575#return; {478404#true} is VALID [2018-11-19 17:26:13,087 INFO L273 TraceCheckUtils]: 180: Hoare triple {478404#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res26.base, #t~memset~res26.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {478404#true} is VALID [2018-11-19 17:26:13,087 INFO L273 TraceCheckUtils]: 181: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,087 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #6995#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,088 INFO L273 TraceCheckUtils]: 183: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} havoc #t~ret1305.base, #t~ret1305.offset;~ldv_state_variable_11~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_13~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_12~0 := 0;~ldv_state_variable_14~0 := 0;~ldv_state_variable_15~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,088 INFO L273 TraceCheckUtils]: 184: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume -2147483648 <= #t~nondet1306 && #t~nondet1306 <= 2147483647;~tmp___8~2 := #t~nondet1306;havoc #t~nondet1306;#t~switch1307 := 0 == ~tmp___8~2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,088 INFO L273 TraceCheckUtils]: 185: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 1 == ~tmp___8~2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,089 INFO L273 TraceCheckUtils]: 186: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 2 == ~tmp___8~2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,089 INFO L273 TraceCheckUtils]: 187: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 3 == ~tmp___8~2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,089 INFO L273 TraceCheckUtils]: 188: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !#t~switch1307;#t~switch1307 := #t~switch1307 || 4 == ~tmp___8~2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,089 INFO L273 TraceCheckUtils]: 189: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume #t~switch1307; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,090 INFO L273 TraceCheckUtils]: 190: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1324 && #t~nondet1324 <= 2147483647;~tmp___10~1 := #t~nondet1324;havoc #t~nondet1324;#t~switch1325 := 0 == ~tmp___10~1; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,090 INFO L273 TraceCheckUtils]: 191: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !#t~switch1325;#t~switch1325 := #t~switch1325 || 1 == ~tmp___10~1; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,090 INFO L273 TraceCheckUtils]: 192: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume #t~switch1325; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,091 INFO L273 TraceCheckUtils]: 193: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume 1 == ~ldv_state_variable_0~0; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,091 INFO L256 TraceCheckUtils]: 194: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call #t~ret1326 := mgag200_init(); {478404#true} is VALID [2018-11-19 17:26:13,091 INFO L273 TraceCheckUtils]: 195: Hoare triple {478404#true} havoc ~tmp~79;havoc ~tmp___0~45;call #t~ret1282 := vgacon_text_force();~tmp~79 := #t~ret1282;havoc #t~ret1282; {478404#true} is VALID [2018-11-19 17:26:13,092 INFO L273 TraceCheckUtils]: 196: Hoare triple {478404#true} assume 0 != ~tmp~79 % 256 && -1 == ~mgag200_modeset~0;#res := -22; {478404#true} is VALID [2018-11-19 17:26:13,092 INFO L273 TraceCheckUtils]: 197: Hoare triple {478404#true} assume true; {478404#true} is VALID [2018-11-19 17:26:13,092 INFO L268 TraceCheckUtils]: 198: Hoare quadruple {478404#true} {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} #7011#return; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,093 INFO L273 TraceCheckUtils]: 199: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume -2147483648 <= #t~ret1326 && #t~ret1326 <= 2147483647;~ldv_retval_1~0 := #t~ret1326;havoc #t~ret1326; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,093 INFO L273 TraceCheckUtils]: 200: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(0 == ~ldv_retval_1~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,093 INFO L273 TraceCheckUtils]: 201: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,094 INFO L256 TraceCheckUtils]: 202: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} call ldv_check_final_state(); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,094 INFO L273 TraceCheckUtils]: 203: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(1 != ~ldv_mutex_base_of_ww_mutex~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,095 INFO L273 TraceCheckUtils]: 204: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(1 != ~ldv_mutex_i_mutex_of_inode~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,095 INFO L273 TraceCheckUtils]: 205: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(1 != ~ldv_mutex_lock~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,095 INFO L273 TraceCheckUtils]: 206: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(1 != ~ldv_mutex_lock_of_fb_info~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,096 INFO L273 TraceCheckUtils]: 207: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume !(1 != ~ldv_mutex_mutex_of_device~0); {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} is VALID [2018-11-19 17:26:13,096 INFO L273 TraceCheckUtils]: 208: Hoare triple {478406#(= 1 ~ldv_mutex_struct_mutex_of_drm_device~0)} assume 1 != ~ldv_mutex_struct_mutex_of_drm_device~0; {478405#false} is VALID [2018-11-19 17:26:13,096 INFO L256 TraceCheckUtils]: 209: Hoare triple {478405#false} call ldv_error(); {478405#false} is VALID [2018-11-19 17:26:13,097 INFO L273 TraceCheckUtils]: 210: Hoare triple {478405#false} assume !false; {478405#false} is VALID [2018-11-19 17:26:13,124 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:26:13,124 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:26:13,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:26:13,125 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 211 [2018-11-19 17:26:13,125 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:26:13,125 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:26:13,275 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:26:13,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:26:13,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:26:13,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:26:13,276 INFO L87 Difference]: Start difference. First operand 17278 states and 24426 transitions. Second operand 3 states. [2018-11-19 17:32:57,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:32:57,490 INFO L93 Difference]: Finished difference Result 50454 states and 71628 transitions. [2018-11-19 17:32:57,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:32:57,490 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 211 [2018-11-19 17:32:57,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:32:57,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:32:57,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9724 transitions. [2018-11-19 17:32:57,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:32:57,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9724 transitions. [2018-11-19 17:32:57,918 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 9724 transitions. [2018-11-19 17:33:05,718 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 9724 edges. 9724 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:34:52,996 INFO L225 Difference]: With dead ends: 50454 [2018-11-19 17:34:52,996 INFO L226 Difference]: Without dead ends: 33216 [2018-11-19 17:34:53,032 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:34:53,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33216 states.