java -ea -Xmx16000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--net--usb--r8152.ko-entry_point_true-unreach-call.cil.out.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c6a52e0 [2018-11-19 17:17:15,338 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-19 17:17:15,340 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-19 17:17:15,352 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-19 17:17:15,353 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-19 17:17:15,354 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-19 17:17:15,355 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-19 17:17:15,357 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-19 17:17:15,358 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-19 17:17:15,359 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-19 17:17:15,360 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-19 17:17:15,360 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-19 17:17:15,361 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-19 17:17:15,362 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-19 17:17:15,363 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-19 17:17:15,364 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-19 17:17:15,365 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-19 17:17:15,366 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-19 17:17:15,368 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-19 17:17:15,370 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-19 17:17:15,371 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-19 17:17:15,372 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-19 17:17:15,375 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-19 17:17:15,375 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-19 17:17:15,375 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-19 17:17:15,376 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-19 17:17:15,377 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-19 17:17:15,378 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-19 17:17:15,379 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-19 17:17:15,380 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-19 17:17:15,380 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-19 17:17:15,380 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-19 17:17:15,381 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-19 17:17:15,381 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-19 17:17:15,382 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-19 17:17:15,382 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-19 17:17:15,383 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-11-19 17:17:15,397 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-19 17:17:15,398 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-19 17:17:15,398 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-19 17:17:15,399 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-19 17:17:15,399 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-19 17:17:15,399 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-19 17:17:15,400 INFO L133 SettingsManager]: * Use SBE=true [2018-11-19 17:17:15,400 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-19 17:17:15,400 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-19 17:17:15,400 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-19 17:17:15,400 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-19 17:17:15,401 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-19 17:17:15,401 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-19 17:17:15,401 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-19 17:17:15,401 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-19 17:17:15,401 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-19 17:17:15,402 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-19 17:17:15,402 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-19 17:17:15,402 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-19 17:17:15,402 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-19 17:17:15,402 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 17:17:15,403 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-19 17:17:15,403 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-19 17:17:15,403 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-19 17:17:15,403 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-19 17:17:15,403 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-19 17:17:15,404 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-19 17:17:15,404 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-19 17:17:15,404 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-11-19 17:17:15,447 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-19 17:17:15,460 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-19 17:17:15,463 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-19 17:17:15,465 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-19 17:17:15,466 INFO L276 PluginConnector]: CDTParser initialized [2018-11-19 17:17:15,466 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--net--usb--r8152.ko-entry_point_true-unreach-call.cil.out.c [2018-11-19 17:17:15,527 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/39843851d/dd0e6829226e4d459b190d6126305850/FLAG707517f1a [2018-11-19 17:17:16,228 INFO L307 CDTParser]: Found 1 translation units. [2018-11-19 17:17:16,229 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-32_7a-drivers--net--usb--r8152.ko-entry_point_true-unreach-call.cil.out.c [2018-11-19 17:17:16,270 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/39843851d/dd0e6829226e4d459b190d6126305850/FLAG707517f1a [2018-11-19 17:17:16,492 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/39843851d/dd0e6829226e4d459b190d6126305850 [2018-11-19 17:17:16,501 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-19 17:17:16,502 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-19 17:17:16,503 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-19 17:17:16,503 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-19 17:17:16,506 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-19 17:17:16,507 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 05:17:16" (1/1) ... [2018-11-19 17:17:16,510 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10834561 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:16, skipping insertion in model container [2018-11-19 17:17:16,510 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 05:17:16" (1/1) ... [2018-11-19 17:17:16,518 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-19 17:17:16,657 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-19 17:17:19,928 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 17:17:19,977 INFO L191 MainTranslator]: Completed pre-run [2018-11-19 17:17:20,517 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-19 17:17:21,509 INFO L195 MainTranslator]: Completed translation [2018-11-19 17:17:21,509 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21 WrapperNode [2018-11-19 17:17:21,510 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-19 17:17:21,510 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-19 17:17:21,510 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-19 17:17:21,510 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-19 17:17:21,522 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,522 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,602 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,603 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,785 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,821 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,863 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... [2018-11-19 17:17:21,902 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-19 17:17:21,903 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-19 17:17:21,903 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-19 17:17:21,903 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-19 17:17:21,904 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-19 17:17:21,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-19 17:17:21,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-19 17:17:21,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2018-11-19 17:17:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2018-11-19 17:17:21,972 INFO L138 BoogieDeclarations]: Found implementation of procedure __arch_swab32 [2018-11-19 17:17:21,972 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2018-11-19 17:17:21,972 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2018-11-19 17:17:21,972 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2018-11-19 17:17:21,972 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add_tail [2018-11-19 17:17:21,973 INFO L138 BoogieDeclarations]: Found implementation of procedure list_del_init [2018-11-19 17:17:21,973 INFO L138 BoogieDeclarations]: Found implementation of procedure list_empty [2018-11-19 17:17:21,973 INFO L138 BoogieDeclarations]: Found implementation of procedure __list_splice [2018-11-19 17:17:21,973 INFO L138 BoogieDeclarations]: Found implementation of procedure list_splice_tail [2018-11-19 17:17:21,973 INFO L138 BoogieDeclarations]: Found implementation of procedure list_splice_init [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_read [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2018-11-19 17:17:21,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ptr [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ulong [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_bh [2018-11-19 17:17:21,975 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_bh [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure queue_delayed_work [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure schedule_delayed_work [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2018-11-19 17:17:21,976 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc_node [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_node [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_end_pointer [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_queue_empty [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_header_cloned [2018-11-19 17:17:21,977 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_peek [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_queue_len [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_head_init [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_queue_head_init [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_insert [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_splice [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_queue_splice [2018-11-19 17:17:21,978 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_queue_splice_init [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_after [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_before [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_head [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_queue_tail [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_unlink [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_dequeue [2018-11-19 17:17:21,979 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_headlen [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure pskb_may_pull [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_headroom [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_transport_header [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_network_header [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_transport_offset [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure __netdev_alloc_skb_ip_align [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb_ip_align [2018-11-19 17:17:21,980 INFO L138 BoogieDeclarations]: Found implementation of procedure __skb_cow [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_cow_head [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure sw_tx_timestamp [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_tx_timestamp [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure if_mii [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable_pending [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_schedule_prep [2018-11-19 17:17:21,981 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_schedule [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_complete [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_enable [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2018-11-19 17:17:21,982 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_stop_queue [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_queue_stopped [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_queue_stopped [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_kfree_skb_any [2018-11-19 17:17:21,983 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure __netif_tx_lock [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure __netif_tx_unlock [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_lock [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_unlock [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_gso_segment [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_set_gso_max_size [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure is_zero_ether_addr [2018-11-19 17:17:21,984 INFO L138 BoogieDeclarations]: Found implementation of procedure is_multicast_ether_addr [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure is_valid_ether_addr [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_random_addr [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_hw_addr_random [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ether_addr_copy [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure pm_runtime_mark_last_busy [2018-11-19 17:17:21,985 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_get_intfdata [2018-11-19 17:17:21,986 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_set_intfdata [2018-11-19 17:17:21,986 INFO L138 BoogieDeclarations]: Found implementation of procedure interface_to_usbdev [2018-11-19 17:17:21,986 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_mark_last_busy [2018-11-19 17:17:21,986 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_make_path [2018-11-19 17:17:21,986 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_fill_bulk_urb [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_fill_int_urb [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __create_pipe [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __bitrev8 [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __bitrev16 [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __bitrev32 [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __vlan_hwaccel_put_tag [2018-11-19 17:17:21,987 INFO L138 BoogieDeclarations]: Found implementation of procedure __vlan_get_protocol [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure vlan_get_protocol [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ip_hdr [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure tcp_hdr [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ipv6_hdr [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure tcp_v6_check [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure mmd_eee_cap_to_ethtool_sup_t [2018-11-19 17:17:21,988 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_adv_to_mmd_eee_adv_t [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure get_registers [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure set_registers [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure generic_ocp_read [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure generic_ocp_write [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure pla_ocp_read [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure pla_ocp_write [2018-11-19 17:17:21,989 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_ocp_write [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_read_dword [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_write_dword [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_read_word [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_write_word [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_read_byte [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_write_byte [2018-11-19 17:17:21,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_reg_read [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ocp_reg_write [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_mdio_write [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_mdio_read [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure sram_write [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure read_mii_word [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure write_mii_word [2018-11-19 17:17:21,991 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_mac_address [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure set_ethernet_addr [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure read_bulk_callback [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure write_bulk_callback [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure intr_callback [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure rx_agg_align [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure tx_agg_align [2018-11-19 17:17:21,992 INFO L138 BoogieDeclarations]: Found implementation of procedure free_all_mem [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_all_mem [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_get_tx_agg [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_csum_workaround [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure msdn_giant_send_check [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_tx_vlan_tag [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_rx_vlan_tag [2018-11-19 17:17:21,993 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_tx_csum [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_tx_agg_fill [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_rx_csum [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure rx_bottom [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure tx_bottom [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure bottom_half [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_poll [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_submit_rx [2018-11-19 17:17:21,994 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_drop_queued_tx [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_tx_timeout [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_rx_mode [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure _rtl8152_set_rx_mode [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_features_check [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_start_xmit [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_reset_packet_filter [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_nic_reset [2018-11-19 17:17:21,995 INFO L138 BoogieDeclarations]: Found implementation of procedure set_tx_qlen [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_speed [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_set_eee_plus [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rxdy_gated_en [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_start_rx [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_stop_rx [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_enable [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_enable [2018-11-19 17:17:21,996 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_set_rx_early_timeout [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_set_rx_early_size [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8153_enable [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_disable [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_power_cut_en [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_rx_vlan_en [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_features [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure __rtl_get_wol [2018-11-19 17:17:21,997 INFO L138 BoogieDeclarations]: Found implementation of procedure __rtl_set_wol [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_runtime_suspend_enable [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_phy_reset [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_teredo_off [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_disable_aldps [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_enable_aldps [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_disable [2018-11-19 17:17:21,998 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_hw_phy_cfg [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_exit_oob [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_enter_oob [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_hw_phy_cfg [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_u1u2en [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_u2p3en [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_power_cut_en [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_first_init [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_enter_oob [2018-11-19 17:17:21,999 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_disable_aldps [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_enable_aldps [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8153_disable [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_speed [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_up [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_down [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8153_up [2018-11-19 17:17:22,000 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8153_down [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure set_carrier [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_work_func_t [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_open [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_close [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_mmd_indirect [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_mmd_read [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_mmd_write [2018-11-19 17:17:22,001 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_eee_en [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_enable_eee [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_eee_en [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_enable_eee [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_enable_fc [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_tally_reset [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_init [2018-11-19 17:17:22,002 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_init [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_suspend [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_resume [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_wol [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_wol [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_msglevel [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_msglevel [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_drvinfo [2018-11-19 17:17:22,003 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_settings [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_settings [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_sset_count [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_ethtool_stats [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_strings [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_get_eee [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152_set_eee [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_get_eee [2018-11-19 17:17:22,004 INFO L138 BoogieDeclarations]: Found implementation of procedure r8153_set_eee [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_ethtool_get_eee [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_ethtool_set_eee [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_nway_reset [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_get_coalesce [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_set_coalesce [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_ioctl [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_change_mtu [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure r8152b_get_version [2018-11-19 17:17:22,005 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_unload [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8153_unload [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl_ops_init [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_probe [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_disconnect [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_driver_init [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure rtl8152_driver_exit [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_driver_2 [2018-11-19 17:17:22,006 INFO L138 BoogieDeclarations]: Found implementation of procedure call_and_disable_work_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_work_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure work_init_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure call_and_disable_all_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure invoke_work_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_net_device_ops_3 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_ethtool_ops_4 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_work_1 [2018-11-19 17:17:22,007 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_queue_work_on_5 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_queue_delayed_work_on_6 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_queue_work_on_7 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_flush_workqueue_8 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_queue_delayed_work_on_9 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_10 [2018-11-19 17:17:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_11 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_12 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_13 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_14 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_15 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_16 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_17 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_18 [2018-11-19 17:17:22,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_19 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_20 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_cancel_delayed_work_sync_21 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_22 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_23 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_24 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_cancel_delayed_work_sync_25 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_26 [2018-11-19 17:17:22,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_cancel_delayed_work_sync_27 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_28 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_29 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_30 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_cancel_delayed_work_sync_31 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_32 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_33 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_34 [2018-11-19 17:17:22,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_35 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_36 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_37 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_38 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_39 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_40 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_41 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_42 [2018-11-19 17:17:22,012 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_43 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_44 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_45 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_46 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_47 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_48 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_49 [2018-11-19 17:17:22,013 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_50 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_51 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_52 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_53 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_54 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_55 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_56 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_register_netdev_57 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev_58 [2018-11-19 17:17:22,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_unregister_netdev_59 [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev_60 [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_register_driver_61 [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_deregister_62 [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int_negative [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_err_ptr [2018-11-19 17:17:22,015 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_ptr_err [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err_or_null [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_control_of_r8152 [2018-11-19 17:17:22,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_control_of_r8152 [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_control_of_r8152 [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_control_of_r8152 [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_control_of_r8152 [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_control_of_r8152 [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_i_mutex_of_inode [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_i_mutex_of_inode [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_i_mutex_of_inode [2018-11-19 17:17:22,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_i_mutex_of_inode [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_lock [2018-11-19 17:17:22,018 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_lock [2018-11-19 17:17:22,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_lock [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_lock [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_interruptible_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_killable_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_trylock_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_dec_and_mutex_lock_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_is_locked_mutex_of_device [2018-11-19 17:17:22,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_mutex_of_device [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_mutex_of_device [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_trylock_device_mutex_of_device [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_lock_device_for_reset_mutex_of_device [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_unlock_device_mutex_of_device [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2018-11-19 17:17:22,021 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-19 17:17:22,022 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-19 17:17:22,022 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2018-11-19 17:17:22,022 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure __arch_swab32 [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure snprintf [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2018-11-19 17:17:22,023 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_size_call_parameter [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure __list_add [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure list_add_tail [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure __list_del_entry [2018-11-19 17:17:22,024 INFO L130 BoogieDeclarations]: Found specification of procedure list_del_init [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure list_empty [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure __list_splice [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure list_splice_tail [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure list_splice_init [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-19 17:17:22,025 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure kmemdup [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_read [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure lockdep_init_map [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure __mutex_init [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_trylock [2018-11-19 17:17:22,026 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_13 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_22 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_11 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_14 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_15 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_18 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_20 [2018-11-19 17:17:22,027 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_23 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_26 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_29 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_32 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_34 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_36 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_38 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_40 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_42 [2018-11-19 17:17:22,028 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_44 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_46 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_48 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_50 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_52 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_54 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_56 [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-19 17:17:22,029 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-19 17:17:22,030 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ptr [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ulong [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-19 17:17:22,031 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_10 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_12 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_16 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_17 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_19 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_24 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_28 [2018-11-19 17:17:22,032 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_30 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_33 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_35 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_37 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_39 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_41 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_43 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_45 [2018-11-19 17:17:22,033 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_47 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_49 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_51 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_53 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_55 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_control_of_r8152 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_control_of_r8152 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_control_of_r8152 [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_i_mutex_of_inode [2018-11-19 17:17:22,034 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_i_mutex_of_inode [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_lock [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_lock [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_mutex_of_device [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_mutex_of_device [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_mutex_of_device [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2018-11-19 17:17:22,035 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_bh [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_bh [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_bh [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2018-11-19 17:17:22,036 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_bh [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure init_timer_key [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure delayed_work_timer_fn [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure __init_work [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure queue_work_on [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_queue_work_on_5 [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_queue_work_on_7 [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure queue_delayed_work_on [2018-11-19 17:17:22,037 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_queue_delayed_work_on_6 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_queue_delayed_work_on_9 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure flush_workqueue [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_flush_workqueue_8 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure cancel_delayed_work_sync [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_cancel_delayed_work_sync_21 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_cancel_delayed_work_sync_25 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_cancel_delayed_work_sync_27 [2018-11-19 17:17:22,038 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_cancel_delayed_work_sync_31 [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure work_busy [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure queue_delayed_work [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_delayed_work [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc_node [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2018-11-19 17:17:22,039 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc_node [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_driver_2 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure call_and_disable_work_1 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure disable_work_1 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure work_init_1 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure call_and_disable_all_1 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure invoke_work_1 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_net_device_ops_3 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_ethtool_ops_4 [2018-11-19 17:17:22,040 INFO L130 BoogieDeclarations]: Found specification of procedure activate_work_1 [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure usleep_range [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure device_set_wakeup_enable [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_node [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure dev_err [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure get_random_bytes [2018-11-19 17:17:22,041 INFO L130 BoogieDeclarations]: Found specification of procedure net_ratelimit [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure csum_ipv6_magic [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure pskb_expand_head [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure skb_end_pointer [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_empty [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure skb_header_cloned [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure skb_peek [2018-11-19 17:17:22,042 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_len [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_head_init [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_head_init [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_insert [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_splice [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_splice [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_splice_init [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_after [2018-11-19 17:17:22,043 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_before [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_head [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure skb_queue_tail [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_queue_tail [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_unlink [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_dequeue [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure skb_headlen [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure __pskb_pull_tail [2018-11-19 17:17:22,044 INFO L130 BoogieDeclarations]: Found specification of procedure pskb_may_pull [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure skb_headroom [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure skb_transport_header [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure skb_network_header [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure skb_transport_offset [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure __netdev_alloc_skb [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure __netdev_alloc_skb_ip_align [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb_ip_align [2018-11-19 17:17:22,045 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_cow [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure skb_cow_head [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure skb_copy_bits [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure skb_clone_tx_timestamp [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure skb_tstamp_tx [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure sw_tx_timestamp [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure skb_tx_timestamp [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_op_get_link [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure mii_nway_restart [2018-11-19 17:17:22,046 INFO L130 BoogieDeclarations]: Found specification of procedure mii_ethtool_gset [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure if_mii [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure __napi_schedule [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable_pending [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_schedule_prep [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_schedule [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_complete [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure napi_enable [2018-11-19 17:17:22,047 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netif_napi_add [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netif_napi_del [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev_58 [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev_60 [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netif_schedule_queue [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2018-11-19 17:17:22,048 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_wake_queue [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_stop_queue [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_queue_stopped [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_queue_stopped [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure __dev_kfree_skb_any [2018-11-19 17:17:22,049 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure napi_gro_receive [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_detach [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_device_attach [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_tx_lock [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_tx_unlock [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_lock [2018-11-19 17:17:22,050 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_unlock [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure register_netdev [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_register_netdev_57 [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdev [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_unregister_netdev_59 [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure skb_checksum_help [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure __skb_gso_segment [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure skb_gso_segment [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure netif_set_gso_max_size [2018-11-19 17:17:22,051 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_err [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_warn [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_notice [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_info [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure eth_type_trans [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure eth_change_mtu [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_etherdev_mqs [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure is_zero_ether_addr [2018-11-19 17:17:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure is_multicast_ether_addr [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure is_valid_ether_addr [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure eth_random_addr [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure eth_hw_addr_random [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure ether_addr_copy [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure pm_runtime_mark_last_busy [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure usb_get_intfdata [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure usb_set_intfdata [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure interface_to_usbdev [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure usb_reset_device [2018-11-19 17:17:22,053 INFO L130 BoogieDeclarations]: Found specification of procedure usb_autopm_get_interface [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_autopm_put_interface [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_autopm_get_interface_async [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_autopm_put_interface_async [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_mark_last_busy [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_make_path [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_register_driver [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_register_driver_61 [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure usb_deregister [2018-11-19 17:17:22,054 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_deregister_62 [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_fill_bulk_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_fill_int_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_alloc_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_submit_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_unlink_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_kill_urb [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_control_msg [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure usb_driver_set_configuration [2018-11-19 17:17:22,055 INFO L130 BoogieDeclarations]: Found specification of procedure __create_pipe [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure __bitrev8 [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure __bitrev16 [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure __bitrev32 [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure crc32_le [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure __vlan_hwaccel_put_tag [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure __vlan_get_protocol [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure vlan_get_protocol [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure ip_hdr [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure tcp_hdr [2018-11-19 17:17:22,056 INFO L130 BoogieDeclarations]: Found specification of procedure ipv6_hdr [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure tcp_v6_check [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure mmd_eee_cap_to_ethtool_sup_t [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_adv_to_mmd_eee_adv_t [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure get_registers [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure set_registers [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure generic_ocp_read [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure generic_ocp_write [2018-11-19 17:17:22,057 INFO L130 BoogieDeclarations]: Found specification of procedure pla_ocp_read [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure pla_ocp_write [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure usb_ocp_write [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_read_dword [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_write_dword [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_read_word [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_write_word [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_read_byte [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_write_byte [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_reg_read [2018-11-19 17:17:22,058 INFO L130 BoogieDeclarations]: Found specification of procedure ocp_reg_write [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_mdio_write [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_mdio_read [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure sram_write [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure read_mii_word [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure write_mii_word [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_submit_rx [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_mac_address [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure set_ethernet_addr [2018-11-19 17:17:22,059 INFO L130 BoogieDeclarations]: Found specification of procedure read_bulk_callback [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure write_bulk_callback [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure intr_callback [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure rx_agg_align [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure tx_agg_align [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure free_all_mem [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_all_mem [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_get_tx_agg [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_csum_workaround [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure msdn_giant_send_check [2018-11-19 17:17:22,060 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_tx_vlan_tag [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_rx_vlan_tag [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_tx_csum [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_tx_agg_fill [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_rx_csum [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure rx_bottom [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure tx_bottom [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure bottom_half [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_poll [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_drop_queued_tx [2018-11-19 17:17:22,061 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_tx_timeout [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_rx_mode [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure _rtl8152_set_rx_mode [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_features_check [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_start_xmit [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_reset_packet_filter [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_nic_reset [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure set_tx_qlen [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_speed [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_set_eee_plus [2018-11-19 17:17:22,062 INFO L130 BoogieDeclarations]: Found specification of procedure rxdy_gated_en [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_start_rx [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_stop_rx [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_enable [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_enable [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_set_rx_early_timeout [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_set_rx_early_size [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8153_enable [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_disable [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_power_cut_en [2018-11-19 17:17:22,063 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_rx_vlan_en [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_features [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure __rtl_get_wol [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure __rtl_set_wol [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_runtime_suspend_enable [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_phy_reset [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_teredo_off [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_disable_aldps [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_enable_aldps [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_disable [2018-11-19 17:17:22,064 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_hw_phy_cfg [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_exit_oob [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_enter_oob [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_hw_phy_cfg [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_u1u2en [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_u2p3en [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_power_cut_en [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_first_init [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_enter_oob [2018-11-19 17:17:22,065 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_disable_aldps [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_enable_aldps [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8153_disable [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_speed [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_up [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_down [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8153_up [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8153_down [2018-11-19 17:17:22,066 INFO L130 BoogieDeclarations]: Found specification of procedure set_carrier [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_work_func_t [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_open [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_close [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_mmd_indirect [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_mmd_read [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_mmd_write [2018-11-19 17:17:22,067 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_eee_en [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_enable_eee [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_eee_en [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_enable_eee [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_enable_fc [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_tally_reset [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_init [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_init [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_suspend [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_resume [2018-11-19 17:17:22,068 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_wol [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_wol [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_msglevel [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_msglevel [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_drvinfo [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_settings [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_settings [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_sset_count [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_ethtool_stats [2018-11-19 17:17:22,069 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_strings [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_get_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure r8152_set_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_get_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure r8153_set_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_ethtool_get_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_ethtool_set_eee [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_nway_reset [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_get_coalesce [2018-11-19 17:17:22,070 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_set_coalesce [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_ioctl [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_change_mtu [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure r8152b_get_version [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_unload [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8153_unload [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl_ops_init [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_probe [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_disconnect [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_driver_init [2018-11-19 17:17:22,071 INFO L130 BoogieDeclarations]: Found specification of procedure rtl8152_driver_exit [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_ndo_uninit_3 [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_ndo_init_3 [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int_negative [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_err_ptr [2018-11-19 17:17:22,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_ptr_err [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err_or_null [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_control_of_r8152 [2018-11-19 17:17:22,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_i_mutex_of_inode [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_lock [2018-11-19 17:17:22,074 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_trylock_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_lock [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_interruptible_mutex_of_device [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_killable_mutex_of_device [2018-11-19 17:17:22,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_dec_and_mutex_lock_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_is_locked_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_trylock_device_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_lock_device_for_reset_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_unlock_device_mutex_of_device [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-19 17:17:22,076 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-19 17:17:37,910 INFO L271 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-19 17:17:37,911 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 05:17:37 BoogieIcfgContainer [2018-11-19 17:17:37,911 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-19 17:17:37,912 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-19 17:17:37,912 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-19 17:17:37,915 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-19 17:17:37,915 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.11 05:17:16" (1/3) ... [2018-11-19 17:17:37,915 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e5f2f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 05:17:37, skipping insertion in model container [2018-11-19 17:17:37,915 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 05:17:21" (2/3) ... [2018-11-19 17:17:37,916 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e5f2f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 05:17:37, skipping insertion in model container [2018-11-19 17:17:37,916 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 05:17:37" (3/3) ... [2018-11-19 17:17:37,917 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-4.2-rc1.tar.xz-32_7a-drivers--net--usb--r8152.ko-entry_point_true-unreach-call.cil.out.c [2018-11-19 17:17:37,925 INFO L147 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-19 17:17:37,936 INFO L159 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-19 17:17:37,950 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-19 17:17:37,987 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-19 17:17:37,988 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-19 17:17:37,988 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-19 17:17:37,988 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-19 17:17:37,988 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-19 17:17:37,988 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-19 17:17:37,988 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-19 17:17:37,988 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-19 17:17:37,988 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-19 17:17:38,060 INFO L276 IsEmpty]: Start isEmpty. Operand 3723 states. [2018-11-19 17:17:38,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-11-19 17:17:38,077 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:17:38,078 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:17:38,080 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:17:38,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:17:38,085 INFO L82 PathProgramCache]: Analyzing trace with hash 294783951, now seen corresponding path program 1 times [2018-11-19 17:17:38,087 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:17:38,087 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:17:38,180 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:17:38,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:17:38,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:17:38,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:17:38,901 INFO L256 TraceCheckUtils]: 0: Hoare triple {3726#true} call ULTIMATE.init(); {3726#true} is VALID [2018-11-19 17:17:38,902 INFO L273 TraceCheckUtils]: 1: Hoare triple {3726#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string123.base, #t~string123.offset := #Ultimate.alloc(22);call #t~string275.base, #t~string275.offset := #Ultimate.alloc(10);call #t~string317.base, #t~string317.offset := #Ultimate.alloc(24);call #t~string383.base, #t~string383.offset := #Ultimate.alloc(21);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(24);call #t~string390.base, #t~string390.offset := #Ultimate.alloc(23);call #t~string406.base, #t~string406.offset := #Ultimate.alloc(24);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(14);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(14);call #t~string435.base, #t~string435.offset := #Ultimate.alloc(33);call #t~string438.base, #t~string438.offset := #Ultimate.alloc(24);call #t~string441.base, #t~string441.offset := #Ultimate.alloc(16);call #t~string454.base, #t~string454.offset := #Ultimate.alloc(32);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(23);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(23);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(203);call #t~string529.base, #t~string529.offset := #Ultimate.alloc(39);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(203);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(31);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(203);call #t~string633.base, #t~string633.offset := #Ultimate.alloc(18);call #t~string661.base, #t~string661.offset := #Ultimate.alloc(34);call #t~string668.base, #t~string668.offset := #Ultimate.alloc(12);call #t~string678.base, #t~string678.offset := #Ultimate.alloc(26);call #t~string880.base, #t~string880.offset := #Ultimate.alloc(28);call #t~string982.base, #t~string982.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string982.base,#t~string982.offset := 114];#memory_int := #memory_int[#t~string982.base,1 + #t~string982.offset := 56];#memory_int := #memory_int[#t~string982.base,2 + #t~string982.offset := 49];#memory_int := #memory_int[#t~string982.base,3 + #t~string982.offset := 53];#memory_int := #memory_int[#t~string982.base,4 + #t~string982.offset := 50];#memory_int := #memory_int[#t~string982.base,5 + #t~string982.offset := 0];call #t~string984.base, #t~string984.offset := #Ultimate.alloc(21);call #t~string1111.base, #t~string1111.offset := #Ultimate.alloc(24);call #t~string1119.base, #t~string1119.offset := #Ultimate.alloc(16);call #t~string1126.base, #t~string1126.offset := #Ultimate.alloc(15);call #t~string1129.base, #t~string1129.offset := #Ultimate.alloc(13);call #t~string1131.base, #t~string1131.offset := #Ultimate.alloc(25);call #t~string1132.base, #t~string1132.offset := #Ultimate.alloc(26);call #t~string1142.base, #t~string1142.offset := #Ultimate.alloc(30);call #t~string1148.base, #t~string1148.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string1148.base,#t~string1148.offset := 37];#memory_int := #memory_int[#t~string1148.base,1 + #t~string1148.offset := 115];#memory_int := #memory_int[#t~string1148.base,2 + #t~string1148.offset := 10];#memory_int := #memory_int[#t~string1148.base,3 + #t~string1148.offset := 0];call #t~string1149.base, #t~string1149.offset := #Ultimate.alloc(21);call #t~string1158.base, #t~string1158.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1158.base,#t~string1158.offset := 114];#memory_int := #memory_int[#t~string1158.base,1 + #t~string1158.offset := 56];#memory_int := #memory_int[#t~string1158.base,2 + #t~string1158.offset := 49];#memory_int := #memory_int[#t~string1158.base,3 + #t~string1158.offset := 53];#memory_int := #memory_int[#t~string1158.base,4 + #t~string1158.offset := 50];#memory_int := #memory_int[#t~string1158.base,5 + #t~string1158.offset := 0];call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1159.base,#t~string1159.offset := 114];#memory_int := #memory_int[#t~string1159.base,1 + #t~string1159.offset := 56];#memory_int := #memory_int[#t~string1159.base,2 + #t~string1159.offset := 49];#memory_int := #memory_int[#t~string1159.base,3 + #t~string1159.offset := 53];#memory_int := #memory_int[#t~string1159.base,4 + #t~string1159.offset := 50];#memory_int := #memory_int[#t~string1159.base,5 + #t~string1159.offset := 0];~ldv_work_1_3~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_work_1_1~0 := 0;~usb_counter~0 := 0;~ldv_work_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_work_1_0~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~multicast_filter_limit~0 := 32;~agg_buf_sz~0 := 16384;call ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset := #Ultimate.alloc(416);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_gstrings~0.base);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 1 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 2 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 3 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 4 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 5 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 6 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 7 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 8 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 9 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 10 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 32 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 33 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 34 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 35 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 36 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 37 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 38 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 39 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 40 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 41 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 42 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 64 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 65 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 66 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 67 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 68 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 69 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 70 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 71 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 72 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 73 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 96 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 97 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 98 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 99 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 100 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 101 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 102 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 103 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 104 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 105 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 128 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 129 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 130 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 131 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 132 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 133 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 134 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 135 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 136 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 137 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 160 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 161 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 162 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 163 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 164 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 165 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 166 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 167 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 168 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 169 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 170 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 171 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 172 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 192 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 193 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 194 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 195 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 196 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 197 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 198 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 199 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 200 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 201 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 202 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 203 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 204 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 205 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 206 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 207 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 208 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 209 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 210 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 211 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 212 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 224 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 225 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 226 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 227 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 228 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 229 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 230 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 231 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 232 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 233 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 234 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 235 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 236 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 237 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 238 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 239 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 240 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 241 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 242 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 243 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 256 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 257 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 258 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 259 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 260 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 261 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 262 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 263 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 264 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 265 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 266 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 288 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 289 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 290 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 291 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 292 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 293 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 294 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 295 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 296 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 297 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 298 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 299 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 300 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 320 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 321 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 322 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 323 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 324 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 325 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 326 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 327 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 328 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 329 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 330 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 331 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 332 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 352 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 353 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 354 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 355 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 356 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 357 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 358 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 359 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 360 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 361 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 362 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 384 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 385 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 386 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 387 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 388 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 389 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 390 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 391 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 392 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 393 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 394 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 395 + ~#rtl8152_gstrings~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_mutex_control_of_r8152~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_work_struct_1_0~0.base, ~ldv_work_struct_1_0~0.offset := 0, 0;~ldv_work_struct_1_1~0.base, ~ldv_work_struct_1_1~0.offset := 0, 0;~ops_group4~0.base, ~ops_group4~0.offset := 0, 0;~ldv_work_struct_1_3~0.base, ~ldv_work_struct_1_3~0.offset := 0, 0;~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset := 0, 0;~ops_group1~0.base, ~ops_group1~0.offset := 0, 0;~ldv_work_struct_1_2~0.base, ~ldv_work_struct_1_2~0.offset := 0, 0;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := 0, 0;~ops_group3~0.base, ~ops_group3~0.offset := 0, 0;~ops_group2~0.base, ~ops_group2~0.offset := 0, 0;~ops_group0~0.base, ~ops_group0~0.offset := 0, 0;call ~#ops~0.base, ~#ops~0.offset := #Ultimate.alloc(392);call write~$Pointer$(0, 0, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_settings.base, #funAddr~rtl8152_get_settings.offset, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_settings.base, #funAddr~rtl8152_set_settings.offset, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_drvinfo.base, #funAddr~rtl8152_get_drvinfo.offset, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_wol.base, #funAddr~rtl8152_get_wol.offset, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_wol.base, #funAddr~rtl8152_set_wol.offset, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_msglevel.base, #funAddr~rtl8152_get_msglevel.offset, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_msglevel.base, #funAddr~rtl8152_set_msglevel.offset, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_nway_reset.base, #funAddr~rtl8152_nway_reset.offset, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_coalesce.base, #funAddr~rtl8152_get_coalesce.offset, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_coalesce.base, #funAddr~rtl8152_set_coalesce.offset, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_strings.base, #funAddr~rtl8152_get_strings.offset, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_ethtool_stats.base, #funAddr~rtl8152_get_ethtool_stats.offset, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_sset_count.base, #funAddr~rtl8152_get_sset_count.offset, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_get_eee.base, #funAddr~rtl_ethtool_get_eee.offset, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_set_eee.base, #funAddr~rtl_ethtool_set_eee.offset, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset := #Ultimate.alloc(528);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_open.base, #funAddr~rtl8152_open.offset, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_close.base, #funAddr~rtl8152_close.offset, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_start_xmit.base, #funAddr~rtl8152_start_xmit.offset, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_rx_mode.base, #funAddr~rtl8152_set_rx_mode.offset, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_mac_address.base, #funAddr~rtl8152_set_mac_address.offset, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_ioctl.base, #funAddr~rtl8152_ioctl.offset, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_change_mtu.base, #funAddr~rtl8152_change_mtu.offset, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_tx_timeout.base, #funAddr~rtl8152_tx_timeout.offset, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_features.base, #funAddr~rtl8152_set_features.offset, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_features_check.base, #funAddr~rtl8152_features_check.offset, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset := #Ultimate.alloc(275);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_table~0.base);call write~unchecked~int(131, ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 2 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 4 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 6 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 8 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 10 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 11 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 12 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 13 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 14 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 15 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 16 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 17 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 25 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 27 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 29 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 31 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 33 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 35 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 36 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 37 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 38 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 39 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 40 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 41 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 42 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 50 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 52 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 54 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 56 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 58 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 60 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 61 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 62 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 63 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 64 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 65 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 66 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 67 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 75 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 77 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 79 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 81 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 83 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 85 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 86 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 87 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 88 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 89 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 90 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 91 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 92 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 100 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 102 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 104 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 106 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 108 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 110 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 111 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 112 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 113 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 114 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 115 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 116 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 117 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 125 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 127 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 129 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 131 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 133 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 135 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 136 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 137 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 138 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 139 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 140 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 141 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 142 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 150 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 152 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 154 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 156 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 158 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 160 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 161 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 162 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 163 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 164 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 165 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 166 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 167 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 175 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 177 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 179 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 181 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 183 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 185 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 186 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 187 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 188 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 189 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 190 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 191 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 192 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 200 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 202 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 204 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 206 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 208 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 210 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 211 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 212 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 213 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 214 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 215 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 216 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 217 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 225 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 227 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 229 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 231 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 233 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 235 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 236 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 237 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 238 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 239 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 240 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 241 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 242 + ~#rtl8152_table~0.offset, 8);~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[0 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[0 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[1 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[1 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[2 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[2 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[3 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[3 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[4 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[4 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[5 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[5 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[6 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[6 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[7 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[7 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[8 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[8 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[9 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[9 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[10 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[10 := 0];call ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset := #Ultimate.alloc(289);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1);call write~$Pointer$(#t~string1158.base, #t~string1158.offset, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_probe.base, #funAddr~rtl8152_probe.offset, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_disconnect.base, #funAddr~rtl8152_disconnect.offset, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_suspend.base, #funAddr~rtl8152_suspend.offset, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 108 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 116 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1); {3726#true} is VALID [2018-11-19 17:17:38,908 INFO L273 TraceCheckUtils]: 2: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,909 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3726#true} {3726#true} #8057#return; {3726#true} is VALID [2018-11-19 17:17:38,909 INFO L256 TraceCheckUtils]: 4: Hoare triple {3726#true} call #t~ret1299 := main(); {3726#true} is VALID [2018-11-19 17:17:38,909 INFO L273 TraceCheckUtils]: 5: Hoare triple {3726#true} call ~#ldvarg1~0.base, ~#ldvarg1~0.offset := #Ultimate.alloc(4);havoc ~ldvarg4~0.base, ~ldvarg4~0.offset;havoc ~tmp~163.base, ~tmp~163.offset;call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(4);havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~69.base, ~tmp___0~69.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___1~40.base, ~tmp___1~40.offset;call ~#ldvarg2~0.base, ~#ldvarg2~0.offset := #Ultimate.alloc(4);havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___2~30.base, ~tmp___2~30.offset;call ~#ldvarg11~0.base, ~#ldvarg11~0.offset := #Ultimate.alloc(8);havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___3~22.base, ~tmp___3~22.offset;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___4~17.base, ~tmp___4~17.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___5~8.base, ~tmp___5~8.offset;call ~#ldvarg13~0.base, ~#ldvarg13~0.offset := #Ultimate.alloc(4);havoc ~ldvarg10~0.base, ~ldvarg10~0.offset;havoc ~tmp___6~6.base, ~tmp___6~6.offset;call ~#ldvarg9~0.base, ~#ldvarg9~0.offset := #Ultimate.alloc(8);havoc ~ldvarg16~0.base, ~ldvarg16~0.offset;havoc ~tmp___7~5.base, ~tmp___7~5.offset;call ~#ldvarg15~0.base, ~#ldvarg15~0.offset := #Ultimate.alloc(4);havoc ~tmp___8~3;havoc ~tmp___9~3;havoc ~tmp___10~2;havoc ~tmp___11~1;havoc ~tmp___12~1; {3726#true} is VALID [2018-11-19 17:17:38,910 INFO L256 TraceCheckUtils]: 6: Hoare triple {3726#true} call #t~ret1170.base, #t~ret1170.offset := ldv_init_zalloc(8); {3726#true} is VALID [2018-11-19 17:17:38,910 INFO L273 TraceCheckUtils]: 7: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,911 INFO L256 TraceCheckUtils]: 8: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,911 INFO L273 TraceCheckUtils]: 9: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,911 INFO L273 TraceCheckUtils]: 10: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,912 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,912 INFO L273 TraceCheckUtils]: 12: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,912 INFO L273 TraceCheckUtils]: 13: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,912 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {3726#true} {3726#true} #7627#return; {3726#true} is VALID [2018-11-19 17:17:38,913 INFO L273 TraceCheckUtils]: 15: Hoare triple {3726#true} ~tmp~163.base, ~tmp~163.offset := #t~ret1170.base, #t~ret1170.offset;havoc #t~ret1170.base, #t~ret1170.offset;~ldvarg4~0.base, ~ldvarg4~0.offset := ~tmp~163.base, ~tmp~163.offset; {3726#true} is VALID [2018-11-19 17:17:38,913 INFO L256 TraceCheckUtils]: 16: Hoare triple {3726#true} call #t~ret1171.base, #t~ret1171.offset := ldv_init_zalloc(1); {3726#true} is VALID [2018-11-19 17:17:38,913 INFO L273 TraceCheckUtils]: 17: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,914 INFO L256 TraceCheckUtils]: 18: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,914 INFO L273 TraceCheckUtils]: 19: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,914 INFO L273 TraceCheckUtils]: 20: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,914 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,915 INFO L273 TraceCheckUtils]: 22: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,915 INFO L273 TraceCheckUtils]: 23: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,915 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {3726#true} {3726#true} #7629#return; {3726#true} is VALID [2018-11-19 17:17:38,915 INFO L273 TraceCheckUtils]: 25: Hoare triple {3726#true} ~tmp___0~69.base, ~tmp___0~69.offset := #t~ret1171.base, #t~ret1171.offset;havoc #t~ret1171.base, #t~ret1171.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~69.base, ~tmp___0~69.offset; {3726#true} is VALID [2018-11-19 17:17:38,916 INFO L256 TraceCheckUtils]: 26: Hoare triple {3726#true} call #t~ret1172.base, #t~ret1172.offset := ldv_init_zalloc(8); {3726#true} is VALID [2018-11-19 17:17:38,916 INFO L273 TraceCheckUtils]: 27: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,917 INFO L256 TraceCheckUtils]: 28: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,917 INFO L273 TraceCheckUtils]: 29: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,917 INFO L273 TraceCheckUtils]: 30: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,917 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,918 INFO L273 TraceCheckUtils]: 32: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,918 INFO L273 TraceCheckUtils]: 33: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,918 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {3726#true} {3726#true} #7631#return; {3726#true} is VALID [2018-11-19 17:17:38,918 INFO L273 TraceCheckUtils]: 35: Hoare triple {3726#true} ~tmp___1~40.base, ~tmp___1~40.offset := #t~ret1172.base, #t~ret1172.offset;havoc #t~ret1172.base, #t~ret1172.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___1~40.base, ~tmp___1~40.offset; {3726#true} is VALID [2018-11-19 17:17:38,919 INFO L256 TraceCheckUtils]: 36: Hoare triple {3726#true} call #t~ret1173.base, #t~ret1173.offset := ldv_init_zalloc(196); {3726#true} is VALID [2018-11-19 17:17:38,919 INFO L273 TraceCheckUtils]: 37: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,919 INFO L256 TraceCheckUtils]: 38: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,919 INFO L273 TraceCheckUtils]: 39: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,920 INFO L273 TraceCheckUtils]: 40: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,920 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,920 INFO L273 TraceCheckUtils]: 42: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,920 INFO L273 TraceCheckUtils]: 43: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,920 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {3726#true} {3726#true} #7633#return; {3726#true} is VALID [2018-11-19 17:17:38,921 INFO L273 TraceCheckUtils]: 45: Hoare triple {3726#true} ~tmp___2~30.base, ~tmp___2~30.offset := #t~ret1173.base, #t~ret1173.offset;havoc #t~ret1173.base, #t~ret1173.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___2~30.base, ~tmp___2~30.offset; {3726#true} is VALID [2018-11-19 17:17:38,921 INFO L256 TraceCheckUtils]: 46: Hoare triple {3726#true} call #t~ret1174.base, #t~ret1174.offset := ldv_init_zalloc(1); {3726#true} is VALID [2018-11-19 17:17:38,921 INFO L273 TraceCheckUtils]: 47: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,921 INFO L256 TraceCheckUtils]: 48: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,922 INFO L273 TraceCheckUtils]: 49: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,922 INFO L273 TraceCheckUtils]: 50: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,922 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,923 INFO L273 TraceCheckUtils]: 52: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,923 INFO L273 TraceCheckUtils]: 53: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,923 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {3726#true} {3726#true} #7635#return; {3726#true} is VALID [2018-11-19 17:17:38,923 INFO L273 TraceCheckUtils]: 55: Hoare triple {3726#true} ~tmp___3~22.base, ~tmp___3~22.offset := #t~ret1174.base, #t~ret1174.offset;havoc #t~ret1174.base, #t~ret1174.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___3~22.base, ~tmp___3~22.offset; {3726#true} is VALID [2018-11-19 17:17:38,924 INFO L256 TraceCheckUtils]: 56: Hoare triple {3726#true} call #t~ret1175.base, #t~ret1175.offset := ldv_init_zalloc(232); {3726#true} is VALID [2018-11-19 17:17:38,924 INFO L273 TraceCheckUtils]: 57: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,924 INFO L256 TraceCheckUtils]: 58: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,925 INFO L273 TraceCheckUtils]: 59: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,925 INFO L273 TraceCheckUtils]: 60: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,925 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,925 INFO L273 TraceCheckUtils]: 62: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,926 INFO L273 TraceCheckUtils]: 63: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,926 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {3726#true} {3726#true} #7637#return; {3726#true} is VALID [2018-11-19 17:17:38,926 INFO L273 TraceCheckUtils]: 65: Hoare triple {3726#true} ~tmp___4~17.base, ~tmp___4~17.offset := #t~ret1175.base, #t~ret1175.offset;havoc #t~ret1175.base, #t~ret1175.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___4~17.base, ~tmp___4~17.offset; {3726#true} is VALID [2018-11-19 17:17:38,926 INFO L256 TraceCheckUtils]: 66: Hoare triple {3726#true} call #t~ret1176.base, #t~ret1176.offset := ldv_init_zalloc(40); {3726#true} is VALID [2018-11-19 17:17:38,927 INFO L273 TraceCheckUtils]: 67: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,927 INFO L256 TraceCheckUtils]: 68: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,927 INFO L273 TraceCheckUtils]: 69: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,928 INFO L273 TraceCheckUtils]: 70: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,928 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,928 INFO L273 TraceCheckUtils]: 72: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,928 INFO L273 TraceCheckUtils]: 73: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,928 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {3726#true} {3726#true} #7639#return; {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L273 TraceCheckUtils]: 75: Hoare triple {3726#true} ~tmp___5~8.base, ~tmp___5~8.offset := #t~ret1176.base, #t~ret1176.offset;havoc #t~ret1176.base, #t~ret1176.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___5~8.base, ~tmp___5~8.offset; {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L256 TraceCheckUtils]: 76: Hoare triple {3726#true} call #t~ret1177.base, #t~ret1177.offset := ldv_init_zalloc(232); {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L273 TraceCheckUtils]: 77: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L256 TraceCheckUtils]: 78: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L273 TraceCheckUtils]: 79: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,929 INFO L273 TraceCheckUtils]: 80: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,930 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,930 INFO L273 TraceCheckUtils]: 82: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,930 INFO L273 TraceCheckUtils]: 83: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,930 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {3726#true} {3726#true} #7641#return; {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L273 TraceCheckUtils]: 85: Hoare triple {3726#true} ~tmp___6~6.base, ~tmp___6~6.offset := #t~ret1177.base, #t~ret1177.offset;havoc #t~ret1177.base, #t~ret1177.offset;~ldvarg10~0.base, ~ldvarg10~0.offset := ~tmp___6~6.base, ~tmp___6~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L256 TraceCheckUtils]: 86: Hoare triple {3726#true} call #t~ret1178.base, #t~ret1178.offset := ldv_init_zalloc(32); {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L273 TraceCheckUtils]: 87: Hoare triple {3726#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L256 TraceCheckUtils]: 88: Hoare triple {3726#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L273 TraceCheckUtils]: 89: Hoare triple {3726#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {3726#true} is VALID [2018-11-19 17:17:38,931 INFO L273 TraceCheckUtils]: 90: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,932 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {3726#true} {3726#true} #7503#return; {3726#true} is VALID [2018-11-19 17:17:38,932 INFO L273 TraceCheckUtils]: 92: Hoare triple {3726#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {3726#true} is VALID [2018-11-19 17:17:38,932 INFO L273 TraceCheckUtils]: 93: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,933 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {3726#true} {3726#true} #7643#return; {3726#true} is VALID [2018-11-19 17:17:38,933 INFO L273 TraceCheckUtils]: 95: Hoare triple {3726#true} ~tmp___7~5.base, ~tmp___7~5.offset := #t~ret1178.base, #t~ret1178.offset;havoc #t~ret1178.base, #t~ret1178.offset;~ldvarg16~0.base, ~ldvarg16~0.offset := ~tmp___7~5.base, ~tmp___7~5.offset;call ldv_initialize(); {3726#true} is VALID [2018-11-19 17:17:38,933 INFO L256 TraceCheckUtils]: 96: Hoare triple {3726#true} call #t~ret1179.base, #t~ret1179.offset := ldv_memset(~#ldvarg1~0.base, ~#ldvarg1~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,933 INFO L273 TraceCheckUtils]: 97: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,934 INFO L256 TraceCheckUtils]: 98: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,934 INFO L273 TraceCheckUtils]: 99: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,934 INFO L273 TraceCheckUtils]: 100: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,934 INFO L273 TraceCheckUtils]: 101: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,935 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,935 INFO L273 TraceCheckUtils]: 103: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,935 INFO L273 TraceCheckUtils]: 104: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,936 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {3726#true} {3726#true} #7645#return; {3726#true} is VALID [2018-11-19 17:17:38,936 INFO L273 TraceCheckUtils]: 106: Hoare triple {3726#true} havoc #t~ret1179.base, #t~ret1179.offset; {3726#true} is VALID [2018-11-19 17:17:38,936 INFO L256 TraceCheckUtils]: 107: Hoare triple {3726#true} call #t~ret1180.base, #t~ret1180.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,936 INFO L273 TraceCheckUtils]: 108: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,937 INFO L256 TraceCheckUtils]: 109: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,937 INFO L273 TraceCheckUtils]: 110: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,937 INFO L273 TraceCheckUtils]: 111: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,937 INFO L273 TraceCheckUtils]: 112: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,938 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,938 INFO L273 TraceCheckUtils]: 114: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,938 INFO L273 TraceCheckUtils]: 115: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,938 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {3726#true} {3726#true} #7647#return; {3726#true} is VALID [2018-11-19 17:17:38,939 INFO L273 TraceCheckUtils]: 117: Hoare triple {3726#true} havoc #t~ret1180.base, #t~ret1180.offset; {3726#true} is VALID [2018-11-19 17:17:38,939 INFO L256 TraceCheckUtils]: 118: Hoare triple {3726#true} call #t~ret1181.base, #t~ret1181.offset := ldv_memset(~#ldvarg2~0.base, ~#ldvarg2~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,939 INFO L273 TraceCheckUtils]: 119: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,939 INFO L256 TraceCheckUtils]: 120: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,940 INFO L273 TraceCheckUtils]: 121: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,940 INFO L273 TraceCheckUtils]: 122: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,940 INFO L273 TraceCheckUtils]: 123: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,940 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,941 INFO L273 TraceCheckUtils]: 125: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,941 INFO L273 TraceCheckUtils]: 126: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,941 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {3726#true} {3726#true} #7649#return; {3726#true} is VALID [2018-11-19 17:17:38,942 INFO L273 TraceCheckUtils]: 128: Hoare triple {3726#true} havoc #t~ret1181.base, #t~ret1181.offset; {3726#true} is VALID [2018-11-19 17:17:38,942 INFO L256 TraceCheckUtils]: 129: Hoare triple {3726#true} call #t~ret1182.base, #t~ret1182.offset := ldv_memset(~#ldvarg11~0.base, ~#ldvarg11~0.offset, 0, 8); {3726#true} is VALID [2018-11-19 17:17:38,942 INFO L273 TraceCheckUtils]: 130: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,942 INFO L256 TraceCheckUtils]: 131: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,943 INFO L273 TraceCheckUtils]: 132: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,943 INFO L273 TraceCheckUtils]: 133: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,943 INFO L273 TraceCheckUtils]: 134: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,943 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,943 INFO L273 TraceCheckUtils]: 136: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,944 INFO L273 TraceCheckUtils]: 137: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,944 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {3726#true} {3726#true} #7651#return; {3726#true} is VALID [2018-11-19 17:17:38,944 INFO L273 TraceCheckUtils]: 139: Hoare triple {3726#true} havoc #t~ret1182.base, #t~ret1182.offset; {3726#true} is VALID [2018-11-19 17:17:38,944 INFO L256 TraceCheckUtils]: 140: Hoare triple {3726#true} call #t~ret1183.base, #t~ret1183.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,945 INFO L273 TraceCheckUtils]: 141: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,945 INFO L256 TraceCheckUtils]: 142: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,945 INFO L273 TraceCheckUtils]: 143: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,945 INFO L273 TraceCheckUtils]: 144: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,945 INFO L273 TraceCheckUtils]: 145: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,946 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,946 INFO L273 TraceCheckUtils]: 147: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,946 INFO L273 TraceCheckUtils]: 148: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,947 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {3726#true} {3726#true} #7653#return; {3726#true} is VALID [2018-11-19 17:17:38,947 INFO L273 TraceCheckUtils]: 150: Hoare triple {3726#true} havoc #t~ret1183.base, #t~ret1183.offset; {3726#true} is VALID [2018-11-19 17:17:38,947 INFO L256 TraceCheckUtils]: 151: Hoare triple {3726#true} call #t~ret1184.base, #t~ret1184.offset := ldv_memset(~#ldvarg13~0.base, ~#ldvarg13~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,947 INFO L273 TraceCheckUtils]: 152: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,947 INFO L256 TraceCheckUtils]: 153: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,948 INFO L273 TraceCheckUtils]: 154: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,948 INFO L273 TraceCheckUtils]: 155: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,948 INFO L273 TraceCheckUtils]: 156: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,948 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,949 INFO L273 TraceCheckUtils]: 158: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,949 INFO L273 TraceCheckUtils]: 159: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,949 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {3726#true} {3726#true} #7655#return; {3726#true} is VALID [2018-11-19 17:17:38,949 INFO L273 TraceCheckUtils]: 161: Hoare triple {3726#true} havoc #t~ret1184.base, #t~ret1184.offset; {3726#true} is VALID [2018-11-19 17:17:38,950 INFO L256 TraceCheckUtils]: 162: Hoare triple {3726#true} call #t~ret1185.base, #t~ret1185.offset := ldv_memset(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 0, 8); {3726#true} is VALID [2018-11-19 17:17:38,950 INFO L273 TraceCheckUtils]: 163: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,950 INFO L256 TraceCheckUtils]: 164: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,950 INFO L273 TraceCheckUtils]: 165: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,951 INFO L273 TraceCheckUtils]: 166: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,951 INFO L273 TraceCheckUtils]: 167: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,951 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,951 INFO L273 TraceCheckUtils]: 169: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,952 INFO L273 TraceCheckUtils]: 170: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,952 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {3726#true} {3726#true} #7657#return; {3726#true} is VALID [2018-11-19 17:17:38,952 INFO L273 TraceCheckUtils]: 172: Hoare triple {3726#true} havoc #t~ret1185.base, #t~ret1185.offset; {3726#true} is VALID [2018-11-19 17:17:38,952 INFO L256 TraceCheckUtils]: 173: Hoare triple {3726#true} call #t~ret1186.base, #t~ret1186.offset := ldv_memset(~#ldvarg15~0.base, ~#ldvarg15~0.offset, 0, 4); {3726#true} is VALID [2018-11-19 17:17:38,953 INFO L273 TraceCheckUtils]: 174: Hoare triple {3726#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,953 INFO L256 TraceCheckUtils]: 175: Hoare triple {3726#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {3726#true} is VALID [2018-11-19 17:17:38,953 INFO L273 TraceCheckUtils]: 176: Hoare triple {3726#true} #t~loopctr1322 := 0; {3726#true} is VALID [2018-11-19 17:17:38,953 INFO L273 TraceCheckUtils]: 177: Hoare triple {3726#true} assume !(#t~loopctr1322 < #amount); {3726#true} is VALID [2018-11-19 17:17:38,954 INFO L273 TraceCheckUtils]: 178: Hoare triple {3726#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3726#true} is VALID [2018-11-19 17:17:38,954 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {3726#true} {3726#true} #8777#return; {3726#true} is VALID [2018-11-19 17:17:38,954 INFO L273 TraceCheckUtils]: 180: Hoare triple {3726#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {3726#true} is VALID [2018-11-19 17:17:38,954 INFO L273 TraceCheckUtils]: 181: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,955 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {3726#true} {3726#true} #7659#return; {3726#true} is VALID [2018-11-19 17:17:38,955 INFO L273 TraceCheckUtils]: 183: Hoare triple {3726#true} havoc #t~ret1186.base, #t~ret1186.offset;~ldv_state_variable_4~0 := 0; {3726#true} is VALID [2018-11-19 17:17:38,955 INFO L256 TraceCheckUtils]: 184: Hoare triple {3726#true} call work_init_1(); {3726#true} is VALID [2018-11-19 17:17:38,955 INFO L273 TraceCheckUtils]: 185: Hoare triple {3726#true} ~ldv_work_1_0~0 := 0;~ldv_work_1_1~0 := 0;~ldv_work_1_2~0 := 0;~ldv_work_1_3~0 := 0; {3726#true} is VALID [2018-11-19 17:17:38,955 INFO L273 TraceCheckUtils]: 186: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,956 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {3726#true} {3726#true} #7661#return; {3726#true} is VALID [2018-11-19 17:17:38,961 INFO L273 TraceCheckUtils]: 188: Hoare triple {3726#true} ~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,962 INFO L273 TraceCheckUtils]: 189: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume -2147483648 <= #t~nondet1187 && #t~nondet1187 <= 2147483647;~tmp___8~3 := #t~nondet1187;havoc #t~nondet1187;#t~switch1188 := 0 == ~tmp___8~3; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,962 INFO L273 TraceCheckUtils]: 190: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 1 == ~tmp___8~3; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,970 INFO L273 TraceCheckUtils]: 191: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 2 == ~tmp___8~3; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,974 INFO L273 TraceCheckUtils]: 192: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume #t~switch1188; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,974 INFO L273 TraceCheckUtils]: 193: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1205 && #t~nondet1205 <= 2147483647;~tmp___10~2 := #t~nondet1205;havoc #t~nondet1205;#t~switch1206 := 0 == ~tmp___10~2; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,978 INFO L273 TraceCheckUtils]: 194: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume #t~switch1206; {3728#(= 1 ~ldv_state_variable_0~0)} is VALID [2018-11-19 17:17:38,978 INFO L273 TraceCheckUtils]: 195: Hoare triple {3728#(= 1 ~ldv_state_variable_0~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0; {3727#false} is VALID [2018-11-19 17:17:38,979 INFO L256 TraceCheckUtils]: 196: Hoare triple {3727#false} call rtl8152_driver_exit(); {3726#true} is VALID [2018-11-19 17:17:38,979 INFO L256 TraceCheckUtils]: 197: Hoare triple {3726#true} call ldv_usb_deregister_62(~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset); {3726#true} is VALID [2018-11-19 17:17:38,979 INFO L273 TraceCheckUtils]: 198: Hoare triple {3726#true} ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;call usb_deregister(~arg.base, ~arg.offset);~ldv_state_variable_2~0 := 0; {3726#true} is VALID [2018-11-19 17:17:38,979 INFO L273 TraceCheckUtils]: 199: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,979 INFO L268 TraceCheckUtils]: 200: Hoare quadruple {3726#true} {3726#true} #7555#return; {3726#true} is VALID [2018-11-19 17:17:38,980 INFO L273 TraceCheckUtils]: 201: Hoare triple {3726#true} assume true; {3726#true} is VALID [2018-11-19 17:17:38,980 INFO L268 TraceCheckUtils]: 202: Hoare quadruple {3726#true} {3727#false} #7697#return; {3727#false} is VALID [2018-11-19 17:17:38,980 INFO L273 TraceCheckUtils]: 203: Hoare triple {3727#false} ~ldv_state_variable_0~0 := 2; {3727#false} is VALID [2018-11-19 17:17:38,980 INFO L256 TraceCheckUtils]: 204: Hoare triple {3727#false} call ldv_check_final_state(); {3727#false} is VALID [2018-11-19 17:17:38,980 INFO L273 TraceCheckUtils]: 205: Hoare triple {3727#false} assume 1 != ~ldv_mutex_control_of_r8152~0; {3727#false} is VALID [2018-11-19 17:17:38,980 INFO L256 TraceCheckUtils]: 206: Hoare triple {3727#false} call ldv_error(); {3727#false} is VALID [2018-11-19 17:17:38,981 INFO L273 TraceCheckUtils]: 207: Hoare triple {3727#false} assume !false; {3727#false} is VALID [2018-11-19 17:17:39,011 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:17:39,014 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:17:39,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:17:39,019 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 208 [2018-11-19 17:17:39,022 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:17:39,025 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:17:39,232 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:17:39,232 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:17:39,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:17:39,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:17:39,243 INFO L87 Difference]: Start difference. First operand 3723 states. Second operand 3 states. [2018-11-19 17:18:06,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:18:06,829 INFO L93 Difference]: Finished difference Result 8564 states and 12192 transitions. [2018-11-19 17:18:06,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:18:06,829 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 208 [2018-11-19 17:18:06,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:18:06,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:18:08,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12192 transitions. [2018-11-19 17:18:08,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:18:09,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12192 transitions. [2018-11-19 17:18:09,223 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 12192 transitions. [2018-11-19 17:18:20,929 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 12192 edges. 12192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:18:22,826 INFO L225 Difference]: With dead ends: 8564 [2018-11-19 17:18:22,826 INFO L226 Difference]: Without dead ends: 5683 [2018-11-19 17:18:22,850 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:18:22,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5683 states. [2018-11-19 17:18:25,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5683 to 5678. [2018-11-19 17:18:25,393 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:18:25,394 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5683 states. Second operand 5678 states. [2018-11-19 17:18:25,394 INFO L74 IsIncluded]: Start isIncluded. First operand 5683 states. Second operand 5678 states. [2018-11-19 17:18:25,394 INFO L87 Difference]: Start difference. First operand 5683 states. Second operand 5678 states. [2018-11-19 17:18:26,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:18:26,718 INFO L93 Difference]: Finished difference Result 5683 states and 7899 transitions. [2018-11-19 17:18:26,718 INFO L276 IsEmpty]: Start isEmpty. Operand 5683 states and 7899 transitions. [2018-11-19 17:18:26,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:18:26,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:18:26,766 INFO L74 IsIncluded]: Start isIncluded. First operand 5678 states. Second operand 5683 states. [2018-11-19 17:18:26,766 INFO L87 Difference]: Start difference. First operand 5678 states. Second operand 5683 states. [2018-11-19 17:18:28,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:18:28,164 INFO L93 Difference]: Finished difference Result 5683 states and 7899 transitions. [2018-11-19 17:18:28,165 INFO L276 IsEmpty]: Start isEmpty. Operand 5683 states and 7899 transitions. [2018-11-19 17:18:28,187 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:18:28,188 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:18:28,188 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:18:28,188 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:18:28,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5678 states. [2018-11-19 17:18:29,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5678 states to 5678 states and 7895 transitions. [2018-11-19 17:18:29,677 INFO L78 Accepts]: Start accepts. Automaton has 5678 states and 7895 transitions. Word has length 208 [2018-11-19 17:18:29,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:18:29,678 INFO L480 AbstractCegarLoop]: Abstraction has 5678 states and 7895 transitions. [2018-11-19 17:18:29,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:18:29,678 INFO L276 IsEmpty]: Start isEmpty. Operand 5678 states and 7895 transitions. [2018-11-19 17:18:29,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-11-19 17:18:29,683 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:18:29,684 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:18:29,684 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:18:29,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:18:29,684 INFO L82 PathProgramCache]: Analyzing trace with hash 234931204, now seen corresponding path program 1 times [2018-11-19 17:18:29,684 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:18:29,684 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:18:29,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:18:29,692 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:18:29,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:18:29,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:18:30,024 INFO L256 TraceCheckUtils]: 0: Hoare triple {35290#true} call ULTIMATE.init(); {35290#true} is VALID [2018-11-19 17:18:30,024 INFO L273 TraceCheckUtils]: 1: Hoare triple {35290#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string123.base, #t~string123.offset := #Ultimate.alloc(22);call #t~string275.base, #t~string275.offset := #Ultimate.alloc(10);call #t~string317.base, #t~string317.offset := #Ultimate.alloc(24);call #t~string383.base, #t~string383.offset := #Ultimate.alloc(21);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(24);call #t~string390.base, #t~string390.offset := #Ultimate.alloc(23);call #t~string406.base, #t~string406.offset := #Ultimate.alloc(24);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(14);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(14);call #t~string435.base, #t~string435.offset := #Ultimate.alloc(33);call #t~string438.base, #t~string438.offset := #Ultimate.alloc(24);call #t~string441.base, #t~string441.offset := #Ultimate.alloc(16);call #t~string454.base, #t~string454.offset := #Ultimate.alloc(32);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(23);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(23);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(203);call #t~string529.base, #t~string529.offset := #Ultimate.alloc(39);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(203);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(31);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(203);call #t~string633.base, #t~string633.offset := #Ultimate.alloc(18);call #t~string661.base, #t~string661.offset := #Ultimate.alloc(34);call #t~string668.base, #t~string668.offset := #Ultimate.alloc(12);call #t~string678.base, #t~string678.offset := #Ultimate.alloc(26);call #t~string880.base, #t~string880.offset := #Ultimate.alloc(28);call #t~string982.base, #t~string982.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string982.base,#t~string982.offset := 114];#memory_int := #memory_int[#t~string982.base,1 + #t~string982.offset := 56];#memory_int := #memory_int[#t~string982.base,2 + #t~string982.offset := 49];#memory_int := #memory_int[#t~string982.base,3 + #t~string982.offset := 53];#memory_int := #memory_int[#t~string982.base,4 + #t~string982.offset := 50];#memory_int := #memory_int[#t~string982.base,5 + #t~string982.offset := 0];call #t~string984.base, #t~string984.offset := #Ultimate.alloc(21);call #t~string1111.base, #t~string1111.offset := #Ultimate.alloc(24);call #t~string1119.base, #t~string1119.offset := #Ultimate.alloc(16);call #t~string1126.base, #t~string1126.offset := #Ultimate.alloc(15);call #t~string1129.base, #t~string1129.offset := #Ultimate.alloc(13);call #t~string1131.base, #t~string1131.offset := #Ultimate.alloc(25);call #t~string1132.base, #t~string1132.offset := #Ultimate.alloc(26);call #t~string1142.base, #t~string1142.offset := #Ultimate.alloc(30);call #t~string1148.base, #t~string1148.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string1148.base,#t~string1148.offset := 37];#memory_int := #memory_int[#t~string1148.base,1 + #t~string1148.offset := 115];#memory_int := #memory_int[#t~string1148.base,2 + #t~string1148.offset := 10];#memory_int := #memory_int[#t~string1148.base,3 + #t~string1148.offset := 0];call #t~string1149.base, #t~string1149.offset := #Ultimate.alloc(21);call #t~string1158.base, #t~string1158.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1158.base,#t~string1158.offset := 114];#memory_int := #memory_int[#t~string1158.base,1 + #t~string1158.offset := 56];#memory_int := #memory_int[#t~string1158.base,2 + #t~string1158.offset := 49];#memory_int := #memory_int[#t~string1158.base,3 + #t~string1158.offset := 53];#memory_int := #memory_int[#t~string1158.base,4 + #t~string1158.offset := 50];#memory_int := #memory_int[#t~string1158.base,5 + #t~string1158.offset := 0];call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1159.base,#t~string1159.offset := 114];#memory_int := #memory_int[#t~string1159.base,1 + #t~string1159.offset := 56];#memory_int := #memory_int[#t~string1159.base,2 + #t~string1159.offset := 49];#memory_int := #memory_int[#t~string1159.base,3 + #t~string1159.offset := 53];#memory_int := #memory_int[#t~string1159.base,4 + #t~string1159.offset := 50];#memory_int := #memory_int[#t~string1159.base,5 + #t~string1159.offset := 0];~ldv_work_1_3~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_work_1_1~0 := 0;~usb_counter~0 := 0;~ldv_work_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_work_1_0~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~multicast_filter_limit~0 := 32;~agg_buf_sz~0 := 16384;call ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset := #Ultimate.alloc(416);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_gstrings~0.base);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 1 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 2 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 3 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 4 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 5 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 6 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 7 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 8 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 9 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 10 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 32 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 33 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 34 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 35 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 36 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 37 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 38 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 39 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 40 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 41 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 42 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 64 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 65 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 66 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 67 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 68 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 69 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 70 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 71 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 72 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 73 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 96 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 97 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 98 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 99 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 100 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 101 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 102 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 103 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 104 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 105 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 128 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 129 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 130 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 131 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 132 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 133 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 134 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 135 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 136 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 137 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 160 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 161 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 162 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 163 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 164 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 165 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 166 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 167 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 168 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 169 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 170 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 171 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 172 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 192 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 193 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 194 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 195 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 196 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 197 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 198 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 199 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 200 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 201 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 202 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 203 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 204 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 205 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 206 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 207 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 208 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 209 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 210 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 211 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 212 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 224 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 225 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 226 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 227 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 228 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 229 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 230 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 231 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 232 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 233 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 234 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 235 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 236 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 237 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 238 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 239 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 240 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 241 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 242 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 243 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 256 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 257 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 258 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 259 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 260 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 261 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 262 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 263 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 264 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 265 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 266 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 288 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 289 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 290 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 291 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 292 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 293 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 294 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 295 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 296 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 297 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 298 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 299 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 300 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 320 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 321 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 322 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 323 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 324 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 325 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 326 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 327 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 328 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 329 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 330 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 331 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 332 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 352 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 353 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 354 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 355 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 356 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 357 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 358 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 359 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 360 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 361 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 362 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 384 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 385 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 386 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 387 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 388 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 389 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 390 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 391 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 392 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 393 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 394 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 395 + ~#rtl8152_gstrings~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_mutex_control_of_r8152~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_work_struct_1_0~0.base, ~ldv_work_struct_1_0~0.offset := 0, 0;~ldv_work_struct_1_1~0.base, ~ldv_work_struct_1_1~0.offset := 0, 0;~ops_group4~0.base, ~ops_group4~0.offset := 0, 0;~ldv_work_struct_1_3~0.base, ~ldv_work_struct_1_3~0.offset := 0, 0;~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset := 0, 0;~ops_group1~0.base, ~ops_group1~0.offset := 0, 0;~ldv_work_struct_1_2~0.base, ~ldv_work_struct_1_2~0.offset := 0, 0;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := 0, 0;~ops_group3~0.base, ~ops_group3~0.offset := 0, 0;~ops_group2~0.base, ~ops_group2~0.offset := 0, 0;~ops_group0~0.base, ~ops_group0~0.offset := 0, 0;call ~#ops~0.base, ~#ops~0.offset := #Ultimate.alloc(392);call write~$Pointer$(0, 0, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_settings.base, #funAddr~rtl8152_get_settings.offset, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_settings.base, #funAddr~rtl8152_set_settings.offset, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_drvinfo.base, #funAddr~rtl8152_get_drvinfo.offset, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_wol.base, #funAddr~rtl8152_get_wol.offset, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_wol.base, #funAddr~rtl8152_set_wol.offset, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_msglevel.base, #funAddr~rtl8152_get_msglevel.offset, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_msglevel.base, #funAddr~rtl8152_set_msglevel.offset, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_nway_reset.base, #funAddr~rtl8152_nway_reset.offset, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_coalesce.base, #funAddr~rtl8152_get_coalesce.offset, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_coalesce.base, #funAddr~rtl8152_set_coalesce.offset, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_strings.base, #funAddr~rtl8152_get_strings.offset, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_ethtool_stats.base, #funAddr~rtl8152_get_ethtool_stats.offset, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_sset_count.base, #funAddr~rtl8152_get_sset_count.offset, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_get_eee.base, #funAddr~rtl_ethtool_get_eee.offset, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_set_eee.base, #funAddr~rtl_ethtool_set_eee.offset, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset := #Ultimate.alloc(528);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_open.base, #funAddr~rtl8152_open.offset, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_close.base, #funAddr~rtl8152_close.offset, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_start_xmit.base, #funAddr~rtl8152_start_xmit.offset, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_rx_mode.base, #funAddr~rtl8152_set_rx_mode.offset, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_mac_address.base, #funAddr~rtl8152_set_mac_address.offset, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_ioctl.base, #funAddr~rtl8152_ioctl.offset, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_change_mtu.base, #funAddr~rtl8152_change_mtu.offset, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_tx_timeout.base, #funAddr~rtl8152_tx_timeout.offset, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_features.base, #funAddr~rtl8152_set_features.offset, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_features_check.base, #funAddr~rtl8152_features_check.offset, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset := #Ultimate.alloc(275);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_table~0.base);call write~unchecked~int(131, ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 2 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 4 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 6 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 8 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 10 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 11 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 12 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 13 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 14 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 15 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 16 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 17 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 25 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 27 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 29 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 31 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 33 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 35 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 36 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 37 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 38 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 39 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 40 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 41 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 42 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 50 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 52 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 54 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 56 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 58 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 60 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 61 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 62 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 63 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 64 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 65 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 66 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 67 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 75 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 77 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 79 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 81 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 83 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 85 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 86 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 87 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 88 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 89 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 90 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 91 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 92 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 100 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 102 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 104 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 106 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 108 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 110 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 111 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 112 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 113 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 114 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 115 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 116 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 117 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 125 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 127 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 129 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 131 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 133 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 135 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 136 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 137 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 138 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 139 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 140 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 141 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 142 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 150 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 152 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 154 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 156 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 158 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 160 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 161 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 162 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 163 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 164 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 165 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 166 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 167 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 175 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 177 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 179 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 181 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 183 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 185 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 186 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 187 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 188 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 189 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 190 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 191 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 192 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 200 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 202 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 204 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 206 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 208 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 210 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 211 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 212 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 213 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 214 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 215 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 216 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 217 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 225 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 227 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 229 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 231 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 233 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 235 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 236 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 237 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 238 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 239 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 240 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 241 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 242 + ~#rtl8152_table~0.offset, 8);~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[0 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[0 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[1 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[1 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[2 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[2 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[3 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[3 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[4 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[4 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[5 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[5 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[6 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[6 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[7 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[7 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[8 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[8 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[9 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[9 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[10 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[10 := 0];call ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset := #Ultimate.alloc(289);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1);call write~$Pointer$(#t~string1158.base, #t~string1158.offset, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_probe.base, #funAddr~rtl8152_probe.offset, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_disconnect.base, #funAddr~rtl8152_disconnect.offset, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_suspend.base, #funAddr~rtl8152_suspend.offset, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 108 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 116 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1); {35290#true} is VALID [2018-11-19 17:18:30,025 INFO L273 TraceCheckUtils]: 2: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,025 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {35290#true} {35290#true} #8057#return; {35290#true} is VALID [2018-11-19 17:18:30,025 INFO L256 TraceCheckUtils]: 4: Hoare triple {35290#true} call #t~ret1299 := main(); {35290#true} is VALID [2018-11-19 17:18:30,025 INFO L273 TraceCheckUtils]: 5: Hoare triple {35290#true} call ~#ldvarg1~0.base, ~#ldvarg1~0.offset := #Ultimate.alloc(4);havoc ~ldvarg4~0.base, ~ldvarg4~0.offset;havoc ~tmp~163.base, ~tmp~163.offset;call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(4);havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~69.base, ~tmp___0~69.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___1~40.base, ~tmp___1~40.offset;call ~#ldvarg2~0.base, ~#ldvarg2~0.offset := #Ultimate.alloc(4);havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___2~30.base, ~tmp___2~30.offset;call ~#ldvarg11~0.base, ~#ldvarg11~0.offset := #Ultimate.alloc(8);havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___3~22.base, ~tmp___3~22.offset;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___4~17.base, ~tmp___4~17.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___5~8.base, ~tmp___5~8.offset;call ~#ldvarg13~0.base, ~#ldvarg13~0.offset := #Ultimate.alloc(4);havoc ~ldvarg10~0.base, ~ldvarg10~0.offset;havoc ~tmp___6~6.base, ~tmp___6~6.offset;call ~#ldvarg9~0.base, ~#ldvarg9~0.offset := #Ultimate.alloc(8);havoc ~ldvarg16~0.base, ~ldvarg16~0.offset;havoc ~tmp___7~5.base, ~tmp___7~5.offset;call ~#ldvarg15~0.base, ~#ldvarg15~0.offset := #Ultimate.alloc(4);havoc ~tmp___8~3;havoc ~tmp___9~3;havoc ~tmp___10~2;havoc ~tmp___11~1;havoc ~tmp___12~1; {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L256 TraceCheckUtils]: 6: Hoare triple {35290#true} call #t~ret1170.base, #t~ret1170.offset := ldv_init_zalloc(8); {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L273 TraceCheckUtils]: 7: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L256 TraceCheckUtils]: 8: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L273 TraceCheckUtils]: 9: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L273 TraceCheckUtils]: 10: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,026 INFO L273 TraceCheckUtils]: 12: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L273 TraceCheckUtils]: 13: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {35290#true} {35290#true} #7627#return; {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L273 TraceCheckUtils]: 15: Hoare triple {35290#true} ~tmp~163.base, ~tmp~163.offset := #t~ret1170.base, #t~ret1170.offset;havoc #t~ret1170.base, #t~ret1170.offset;~ldvarg4~0.base, ~ldvarg4~0.offset := ~tmp~163.base, ~tmp~163.offset; {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L256 TraceCheckUtils]: 16: Hoare triple {35290#true} call #t~ret1171.base, #t~ret1171.offset := ldv_init_zalloc(1); {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L273 TraceCheckUtils]: 17: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,027 INFO L256 TraceCheckUtils]: 18: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,028 INFO L273 TraceCheckUtils]: 19: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,028 INFO L273 TraceCheckUtils]: 20: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,028 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,028 INFO L273 TraceCheckUtils]: 22: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,028 INFO L273 TraceCheckUtils]: 23: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,029 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {35290#true} {35290#true} #7629#return; {35290#true} is VALID [2018-11-19 17:18:30,029 INFO L273 TraceCheckUtils]: 25: Hoare triple {35290#true} ~tmp___0~69.base, ~tmp___0~69.offset := #t~ret1171.base, #t~ret1171.offset;havoc #t~ret1171.base, #t~ret1171.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~69.base, ~tmp___0~69.offset; {35290#true} is VALID [2018-11-19 17:18:30,029 INFO L256 TraceCheckUtils]: 26: Hoare triple {35290#true} call #t~ret1172.base, #t~ret1172.offset := ldv_init_zalloc(8); {35290#true} is VALID [2018-11-19 17:18:30,029 INFO L273 TraceCheckUtils]: 27: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,029 INFO L256 TraceCheckUtils]: 28: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L273 TraceCheckUtils]: 29: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L273 TraceCheckUtils]: 30: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L273 TraceCheckUtils]: 32: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L273 TraceCheckUtils]: 33: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,030 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {35290#true} {35290#true} #7631#return; {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L273 TraceCheckUtils]: 35: Hoare triple {35290#true} ~tmp___1~40.base, ~tmp___1~40.offset := #t~ret1172.base, #t~ret1172.offset;havoc #t~ret1172.base, #t~ret1172.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___1~40.base, ~tmp___1~40.offset; {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L256 TraceCheckUtils]: 36: Hoare triple {35290#true} call #t~ret1173.base, #t~ret1173.offset := ldv_init_zalloc(196); {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L273 TraceCheckUtils]: 37: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L256 TraceCheckUtils]: 38: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L273 TraceCheckUtils]: 39: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,031 INFO L273 TraceCheckUtils]: 40: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,032 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,032 INFO L273 TraceCheckUtils]: 42: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,032 INFO L273 TraceCheckUtils]: 43: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,032 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {35290#true} {35290#true} #7633#return; {35290#true} is VALID [2018-11-19 17:18:30,032 INFO L273 TraceCheckUtils]: 45: Hoare triple {35290#true} ~tmp___2~30.base, ~tmp___2~30.offset := #t~ret1173.base, #t~ret1173.offset;havoc #t~ret1173.base, #t~ret1173.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___2~30.base, ~tmp___2~30.offset; {35290#true} is VALID [2018-11-19 17:18:30,033 INFO L256 TraceCheckUtils]: 46: Hoare triple {35290#true} call #t~ret1174.base, #t~ret1174.offset := ldv_init_zalloc(1); {35290#true} is VALID [2018-11-19 17:18:30,033 INFO L273 TraceCheckUtils]: 47: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,033 INFO L256 TraceCheckUtils]: 48: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,033 INFO L273 TraceCheckUtils]: 49: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,034 INFO L273 TraceCheckUtils]: 50: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,034 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,034 INFO L273 TraceCheckUtils]: 52: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,034 INFO L273 TraceCheckUtils]: 53: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,034 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {35290#true} {35290#true} #7635#return; {35290#true} is VALID [2018-11-19 17:18:30,035 INFO L273 TraceCheckUtils]: 55: Hoare triple {35290#true} ~tmp___3~22.base, ~tmp___3~22.offset := #t~ret1174.base, #t~ret1174.offset;havoc #t~ret1174.base, #t~ret1174.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___3~22.base, ~tmp___3~22.offset; {35290#true} is VALID [2018-11-19 17:18:30,035 INFO L256 TraceCheckUtils]: 56: Hoare triple {35290#true} call #t~ret1175.base, #t~ret1175.offset := ldv_init_zalloc(232); {35290#true} is VALID [2018-11-19 17:18:30,035 INFO L273 TraceCheckUtils]: 57: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,035 INFO L256 TraceCheckUtils]: 58: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,035 INFO L273 TraceCheckUtils]: 59: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L273 TraceCheckUtils]: 60: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L273 TraceCheckUtils]: 62: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L273 TraceCheckUtils]: 63: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {35290#true} {35290#true} #7637#return; {35290#true} is VALID [2018-11-19 17:18:30,036 INFO L273 TraceCheckUtils]: 65: Hoare triple {35290#true} ~tmp___4~17.base, ~tmp___4~17.offset := #t~ret1175.base, #t~ret1175.offset;havoc #t~ret1175.base, #t~ret1175.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___4~17.base, ~tmp___4~17.offset; {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L256 TraceCheckUtils]: 66: Hoare triple {35290#true} call #t~ret1176.base, #t~ret1176.offset := ldv_init_zalloc(40); {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L273 TraceCheckUtils]: 67: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L256 TraceCheckUtils]: 68: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L273 TraceCheckUtils]: 69: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L273 TraceCheckUtils]: 70: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,037 INFO L273 TraceCheckUtils]: 72: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L273 TraceCheckUtils]: 73: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {35290#true} {35290#true} #7639#return; {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L273 TraceCheckUtils]: 75: Hoare triple {35290#true} ~tmp___5~8.base, ~tmp___5~8.offset := #t~ret1176.base, #t~ret1176.offset;havoc #t~ret1176.base, #t~ret1176.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___5~8.base, ~tmp___5~8.offset; {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L256 TraceCheckUtils]: 76: Hoare triple {35290#true} call #t~ret1177.base, #t~ret1177.offset := ldv_init_zalloc(232); {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L273 TraceCheckUtils]: 77: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L256 TraceCheckUtils]: 78: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,038 INFO L273 TraceCheckUtils]: 79: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L273 TraceCheckUtils]: 80: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L273 TraceCheckUtils]: 82: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L273 TraceCheckUtils]: 83: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {35290#true} {35290#true} #7641#return; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L273 TraceCheckUtils]: 85: Hoare triple {35290#true} ~tmp___6~6.base, ~tmp___6~6.offset := #t~ret1177.base, #t~ret1177.offset;havoc #t~ret1177.base, #t~ret1177.offset;~ldvarg10~0.base, ~ldvarg10~0.offset := ~tmp___6~6.base, ~tmp___6~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,039 INFO L256 TraceCheckUtils]: 86: Hoare triple {35290#true} call #t~ret1178.base, #t~ret1178.offset := ldv_init_zalloc(32); {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L273 TraceCheckUtils]: 87: Hoare triple {35290#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L256 TraceCheckUtils]: 88: Hoare triple {35290#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L273 TraceCheckUtils]: 89: Hoare triple {35290#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L273 TraceCheckUtils]: 90: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {35290#true} {35290#true} #7503#return; {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L273 TraceCheckUtils]: 92: Hoare triple {35290#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {35290#true} is VALID [2018-11-19 17:18:30,040 INFO L273 TraceCheckUtils]: 93: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {35290#true} {35290#true} #7643#return; {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L273 TraceCheckUtils]: 95: Hoare triple {35290#true} ~tmp___7~5.base, ~tmp___7~5.offset := #t~ret1178.base, #t~ret1178.offset;havoc #t~ret1178.base, #t~ret1178.offset;~ldvarg16~0.base, ~ldvarg16~0.offset := ~tmp___7~5.base, ~tmp___7~5.offset;call ldv_initialize(); {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L256 TraceCheckUtils]: 96: Hoare triple {35290#true} call #t~ret1179.base, #t~ret1179.offset := ldv_memset(~#ldvarg1~0.base, ~#ldvarg1~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L273 TraceCheckUtils]: 97: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L256 TraceCheckUtils]: 98: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,041 INFO L273 TraceCheckUtils]: 99: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,042 INFO L273 TraceCheckUtils]: 100: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,042 INFO L273 TraceCheckUtils]: 101: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,042 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,042 INFO L273 TraceCheckUtils]: 103: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,042 INFO L273 TraceCheckUtils]: 104: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {35290#true} {35290#true} #7645#return; {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L273 TraceCheckUtils]: 106: Hoare triple {35290#true} havoc #t~ret1179.base, #t~ret1179.offset; {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L256 TraceCheckUtils]: 107: Hoare triple {35290#true} call #t~ret1180.base, #t~ret1180.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L273 TraceCheckUtils]: 108: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L256 TraceCheckUtils]: 109: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,043 INFO L273 TraceCheckUtils]: 110: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L273 TraceCheckUtils]: 111: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L273 TraceCheckUtils]: 112: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L273 TraceCheckUtils]: 114: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L273 TraceCheckUtils]: 115: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {35290#true} {35290#true} #7647#return; {35290#true} is VALID [2018-11-19 17:18:30,044 INFO L273 TraceCheckUtils]: 117: Hoare triple {35290#true} havoc #t~ret1180.base, #t~ret1180.offset; {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L256 TraceCheckUtils]: 118: Hoare triple {35290#true} call #t~ret1181.base, #t~ret1181.offset := ldv_memset(~#ldvarg2~0.base, ~#ldvarg2~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L273 TraceCheckUtils]: 119: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L256 TraceCheckUtils]: 120: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L273 TraceCheckUtils]: 121: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L273 TraceCheckUtils]: 122: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L273 TraceCheckUtils]: 123: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,045 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L273 TraceCheckUtils]: 125: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L273 TraceCheckUtils]: 126: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {35290#true} {35290#true} #7649#return; {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L273 TraceCheckUtils]: 128: Hoare triple {35290#true} havoc #t~ret1181.base, #t~ret1181.offset; {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L256 TraceCheckUtils]: 129: Hoare triple {35290#true} call #t~ret1182.base, #t~ret1182.offset := ldv_memset(~#ldvarg11~0.base, ~#ldvarg11~0.offset, 0, 8); {35290#true} is VALID [2018-11-19 17:18:30,046 INFO L273 TraceCheckUtils]: 130: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,047 INFO L256 TraceCheckUtils]: 131: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,047 INFO L273 TraceCheckUtils]: 132: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,047 INFO L273 TraceCheckUtils]: 133: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,047 INFO L273 TraceCheckUtils]: 134: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,047 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,048 INFO L273 TraceCheckUtils]: 136: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,048 INFO L273 TraceCheckUtils]: 137: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,048 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {35290#true} {35290#true} #7651#return; {35290#true} is VALID [2018-11-19 17:18:30,048 INFO L273 TraceCheckUtils]: 139: Hoare triple {35290#true} havoc #t~ret1182.base, #t~ret1182.offset; {35290#true} is VALID [2018-11-19 17:18:30,048 INFO L256 TraceCheckUtils]: 140: Hoare triple {35290#true} call #t~ret1183.base, #t~ret1183.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,049 INFO L273 TraceCheckUtils]: 141: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,049 INFO L256 TraceCheckUtils]: 142: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,049 INFO L273 TraceCheckUtils]: 143: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,049 INFO L273 TraceCheckUtils]: 144: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,049 INFO L273 TraceCheckUtils]: 145: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,050 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,050 INFO L273 TraceCheckUtils]: 147: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,050 INFO L273 TraceCheckUtils]: 148: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,050 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {35290#true} {35290#true} #7653#return; {35290#true} is VALID [2018-11-19 17:18:30,050 INFO L273 TraceCheckUtils]: 150: Hoare triple {35290#true} havoc #t~ret1183.base, #t~ret1183.offset; {35290#true} is VALID [2018-11-19 17:18:30,051 INFO L256 TraceCheckUtils]: 151: Hoare triple {35290#true} call #t~ret1184.base, #t~ret1184.offset := ldv_memset(~#ldvarg13~0.base, ~#ldvarg13~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,051 INFO L273 TraceCheckUtils]: 152: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,051 INFO L256 TraceCheckUtils]: 153: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,051 INFO L273 TraceCheckUtils]: 154: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,051 INFO L273 TraceCheckUtils]: 155: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,052 INFO L273 TraceCheckUtils]: 156: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,052 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,052 INFO L273 TraceCheckUtils]: 158: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,052 INFO L273 TraceCheckUtils]: 159: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,052 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {35290#true} {35290#true} #7655#return; {35290#true} is VALID [2018-11-19 17:18:30,053 INFO L273 TraceCheckUtils]: 161: Hoare triple {35290#true} havoc #t~ret1184.base, #t~ret1184.offset; {35290#true} is VALID [2018-11-19 17:18:30,053 INFO L256 TraceCheckUtils]: 162: Hoare triple {35290#true} call #t~ret1185.base, #t~ret1185.offset := ldv_memset(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 0, 8); {35290#true} is VALID [2018-11-19 17:18:30,053 INFO L273 TraceCheckUtils]: 163: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,053 INFO L256 TraceCheckUtils]: 164: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,053 INFO L273 TraceCheckUtils]: 165: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,054 INFO L273 TraceCheckUtils]: 166: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,054 INFO L273 TraceCheckUtils]: 167: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,054 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,054 INFO L273 TraceCheckUtils]: 169: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,054 INFO L273 TraceCheckUtils]: 170: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,055 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {35290#true} {35290#true} #7657#return; {35290#true} is VALID [2018-11-19 17:18:30,055 INFO L273 TraceCheckUtils]: 172: Hoare triple {35290#true} havoc #t~ret1185.base, #t~ret1185.offset; {35290#true} is VALID [2018-11-19 17:18:30,055 INFO L256 TraceCheckUtils]: 173: Hoare triple {35290#true} call #t~ret1186.base, #t~ret1186.offset := ldv_memset(~#ldvarg15~0.base, ~#ldvarg15~0.offset, 0, 4); {35290#true} is VALID [2018-11-19 17:18:30,055 INFO L273 TraceCheckUtils]: 174: Hoare triple {35290#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,056 INFO L256 TraceCheckUtils]: 175: Hoare triple {35290#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {35290#true} is VALID [2018-11-19 17:18:30,056 INFO L273 TraceCheckUtils]: 176: Hoare triple {35290#true} #t~loopctr1322 := 0; {35290#true} is VALID [2018-11-19 17:18:30,056 INFO L273 TraceCheckUtils]: 177: Hoare triple {35290#true} assume !(#t~loopctr1322 < #amount); {35290#true} is VALID [2018-11-19 17:18:30,056 INFO L273 TraceCheckUtils]: 178: Hoare triple {35290#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {35290#true} is VALID [2018-11-19 17:18:30,056 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {35290#true} {35290#true} #8777#return; {35290#true} is VALID [2018-11-19 17:18:30,057 INFO L273 TraceCheckUtils]: 180: Hoare triple {35290#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {35290#true} is VALID [2018-11-19 17:18:30,057 INFO L273 TraceCheckUtils]: 181: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,057 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {35290#true} {35290#true} #7659#return; {35290#true} is VALID [2018-11-19 17:18:30,061 INFO L273 TraceCheckUtils]: 183: Hoare triple {35290#true} havoc #t~ret1186.base, #t~ret1186.offset;~ldv_state_variable_4~0 := 0; {35292#(= ~ldv_state_variable_4~0 0)} is VALID [2018-11-19 17:18:30,062 INFO L256 TraceCheckUtils]: 184: Hoare triple {35292#(= ~ldv_state_variable_4~0 0)} call work_init_1(); {35290#true} is VALID [2018-11-19 17:18:30,062 INFO L273 TraceCheckUtils]: 185: Hoare triple {35290#true} ~ldv_work_1_0~0 := 0;~ldv_work_1_1~0 := 0;~ldv_work_1_2~0 := 0;~ldv_work_1_3~0 := 0; {35290#true} is VALID [2018-11-19 17:18:30,062 INFO L273 TraceCheckUtils]: 186: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,063 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {35290#true} {35292#(= ~ldv_state_variable_4~0 0)} #7661#return; {35292#(= ~ldv_state_variable_4~0 0)} is VALID [2018-11-19 17:18:30,064 INFO L273 TraceCheckUtils]: 188: Hoare triple {35292#(= ~ldv_state_variable_4~0 0)} ~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {35292#(= ~ldv_state_variable_4~0 0)} is VALID [2018-11-19 17:18:30,064 INFO L273 TraceCheckUtils]: 189: Hoare triple {35292#(= ~ldv_state_variable_4~0 0)} assume -2147483648 <= #t~nondet1187 && #t~nondet1187 <= 2147483647;~tmp___8~3 := #t~nondet1187;havoc #t~nondet1187;#t~switch1188 := 0 == ~tmp___8~3; {35292#(= ~ldv_state_variable_4~0 0)} is VALID [2018-11-19 17:18:30,066 INFO L273 TraceCheckUtils]: 190: Hoare triple {35292#(= ~ldv_state_variable_4~0 0)} assume #t~switch1188; {35292#(= ~ldv_state_variable_4~0 0)} is VALID [2018-11-19 17:18:30,067 INFO L273 TraceCheckUtils]: 191: Hoare triple {35292#(= ~ldv_state_variable_4~0 0)} assume 0 != ~ldv_state_variable_4~0;assume -2147483648 <= #t~nondet1189 && #t~nondet1189 <= 2147483647;~tmp___9~3 := #t~nondet1189;havoc #t~nondet1189;#t~switch1190 := 0 == ~tmp___9~3; {35291#false} is VALID [2018-11-19 17:18:30,067 INFO L273 TraceCheckUtils]: 192: Hoare triple {35291#false} assume !#t~switch1190;#t~switch1190 := #t~switch1190 || 1 == ~tmp___9~3; {35291#false} is VALID [2018-11-19 17:18:30,067 INFO L273 TraceCheckUtils]: 193: Hoare triple {35291#false} assume !#t~switch1190;#t~switch1190 := #t~switch1190 || 2 == ~tmp___9~3; {35291#false} is VALID [2018-11-19 17:18:30,067 INFO L273 TraceCheckUtils]: 194: Hoare triple {35291#false} assume !#t~switch1190;#t~switch1190 := #t~switch1190 || 3 == ~tmp___9~3; {35291#false} is VALID [2018-11-19 17:18:30,067 INFO L273 TraceCheckUtils]: 195: Hoare triple {35291#false} assume !#t~switch1190;#t~switch1190 := #t~switch1190 || 4 == ~tmp___9~3; {35291#false} is VALID [2018-11-19 17:18:30,068 INFO L273 TraceCheckUtils]: 196: Hoare triple {35291#false} assume #t~switch1190; {35291#false} is VALID [2018-11-19 17:18:30,068 INFO L273 TraceCheckUtils]: 197: Hoare triple {35291#false} assume 1 == ~ldv_state_variable_4~0; {35291#false} is VALID [2018-11-19 17:18:30,068 INFO L256 TraceCheckUtils]: 198: Hoare triple {35291#false} call #t~ret1194 := rtl8152_get_settings(~ops_group3~0.base, ~ops_group3~0.offset, ~ops_group2~0.base, ~ops_group2~0.offset); {35291#false} is VALID [2018-11-19 17:18:30,068 INFO L273 TraceCheckUtils]: 199: Hoare triple {35291#false} ~netdev.base, ~netdev.offset := #in~netdev.base, #in~netdev.offset;~cmd.base, ~cmd.offset := #in~cmd.base, #in~cmd.offset;havoc ~tp~22.base, ~tp~22.offset;havoc ~tmp~139.base, ~tmp~139.offset;havoc ~ret~17; {35291#false} is VALID [2018-11-19 17:18:30,068 INFO L256 TraceCheckUtils]: 200: Hoare triple {35291#false} call #t~ret988.base, #t~ret988.offset := netdev_priv(~netdev.base, ~netdev.offset); {35290#true} is VALID [2018-11-19 17:18:30,069 INFO L273 TraceCheckUtils]: 201: Hoare triple {35290#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {35290#true} is VALID [2018-11-19 17:18:30,069 INFO L273 TraceCheckUtils]: 202: Hoare triple {35290#true} assume true; {35290#true} is VALID [2018-11-19 17:18:30,069 INFO L268 TraceCheckUtils]: 203: Hoare quadruple {35290#true} {35291#false} #6827#return; {35291#false} is VALID [2018-11-19 17:18:30,069 INFO L273 TraceCheckUtils]: 204: Hoare triple {35291#false} ~tmp~139.base, ~tmp~139.offset := #t~ret988.base, #t~ret988.offset;havoc #t~ret988.base, #t~ret988.offset;~tp~22.base, ~tp~22.offset := ~tmp~139.base, ~tmp~139.offset;call #t~mem989.base, #t~mem989.offset := read~$Pointer$(~tp~22.base, 1587 + ~tp~22.offset, 8); {35291#false} is VALID [2018-11-19 17:18:30,070 INFO L273 TraceCheckUtils]: 205: Hoare triple {35291#false} assume !(0 == (#t~mem989.base + #t~mem989.offset) % 18446744073709551616);havoc #t~mem989.base, #t~mem989.offset;call #t~mem990.base, #t~mem990.offset := read~$Pointer$(~tp~22.base, 280 + ~tp~22.offset, 8);call #t~ret991 := usb_autopm_get_interface(#t~mem990.base, #t~mem990.offset);assume -2147483648 <= #t~ret991 && #t~ret991 <= 2147483647;~ret~17 := #t~ret991;havoc #t~ret991;havoc #t~mem990.base, #t~mem990.offset; {35291#false} is VALID [2018-11-19 17:18:30,070 INFO L273 TraceCheckUtils]: 206: Hoare triple {35291#false} assume !(~ret~17 < 0); {35291#false} is VALID [2018-11-19 17:18:30,070 INFO L256 TraceCheckUtils]: 207: Hoare triple {35291#false} call ldv_mutex_lock_39(~tp~22.base, 1603 + ~tp~22.offset); {35291#false} is VALID [2018-11-19 17:18:30,070 INFO L273 TraceCheckUtils]: 208: Hoare triple {35291#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset; {35291#false} is VALID [2018-11-19 17:18:30,071 INFO L256 TraceCheckUtils]: 209: Hoare triple {35291#false} call ldv_mutex_lock_control_of_r8152(~ldv_func_arg1.base, ~ldv_func_arg1.offset); {35291#false} is VALID [2018-11-19 17:18:30,071 INFO L273 TraceCheckUtils]: 210: Hoare triple {35291#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {35291#false} is VALID [2018-11-19 17:18:30,071 INFO L273 TraceCheckUtils]: 211: Hoare triple {35291#false} assume 1 != ~ldv_mutex_control_of_r8152~0; {35291#false} is VALID [2018-11-19 17:18:30,071 INFO L256 TraceCheckUtils]: 212: Hoare triple {35291#false} call ldv_error(); {35291#false} is VALID [2018-11-19 17:18:30,071 INFO L273 TraceCheckUtils]: 213: Hoare triple {35291#false} assume !false; {35291#false} is VALID [2018-11-19 17:18:30,101 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:18:30,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:18:30,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:18:30,104 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 214 [2018-11-19 17:18:30,105 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:18:30,105 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:18:30,244 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:18:30,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:18:30,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:18:30,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:18:30,245 INFO L87 Difference]: Start difference. First operand 5678 states and 7895 transitions. Second operand 3 states. [2018-11-19 17:19:07,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:19:07,024 INFO L93 Difference]: Finished difference Result 16091 states and 22408 transitions. [2018-11-19 17:19:07,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:19:07,025 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 214 [2018-11-19 17:19:07,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:19:07,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:19:07,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11328 transitions. [2018-11-19 17:19:07,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:19:08,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11328 transitions. [2018-11-19 17:19:08,271 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 11328 transitions. [2018-11-19 17:19:18,564 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11328 edges. 11328 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:19:23,889 INFO L225 Difference]: With dead ends: 16091 [2018-11-19 17:19:23,889 INFO L226 Difference]: Without dead ends: 10463 [2018-11-19 17:19:23,904 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:19:23,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10463 states. [2018-11-19 17:19:29,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10463 to 10441. [2018-11-19 17:19:29,722 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:19:29,722 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10463 states. Second operand 10441 states. [2018-11-19 17:19:29,722 INFO L74 IsIncluded]: Start isIncluded. First operand 10463 states. Second operand 10441 states. [2018-11-19 17:19:29,722 INFO L87 Difference]: Start difference. First operand 10463 states. Second operand 10441 states. [2018-11-19 17:19:33,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:19:33,237 INFO L93 Difference]: Finished difference Result 10463 states and 14578 transitions. [2018-11-19 17:19:33,237 INFO L276 IsEmpty]: Start isEmpty. Operand 10463 states and 14578 transitions. [2018-11-19 17:19:33,305 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:19:33,305 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:19:33,305 INFO L74 IsIncluded]: Start isIncluded. First operand 10441 states. Second operand 10463 states. [2018-11-19 17:19:33,305 INFO L87 Difference]: Start difference. First operand 10441 states. Second operand 10463 states. [2018-11-19 17:19:37,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:19:37,004 INFO L93 Difference]: Finished difference Result 10463 states and 14578 transitions. [2018-11-19 17:19:37,004 INFO L276 IsEmpty]: Start isEmpty. Operand 10463 states and 14578 transitions. [2018-11-19 17:19:37,028 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:19:37,029 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:19:37,029 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:19:37,029 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:19:37,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10441 states. [2018-11-19 17:19:41,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10441 states to 10441 states and 14554 transitions. [2018-11-19 17:19:41,636 INFO L78 Accepts]: Start accepts. Automaton has 10441 states and 14554 transitions. Word has length 214 [2018-11-19 17:19:41,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:19:41,636 INFO L480 AbstractCegarLoop]: Abstraction has 10441 states and 14554 transitions. [2018-11-19 17:19:41,636 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:19:41,636 INFO L276 IsEmpty]: Start isEmpty. Operand 10441 states and 14554 transitions. [2018-11-19 17:19:41,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-11-19 17:19:41,639 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:19:41,640 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:19:41,640 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:19:41,640 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:19:41,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1742890262, now seen corresponding path program 1 times [2018-11-19 17:19:41,640 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:19:41,641 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:19:41,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:19:41,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:19:41,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:19:41,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:19:41,988 INFO L256 TraceCheckUtils]: 0: Hoare triple {93913#true} call ULTIMATE.init(); {93913#true} is VALID [2018-11-19 17:19:41,989 INFO L273 TraceCheckUtils]: 1: Hoare triple {93913#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string123.base, #t~string123.offset := #Ultimate.alloc(22);call #t~string275.base, #t~string275.offset := #Ultimate.alloc(10);call #t~string317.base, #t~string317.offset := #Ultimate.alloc(24);call #t~string383.base, #t~string383.offset := #Ultimate.alloc(21);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(24);call #t~string390.base, #t~string390.offset := #Ultimate.alloc(23);call #t~string406.base, #t~string406.offset := #Ultimate.alloc(24);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(14);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(14);call #t~string435.base, #t~string435.offset := #Ultimate.alloc(33);call #t~string438.base, #t~string438.offset := #Ultimate.alloc(24);call #t~string441.base, #t~string441.offset := #Ultimate.alloc(16);call #t~string454.base, #t~string454.offset := #Ultimate.alloc(32);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(23);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(23);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(203);call #t~string529.base, #t~string529.offset := #Ultimate.alloc(39);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(203);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(31);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(203);call #t~string633.base, #t~string633.offset := #Ultimate.alloc(18);call #t~string661.base, #t~string661.offset := #Ultimate.alloc(34);call #t~string668.base, #t~string668.offset := #Ultimate.alloc(12);call #t~string678.base, #t~string678.offset := #Ultimate.alloc(26);call #t~string880.base, #t~string880.offset := #Ultimate.alloc(28);call #t~string982.base, #t~string982.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string982.base,#t~string982.offset := 114];#memory_int := #memory_int[#t~string982.base,1 + #t~string982.offset := 56];#memory_int := #memory_int[#t~string982.base,2 + #t~string982.offset := 49];#memory_int := #memory_int[#t~string982.base,3 + #t~string982.offset := 53];#memory_int := #memory_int[#t~string982.base,4 + #t~string982.offset := 50];#memory_int := #memory_int[#t~string982.base,5 + #t~string982.offset := 0];call #t~string984.base, #t~string984.offset := #Ultimate.alloc(21);call #t~string1111.base, #t~string1111.offset := #Ultimate.alloc(24);call #t~string1119.base, #t~string1119.offset := #Ultimate.alloc(16);call #t~string1126.base, #t~string1126.offset := #Ultimate.alloc(15);call #t~string1129.base, #t~string1129.offset := #Ultimate.alloc(13);call #t~string1131.base, #t~string1131.offset := #Ultimate.alloc(25);call #t~string1132.base, #t~string1132.offset := #Ultimate.alloc(26);call #t~string1142.base, #t~string1142.offset := #Ultimate.alloc(30);call #t~string1148.base, #t~string1148.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string1148.base,#t~string1148.offset := 37];#memory_int := #memory_int[#t~string1148.base,1 + #t~string1148.offset := 115];#memory_int := #memory_int[#t~string1148.base,2 + #t~string1148.offset := 10];#memory_int := #memory_int[#t~string1148.base,3 + #t~string1148.offset := 0];call #t~string1149.base, #t~string1149.offset := #Ultimate.alloc(21);call #t~string1158.base, #t~string1158.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1158.base,#t~string1158.offset := 114];#memory_int := #memory_int[#t~string1158.base,1 + #t~string1158.offset := 56];#memory_int := #memory_int[#t~string1158.base,2 + #t~string1158.offset := 49];#memory_int := #memory_int[#t~string1158.base,3 + #t~string1158.offset := 53];#memory_int := #memory_int[#t~string1158.base,4 + #t~string1158.offset := 50];#memory_int := #memory_int[#t~string1158.base,5 + #t~string1158.offset := 0];call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1159.base,#t~string1159.offset := 114];#memory_int := #memory_int[#t~string1159.base,1 + #t~string1159.offset := 56];#memory_int := #memory_int[#t~string1159.base,2 + #t~string1159.offset := 49];#memory_int := #memory_int[#t~string1159.base,3 + #t~string1159.offset := 53];#memory_int := #memory_int[#t~string1159.base,4 + #t~string1159.offset := 50];#memory_int := #memory_int[#t~string1159.base,5 + #t~string1159.offset := 0];~ldv_work_1_3~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_work_1_1~0 := 0;~usb_counter~0 := 0;~ldv_work_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_work_1_0~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~multicast_filter_limit~0 := 32;~agg_buf_sz~0 := 16384;call ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset := #Ultimate.alloc(416);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_gstrings~0.base);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 1 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 2 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 3 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 4 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 5 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 6 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 7 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 8 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 9 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 10 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 32 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 33 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 34 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 35 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 36 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 37 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 38 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 39 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 40 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 41 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 42 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 64 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 65 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 66 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 67 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 68 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 69 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 70 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 71 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 72 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 73 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 96 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 97 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 98 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 99 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 100 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 101 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 102 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 103 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 104 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 105 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 128 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 129 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 130 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 131 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 132 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 133 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 134 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 135 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 136 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 137 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 160 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 161 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 162 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 163 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 164 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 165 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 166 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 167 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 168 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 169 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 170 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 171 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 172 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 192 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 193 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 194 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 195 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 196 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 197 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 198 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 199 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 200 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 201 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 202 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 203 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 204 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 205 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 206 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 207 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 208 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 209 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 210 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 211 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 212 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 224 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 225 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 226 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 227 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 228 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 229 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 230 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 231 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 232 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 233 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 234 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 235 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 236 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 237 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 238 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 239 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 240 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 241 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 242 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 243 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 256 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 257 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 258 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 259 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 260 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 261 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 262 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 263 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 264 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 265 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 266 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 288 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 289 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 290 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 291 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 292 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 293 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 294 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 295 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 296 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 297 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 298 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 299 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 300 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 320 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 321 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 322 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 323 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 324 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 325 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 326 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 327 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 328 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 329 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 330 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 331 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 332 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 352 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 353 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 354 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 355 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 356 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 357 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 358 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 359 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 360 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 361 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 362 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 384 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 385 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 386 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 387 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 388 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 389 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 390 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 391 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 392 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 393 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 394 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 395 + ~#rtl8152_gstrings~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_mutex_control_of_r8152~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_work_struct_1_0~0.base, ~ldv_work_struct_1_0~0.offset := 0, 0;~ldv_work_struct_1_1~0.base, ~ldv_work_struct_1_1~0.offset := 0, 0;~ops_group4~0.base, ~ops_group4~0.offset := 0, 0;~ldv_work_struct_1_3~0.base, ~ldv_work_struct_1_3~0.offset := 0, 0;~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset := 0, 0;~ops_group1~0.base, ~ops_group1~0.offset := 0, 0;~ldv_work_struct_1_2~0.base, ~ldv_work_struct_1_2~0.offset := 0, 0;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := 0, 0;~ops_group3~0.base, ~ops_group3~0.offset := 0, 0;~ops_group2~0.base, ~ops_group2~0.offset := 0, 0;~ops_group0~0.base, ~ops_group0~0.offset := 0, 0;call ~#ops~0.base, ~#ops~0.offset := #Ultimate.alloc(392);call write~$Pointer$(0, 0, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_settings.base, #funAddr~rtl8152_get_settings.offset, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_settings.base, #funAddr~rtl8152_set_settings.offset, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_drvinfo.base, #funAddr~rtl8152_get_drvinfo.offset, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_wol.base, #funAddr~rtl8152_get_wol.offset, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_wol.base, #funAddr~rtl8152_set_wol.offset, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_msglevel.base, #funAddr~rtl8152_get_msglevel.offset, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_msglevel.base, #funAddr~rtl8152_set_msglevel.offset, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_nway_reset.base, #funAddr~rtl8152_nway_reset.offset, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_coalesce.base, #funAddr~rtl8152_get_coalesce.offset, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_coalesce.base, #funAddr~rtl8152_set_coalesce.offset, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_strings.base, #funAddr~rtl8152_get_strings.offset, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_ethtool_stats.base, #funAddr~rtl8152_get_ethtool_stats.offset, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_sset_count.base, #funAddr~rtl8152_get_sset_count.offset, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_get_eee.base, #funAddr~rtl_ethtool_get_eee.offset, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_set_eee.base, #funAddr~rtl_ethtool_set_eee.offset, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset := #Ultimate.alloc(528);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_open.base, #funAddr~rtl8152_open.offset, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_close.base, #funAddr~rtl8152_close.offset, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_start_xmit.base, #funAddr~rtl8152_start_xmit.offset, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_rx_mode.base, #funAddr~rtl8152_set_rx_mode.offset, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_mac_address.base, #funAddr~rtl8152_set_mac_address.offset, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_ioctl.base, #funAddr~rtl8152_ioctl.offset, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_change_mtu.base, #funAddr~rtl8152_change_mtu.offset, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_tx_timeout.base, #funAddr~rtl8152_tx_timeout.offset, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_features.base, #funAddr~rtl8152_set_features.offset, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_features_check.base, #funAddr~rtl8152_features_check.offset, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset := #Ultimate.alloc(275);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_table~0.base);call write~unchecked~int(131, ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 2 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 4 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 6 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 8 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 10 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 11 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 12 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 13 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 14 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 15 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 16 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 17 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 25 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 27 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 29 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 31 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 33 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 35 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 36 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 37 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 38 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 39 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 40 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 41 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 42 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 50 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 52 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 54 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 56 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 58 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 60 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 61 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 62 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 63 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 64 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 65 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 66 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 67 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 75 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 77 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 79 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 81 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 83 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 85 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 86 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 87 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 88 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 89 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 90 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 91 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 92 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 100 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 102 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 104 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 106 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 108 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 110 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 111 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 112 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 113 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 114 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 115 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 116 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 117 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 125 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 127 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 129 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 131 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 133 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 135 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 136 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 137 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 138 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 139 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 140 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 141 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 142 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 150 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 152 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 154 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 156 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 158 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 160 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 161 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 162 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 163 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 164 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 165 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 166 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 167 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 175 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 177 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 179 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 181 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 183 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 185 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 186 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 187 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 188 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 189 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 190 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 191 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 192 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 200 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 202 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 204 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 206 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 208 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 210 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 211 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 212 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 213 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 214 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 215 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 216 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 217 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 225 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 227 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 229 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 231 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 233 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 235 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 236 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 237 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 238 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 239 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 240 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 241 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 242 + ~#rtl8152_table~0.offset, 8);~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[0 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[0 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[1 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[1 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[2 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[2 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[3 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[3 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[4 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[4 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[5 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[5 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[6 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[6 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[7 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[7 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[8 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[8 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[9 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[9 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[10 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[10 := 0];call ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset := #Ultimate.alloc(289);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1);call write~$Pointer$(#t~string1158.base, #t~string1158.offset, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_probe.base, #funAddr~rtl8152_probe.offset, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_disconnect.base, #funAddr~rtl8152_disconnect.offset, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_suspend.base, #funAddr~rtl8152_suspend.offset, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 108 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 116 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1); {93913#true} is VALID [2018-11-19 17:19:41,990 INFO L273 TraceCheckUtils]: 2: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,990 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {93913#true} {93913#true} #8057#return; {93913#true} is VALID [2018-11-19 17:19:41,990 INFO L256 TraceCheckUtils]: 4: Hoare triple {93913#true} call #t~ret1299 := main(); {93913#true} is VALID [2018-11-19 17:19:41,990 INFO L273 TraceCheckUtils]: 5: Hoare triple {93913#true} call ~#ldvarg1~0.base, ~#ldvarg1~0.offset := #Ultimate.alloc(4);havoc ~ldvarg4~0.base, ~ldvarg4~0.offset;havoc ~tmp~163.base, ~tmp~163.offset;call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(4);havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~69.base, ~tmp___0~69.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___1~40.base, ~tmp___1~40.offset;call ~#ldvarg2~0.base, ~#ldvarg2~0.offset := #Ultimate.alloc(4);havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___2~30.base, ~tmp___2~30.offset;call ~#ldvarg11~0.base, ~#ldvarg11~0.offset := #Ultimate.alloc(8);havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___3~22.base, ~tmp___3~22.offset;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___4~17.base, ~tmp___4~17.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___5~8.base, ~tmp___5~8.offset;call ~#ldvarg13~0.base, ~#ldvarg13~0.offset := #Ultimate.alloc(4);havoc ~ldvarg10~0.base, ~ldvarg10~0.offset;havoc ~tmp___6~6.base, ~tmp___6~6.offset;call ~#ldvarg9~0.base, ~#ldvarg9~0.offset := #Ultimate.alloc(8);havoc ~ldvarg16~0.base, ~ldvarg16~0.offset;havoc ~tmp___7~5.base, ~tmp___7~5.offset;call ~#ldvarg15~0.base, ~#ldvarg15~0.offset := #Ultimate.alloc(4);havoc ~tmp___8~3;havoc ~tmp___9~3;havoc ~tmp___10~2;havoc ~tmp___11~1;havoc ~tmp___12~1; {93913#true} is VALID [2018-11-19 17:19:41,990 INFO L256 TraceCheckUtils]: 6: Hoare triple {93913#true} call #t~ret1170.base, #t~ret1170.offset := ldv_init_zalloc(8); {93913#true} is VALID [2018-11-19 17:19:41,991 INFO L273 TraceCheckUtils]: 7: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,991 INFO L256 TraceCheckUtils]: 8: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,991 INFO L273 TraceCheckUtils]: 9: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:41,991 INFO L273 TraceCheckUtils]: 10: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,992 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:41,992 INFO L273 TraceCheckUtils]: 12: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:41,992 INFO L273 TraceCheckUtils]: 13: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,992 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {93913#true} {93913#true} #7627#return; {93913#true} is VALID [2018-11-19 17:19:41,993 INFO L273 TraceCheckUtils]: 15: Hoare triple {93913#true} ~tmp~163.base, ~tmp~163.offset := #t~ret1170.base, #t~ret1170.offset;havoc #t~ret1170.base, #t~ret1170.offset;~ldvarg4~0.base, ~ldvarg4~0.offset := ~tmp~163.base, ~tmp~163.offset; {93913#true} is VALID [2018-11-19 17:19:41,993 INFO L256 TraceCheckUtils]: 16: Hoare triple {93913#true} call #t~ret1171.base, #t~ret1171.offset := ldv_init_zalloc(1); {93913#true} is VALID [2018-11-19 17:19:41,993 INFO L273 TraceCheckUtils]: 17: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,993 INFO L256 TraceCheckUtils]: 18: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,993 INFO L273 TraceCheckUtils]: 19: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:41,994 INFO L273 TraceCheckUtils]: 20: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,994 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:41,994 INFO L273 TraceCheckUtils]: 22: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:41,994 INFO L273 TraceCheckUtils]: 23: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,995 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {93913#true} {93913#true} #7629#return; {93913#true} is VALID [2018-11-19 17:19:41,995 INFO L273 TraceCheckUtils]: 25: Hoare triple {93913#true} ~tmp___0~69.base, ~tmp___0~69.offset := #t~ret1171.base, #t~ret1171.offset;havoc #t~ret1171.base, #t~ret1171.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~69.base, ~tmp___0~69.offset; {93913#true} is VALID [2018-11-19 17:19:41,995 INFO L256 TraceCheckUtils]: 26: Hoare triple {93913#true} call #t~ret1172.base, #t~ret1172.offset := ldv_init_zalloc(8); {93913#true} is VALID [2018-11-19 17:19:41,996 INFO L273 TraceCheckUtils]: 27: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,996 INFO L256 TraceCheckUtils]: 28: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,996 INFO L273 TraceCheckUtils]: 29: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:41,996 INFO L273 TraceCheckUtils]: 30: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,996 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:41,997 INFO L273 TraceCheckUtils]: 32: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:41,997 INFO L273 TraceCheckUtils]: 33: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,997 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {93913#true} {93913#true} #7631#return; {93913#true} is VALID [2018-11-19 17:19:41,997 INFO L273 TraceCheckUtils]: 35: Hoare triple {93913#true} ~tmp___1~40.base, ~tmp___1~40.offset := #t~ret1172.base, #t~ret1172.offset;havoc #t~ret1172.base, #t~ret1172.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___1~40.base, ~tmp___1~40.offset; {93913#true} is VALID [2018-11-19 17:19:41,998 INFO L256 TraceCheckUtils]: 36: Hoare triple {93913#true} call #t~ret1173.base, #t~ret1173.offset := ldv_init_zalloc(196); {93913#true} is VALID [2018-11-19 17:19:41,998 INFO L273 TraceCheckUtils]: 37: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,998 INFO L256 TraceCheckUtils]: 38: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:41,998 INFO L273 TraceCheckUtils]: 39: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:41,998 INFO L273 TraceCheckUtils]: 40: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,999 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:41,999 INFO L273 TraceCheckUtils]: 42: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:41,999 INFO L273 TraceCheckUtils]: 43: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:41,999 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {93913#true} {93913#true} #7633#return; {93913#true} is VALID [2018-11-19 17:19:41,999 INFO L273 TraceCheckUtils]: 45: Hoare triple {93913#true} ~tmp___2~30.base, ~tmp___2~30.offset := #t~ret1173.base, #t~ret1173.offset;havoc #t~ret1173.base, #t~ret1173.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___2~30.base, ~tmp___2~30.offset; {93913#true} is VALID [2018-11-19 17:19:42,000 INFO L256 TraceCheckUtils]: 46: Hoare triple {93913#true} call #t~ret1174.base, #t~ret1174.offset := ldv_init_zalloc(1); {93913#true} is VALID [2018-11-19 17:19:42,000 INFO L273 TraceCheckUtils]: 47: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,000 INFO L256 TraceCheckUtils]: 48: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,000 INFO L273 TraceCheckUtils]: 49: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:42,000 INFO L273 TraceCheckUtils]: 50: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,001 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:42,001 INFO L273 TraceCheckUtils]: 52: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:42,001 INFO L273 TraceCheckUtils]: 53: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,001 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {93913#true} {93913#true} #7635#return; {93913#true} is VALID [2018-11-19 17:19:42,001 INFO L273 TraceCheckUtils]: 55: Hoare triple {93913#true} ~tmp___3~22.base, ~tmp___3~22.offset := #t~ret1174.base, #t~ret1174.offset;havoc #t~ret1174.base, #t~ret1174.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___3~22.base, ~tmp___3~22.offset; {93913#true} is VALID [2018-11-19 17:19:42,002 INFO L256 TraceCheckUtils]: 56: Hoare triple {93913#true} call #t~ret1175.base, #t~ret1175.offset := ldv_init_zalloc(232); {93913#true} is VALID [2018-11-19 17:19:42,002 INFO L273 TraceCheckUtils]: 57: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,002 INFO L256 TraceCheckUtils]: 58: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,002 INFO L273 TraceCheckUtils]: 59: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:42,002 INFO L273 TraceCheckUtils]: 60: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L273 TraceCheckUtils]: 62: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L273 TraceCheckUtils]: 63: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {93913#true} {93913#true} #7637#return; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L273 TraceCheckUtils]: 65: Hoare triple {93913#true} ~tmp___4~17.base, ~tmp___4~17.offset := #t~ret1175.base, #t~ret1175.offset;havoc #t~ret1175.base, #t~ret1175.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___4~17.base, ~tmp___4~17.offset; {93913#true} is VALID [2018-11-19 17:19:42,003 INFO L256 TraceCheckUtils]: 66: Hoare triple {93913#true} call #t~ret1176.base, #t~ret1176.offset := ldv_init_zalloc(40); {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L273 TraceCheckUtils]: 67: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L256 TraceCheckUtils]: 68: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L273 TraceCheckUtils]: 69: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L273 TraceCheckUtils]: 70: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:42,004 INFO L273 TraceCheckUtils]: 72: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:42,005 INFO L273 TraceCheckUtils]: 73: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,005 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {93913#true} {93913#true} #7639#return; {93913#true} is VALID [2018-11-19 17:19:42,005 INFO L273 TraceCheckUtils]: 75: Hoare triple {93913#true} ~tmp___5~8.base, ~tmp___5~8.offset := #t~ret1176.base, #t~ret1176.offset;havoc #t~ret1176.base, #t~ret1176.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___5~8.base, ~tmp___5~8.offset; {93913#true} is VALID [2018-11-19 17:19:42,005 INFO L256 TraceCheckUtils]: 76: Hoare triple {93913#true} call #t~ret1177.base, #t~ret1177.offset := ldv_init_zalloc(232); {93913#true} is VALID [2018-11-19 17:19:42,005 INFO L273 TraceCheckUtils]: 77: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,006 INFO L256 TraceCheckUtils]: 78: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,006 INFO L273 TraceCheckUtils]: 79: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:42,006 INFO L273 TraceCheckUtils]: 80: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,006 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:42,006 INFO L273 TraceCheckUtils]: 82: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:42,007 INFO L273 TraceCheckUtils]: 83: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,007 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {93913#true} {93913#true} #7641#return; {93913#true} is VALID [2018-11-19 17:19:42,007 INFO L273 TraceCheckUtils]: 85: Hoare triple {93913#true} ~tmp___6~6.base, ~tmp___6~6.offset := #t~ret1177.base, #t~ret1177.offset;havoc #t~ret1177.base, #t~ret1177.offset;~ldvarg10~0.base, ~ldvarg10~0.offset := ~tmp___6~6.base, ~tmp___6~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,007 INFO L256 TraceCheckUtils]: 86: Hoare triple {93913#true} call #t~ret1178.base, #t~ret1178.offset := ldv_init_zalloc(32); {93913#true} is VALID [2018-11-19 17:19:42,007 INFO L273 TraceCheckUtils]: 87: Hoare triple {93913#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,008 INFO L256 TraceCheckUtils]: 88: Hoare triple {93913#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,008 INFO L273 TraceCheckUtils]: 89: Hoare triple {93913#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {93913#true} is VALID [2018-11-19 17:19:42,008 INFO L273 TraceCheckUtils]: 90: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,008 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {93913#true} {93913#true} #7503#return; {93913#true} is VALID [2018-11-19 17:19:42,008 INFO L273 TraceCheckUtils]: 92: Hoare triple {93913#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {93913#true} is VALID [2018-11-19 17:19:42,009 INFO L273 TraceCheckUtils]: 93: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,009 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {93913#true} {93913#true} #7643#return; {93913#true} is VALID [2018-11-19 17:19:42,009 INFO L273 TraceCheckUtils]: 95: Hoare triple {93913#true} ~tmp___7~5.base, ~tmp___7~5.offset := #t~ret1178.base, #t~ret1178.offset;havoc #t~ret1178.base, #t~ret1178.offset;~ldvarg16~0.base, ~ldvarg16~0.offset := ~tmp___7~5.base, ~tmp___7~5.offset;call ldv_initialize(); {93913#true} is VALID [2018-11-19 17:19:42,009 INFO L256 TraceCheckUtils]: 96: Hoare triple {93913#true} call #t~ret1179.base, #t~ret1179.offset := ldv_memset(~#ldvarg1~0.base, ~#ldvarg1~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,009 INFO L273 TraceCheckUtils]: 97: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,010 INFO L256 TraceCheckUtils]: 98: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,010 INFO L273 TraceCheckUtils]: 99: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,010 INFO L273 TraceCheckUtils]: 100: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,010 INFO L273 TraceCheckUtils]: 101: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,010 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,011 INFO L273 TraceCheckUtils]: 103: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,011 INFO L273 TraceCheckUtils]: 104: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,011 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {93913#true} {93913#true} #7645#return; {93913#true} is VALID [2018-11-19 17:19:42,011 INFO L273 TraceCheckUtils]: 106: Hoare triple {93913#true} havoc #t~ret1179.base, #t~ret1179.offset; {93913#true} is VALID [2018-11-19 17:19:42,011 INFO L256 TraceCheckUtils]: 107: Hoare triple {93913#true} call #t~ret1180.base, #t~ret1180.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,012 INFO L273 TraceCheckUtils]: 108: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,012 INFO L256 TraceCheckUtils]: 109: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,012 INFO L273 TraceCheckUtils]: 110: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,012 INFO L273 TraceCheckUtils]: 111: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,012 INFO L273 TraceCheckUtils]: 112: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,013 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,013 INFO L273 TraceCheckUtils]: 114: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,013 INFO L273 TraceCheckUtils]: 115: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,013 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {93913#true} {93913#true} #7647#return; {93913#true} is VALID [2018-11-19 17:19:42,013 INFO L273 TraceCheckUtils]: 117: Hoare triple {93913#true} havoc #t~ret1180.base, #t~ret1180.offset; {93913#true} is VALID [2018-11-19 17:19:42,014 INFO L256 TraceCheckUtils]: 118: Hoare triple {93913#true} call #t~ret1181.base, #t~ret1181.offset := ldv_memset(~#ldvarg2~0.base, ~#ldvarg2~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,014 INFO L273 TraceCheckUtils]: 119: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,014 INFO L256 TraceCheckUtils]: 120: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,014 INFO L273 TraceCheckUtils]: 121: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,014 INFO L273 TraceCheckUtils]: 122: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,015 INFO L273 TraceCheckUtils]: 123: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,015 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,015 INFO L273 TraceCheckUtils]: 125: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,015 INFO L273 TraceCheckUtils]: 126: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,015 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {93913#true} {93913#true} #7649#return; {93913#true} is VALID [2018-11-19 17:19:42,016 INFO L273 TraceCheckUtils]: 128: Hoare triple {93913#true} havoc #t~ret1181.base, #t~ret1181.offset; {93913#true} is VALID [2018-11-19 17:19:42,016 INFO L256 TraceCheckUtils]: 129: Hoare triple {93913#true} call #t~ret1182.base, #t~ret1182.offset := ldv_memset(~#ldvarg11~0.base, ~#ldvarg11~0.offset, 0, 8); {93913#true} is VALID [2018-11-19 17:19:42,016 INFO L273 TraceCheckUtils]: 130: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,016 INFO L256 TraceCheckUtils]: 131: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,016 INFO L273 TraceCheckUtils]: 132: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,017 INFO L273 TraceCheckUtils]: 133: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,017 INFO L273 TraceCheckUtils]: 134: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,017 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,017 INFO L273 TraceCheckUtils]: 136: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,018 INFO L273 TraceCheckUtils]: 137: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,018 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {93913#true} {93913#true} #7651#return; {93913#true} is VALID [2018-11-19 17:19:42,018 INFO L273 TraceCheckUtils]: 139: Hoare triple {93913#true} havoc #t~ret1182.base, #t~ret1182.offset; {93913#true} is VALID [2018-11-19 17:19:42,018 INFO L256 TraceCheckUtils]: 140: Hoare triple {93913#true} call #t~ret1183.base, #t~ret1183.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,018 INFO L273 TraceCheckUtils]: 141: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,019 INFO L256 TraceCheckUtils]: 142: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,019 INFO L273 TraceCheckUtils]: 143: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,019 INFO L273 TraceCheckUtils]: 144: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,019 INFO L273 TraceCheckUtils]: 145: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,019 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L273 TraceCheckUtils]: 147: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L273 TraceCheckUtils]: 148: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {93913#true} {93913#true} #7653#return; {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L273 TraceCheckUtils]: 150: Hoare triple {93913#true} havoc #t~ret1183.base, #t~ret1183.offset; {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L256 TraceCheckUtils]: 151: Hoare triple {93913#true} call #t~ret1184.base, #t~ret1184.offset := ldv_memset(~#ldvarg13~0.base, ~#ldvarg13~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,020 INFO L273 TraceCheckUtils]: 152: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,021 INFO L256 TraceCheckUtils]: 153: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,021 INFO L273 TraceCheckUtils]: 154: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,021 INFO L273 TraceCheckUtils]: 155: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,021 INFO L273 TraceCheckUtils]: 156: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,021 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L273 TraceCheckUtils]: 158: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L273 TraceCheckUtils]: 159: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {93913#true} {93913#true} #7655#return; {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L273 TraceCheckUtils]: 161: Hoare triple {93913#true} havoc #t~ret1184.base, #t~ret1184.offset; {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L256 TraceCheckUtils]: 162: Hoare triple {93913#true} call #t~ret1185.base, #t~ret1185.offset := ldv_memset(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 0, 8); {93913#true} is VALID [2018-11-19 17:19:42,022 INFO L273 TraceCheckUtils]: 163: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,023 INFO L256 TraceCheckUtils]: 164: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,023 INFO L273 TraceCheckUtils]: 165: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,023 INFO L273 TraceCheckUtils]: 166: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,023 INFO L273 TraceCheckUtils]: 167: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,023 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L273 TraceCheckUtils]: 169: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L273 TraceCheckUtils]: 170: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {93913#true} {93913#true} #7657#return; {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L273 TraceCheckUtils]: 172: Hoare triple {93913#true} havoc #t~ret1185.base, #t~ret1185.offset; {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L256 TraceCheckUtils]: 173: Hoare triple {93913#true} call #t~ret1186.base, #t~ret1186.offset := ldv_memset(~#ldvarg15~0.base, ~#ldvarg15~0.offset, 0, 4); {93913#true} is VALID [2018-11-19 17:19:42,024 INFO L273 TraceCheckUtils]: 174: Hoare triple {93913#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,025 INFO L256 TraceCheckUtils]: 175: Hoare triple {93913#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {93913#true} is VALID [2018-11-19 17:19:42,025 INFO L273 TraceCheckUtils]: 176: Hoare triple {93913#true} #t~loopctr1322 := 0; {93913#true} is VALID [2018-11-19 17:19:42,025 INFO L273 TraceCheckUtils]: 177: Hoare triple {93913#true} assume !(#t~loopctr1322 < #amount); {93913#true} is VALID [2018-11-19 17:19:42,025 INFO L273 TraceCheckUtils]: 178: Hoare triple {93913#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {93913#true} is VALID [2018-11-19 17:19:42,025 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {93913#true} {93913#true} #8777#return; {93913#true} is VALID [2018-11-19 17:19:42,026 INFO L273 TraceCheckUtils]: 180: Hoare triple {93913#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {93913#true} is VALID [2018-11-19 17:19:42,026 INFO L273 TraceCheckUtils]: 181: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,026 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {93913#true} {93913#true} #7659#return; {93913#true} is VALID [2018-11-19 17:19:42,026 INFO L273 TraceCheckUtils]: 183: Hoare triple {93913#true} havoc #t~ret1186.base, #t~ret1186.offset;~ldv_state_variable_4~0 := 0; {93913#true} is VALID [2018-11-19 17:19:42,026 INFO L256 TraceCheckUtils]: 184: Hoare triple {93913#true} call work_init_1(); {93913#true} is VALID [2018-11-19 17:19:42,027 INFO L273 TraceCheckUtils]: 185: Hoare triple {93913#true} ~ldv_work_1_0~0 := 0;~ldv_work_1_1~0 := 0;~ldv_work_1_2~0 := 0;~ldv_work_1_3~0 := 0; {93913#true} is VALID [2018-11-19 17:19:42,027 INFO L273 TraceCheckUtils]: 186: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,027 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {93913#true} {93913#true} #7661#return; {93913#true} is VALID [2018-11-19 17:19:42,028 INFO L273 TraceCheckUtils]: 188: Hoare triple {93913#true} ~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,028 INFO L273 TraceCheckUtils]: 189: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= #t~nondet1187 && #t~nondet1187 <= 2147483647;~tmp___8~3 := #t~nondet1187;havoc #t~nondet1187;#t~switch1188 := 0 == ~tmp___8~3; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,029 INFO L273 TraceCheckUtils]: 190: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 1 == ~tmp___8~3; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,029 INFO L273 TraceCheckUtils]: 191: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 2 == ~tmp___8~3; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,029 INFO L273 TraceCheckUtils]: 192: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 3 == ~tmp___8~3; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,030 INFO L273 TraceCheckUtils]: 193: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 4 == ~tmp___8~3; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,031 INFO L273 TraceCheckUtils]: 194: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume #t~switch1188; {93915#(= ~ldv_state_variable_2~0 0)} is VALID [2018-11-19 17:19:42,031 INFO L273 TraceCheckUtils]: 195: Hoare triple {93915#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= #t~nondet1243 && #t~nondet1243 <= 2147483647;~tmp___12~1 := #t~nondet1243;havoc #t~nondet1243;#t~switch1244 := 0 == ~tmp___12~1; {93914#false} is VALID [2018-11-19 17:19:42,032 INFO L273 TraceCheckUtils]: 196: Hoare triple {93914#false} assume !#t~switch1244;#t~switch1244 := #t~switch1244 || 1 == ~tmp___12~1; {93914#false} is VALID [2018-11-19 17:19:42,032 INFO L273 TraceCheckUtils]: 197: Hoare triple {93914#false} assume !#t~switch1244;#t~switch1244 := #t~switch1244 || 2 == ~tmp___12~1; {93914#false} is VALID [2018-11-19 17:19:42,032 INFO L273 TraceCheckUtils]: 198: Hoare triple {93914#false} assume #t~switch1244; {93914#false} is VALID [2018-11-19 17:19:42,032 INFO L273 TraceCheckUtils]: 199: Hoare triple {93914#false} assume 3 == ~ldv_state_variable_2~0; {93914#false} is VALID [2018-11-19 17:19:42,033 INFO L256 TraceCheckUtils]: 200: Hoare triple {93914#false} call #t~ret1248 := rtl8152_resume(~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset); {93914#false} is VALID [2018-11-19 17:19:42,033 INFO L273 TraceCheckUtils]: 201: Hoare triple {93914#false} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tp~16.base, ~tp~16.offset;havoc ~tmp~133.base, ~tmp~133.offset;havoc ~tmp___0~61;havoc ~tmp___1~35;havoc ~tmp___2~26;havoc ~tmp___3~19;havoc ~tmp___4~15; {93914#false} is VALID [2018-11-19 17:19:42,033 INFO L256 TraceCheckUtils]: 202: Hoare triple {93914#false} call #t~ret945.base, #t~ret945.offset := usb_get_intfdata(~intf.base, ~intf.offset); {93913#true} is VALID [2018-11-19 17:19:42,034 INFO L273 TraceCheckUtils]: 203: Hoare triple {93913#true} ~intf.base, ~intf.offset := #in~intf.base, #in~intf.offset;havoc ~tmp~41.base, ~tmp~41.offset; {93913#true} is VALID [2018-11-19 17:19:42,034 INFO L256 TraceCheckUtils]: 204: Hoare triple {93913#true} call #t~ret267.base, #t~ret267.offset := dev_get_drvdata(~intf.base, 43 + ~intf.offset); {93913#true} is VALID [2018-11-19 17:19:42,034 INFO L273 TraceCheckUtils]: 205: Hoare triple {93913#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;call #t~mem99.base, #t~mem99.offset := read~$Pointer$(~dev.base, 477 + ~dev.offset, 8);#res.base, #res.offset := #t~mem99.base, #t~mem99.offset;havoc #t~mem99.base, #t~mem99.offset; {93913#true} is VALID [2018-11-19 17:19:42,034 INFO L273 TraceCheckUtils]: 206: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,035 INFO L268 TraceCheckUtils]: 207: Hoare quadruple {93913#true} {93913#true} #8113#return; {93913#true} is VALID [2018-11-19 17:19:42,035 INFO L273 TraceCheckUtils]: 208: Hoare triple {93913#true} ~tmp~41.base, ~tmp~41.offset := #t~ret267.base, #t~ret267.offset;havoc #t~ret267.base, #t~ret267.offset;#res.base, #res.offset := ~tmp~41.base, ~tmp~41.offset; {93913#true} is VALID [2018-11-19 17:19:42,035 INFO L273 TraceCheckUtils]: 209: Hoare triple {93913#true} assume true; {93913#true} is VALID [2018-11-19 17:19:42,035 INFO L268 TraceCheckUtils]: 210: Hoare quadruple {93913#true} {93914#false} #7561#return; {93914#false} is VALID [2018-11-19 17:19:42,036 INFO L273 TraceCheckUtils]: 211: Hoare triple {93914#false} ~tmp~133.base, ~tmp~133.offset := #t~ret945.base, #t~ret945.offset;havoc #t~ret945.base, #t~ret945.offset;~tp~16.base, ~tp~16.offset := ~tmp~133.base, ~tmp~133.offset; {93914#false} is VALID [2018-11-19 17:19:42,036 INFO L256 TraceCheckUtils]: 212: Hoare triple {93914#false} call ldv_mutex_lock_33(~tp~16.base, 1603 + ~tp~16.offset); {93914#false} is VALID [2018-11-19 17:19:42,036 INFO L273 TraceCheckUtils]: 213: Hoare triple {93914#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset; {93914#false} is VALID [2018-11-19 17:19:42,036 INFO L256 TraceCheckUtils]: 214: Hoare triple {93914#false} call ldv_mutex_lock_control_of_r8152(~ldv_func_arg1.base, ~ldv_func_arg1.offset); {93914#false} is VALID [2018-11-19 17:19:42,037 INFO L273 TraceCheckUtils]: 215: Hoare triple {93914#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {93914#false} is VALID [2018-11-19 17:19:42,037 INFO L273 TraceCheckUtils]: 216: Hoare triple {93914#false} assume 1 != ~ldv_mutex_control_of_r8152~0; {93914#false} is VALID [2018-11-19 17:19:42,037 INFO L256 TraceCheckUtils]: 217: Hoare triple {93914#false} call ldv_error(); {93914#false} is VALID [2018-11-19 17:19:42,037 INFO L273 TraceCheckUtils]: 218: Hoare triple {93914#false} assume !false; {93914#false} is VALID [2018-11-19 17:19:42,066 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:19:42,066 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:19:42,066 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:19:42,067 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 219 [2018-11-19 17:19:42,068 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:19:42,068 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:19:42,205 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:19:42,206 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:19:42,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:19:42,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:19:42,206 INFO L87 Difference]: Start difference. First operand 10441 states and 14554 transitions. Second operand 3 states. [2018-11-19 17:22:06,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:22:06,254 INFO L93 Difference]: Finished difference Result 30555 states and 42591 transitions. [2018-11-19 17:22:06,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:22:06,254 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 219 [2018-11-19 17:22:06,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:22:06,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:22:07,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11754 transitions. [2018-11-19 17:22:07,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:22:07,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11754 transitions. [2018-11-19 17:22:07,800 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 11754 transitions. [2018-11-19 17:22:17,855 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11754 edges. 11754 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:22:40,926 INFO L225 Difference]: With dead ends: 30555 [2018-11-19 17:22:40,926 INFO L226 Difference]: Without dead ends: 20164 [2018-11-19 17:22:40,958 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:22:40,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20164 states. [2018-11-19 17:23:28,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20164 to 20137. [2018-11-19 17:23:28,159 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:23:28,159 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20164 states. Second operand 20137 states. [2018-11-19 17:23:28,159 INFO L74 IsIncluded]: Start isIncluded. First operand 20164 states. Second operand 20137 states. [2018-11-19 17:23:28,159 INFO L87 Difference]: Start difference. First operand 20164 states. Second operand 20137 states. [2018-11-19 17:23:44,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:23:44,144 INFO L93 Difference]: Finished difference Result 20164 states and 28100 transitions. [2018-11-19 17:23:44,144 INFO L276 IsEmpty]: Start isEmpty. Operand 20164 states and 28100 transitions. [2018-11-19 17:23:44,193 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:23:44,193 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:23:44,193 INFO L74 IsIncluded]: Start isIncluded. First operand 20137 states. Second operand 20164 states. [2018-11-19 17:23:44,193 INFO L87 Difference]: Start difference. First operand 20137 states. Second operand 20164 states. [2018-11-19 17:23:58,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:23:58,605 INFO L93 Difference]: Finished difference Result 20164 states and 28100 transitions. [2018-11-19 17:23:58,605 INFO L276 IsEmpty]: Start isEmpty. Operand 20164 states and 28100 transitions. [2018-11-19 17:23:58,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:23:58,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:23:58,650 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:23:58,650 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:23:58,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20137 states. [2018-11-19 17:24:16,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20137 states to 20137 states and 28065 transitions. [2018-11-19 17:24:16,508 INFO L78 Accepts]: Start accepts. Automaton has 20137 states and 28065 transitions. Word has length 219 [2018-11-19 17:24:16,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:24:16,509 INFO L480 AbstractCegarLoop]: Abstraction has 20137 states and 28065 transitions. [2018-11-19 17:24:16,509 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:24:16,509 INFO L276 IsEmpty]: Start isEmpty. Operand 20137 states and 28065 transitions. [2018-11-19 17:24:16,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-11-19 17:24:16,513 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:24:16,513 INFO L384 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:24:16,513 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:24:16,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:24:16,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1678395806, now seen corresponding path program 1 times [2018-11-19 17:24:16,514 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:24:16,514 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:24:16,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:24:16,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:24:16,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:24:16,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:24:16,758 INFO L256 TraceCheckUtils]: 0: Hoare triple {206407#true} call ULTIMATE.init(); {206407#true} is VALID [2018-11-19 17:24:16,758 INFO L273 TraceCheckUtils]: 1: Hoare triple {206407#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string123.base, #t~string123.offset := #Ultimate.alloc(22);call #t~string275.base, #t~string275.offset := #Ultimate.alloc(10);call #t~string317.base, #t~string317.offset := #Ultimate.alloc(24);call #t~string383.base, #t~string383.offset := #Ultimate.alloc(21);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(24);call #t~string390.base, #t~string390.offset := #Ultimate.alloc(23);call #t~string406.base, #t~string406.offset := #Ultimate.alloc(24);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(14);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(14);call #t~string435.base, #t~string435.offset := #Ultimate.alloc(33);call #t~string438.base, #t~string438.offset := #Ultimate.alloc(24);call #t~string441.base, #t~string441.offset := #Ultimate.alloc(16);call #t~string454.base, #t~string454.offset := #Ultimate.alloc(32);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(23);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(23);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(203);call #t~string529.base, #t~string529.offset := #Ultimate.alloc(39);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(203);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(31);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(203);call #t~string633.base, #t~string633.offset := #Ultimate.alloc(18);call #t~string661.base, #t~string661.offset := #Ultimate.alloc(34);call #t~string668.base, #t~string668.offset := #Ultimate.alloc(12);call #t~string678.base, #t~string678.offset := #Ultimate.alloc(26);call #t~string880.base, #t~string880.offset := #Ultimate.alloc(28);call #t~string982.base, #t~string982.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string982.base,#t~string982.offset := 114];#memory_int := #memory_int[#t~string982.base,1 + #t~string982.offset := 56];#memory_int := #memory_int[#t~string982.base,2 + #t~string982.offset := 49];#memory_int := #memory_int[#t~string982.base,3 + #t~string982.offset := 53];#memory_int := #memory_int[#t~string982.base,4 + #t~string982.offset := 50];#memory_int := #memory_int[#t~string982.base,5 + #t~string982.offset := 0];call #t~string984.base, #t~string984.offset := #Ultimate.alloc(21);call #t~string1111.base, #t~string1111.offset := #Ultimate.alloc(24);call #t~string1119.base, #t~string1119.offset := #Ultimate.alloc(16);call #t~string1126.base, #t~string1126.offset := #Ultimate.alloc(15);call #t~string1129.base, #t~string1129.offset := #Ultimate.alloc(13);call #t~string1131.base, #t~string1131.offset := #Ultimate.alloc(25);call #t~string1132.base, #t~string1132.offset := #Ultimate.alloc(26);call #t~string1142.base, #t~string1142.offset := #Ultimate.alloc(30);call #t~string1148.base, #t~string1148.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string1148.base,#t~string1148.offset := 37];#memory_int := #memory_int[#t~string1148.base,1 + #t~string1148.offset := 115];#memory_int := #memory_int[#t~string1148.base,2 + #t~string1148.offset := 10];#memory_int := #memory_int[#t~string1148.base,3 + #t~string1148.offset := 0];call #t~string1149.base, #t~string1149.offset := #Ultimate.alloc(21);call #t~string1158.base, #t~string1158.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1158.base,#t~string1158.offset := 114];#memory_int := #memory_int[#t~string1158.base,1 + #t~string1158.offset := 56];#memory_int := #memory_int[#t~string1158.base,2 + #t~string1158.offset := 49];#memory_int := #memory_int[#t~string1158.base,3 + #t~string1158.offset := 53];#memory_int := #memory_int[#t~string1158.base,4 + #t~string1158.offset := 50];#memory_int := #memory_int[#t~string1158.base,5 + #t~string1158.offset := 0];call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1159.base,#t~string1159.offset := 114];#memory_int := #memory_int[#t~string1159.base,1 + #t~string1159.offset := 56];#memory_int := #memory_int[#t~string1159.base,2 + #t~string1159.offset := 49];#memory_int := #memory_int[#t~string1159.base,3 + #t~string1159.offset := 53];#memory_int := #memory_int[#t~string1159.base,4 + #t~string1159.offset := 50];#memory_int := #memory_int[#t~string1159.base,5 + #t~string1159.offset := 0];~ldv_work_1_3~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_work_1_1~0 := 0;~usb_counter~0 := 0;~ldv_work_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_work_1_0~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~multicast_filter_limit~0 := 32;~agg_buf_sz~0 := 16384;call ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset := #Ultimate.alloc(416);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_gstrings~0.base);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 1 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 2 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 3 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 4 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 5 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 6 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 7 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 8 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 9 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 10 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 32 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 33 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 34 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 35 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 36 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 37 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 38 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 39 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 40 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 41 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 42 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 64 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 65 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 66 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 67 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 68 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 69 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 70 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 71 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 72 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 73 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 96 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 97 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 98 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 99 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 100 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 101 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 102 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 103 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 104 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 105 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 128 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 129 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 130 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 131 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 132 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 133 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 134 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 135 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 136 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 137 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 160 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 161 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 162 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 163 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 164 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 165 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 166 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 167 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 168 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 169 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 170 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 171 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 172 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 192 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 193 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 194 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 195 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 196 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 197 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 198 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 199 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 200 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 201 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 202 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 203 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 204 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 205 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 206 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 207 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 208 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 209 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 210 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 211 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 212 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 224 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 225 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 226 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 227 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 228 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 229 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 230 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 231 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 232 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 233 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 234 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 235 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 236 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 237 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 238 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 239 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 240 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 241 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 242 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 243 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 256 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 257 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 258 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 259 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 260 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 261 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 262 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 263 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 264 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 265 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 266 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 288 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 289 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 290 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 291 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 292 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 293 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 294 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 295 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 296 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 297 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 298 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 299 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 300 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 320 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 321 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 322 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 323 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 324 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 325 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 326 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 327 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 328 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 329 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 330 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 331 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 332 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 352 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 353 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 354 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 355 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 356 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 357 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 358 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 359 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 360 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 361 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 362 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 384 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 385 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 386 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 387 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 388 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 389 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 390 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 391 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 392 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 393 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 394 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 395 + ~#rtl8152_gstrings~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_mutex_control_of_r8152~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_work_struct_1_0~0.base, ~ldv_work_struct_1_0~0.offset := 0, 0;~ldv_work_struct_1_1~0.base, ~ldv_work_struct_1_1~0.offset := 0, 0;~ops_group4~0.base, ~ops_group4~0.offset := 0, 0;~ldv_work_struct_1_3~0.base, ~ldv_work_struct_1_3~0.offset := 0, 0;~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset := 0, 0;~ops_group1~0.base, ~ops_group1~0.offset := 0, 0;~ldv_work_struct_1_2~0.base, ~ldv_work_struct_1_2~0.offset := 0, 0;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := 0, 0;~ops_group3~0.base, ~ops_group3~0.offset := 0, 0;~ops_group2~0.base, ~ops_group2~0.offset := 0, 0;~ops_group0~0.base, ~ops_group0~0.offset := 0, 0;call ~#ops~0.base, ~#ops~0.offset := #Ultimate.alloc(392);call write~$Pointer$(0, 0, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_settings.base, #funAddr~rtl8152_get_settings.offset, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_settings.base, #funAddr~rtl8152_set_settings.offset, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_drvinfo.base, #funAddr~rtl8152_get_drvinfo.offset, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_wol.base, #funAddr~rtl8152_get_wol.offset, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_wol.base, #funAddr~rtl8152_set_wol.offset, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_msglevel.base, #funAddr~rtl8152_get_msglevel.offset, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_msglevel.base, #funAddr~rtl8152_set_msglevel.offset, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_nway_reset.base, #funAddr~rtl8152_nway_reset.offset, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_coalesce.base, #funAddr~rtl8152_get_coalesce.offset, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_coalesce.base, #funAddr~rtl8152_set_coalesce.offset, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_strings.base, #funAddr~rtl8152_get_strings.offset, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_ethtool_stats.base, #funAddr~rtl8152_get_ethtool_stats.offset, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_sset_count.base, #funAddr~rtl8152_get_sset_count.offset, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_get_eee.base, #funAddr~rtl_ethtool_get_eee.offset, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_set_eee.base, #funAddr~rtl_ethtool_set_eee.offset, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset := #Ultimate.alloc(528);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_open.base, #funAddr~rtl8152_open.offset, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_close.base, #funAddr~rtl8152_close.offset, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_start_xmit.base, #funAddr~rtl8152_start_xmit.offset, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_rx_mode.base, #funAddr~rtl8152_set_rx_mode.offset, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_mac_address.base, #funAddr~rtl8152_set_mac_address.offset, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_ioctl.base, #funAddr~rtl8152_ioctl.offset, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_change_mtu.base, #funAddr~rtl8152_change_mtu.offset, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_tx_timeout.base, #funAddr~rtl8152_tx_timeout.offset, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_features.base, #funAddr~rtl8152_set_features.offset, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_features_check.base, #funAddr~rtl8152_features_check.offset, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset := #Ultimate.alloc(275);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_table~0.base);call write~unchecked~int(131, ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 2 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 4 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 6 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 8 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 10 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 11 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 12 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 13 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 14 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 15 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 16 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 17 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 25 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 27 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 29 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 31 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 33 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 35 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 36 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 37 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 38 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 39 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 40 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 41 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 42 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 50 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 52 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 54 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 56 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 58 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 60 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 61 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 62 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 63 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 64 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 65 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 66 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 67 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 75 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 77 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 79 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 81 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 83 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 85 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 86 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 87 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 88 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 89 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 90 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 91 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 92 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 100 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 102 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 104 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 106 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 108 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 110 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 111 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 112 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 113 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 114 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 115 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 116 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 117 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 125 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 127 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 129 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 131 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 133 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 135 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 136 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 137 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 138 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 139 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 140 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 141 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 142 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 150 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 152 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 154 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 156 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 158 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 160 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 161 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 162 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 163 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 164 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 165 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 166 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 167 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 175 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 177 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 179 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 181 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 183 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 185 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 186 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 187 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 188 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 189 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 190 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 191 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 192 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 200 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 202 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 204 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 206 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 208 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 210 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 211 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 212 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 213 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 214 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 215 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 216 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 217 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 225 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 227 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 229 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 231 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 233 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 235 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 236 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 237 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 238 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 239 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 240 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 241 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 242 + ~#rtl8152_table~0.offset, 8);~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[0 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[0 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[1 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[1 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[2 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[2 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[3 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[3 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[4 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[4 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[5 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[5 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[6 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[6 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[7 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[7 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[8 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[8 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[9 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[9 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[10 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[10 := 0];call ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset := #Ultimate.alloc(289);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1);call write~$Pointer$(#t~string1158.base, #t~string1158.offset, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_probe.base, #funAddr~rtl8152_probe.offset, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_disconnect.base, #funAddr~rtl8152_disconnect.offset, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_suspend.base, #funAddr~rtl8152_suspend.offset, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 108 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 116 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1); {206407#true} is VALID [2018-11-19 17:24:16,759 INFO L273 TraceCheckUtils]: 2: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,759 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {206407#true} {206407#true} #8057#return; {206407#true} is VALID [2018-11-19 17:24:16,759 INFO L256 TraceCheckUtils]: 4: Hoare triple {206407#true} call #t~ret1299 := main(); {206407#true} is VALID [2018-11-19 17:24:16,759 INFO L273 TraceCheckUtils]: 5: Hoare triple {206407#true} call ~#ldvarg1~0.base, ~#ldvarg1~0.offset := #Ultimate.alloc(4);havoc ~ldvarg4~0.base, ~ldvarg4~0.offset;havoc ~tmp~163.base, ~tmp~163.offset;call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(4);havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~69.base, ~tmp___0~69.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___1~40.base, ~tmp___1~40.offset;call ~#ldvarg2~0.base, ~#ldvarg2~0.offset := #Ultimate.alloc(4);havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___2~30.base, ~tmp___2~30.offset;call ~#ldvarg11~0.base, ~#ldvarg11~0.offset := #Ultimate.alloc(8);havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___3~22.base, ~tmp___3~22.offset;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___4~17.base, ~tmp___4~17.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___5~8.base, ~tmp___5~8.offset;call ~#ldvarg13~0.base, ~#ldvarg13~0.offset := #Ultimate.alloc(4);havoc ~ldvarg10~0.base, ~ldvarg10~0.offset;havoc ~tmp___6~6.base, ~tmp___6~6.offset;call ~#ldvarg9~0.base, ~#ldvarg9~0.offset := #Ultimate.alloc(8);havoc ~ldvarg16~0.base, ~ldvarg16~0.offset;havoc ~tmp___7~5.base, ~tmp___7~5.offset;call ~#ldvarg15~0.base, ~#ldvarg15~0.offset := #Ultimate.alloc(4);havoc ~tmp___8~3;havoc ~tmp___9~3;havoc ~tmp___10~2;havoc ~tmp___11~1;havoc ~tmp___12~1; {206407#true} is VALID [2018-11-19 17:24:16,759 INFO L256 TraceCheckUtils]: 6: Hoare triple {206407#true} call #t~ret1170.base, #t~ret1170.offset := ldv_init_zalloc(8); {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L273 TraceCheckUtils]: 7: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L256 TraceCheckUtils]: 8: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L273 TraceCheckUtils]: 9: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L273 TraceCheckUtils]: 10: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L273 TraceCheckUtils]: 12: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L273 TraceCheckUtils]: 13: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,760 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {206407#true} {206407#true} #7627#return; {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L273 TraceCheckUtils]: 15: Hoare triple {206407#true} ~tmp~163.base, ~tmp~163.offset := #t~ret1170.base, #t~ret1170.offset;havoc #t~ret1170.base, #t~ret1170.offset;~ldvarg4~0.base, ~ldvarg4~0.offset := ~tmp~163.base, ~tmp~163.offset; {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L256 TraceCheckUtils]: 16: Hoare triple {206407#true} call #t~ret1171.base, #t~ret1171.offset := ldv_init_zalloc(1); {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L273 TraceCheckUtils]: 17: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L256 TraceCheckUtils]: 18: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L273 TraceCheckUtils]: 19: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L273 TraceCheckUtils]: 20: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,761 INFO L273 TraceCheckUtils]: 22: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L273 TraceCheckUtils]: 23: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {206407#true} {206407#true} #7629#return; {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L273 TraceCheckUtils]: 25: Hoare triple {206407#true} ~tmp___0~69.base, ~tmp___0~69.offset := #t~ret1171.base, #t~ret1171.offset;havoc #t~ret1171.base, #t~ret1171.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~69.base, ~tmp___0~69.offset; {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L256 TraceCheckUtils]: 26: Hoare triple {206407#true} call #t~ret1172.base, #t~ret1172.offset := ldv_init_zalloc(8); {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L273 TraceCheckUtils]: 27: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,762 INFO L256 TraceCheckUtils]: 28: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L273 TraceCheckUtils]: 29: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L273 TraceCheckUtils]: 30: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L273 TraceCheckUtils]: 32: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L273 TraceCheckUtils]: 33: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,763 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {206407#true} {206407#true} #7631#return; {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L273 TraceCheckUtils]: 35: Hoare triple {206407#true} ~tmp___1~40.base, ~tmp___1~40.offset := #t~ret1172.base, #t~ret1172.offset;havoc #t~ret1172.base, #t~ret1172.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___1~40.base, ~tmp___1~40.offset; {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L256 TraceCheckUtils]: 36: Hoare triple {206407#true} call #t~ret1173.base, #t~ret1173.offset := ldv_init_zalloc(196); {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L273 TraceCheckUtils]: 37: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L256 TraceCheckUtils]: 38: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L273 TraceCheckUtils]: 39: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,764 INFO L273 TraceCheckUtils]: 40: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L273 TraceCheckUtils]: 42: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L273 TraceCheckUtils]: 43: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {206407#true} {206407#true} #7633#return; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L273 TraceCheckUtils]: 45: Hoare triple {206407#true} ~tmp___2~30.base, ~tmp___2~30.offset := #t~ret1173.base, #t~ret1173.offset;havoc #t~ret1173.base, #t~ret1173.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___2~30.base, ~tmp___2~30.offset; {206407#true} is VALID [2018-11-19 17:24:16,765 INFO L256 TraceCheckUtils]: 46: Hoare triple {206407#true} call #t~ret1174.base, #t~ret1174.offset := ldv_init_zalloc(1); {206407#true} is VALID [2018-11-19 17:24:16,766 INFO L273 TraceCheckUtils]: 47: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,766 INFO L256 TraceCheckUtils]: 48: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,766 INFO L273 TraceCheckUtils]: 49: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,766 INFO L273 TraceCheckUtils]: 50: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,766 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L273 TraceCheckUtils]: 52: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L273 TraceCheckUtils]: 53: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {206407#true} {206407#true} #7635#return; {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L273 TraceCheckUtils]: 55: Hoare triple {206407#true} ~tmp___3~22.base, ~tmp___3~22.offset := #t~ret1174.base, #t~ret1174.offset;havoc #t~ret1174.base, #t~ret1174.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___3~22.base, ~tmp___3~22.offset; {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L256 TraceCheckUtils]: 56: Hoare triple {206407#true} call #t~ret1175.base, #t~ret1175.offset := ldv_init_zalloc(232); {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L273 TraceCheckUtils]: 57: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,767 INFO L256 TraceCheckUtils]: 58: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L273 TraceCheckUtils]: 59: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L273 TraceCheckUtils]: 60: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L273 TraceCheckUtils]: 62: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L273 TraceCheckUtils]: 63: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,768 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {206407#true} {206407#true} #7637#return; {206407#true} is VALID [2018-11-19 17:24:16,769 INFO L273 TraceCheckUtils]: 65: Hoare triple {206407#true} ~tmp___4~17.base, ~tmp___4~17.offset := #t~ret1175.base, #t~ret1175.offset;havoc #t~ret1175.base, #t~ret1175.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___4~17.base, ~tmp___4~17.offset; {206407#true} is VALID [2018-11-19 17:24:16,769 INFO L256 TraceCheckUtils]: 66: Hoare triple {206407#true} call #t~ret1176.base, #t~ret1176.offset := ldv_init_zalloc(40); {206407#true} is VALID [2018-11-19 17:24:16,769 INFO L273 TraceCheckUtils]: 67: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,769 INFO L256 TraceCheckUtils]: 68: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,769 INFO L273 TraceCheckUtils]: 69: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L273 TraceCheckUtils]: 70: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L273 TraceCheckUtils]: 72: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L273 TraceCheckUtils]: 73: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {206407#true} {206407#true} #7639#return; {206407#true} is VALID [2018-11-19 17:24:16,770 INFO L273 TraceCheckUtils]: 75: Hoare triple {206407#true} ~tmp___5~8.base, ~tmp___5~8.offset := #t~ret1176.base, #t~ret1176.offset;havoc #t~ret1176.base, #t~ret1176.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___5~8.base, ~tmp___5~8.offset; {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L256 TraceCheckUtils]: 76: Hoare triple {206407#true} call #t~ret1177.base, #t~ret1177.offset := ldv_init_zalloc(232); {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L273 TraceCheckUtils]: 77: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L256 TraceCheckUtils]: 78: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L273 TraceCheckUtils]: 79: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L273 TraceCheckUtils]: 80: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,771 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L273 TraceCheckUtils]: 82: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L273 TraceCheckUtils]: 83: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {206407#true} {206407#true} #7641#return; {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L273 TraceCheckUtils]: 85: Hoare triple {206407#true} ~tmp___6~6.base, ~tmp___6~6.offset := #t~ret1177.base, #t~ret1177.offset;havoc #t~ret1177.base, #t~ret1177.offset;~ldvarg10~0.base, ~ldvarg10~0.offset := ~tmp___6~6.base, ~tmp___6~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L256 TraceCheckUtils]: 86: Hoare triple {206407#true} call #t~ret1178.base, #t~ret1178.offset := ldv_init_zalloc(32); {206407#true} is VALID [2018-11-19 17:24:16,772 INFO L273 TraceCheckUtils]: 87: Hoare triple {206407#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L256 TraceCheckUtils]: 88: Hoare triple {206407#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L273 TraceCheckUtils]: 89: Hoare triple {206407#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L273 TraceCheckUtils]: 90: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {206407#true} {206407#true} #7503#return; {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L273 TraceCheckUtils]: 92: Hoare triple {206407#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {206407#true} is VALID [2018-11-19 17:24:16,773 INFO L273 TraceCheckUtils]: 93: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {206407#true} {206407#true} #7643#return; {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L273 TraceCheckUtils]: 95: Hoare triple {206407#true} ~tmp___7~5.base, ~tmp___7~5.offset := #t~ret1178.base, #t~ret1178.offset;havoc #t~ret1178.base, #t~ret1178.offset;~ldvarg16~0.base, ~ldvarg16~0.offset := ~tmp___7~5.base, ~tmp___7~5.offset;call ldv_initialize(); {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L256 TraceCheckUtils]: 96: Hoare triple {206407#true} call #t~ret1179.base, #t~ret1179.offset := ldv_memset(~#ldvarg1~0.base, ~#ldvarg1~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L273 TraceCheckUtils]: 97: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L256 TraceCheckUtils]: 98: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,774 INFO L273 TraceCheckUtils]: 99: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,775 INFO L273 TraceCheckUtils]: 100: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,775 INFO L273 TraceCheckUtils]: 101: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,775 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,775 INFO L273 TraceCheckUtils]: 103: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,775 INFO L273 TraceCheckUtils]: 104: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {206407#true} {206407#true} #7645#return; {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L273 TraceCheckUtils]: 106: Hoare triple {206407#true} havoc #t~ret1179.base, #t~ret1179.offset; {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L256 TraceCheckUtils]: 107: Hoare triple {206407#true} call #t~ret1180.base, #t~ret1180.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L273 TraceCheckUtils]: 108: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L256 TraceCheckUtils]: 109: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,776 INFO L273 TraceCheckUtils]: 110: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L273 TraceCheckUtils]: 111: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L273 TraceCheckUtils]: 112: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L273 TraceCheckUtils]: 114: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L273 TraceCheckUtils]: 115: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,777 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {206407#true} {206407#true} #7647#return; {206407#true} is VALID [2018-11-19 17:24:16,778 INFO L273 TraceCheckUtils]: 117: Hoare triple {206407#true} havoc #t~ret1180.base, #t~ret1180.offset; {206407#true} is VALID [2018-11-19 17:24:16,778 INFO L256 TraceCheckUtils]: 118: Hoare triple {206407#true} call #t~ret1181.base, #t~ret1181.offset := ldv_memset(~#ldvarg2~0.base, ~#ldvarg2~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,778 INFO L273 TraceCheckUtils]: 119: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,778 INFO L256 TraceCheckUtils]: 120: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,778 INFO L273 TraceCheckUtils]: 121: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,779 INFO L273 TraceCheckUtils]: 122: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,779 INFO L273 TraceCheckUtils]: 123: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,779 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,779 INFO L273 TraceCheckUtils]: 125: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,779 INFO L273 TraceCheckUtils]: 126: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {206407#true} {206407#true} #7649#return; {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L273 TraceCheckUtils]: 128: Hoare triple {206407#true} havoc #t~ret1181.base, #t~ret1181.offset; {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L256 TraceCheckUtils]: 129: Hoare triple {206407#true} call #t~ret1182.base, #t~ret1182.offset := ldv_memset(~#ldvarg11~0.base, ~#ldvarg11~0.offset, 0, 8); {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L273 TraceCheckUtils]: 130: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L256 TraceCheckUtils]: 131: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,780 INFO L273 TraceCheckUtils]: 132: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L273 TraceCheckUtils]: 133: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L273 TraceCheckUtils]: 134: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L273 TraceCheckUtils]: 136: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L273 TraceCheckUtils]: 137: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,781 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {206407#true} {206407#true} #7651#return; {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L273 TraceCheckUtils]: 139: Hoare triple {206407#true} havoc #t~ret1182.base, #t~ret1182.offset; {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L256 TraceCheckUtils]: 140: Hoare triple {206407#true} call #t~ret1183.base, #t~ret1183.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L273 TraceCheckUtils]: 141: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L256 TraceCheckUtils]: 142: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L273 TraceCheckUtils]: 143: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,782 INFO L273 TraceCheckUtils]: 144: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,783 INFO L273 TraceCheckUtils]: 145: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,783 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,783 INFO L273 TraceCheckUtils]: 147: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,783 INFO L273 TraceCheckUtils]: 148: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,783 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {206407#true} {206407#true} #7653#return; {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L273 TraceCheckUtils]: 150: Hoare triple {206407#true} havoc #t~ret1183.base, #t~ret1183.offset; {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L256 TraceCheckUtils]: 151: Hoare triple {206407#true} call #t~ret1184.base, #t~ret1184.offset := ldv_memset(~#ldvarg13~0.base, ~#ldvarg13~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L273 TraceCheckUtils]: 152: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L256 TraceCheckUtils]: 153: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L273 TraceCheckUtils]: 154: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L273 TraceCheckUtils]: 155: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L273 TraceCheckUtils]: 156: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,784 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 158: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 159: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {206407#true} {206407#true} #7655#return; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 161: Hoare triple {206407#true} havoc #t~ret1184.base, #t~ret1184.offset; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L256 TraceCheckUtils]: 162: Hoare triple {206407#true} call #t~ret1185.base, #t~ret1185.offset := ldv_memset(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 0, 8); {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 163: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L256 TraceCheckUtils]: 164: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 165: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,785 INFO L273 TraceCheckUtils]: 166: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L273 TraceCheckUtils]: 167: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L273 TraceCheckUtils]: 169: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L273 TraceCheckUtils]: 170: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {206407#true} {206407#true} #7657#return; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L273 TraceCheckUtils]: 172: Hoare triple {206407#true} havoc #t~ret1185.base, #t~ret1185.offset; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L256 TraceCheckUtils]: 173: Hoare triple {206407#true} call #t~ret1186.base, #t~ret1186.offset := ldv_memset(~#ldvarg15~0.base, ~#ldvarg15~0.offset, 0, 4); {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L273 TraceCheckUtils]: 174: Hoare triple {206407#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,786 INFO L256 TraceCheckUtils]: 175: Hoare triple {206407#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 176: Hoare triple {206407#true} #t~loopctr1322 := 0; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 177: Hoare triple {206407#true} assume !(#t~loopctr1322 < #amount); {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 178: Hoare triple {206407#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {206407#true} {206407#true} #8777#return; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 180: Hoare triple {206407#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 181: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {206407#true} {206407#true} #7659#return; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L273 TraceCheckUtils]: 183: Hoare triple {206407#true} havoc #t~ret1186.base, #t~ret1186.offset;~ldv_state_variable_4~0 := 0; {206407#true} is VALID [2018-11-19 17:24:16,787 INFO L256 TraceCheckUtils]: 184: Hoare triple {206407#true} call work_init_1(); {206407#true} is VALID [2018-11-19 17:24:16,788 INFO L273 TraceCheckUtils]: 185: Hoare triple {206407#true} ~ldv_work_1_0~0 := 0;~ldv_work_1_1~0 := 0;~ldv_work_1_2~0 := 0;~ldv_work_1_3~0 := 0; {206407#true} is VALID [2018-11-19 17:24:16,788 INFO L273 TraceCheckUtils]: 186: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,788 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {206407#true} {206407#true} #7661#return; {206407#true} is VALID [2018-11-19 17:24:16,788 INFO L273 TraceCheckUtils]: 188: Hoare triple {206407#true} ~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,789 INFO L273 TraceCheckUtils]: 189: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= #t~nondet1187 && #t~nondet1187 <= 2147483647;~tmp___8~3 := #t~nondet1187;havoc #t~nondet1187;#t~switch1188 := 0 == ~tmp___8~3; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,789 INFO L273 TraceCheckUtils]: 190: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 1 == ~tmp___8~3; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,791 INFO L273 TraceCheckUtils]: 191: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 2 == ~tmp___8~3; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,791 INFO L273 TraceCheckUtils]: 192: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 3 == ~tmp___8~3; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,793 INFO L273 TraceCheckUtils]: 193: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume #t~switch1188; {206409#(= ~ldv_state_variable_3~0 0)} is VALID [2018-11-19 17:24:16,793 INFO L273 TraceCheckUtils]: 194: Hoare triple {206409#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= #t~nondet1208 && #t~nondet1208 <= 2147483647;~tmp___11~1 := #t~nondet1208;havoc #t~nondet1208;#t~switch1209 := 0 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,793 INFO L273 TraceCheckUtils]: 195: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 1 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,793 INFO L273 TraceCheckUtils]: 196: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 2 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,794 INFO L273 TraceCheckUtils]: 197: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 3 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,794 INFO L273 TraceCheckUtils]: 198: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 4 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,794 INFO L273 TraceCheckUtils]: 199: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 5 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,794 INFO L273 TraceCheckUtils]: 200: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 6 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,794 INFO L273 TraceCheckUtils]: 201: Hoare triple {206408#false} assume !#t~switch1209;#t~switch1209 := #t~switch1209 || 7 == ~tmp___11~1; {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L273 TraceCheckUtils]: 202: Hoare triple {206408#false} assume #t~switch1209; {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L273 TraceCheckUtils]: 203: Hoare triple {206408#false} assume !(1 == ~ldv_state_variable_3~0); {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L273 TraceCheckUtils]: 204: Hoare triple {206408#false} assume !(3 == ~ldv_state_variable_3~0); {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L273 TraceCheckUtils]: 205: Hoare triple {206408#false} assume 2 == ~ldv_state_variable_3~0;call #t~mem1232 := read~int(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 8); {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L256 TraceCheckUtils]: 206: Hoare triple {206408#false} call #t~ret1233 := rtl8152_set_features(~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset, #t~mem1232); {206408#false} is VALID [2018-11-19 17:24:16,795 INFO L273 TraceCheckUtils]: 207: Hoare triple {206408#false} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~features := #in~features;havoc ~changed~0;havoc ~tp~11.base, ~tp~11.offset;havoc ~tmp~103.base, ~tmp~103.offset;havoc ~ret~13;call #t~mem739 := read~int(~dev.base, 240 + ~dev.offset, 8);~changed~0 := ~bitwiseXor(#t~mem739, ~features);havoc #t~mem739; {206408#false} is VALID [2018-11-19 17:24:16,796 INFO L256 TraceCheckUtils]: 208: Hoare triple {206408#false} call #t~ret740.base, #t~ret740.offset := netdev_priv(~dev.base, ~dev.offset); {206407#true} is VALID [2018-11-19 17:24:16,796 INFO L273 TraceCheckUtils]: 209: Hoare triple {206407#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {206407#true} is VALID [2018-11-19 17:24:16,796 INFO L273 TraceCheckUtils]: 210: Hoare triple {206407#true} assume true; {206407#true} is VALID [2018-11-19 17:24:16,796 INFO L268 TraceCheckUtils]: 211: Hoare quadruple {206407#true} {206408#false} #7367#return; {206408#false} is VALID [2018-11-19 17:24:16,796 INFO L273 TraceCheckUtils]: 212: Hoare triple {206408#false} ~tmp~103.base, ~tmp~103.offset := #t~ret740.base, #t~ret740.offset;havoc #t~ret740.base, #t~ret740.offset;~tp~11.base, ~tp~11.offset := ~tmp~103.base, ~tmp~103.offset;call #t~mem741.base, #t~mem741.offset := read~$Pointer$(~tp~11.base, 280 + ~tp~11.offset, 8);call #t~ret742 := usb_autopm_get_interface(#t~mem741.base, #t~mem741.offset);assume -2147483648 <= #t~ret742 && #t~ret742 <= 2147483647;~ret~13 := #t~ret742;havoc #t~mem741.base, #t~mem741.offset;havoc #t~ret742; {206408#false} is VALID [2018-11-19 17:24:16,796 INFO L273 TraceCheckUtils]: 213: Hoare triple {206408#false} assume !(~ret~13 < 0); {206408#false} is VALID [2018-11-19 17:24:16,796 INFO L256 TraceCheckUtils]: 214: Hoare triple {206408#false} call ldv_mutex_lock_19(~tp~11.base, 1603 + ~tp~11.offset); {206408#false} is VALID [2018-11-19 17:24:16,796 INFO L273 TraceCheckUtils]: 215: Hoare triple {206408#false} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset; {206408#false} is VALID [2018-11-19 17:24:16,797 INFO L256 TraceCheckUtils]: 216: Hoare triple {206408#false} call ldv_mutex_lock_control_of_r8152(~ldv_func_arg1.base, ~ldv_func_arg1.offset); {206408#false} is VALID [2018-11-19 17:24:16,797 INFO L273 TraceCheckUtils]: 217: Hoare triple {206408#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {206408#false} is VALID [2018-11-19 17:24:16,797 INFO L273 TraceCheckUtils]: 218: Hoare triple {206408#false} assume 1 != ~ldv_mutex_control_of_r8152~0; {206408#false} is VALID [2018-11-19 17:24:16,797 INFO L256 TraceCheckUtils]: 219: Hoare triple {206408#false} call ldv_error(); {206408#false} is VALID [2018-11-19 17:24:16,797 INFO L273 TraceCheckUtils]: 220: Hoare triple {206408#false} assume !false; {206408#false} is VALID [2018-11-19 17:24:16,812 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2018-11-19 17:24:16,813 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:24:16,813 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:24:16,813 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 221 [2018-11-19 17:24:16,814 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:24:16,814 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:24:16,965 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:24:16,965 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:24:16,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:24:16,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:24:16,966 INFO L87 Difference]: Start difference. First operand 20137 states and 28065 transitions. Second operand 3 states. [2018-11-19 17:32:58,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:32:58,060 INFO L93 Difference]: Finished difference Result 57823 states and 80830 transitions. [2018-11-19 17:32:58,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-19 17:32:58,060 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 221 [2018-11-19 17:32:58,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-19 17:32:58,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:32:58,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11535 transitions. [2018-11-19 17:32:58,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-19 17:32:59,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11535 transitions. [2018-11-19 17:32:59,576 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 11535 transitions. [2018-11-19 17:33:09,435 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11535 edges. 11535 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:35:55,047 INFO L225 Difference]: With dead ends: 57823 [2018-11-19 17:35:55,047 INFO L226 Difference]: Without dead ends: 37744 [2018-11-19 17:35:55,104 INFO L613 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:35:55,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37744 states. [2018-11-19 17:38:08,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37744 to 37660. [2018-11-19 17:38:08,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-19 17:38:08,237 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37744 states. Second operand 37660 states. [2018-11-19 17:38:08,237 INFO L74 IsIncluded]: Start isIncluded. First operand 37744 states. Second operand 37660 states. [2018-11-19 17:38:08,238 INFO L87 Difference]: Start difference. First operand 37744 states. Second operand 37660 states. [2018-11-19 17:39:44,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:39:44,782 INFO L93 Difference]: Finished difference Result 37744 states and 52831 transitions. [2018-11-19 17:39:44,782 INFO L276 IsEmpty]: Start isEmpty. Operand 37744 states and 52831 transitions. [2018-11-19 17:39:44,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:39:44,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:39:44,875 INFO L74 IsIncluded]: Start isIncluded. First operand 37660 states. Second operand 37744 states. [2018-11-19 17:39:44,876 INFO L87 Difference]: Start difference. First operand 37660 states. Second operand 37744 states. [2018-11-19 17:41:28,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-19 17:41:28,981 INFO L93 Difference]: Finished difference Result 37744 states and 52831 transitions. [2018-11-19 17:41:28,981 INFO L276 IsEmpty]: Start isEmpty. Operand 37744 states and 52831 transitions. [2018-11-19 17:41:29,070 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-19 17:41:29,070 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-19 17:41:29,070 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-19 17:41:29,070 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-19 17:41:29,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37660 states. [2018-11-19 17:43:53,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37660 states to 37660 states and 52725 transitions. [2018-11-19 17:43:53,277 INFO L78 Accepts]: Start accepts. Automaton has 37660 states and 52725 transitions. Word has length 221 [2018-11-19 17:43:53,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-19 17:43:53,278 INFO L480 AbstractCegarLoop]: Abstraction has 37660 states and 52725 transitions. [2018-11-19 17:43:53,278 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-19 17:43:53,278 INFO L276 IsEmpty]: Start isEmpty. Operand 37660 states and 52725 transitions. [2018-11-19 17:43:53,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2018-11-19 17:43:53,279 INFO L376 BasicCegarLoop]: Found error trace [2018-11-19 17:43:53,279 INFO L384 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-19 17:43:53,279 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-19 17:43:53,285 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-19 17:43:53,285 INFO L82 PathProgramCache]: Analyzing trace with hash -1528156290, now seen corresponding path program 1 times [2018-11-19 17:43:53,285 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-19 17:43:53,285 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-19 17:43:53,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:43:53,291 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-19 17:43:53,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-19 17:43:53,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-19 17:43:53,595 INFO L256 TraceCheckUtils]: 0: Hoare triple {418236#true} call ULTIMATE.init(); {418236#true} is VALID [2018-11-19 17:43:53,613 INFO L273 TraceCheckUtils]: 1: Hoare triple {418236#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string123.base, #t~string123.offset := #Ultimate.alloc(22);call #t~string275.base, #t~string275.offset := #Ultimate.alloc(10);call #t~string317.base, #t~string317.offset := #Ultimate.alloc(24);call #t~string383.base, #t~string383.offset := #Ultimate.alloc(21);call #t~string386.base, #t~string386.offset := #Ultimate.alloc(24);call #t~string390.base, #t~string390.offset := #Ultimate.alloc(23);call #t~string406.base, #t~string406.offset := #Ultimate.alloc(24);call #t~string408.base, #t~string408.offset := #Ultimate.alloc(14);call #t~string415.base, #t~string415.offset := #Ultimate.alloc(14);call #t~string435.base, #t~string435.offset := #Ultimate.alloc(33);call #t~string438.base, #t~string438.offset := #Ultimate.alloc(24);call #t~string441.base, #t~string441.offset := #Ultimate.alloc(16);call #t~string454.base, #t~string454.offset := #Ultimate.alloc(32);call #t~string469.base, #t~string469.offset := #Ultimate.alloc(23);call #t~string471.base, #t~string471.offset := #Ultimate.alloc(23);call #t~string524.base, #t~string524.offset := #Ultimate.alloc(203);call #t~string529.base, #t~string529.offset := #Ultimate.alloc(39);call #t~string535.base, #t~string535.offset := #Ultimate.alloc(203);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(31);call #t~string551.base, #t~string551.offset := #Ultimate.alloc(203);call #t~string633.base, #t~string633.offset := #Ultimate.alloc(18);call #t~string661.base, #t~string661.offset := #Ultimate.alloc(34);call #t~string668.base, #t~string668.offset := #Ultimate.alloc(12);call #t~string678.base, #t~string678.offset := #Ultimate.alloc(26);call #t~string880.base, #t~string880.offset := #Ultimate.alloc(28);call #t~string982.base, #t~string982.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string982.base,#t~string982.offset := 114];#memory_int := #memory_int[#t~string982.base,1 + #t~string982.offset := 56];#memory_int := #memory_int[#t~string982.base,2 + #t~string982.offset := 49];#memory_int := #memory_int[#t~string982.base,3 + #t~string982.offset := 53];#memory_int := #memory_int[#t~string982.base,4 + #t~string982.offset := 50];#memory_int := #memory_int[#t~string982.base,5 + #t~string982.offset := 0];call #t~string984.base, #t~string984.offset := #Ultimate.alloc(21);call #t~string1111.base, #t~string1111.offset := #Ultimate.alloc(24);call #t~string1119.base, #t~string1119.offset := #Ultimate.alloc(16);call #t~string1126.base, #t~string1126.offset := #Ultimate.alloc(15);call #t~string1129.base, #t~string1129.offset := #Ultimate.alloc(13);call #t~string1131.base, #t~string1131.offset := #Ultimate.alloc(25);call #t~string1132.base, #t~string1132.offset := #Ultimate.alloc(26);call #t~string1142.base, #t~string1142.offset := #Ultimate.alloc(30);call #t~string1148.base, #t~string1148.offset := #Ultimate.alloc(4);#memory_int := #memory_int[#t~string1148.base,#t~string1148.offset := 37];#memory_int := #memory_int[#t~string1148.base,1 + #t~string1148.offset := 115];#memory_int := #memory_int[#t~string1148.base,2 + #t~string1148.offset := 10];#memory_int := #memory_int[#t~string1148.base,3 + #t~string1148.offset := 0];call #t~string1149.base, #t~string1149.offset := #Ultimate.alloc(21);call #t~string1158.base, #t~string1158.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1158.base,#t~string1158.offset := 114];#memory_int := #memory_int[#t~string1158.base,1 + #t~string1158.offset := 56];#memory_int := #memory_int[#t~string1158.base,2 + #t~string1158.offset := 49];#memory_int := #memory_int[#t~string1158.base,3 + #t~string1158.offset := 53];#memory_int := #memory_int[#t~string1158.base,4 + #t~string1158.offset := 50];#memory_int := #memory_int[#t~string1158.base,5 + #t~string1158.offset := 0];call #t~string1159.base, #t~string1159.offset := #Ultimate.alloc(6);#memory_int := #memory_int[#t~string1159.base,#t~string1159.offset := 114];#memory_int := #memory_int[#t~string1159.base,1 + #t~string1159.offset := 56];#memory_int := #memory_int[#t~string1159.base,2 + #t~string1159.offset := 49];#memory_int := #memory_int[#t~string1159.base,3 + #t~string1159.offset := 53];#memory_int := #memory_int[#t~string1159.base,4 + #t~string1159.offset := 50];#memory_int := #memory_int[#t~string1159.base,5 + #t~string1159.offset := 0];~ldv_work_1_3~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_work_1_1~0 := 0;~usb_counter~0 := 0;~ldv_work_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_3~0 := 0;~ref_cnt~0 := 0;~ldv_work_1_0~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~multicast_filter_limit~0 := 32;~agg_buf_sz~0 := 16384;call ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset := #Ultimate.alloc(416);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_gstrings~0.base);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 1 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 2 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 3 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 4 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 5 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 6 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 7 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 8 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 9 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 10 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 32 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 33 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 34 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(112, ~#rtl8152_gstrings~0.base, 35 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 36 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 37 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(107, ~#rtl8152_gstrings~0.base, 38 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 39 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 40 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 41 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 42 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 64 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 65 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 66 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 67 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 68 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 69 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 70 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 71 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 72 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 73 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 96 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 97 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 98 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 99 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 100 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 101 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 102 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 103 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 104 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 105 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 128 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 129 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 130 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 131 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 132 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 133 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 134 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 135 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 136 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 137 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 160 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 161 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 162 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 163 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 164 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 165 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 166 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 167 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 168 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 169 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 170 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 171 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 172 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 192 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 193 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 194 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 195 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 196 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 197 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(103, ~#rtl8152_gstrings~0.base, 198 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 199 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 200 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 201 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 202 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 203 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 204 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 205 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 206 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 207 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 208 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 209 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 210 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 211 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 212 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 224 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 225 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 226 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 227 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 228 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 229 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 230 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 231 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 232 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 233 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 234 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 235 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 236 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 237 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 238 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 239 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 240 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 241 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 242 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 243 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 256 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 257 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 258 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 259 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 260 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 261 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 262 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 263 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 264 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 265 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 266 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 288 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 289 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 290 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 291 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 292 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 293 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 294 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 295 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 296 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 297 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 298 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 299 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 300 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 320 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 321 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 322 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(109, ~#rtl8152_gstrings~0.base, 323 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 324 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(108, ~#rtl8152_gstrings~0.base, 325 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 326 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(105, ~#rtl8152_gstrings~0.base, 327 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(99, ~#rtl8152_gstrings~0.base, 328 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 329 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(115, ~#rtl8152_gstrings~0.base, 330 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 331 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 332 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 352 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 353 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 354 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(97, ~#rtl8152_gstrings~0.base, 355 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(98, ~#rtl8152_gstrings~0.base, 356 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(111, ~#rtl8152_gstrings~0.base, 357 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 358 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 359 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 360 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 361 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 362 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(116, ~#rtl8152_gstrings~0.base, 384 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(120, ~#rtl8152_gstrings~0.base, 385 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(95, ~#rtl8152_gstrings~0.base, 386 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 387 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 388 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(100, ~#rtl8152_gstrings~0.base, 389 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(101, ~#rtl8152_gstrings~0.base, 390 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 391 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(114, ~#rtl8152_gstrings~0.base, 392 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(117, ~#rtl8152_gstrings~0.base, 393 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(110, ~#rtl8152_gstrings~0.base, 394 + ~#rtl8152_gstrings~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_gstrings~0.base, 395 + ~#rtl8152_gstrings~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_mutex_control_of_r8152~0 := 1;~ldv_mutex_i_mutex_of_inode~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_work_struct_1_0~0.base, ~ldv_work_struct_1_0~0.offset := 0, 0;~ldv_work_struct_1_1~0.base, ~ldv_work_struct_1_1~0.offset := 0, 0;~ops_group4~0.base, ~ops_group4~0.offset := 0, 0;~ldv_work_struct_1_3~0.base, ~ldv_work_struct_1_3~0.offset := 0, 0;~rtl8152_netdev_ops_group1~0.base, ~rtl8152_netdev_ops_group1~0.offset := 0, 0;~ops_group1~0.base, ~ops_group1~0.offset := 0, 0;~ldv_work_struct_1_2~0.base, ~ldv_work_struct_1_2~0.offset := 0, 0;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := 0, 0;~ops_group3~0.base, ~ops_group3~0.offset := 0, 0;~ops_group2~0.base, ~ops_group2~0.offset := 0, 0;~ops_group0~0.base, ~ops_group0~0.offset := 0, 0;call ~#ops~0.base, ~#ops~0.offset := #Ultimate.alloc(392);call write~$Pointer$(0, 0, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_settings.base, #funAddr~rtl8152_get_settings.offset, ~#ops~0.base, ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_settings.base, #funAddr~rtl8152_set_settings.offset, ~#ops~0.base, 8 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_drvinfo.base, #funAddr~rtl8152_get_drvinfo.offset, ~#ops~0.base, 16 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 24 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 32 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_wol.base, #funAddr~rtl8152_get_wol.offset, ~#ops~0.base, 40 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_wol.base, #funAddr~rtl8152_set_wol.offset, ~#ops~0.base, 48 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_msglevel.base, #funAddr~rtl8152_get_msglevel.offset, ~#ops~0.base, 56 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_msglevel.base, #funAddr~rtl8152_set_msglevel.offset, ~#ops~0.base, 64 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_nway_reset.base, #funAddr~rtl8152_nway_reset.offset, ~#ops~0.base, 72 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#ops~0.base, 80 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 88 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 96 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 104 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_coalesce.base, #funAddr~rtl8152_get_coalesce.offset, ~#ops~0.base, 112 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_coalesce.base, #funAddr~rtl8152_set_coalesce.offset, ~#ops~0.base, 120 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 128 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 136 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 144 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 152 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 160 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_strings.base, #funAddr~rtl8152_get_strings.offset, ~#ops~0.base, 168 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 176 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_ethtool_stats.base, #funAddr~rtl8152_get_ethtool_stats.offset, ~#ops~0.base, 184 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 192 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 200 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 208 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 216 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_get_sset_count.base, #funAddr~rtl8152_get_sset_count.offset, ~#ops~0.base, 224 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 232 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 240 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 248 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 256 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 264 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 272 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 280 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 288 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 296 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 304 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 312 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 320 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 328 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 336 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 344 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 352 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_get_eee.base, #funAddr~rtl_ethtool_get_eee.offset, ~#ops~0.base, 360 + ~#ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl_ethtool_set_eee.base, #funAddr~rtl_ethtool_set_eee.offset, ~#ops~0.base, 368 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 376 + ~#ops~0.offset, 8);call write~$Pointer$(0, 0, ~#ops~0.base, 384 + ~#ops~0.offset, 8);call ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset := #Ultimate.alloc(528);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 8 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_open.base, #funAddr~rtl8152_open.offset, ~#rtl8152_netdev_ops~0.base, 16 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_close.base, #funAddr~rtl8152_close.offset, ~#rtl8152_netdev_ops~0.base, 24 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_start_xmit.base, #funAddr~rtl8152_start_xmit.offset, ~#rtl8152_netdev_ops~0.base, 32 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 40 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 48 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_rx_mode.base, #funAddr~rtl8152_set_rx_mode.offset, ~#rtl8152_netdev_ops~0.base, 56 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_mac_address.base, #funAddr~rtl8152_set_mac_address.offset, ~#rtl8152_netdev_ops~0.base, 64 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#rtl8152_netdev_ops~0.base, 72 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_ioctl.base, #funAddr~rtl8152_ioctl.offset, ~#rtl8152_netdev_ops~0.base, 80 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 88 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_change_mtu.base, #funAddr~rtl8152_change_mtu.offset, ~#rtl8152_netdev_ops~0.base, 96 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 104 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_tx_timeout.base, #funAddr~rtl8152_tx_timeout.offset, ~#rtl8152_netdev_ops~0.base, 112 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 120 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 128 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 136 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 144 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 152 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 160 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 168 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 176 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 184 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 192 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 200 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 208 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 216 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 224 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 232 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 240 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 248 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 256 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 264 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 272 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 280 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 288 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 296 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 304 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 312 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 320 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 328 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 336 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 344 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 352 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_set_features.base, #funAddr~rtl8152_set_features.offset, ~#rtl8152_netdev_ops~0.base, 360 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 368 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 376 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 384 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 392 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 400 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 408 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 416 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 424 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 432 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 440 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 448 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 456 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 464 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 472 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 480 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 488 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 496 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_features_check.base, #funAddr~rtl8152_features_check.offset, ~#rtl8152_netdev_ops~0.base, 504 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 512 + ~#rtl8152_netdev_ops~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_netdev_ops~0.base, 520 + ~#rtl8152_netdev_ops~0.offset, 8);call ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset := #Ultimate.alloc(275);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#rtl8152_table~0.base);call write~unchecked~int(131, ~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 2 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 4 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 6 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 8 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 10 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 11 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 12 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 13 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 14 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 15 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 16 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 17 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 25 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 27 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33106, ~#rtl8152_table~0.base, 29 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 31 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 33 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 35 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 36 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 37 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 38 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 39 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 40 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 41 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 42 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 50 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 52 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 54 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 56 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 58 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 60 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 61 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 62 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 63 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 64 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 65 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 66 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 67 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 75 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(3034, ~#rtl8152_table~0.base, 77 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(33107, ~#rtl8152_table~0.base, 79 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 81 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 83 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 85 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 86 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 87 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 88 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 89 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 90 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 91 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 92 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 100 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 102 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 104 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 106 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 108 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 110 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 111 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 112 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 113 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 114 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 115 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 116 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 117 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 125 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(1256, ~#rtl8152_table~0.base, 127 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(41217, ~#rtl8152_table~0.base, 129 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 131 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 133 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 135 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 136 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 137 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 138 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 139 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 140 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 141 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 142 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 150 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 152 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 154 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 156 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 158 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 160 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 161 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 162 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 163 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 164 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 165 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 166 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 167 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 175 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 177 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(29189, ~#rtl8152_table~0.base, 179 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 181 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 183 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 185 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 186 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 187 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 188 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 189 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 190 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 191 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 192 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(131, ~#rtl8152_table~0.base, 200 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 202 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 204 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 206 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 208 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 210 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 211 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 212 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(255, ~#rtl8152_table~0.base, 213 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 214 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 215 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 216 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 217 + ~#rtl8152_table~0.offset, 8);call write~unchecked~int(899, ~#rtl8152_table~0.base, 225 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(6127, ~#rtl8152_table~0.base, 227 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(12367, ~#rtl8152_table~0.base, 229 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 231 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 233 + ~#rtl8152_table~0.offset, 2);call write~unchecked~int(0, ~#rtl8152_table~0.base, 235 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 236 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 237 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(2, ~#rtl8152_table~0.base, 238 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(6, ~#rtl8152_table~0.base, 239 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 240 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 241 + ~#rtl8152_table~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_table~0.base, 242 + ~#rtl8152_table~0.offset, 8);~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[0 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[0 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[0 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[0 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[1 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[1 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[1 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[1 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[2 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[2 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[2 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[2 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[3 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[3 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[3 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[3 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[4 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[4 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[4 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[4 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[5 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[5 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[5 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[5 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[6 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[6 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[6 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[6 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[7 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[7 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[7 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[7 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[8 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[8 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[8 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[8 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[9 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[9 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[9 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[9 := 0];~__mod_usb__rtl8152_table_device_table~0.match_flags := ~__mod_usb__rtl8152_table_device_table~0.match_flags[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idVendor := ~__mod_usb__rtl8152_table_device_table~0.idVendor[10 := 0];~__mod_usb__rtl8152_table_device_table~0.idProduct := ~__mod_usb__rtl8152_table_device_table~0.idProduct[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_lo[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi := ~__mod_usb__rtl8152_table_device_table~0.bcdDevice_hi[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bDeviceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bDeviceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceSubClass[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceProtocol[10 := 0];~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber := ~__mod_usb__rtl8152_table_device_table~0.bInterfaceNumber[10 := 0];~__mod_usb__rtl8152_table_device_table~0.driver_info := ~__mod_usb__rtl8152_table_device_table~0.driver_info[10 := 0];call ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset := #Ultimate.alloc(289);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#rtl8152_driver~0.base);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1);call write~$Pointer$(#t~string1158.base, #t~string1158.offset, ~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_probe.base, #funAddr~rtl8152_probe.offset, ~#rtl8152_driver~0.base, 8 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_disconnect.base, #funAddr~rtl8152_disconnect.offset, ~#rtl8152_driver~0.base, 16 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 24 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_suspend.base, #funAddr~rtl8152_suspend.offset, ~#rtl8152_driver~0.base, 32 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 40 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(#funAddr~rtl8152_resume.base, #funAddr~rtl8152_resume.offset, ~#rtl8152_driver~0.base, 48 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 56 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 64 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(~#rtl8152_table~0.base, ~#rtl8152_table~0.offset, ~#rtl8152_driver~0.base, 72 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 80 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 84 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 88 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 92 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 100 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 108 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 116 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 124 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 132 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 136 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 148 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 156 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 164 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 172 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 180 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 188 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 196 + ~#rtl8152_driver~0.offset, 1);call write~int(0, ~#rtl8152_driver~0.base, 197 + ~#rtl8152_driver~0.offset, 4);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 201 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 209 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 217 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 225 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 233 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 241 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 249 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 257 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 265 + ~#rtl8152_driver~0.offset, 8);call write~$Pointer$(0, 0, ~#rtl8152_driver~0.base, 273 + ~#rtl8152_driver~0.offset, 8);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 281 + ~#rtl8152_driver~0.offset, 4);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 285 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 286 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(1, ~#rtl8152_driver~0.base, 287 + ~#rtl8152_driver~0.offset, 1);call write~unchecked~int(0, ~#rtl8152_driver~0.base, 288 + ~#rtl8152_driver~0.offset, 1); {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,614 INFO L273 TraceCheckUtils]: 2: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume true; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,615 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} {418236#true} #8057#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,615 INFO L256 TraceCheckUtils]: 4: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1299 := main(); {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,615 INFO L273 TraceCheckUtils]: 5: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call ~#ldvarg1~0.base, ~#ldvarg1~0.offset := #Ultimate.alloc(4);havoc ~ldvarg4~0.base, ~ldvarg4~0.offset;havoc ~tmp~163.base, ~tmp~163.offset;call ~#ldvarg3~0.base, ~#ldvarg3~0.offset := #Ultimate.alloc(4);havoc ~ldvarg0~0.base, ~ldvarg0~0.offset;havoc ~tmp___0~69.base, ~tmp___0~69.offset;havoc ~ldvarg5~0.base, ~ldvarg5~0.offset;havoc ~tmp___1~40.base, ~tmp___1~40.offset;call ~#ldvarg2~0.base, ~#ldvarg2~0.offset := #Ultimate.alloc(4);havoc ~ldvarg6~0.base, ~ldvarg6~0.offset;havoc ~tmp___2~30.base, ~tmp___2~30.offset;call ~#ldvarg11~0.base, ~#ldvarg11~0.offset := #Ultimate.alloc(8);havoc ~ldvarg7~0.base, ~ldvarg7~0.offset;havoc ~tmp___3~22.base, ~tmp___3~22.offset;havoc ~ldvarg12~0.base, ~ldvarg12~0.offset;havoc ~tmp___4~17.base, ~tmp___4~17.offset;call ~#ldvarg8~0.base, ~#ldvarg8~0.offset := #Ultimate.alloc(4);havoc ~ldvarg14~0.base, ~ldvarg14~0.offset;havoc ~tmp___5~8.base, ~tmp___5~8.offset;call ~#ldvarg13~0.base, ~#ldvarg13~0.offset := #Ultimate.alloc(4);havoc ~ldvarg10~0.base, ~ldvarg10~0.offset;havoc ~tmp___6~6.base, ~tmp___6~6.offset;call ~#ldvarg9~0.base, ~#ldvarg9~0.offset := #Ultimate.alloc(8);havoc ~ldvarg16~0.base, ~ldvarg16~0.offset;havoc ~tmp___7~5.base, ~tmp___7~5.offset;call ~#ldvarg15~0.base, ~#ldvarg15~0.offset := #Ultimate.alloc(4);havoc ~tmp___8~3;havoc ~tmp___9~3;havoc ~tmp___10~2;havoc ~tmp___11~1;havoc ~tmp___12~1; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,615 INFO L256 TraceCheckUtils]: 6: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1170.base, #t~ret1170.offset := ldv_init_zalloc(8); {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L273 TraceCheckUtils]: 7: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L256 TraceCheckUtils]: 8: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L273 TraceCheckUtils]: 9: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L273 TraceCheckUtils]: 10: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L273 TraceCheckUtils]: 12: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,616 INFO L273 TraceCheckUtils]: 13: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,617 INFO L268 TraceCheckUtils]: 14: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7627#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,618 INFO L273 TraceCheckUtils]: 15: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp~163.base, ~tmp~163.offset := #t~ret1170.base, #t~ret1170.offset;havoc #t~ret1170.base, #t~ret1170.offset;~ldvarg4~0.base, ~ldvarg4~0.offset := ~tmp~163.base, ~tmp~163.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,618 INFO L256 TraceCheckUtils]: 16: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1171.base, #t~ret1171.offset := ldv_init_zalloc(1); {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L273 TraceCheckUtils]: 17: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L256 TraceCheckUtils]: 18: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L273 TraceCheckUtils]: 19: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L273 TraceCheckUtils]: 20: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L268 TraceCheckUtils]: 21: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,618 INFO L273 TraceCheckUtils]: 22: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,619 INFO L273 TraceCheckUtils]: 23: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,619 INFO L268 TraceCheckUtils]: 24: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7629#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,619 INFO L273 TraceCheckUtils]: 25: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___0~69.base, ~tmp___0~69.offset := #t~ret1171.base, #t~ret1171.offset;havoc #t~ret1171.base, #t~ret1171.offset;~ldvarg0~0.base, ~ldvarg0~0.offset := ~tmp___0~69.base, ~tmp___0~69.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,620 INFO L256 TraceCheckUtils]: 26: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1172.base, #t~ret1172.offset := ldv_init_zalloc(8); {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L273 TraceCheckUtils]: 27: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L256 TraceCheckUtils]: 28: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L273 TraceCheckUtils]: 29: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L273 TraceCheckUtils]: 30: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L273 TraceCheckUtils]: 32: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,620 INFO L273 TraceCheckUtils]: 33: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,621 INFO L268 TraceCheckUtils]: 34: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7631#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,621 INFO L273 TraceCheckUtils]: 35: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___1~40.base, ~tmp___1~40.offset := #t~ret1172.base, #t~ret1172.offset;havoc #t~ret1172.base, #t~ret1172.offset;~ldvarg5~0.base, ~ldvarg5~0.offset := ~tmp___1~40.base, ~tmp___1~40.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,621 INFO L256 TraceCheckUtils]: 36: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1173.base, #t~ret1173.offset := ldv_init_zalloc(196); {418236#true} is VALID [2018-11-19 17:43:53,621 INFO L273 TraceCheckUtils]: 37: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,622 INFO L256 TraceCheckUtils]: 38: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,622 INFO L273 TraceCheckUtils]: 39: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,622 INFO L273 TraceCheckUtils]: 40: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,622 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,622 INFO L273 TraceCheckUtils]: 42: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,623 INFO L273 TraceCheckUtils]: 43: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,623 INFO L268 TraceCheckUtils]: 44: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7633#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,624 INFO L273 TraceCheckUtils]: 45: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___2~30.base, ~tmp___2~30.offset := #t~ret1173.base, #t~ret1173.offset;havoc #t~ret1173.base, #t~ret1173.offset;~ldvarg6~0.base, ~ldvarg6~0.offset := ~tmp___2~30.base, ~tmp___2~30.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,624 INFO L256 TraceCheckUtils]: 46: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1174.base, #t~ret1174.offset := ldv_init_zalloc(1); {418236#true} is VALID [2018-11-19 17:43:53,624 INFO L273 TraceCheckUtils]: 47: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,624 INFO L256 TraceCheckUtils]: 48: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,624 INFO L273 TraceCheckUtils]: 49: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,624 INFO L273 TraceCheckUtils]: 50: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,625 INFO L268 TraceCheckUtils]: 51: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,625 INFO L273 TraceCheckUtils]: 52: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,625 INFO L273 TraceCheckUtils]: 53: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,625 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7635#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,626 INFO L273 TraceCheckUtils]: 55: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___3~22.base, ~tmp___3~22.offset := #t~ret1174.base, #t~ret1174.offset;havoc #t~ret1174.base, #t~ret1174.offset;~ldvarg7~0.base, ~ldvarg7~0.offset := ~tmp___3~22.base, ~tmp___3~22.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,626 INFO L256 TraceCheckUtils]: 56: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1175.base, #t~ret1175.offset := ldv_init_zalloc(232); {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L273 TraceCheckUtils]: 57: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L256 TraceCheckUtils]: 58: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L273 TraceCheckUtils]: 59: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L273 TraceCheckUtils]: 60: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L268 TraceCheckUtils]: 61: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,626 INFO L273 TraceCheckUtils]: 62: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,627 INFO L273 TraceCheckUtils]: 63: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,627 INFO L268 TraceCheckUtils]: 64: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7637#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,627 INFO L273 TraceCheckUtils]: 65: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___4~17.base, ~tmp___4~17.offset := #t~ret1175.base, #t~ret1175.offset;havoc #t~ret1175.base, #t~ret1175.offset;~ldvarg12~0.base, ~ldvarg12~0.offset := ~tmp___4~17.base, ~tmp___4~17.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,627 INFO L256 TraceCheckUtils]: 66: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1176.base, #t~ret1176.offset := ldv_init_zalloc(40); {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L273 TraceCheckUtils]: 67: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L256 TraceCheckUtils]: 68: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L273 TraceCheckUtils]: 69: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L273 TraceCheckUtils]: 70: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L268 TraceCheckUtils]: 71: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L273 TraceCheckUtils]: 72: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,628 INFO L273 TraceCheckUtils]: 73: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,629 INFO L268 TraceCheckUtils]: 74: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7639#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,630 INFO L273 TraceCheckUtils]: 75: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___5~8.base, ~tmp___5~8.offset := #t~ret1176.base, #t~ret1176.offset;havoc #t~ret1176.base, #t~ret1176.offset;~ldvarg14~0.base, ~ldvarg14~0.offset := ~tmp___5~8.base, ~tmp___5~8.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,630 INFO L256 TraceCheckUtils]: 76: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1177.base, #t~ret1177.offset := ldv_init_zalloc(232); {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L273 TraceCheckUtils]: 77: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L256 TraceCheckUtils]: 78: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L273 TraceCheckUtils]: 79: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L273 TraceCheckUtils]: 80: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L268 TraceCheckUtils]: 81: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,630 INFO L273 TraceCheckUtils]: 82: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,631 INFO L273 TraceCheckUtils]: 83: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,631 INFO L268 TraceCheckUtils]: 84: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7641#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,631 INFO L273 TraceCheckUtils]: 85: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___6~6.base, ~tmp___6~6.offset := #t~ret1177.base, #t~ret1177.offset;havoc #t~ret1177.base, #t~ret1177.offset;~ldvarg10~0.base, ~ldvarg10~0.offset := ~tmp___6~6.base, ~tmp___6~6.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,631 INFO L256 TraceCheckUtils]: 86: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1178.base, #t~ret1178.offset := ldv_init_zalloc(32); {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L273 TraceCheckUtils]: 87: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L256 TraceCheckUtils]: 88: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L273 TraceCheckUtils]: 89: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L273 TraceCheckUtils]: 90: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L268 TraceCheckUtils]: 91: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L273 TraceCheckUtils]: 92: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,632 INFO L273 TraceCheckUtils]: 93: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,633 INFO L268 TraceCheckUtils]: 94: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7643#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,633 INFO L273 TraceCheckUtils]: 95: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~tmp___7~5.base, ~tmp___7~5.offset := #t~ret1178.base, #t~ret1178.offset;havoc #t~ret1178.base, #t~ret1178.offset;~ldvarg16~0.base, ~ldvarg16~0.offset := ~tmp___7~5.base, ~tmp___7~5.offset;call ldv_initialize(); {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,633 INFO L256 TraceCheckUtils]: 96: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1179.base, #t~ret1179.offset := ldv_memset(~#ldvarg1~0.base, ~#ldvarg1~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,633 INFO L273 TraceCheckUtils]: 97: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L256 TraceCheckUtils]: 98: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L273 TraceCheckUtils]: 99: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L273 TraceCheckUtils]: 100: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L273 TraceCheckUtils]: 101: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L268 TraceCheckUtils]: 102: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L273 TraceCheckUtils]: 103: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,634 INFO L273 TraceCheckUtils]: 104: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,635 INFO L268 TraceCheckUtils]: 105: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7645#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,635 INFO L273 TraceCheckUtils]: 106: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1179.base, #t~ret1179.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,635 INFO L256 TraceCheckUtils]: 107: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1180.base, #t~ret1180.offset := ldv_memset(~#ldvarg3~0.base, ~#ldvarg3~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,635 INFO L273 TraceCheckUtils]: 108: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L256 TraceCheckUtils]: 109: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L273 TraceCheckUtils]: 110: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L273 TraceCheckUtils]: 111: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L273 TraceCheckUtils]: 112: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L268 TraceCheckUtils]: 113: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L273 TraceCheckUtils]: 114: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,636 INFO L273 TraceCheckUtils]: 115: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,637 INFO L268 TraceCheckUtils]: 116: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7647#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,637 INFO L273 TraceCheckUtils]: 117: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1180.base, #t~ret1180.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,637 INFO L256 TraceCheckUtils]: 118: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1181.base, #t~ret1181.offset := ldv_memset(~#ldvarg2~0.base, ~#ldvarg2~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,637 INFO L273 TraceCheckUtils]: 119: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L256 TraceCheckUtils]: 120: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L273 TraceCheckUtils]: 121: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L273 TraceCheckUtils]: 122: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L273 TraceCheckUtils]: 123: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L268 TraceCheckUtils]: 124: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L273 TraceCheckUtils]: 125: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,638 INFO L273 TraceCheckUtils]: 126: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,639 INFO L268 TraceCheckUtils]: 127: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7649#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,639 INFO L273 TraceCheckUtils]: 128: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1181.base, #t~ret1181.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,639 INFO L256 TraceCheckUtils]: 129: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1182.base, #t~ret1182.offset := ldv_memset(~#ldvarg11~0.base, ~#ldvarg11~0.offset, 0, 8); {418236#true} is VALID [2018-11-19 17:43:53,639 INFO L273 TraceCheckUtils]: 130: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L256 TraceCheckUtils]: 131: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L273 TraceCheckUtils]: 132: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L273 TraceCheckUtils]: 133: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L273 TraceCheckUtils]: 134: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L268 TraceCheckUtils]: 135: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L273 TraceCheckUtils]: 136: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,640 INFO L273 TraceCheckUtils]: 137: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,641 INFO L268 TraceCheckUtils]: 138: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7651#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,641 INFO L273 TraceCheckUtils]: 139: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1182.base, #t~ret1182.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,641 INFO L256 TraceCheckUtils]: 140: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1183.base, #t~ret1183.offset := ldv_memset(~#ldvarg8~0.base, ~#ldvarg8~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,641 INFO L273 TraceCheckUtils]: 141: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,642 INFO L256 TraceCheckUtils]: 142: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,642 INFO L273 TraceCheckUtils]: 143: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,642 INFO L273 TraceCheckUtils]: 144: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,642 INFO L273 TraceCheckUtils]: 145: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,642 INFO L268 TraceCheckUtils]: 146: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,643 INFO L273 TraceCheckUtils]: 147: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,643 INFO L273 TraceCheckUtils]: 148: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,644 INFO L268 TraceCheckUtils]: 149: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7653#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,644 INFO L273 TraceCheckUtils]: 150: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1183.base, #t~ret1183.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,645 INFO L256 TraceCheckUtils]: 151: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1184.base, #t~ret1184.offset := ldv_memset(~#ldvarg13~0.base, ~#ldvarg13~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L273 TraceCheckUtils]: 152: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L256 TraceCheckUtils]: 153: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L273 TraceCheckUtils]: 154: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L273 TraceCheckUtils]: 155: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L273 TraceCheckUtils]: 156: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L268 TraceCheckUtils]: 157: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,645 INFO L273 TraceCheckUtils]: 158: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,646 INFO L273 TraceCheckUtils]: 159: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,646 INFO L268 TraceCheckUtils]: 160: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7655#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 161: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1184.base, #t~ret1184.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,647 INFO L256 TraceCheckUtils]: 162: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1185.base, #t~ret1185.offset := ldv_memset(~#ldvarg9~0.base, ~#ldvarg9~0.offset, 0, 8); {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 163: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L256 TraceCheckUtils]: 164: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 165: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 166: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 167: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L268 TraceCheckUtils]: 168: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,647 INFO L273 TraceCheckUtils]: 169: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,648 INFO L273 TraceCheckUtils]: 170: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,649 INFO L268 TraceCheckUtils]: 171: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7657#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,649 INFO L273 TraceCheckUtils]: 172: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1185.base, #t~ret1185.offset; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,650 INFO L256 TraceCheckUtils]: 173: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1186.base, #t~ret1186.offset := ldv_memset(~#ldvarg15~0.base, ~#ldvarg15~0.offset, 0, 4); {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 174: Hoare triple {418236#true} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L256 TraceCheckUtils]: 175: Hoare triple {418236#true} call #t~memset~res50.base, #t~memset~res50.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, (if ~n % 4294967296 % 4294967296 <= 2147483647 then ~n % 4294967296 % 4294967296 else ~n % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 176: Hoare triple {418236#true} #t~loopctr1322 := 0; {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 177: Hoare triple {418236#true} assume !(#t~loopctr1322 < #amount); {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 178: Hoare triple {418236#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L268 TraceCheckUtils]: 179: Hoare quadruple {418236#true} {418236#true} #8777#return; {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 180: Hoare triple {418236#true} ~tmp~6.base, ~tmp~6.offset := ~s.base, ~s.offset;havoc #t~memset~res50.base, #t~memset~res50.offset;#res.base, #res.offset := ~tmp~6.base, ~tmp~6.offset; {418236#true} is VALID [2018-11-19 17:43:53,650 INFO L273 TraceCheckUtils]: 181: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,651 INFO L268 TraceCheckUtils]: 182: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7659#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,651 INFO L273 TraceCheckUtils]: 183: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} havoc #t~ret1186.base, #t~ret1186.offset;~ldv_state_variable_4~0 := 0; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,652 INFO L256 TraceCheckUtils]: 184: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call work_init_1(); {418236#true} is VALID [2018-11-19 17:43:53,652 INFO L273 TraceCheckUtils]: 185: Hoare triple {418236#true} ~ldv_work_1_0~0 := 0;~ldv_work_1_1~0 := 0;~ldv_work_1_2~0 := 0;~ldv_work_1_3~0 := 0; {418236#true} is VALID [2018-11-19 17:43:53,652 INFO L273 TraceCheckUtils]: 186: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,652 INFO L268 TraceCheckUtils]: 187: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7661#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,652 INFO L273 TraceCheckUtils]: 188: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} ~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,653 INFO L273 TraceCheckUtils]: 189: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume -2147483648 <= #t~nondet1187 && #t~nondet1187 <= 2147483647;~tmp___8~3 := #t~nondet1187;havoc #t~nondet1187;#t~switch1188 := 0 == ~tmp___8~3; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,653 INFO L273 TraceCheckUtils]: 190: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 1 == ~tmp___8~3; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,653 INFO L273 TraceCheckUtils]: 191: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume !#t~switch1188;#t~switch1188 := #t~switch1188 || 2 == ~tmp___8~3; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,654 INFO L273 TraceCheckUtils]: 192: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume #t~switch1188; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,654 INFO L273 TraceCheckUtils]: 193: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= #t~nondet1205 && #t~nondet1205 <= 2147483647;~tmp___10~2 := #t~nondet1205;havoc #t~nondet1205;#t~switch1206 := 0 == ~tmp___10~2; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,655 INFO L273 TraceCheckUtils]: 194: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume !#t~switch1206;#t~switch1206 := #t~switch1206 || 1 == ~tmp___10~2; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,655 INFO L273 TraceCheckUtils]: 195: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume #t~switch1206; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,656 INFO L273 TraceCheckUtils]: 196: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume 1 == ~ldv_state_variable_0~0; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,656 INFO L256 TraceCheckUtils]: 197: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call #t~ret1207 := rtl8152_driver_init(); {418236#true} is VALID [2018-11-19 17:43:53,656 INFO L273 TraceCheckUtils]: 198: Hoare triple {418236#true} havoc ~tmp~158; {418236#true} is VALID [2018-11-19 17:43:53,657 INFO L256 TraceCheckUtils]: 199: Hoare triple {418236#true} call #t~ret1160 := ldv_usb_register_driver_61(~#rtl8152_driver~0.base, ~#rtl8152_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string1159.base, #t~string1159.offset); {418236#true} is VALID [2018-11-19 17:43:53,657 INFO L273 TraceCheckUtils]: 200: Hoare triple {418236#true} ~ldv_func_arg1.base, ~ldv_func_arg1.offset := #in~ldv_func_arg1.base, #in~ldv_func_arg1.offset;~ldv_func_arg2.base, ~ldv_func_arg2.offset := #in~ldv_func_arg2.base, #in~ldv_func_arg2.offset;~ldv_func_arg3.base, ~ldv_func_arg3.offset := #in~ldv_func_arg3.base, #in~ldv_func_arg3.offset;havoc ~ldv_func_res~11;havoc ~tmp~176;call #t~ret1264 := usb_register_driver(~ldv_func_arg1.base, ~ldv_func_arg1.offset, ~ldv_func_arg2.base, ~ldv_func_arg2.offset, ~ldv_func_arg3.base, ~ldv_func_arg3.offset);assume -2147483648 <= #t~ret1264 && #t~ret1264 <= 2147483647;~tmp~176 := #t~ret1264;havoc #t~ret1264;~ldv_func_res~11 := ~tmp~176;~ldv_state_variable_2~0 := 1;~usb_counter~0 := 0; {418236#true} is VALID [2018-11-19 17:43:53,657 INFO L256 TraceCheckUtils]: 201: Hoare triple {418236#true} call ldv_usb_driver_2(); {418236#true} is VALID [2018-11-19 17:43:53,657 INFO L273 TraceCheckUtils]: 202: Hoare triple {418236#true} havoc ~tmp~159.base, ~tmp~159.offset; {418236#true} is VALID [2018-11-19 17:43:53,658 INFO L256 TraceCheckUtils]: 203: Hoare triple {418236#true} call #t~ret1161.base, #t~ret1161.offset := ldv_init_zalloc(1560); {418236#true} is VALID [2018-11-19 17:43:53,658 INFO L273 TraceCheckUtils]: 204: Hoare triple {418236#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~5.base, ~tmp~5.offset;call #t~malloc49.base, #t~malloc49.offset := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,658 INFO L256 TraceCheckUtils]: 205: Hoare triple {418236#true} call #Ultimate.meminit(#t~malloc49.base, #t~malloc49.offset, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); {418236#true} is VALID [2018-11-19 17:43:53,658 INFO L273 TraceCheckUtils]: 206: Hoare triple {418236#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {418236#true} is VALID [2018-11-19 17:43:53,658 INFO L273 TraceCheckUtils]: 207: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L268 TraceCheckUtils]: 208: Hoare quadruple {418236#true} {418236#true} #7503#return; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L273 TraceCheckUtils]: 209: Hoare triple {418236#true} ~tmp~5.base, ~tmp~5.offset := #t~malloc49.base, #t~malloc49.offset;~p~2.base, ~p~2.offset := ~tmp~5.base, ~tmp~5.offset;assume 0 != (if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0);#res.base, #res.offset := ~p~2.base, ~p~2.offset; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L273 TraceCheckUtils]: 210: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L268 TraceCheckUtils]: 211: Hoare quadruple {418236#true} {418236#true} #6839#return; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L273 TraceCheckUtils]: 212: Hoare triple {418236#true} ~tmp~159.base, ~tmp~159.offset := #t~ret1161.base, #t~ret1161.offset;havoc #t~ret1161.base, #t~ret1161.offset;~rtl8152_driver_group1~0.base, ~rtl8152_driver_group1~0.offset := ~tmp~159.base, ~tmp~159.offset; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L273 TraceCheckUtils]: 213: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L268 TraceCheckUtils]: 214: Hoare quadruple {418236#true} {418236#true} #6993#return; {418236#true} is VALID [2018-11-19 17:43:53,659 INFO L273 TraceCheckUtils]: 215: Hoare triple {418236#true} #res := ~ldv_func_res~11; {418236#true} is VALID [2018-11-19 17:43:53,660 INFO L273 TraceCheckUtils]: 216: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,660 INFO L268 TraceCheckUtils]: 217: Hoare quadruple {418236#true} {418236#true} #7481#return; {418236#true} is VALID [2018-11-19 17:43:53,660 INFO L273 TraceCheckUtils]: 218: Hoare triple {418236#true} assume -2147483648 <= #t~ret1160 && #t~ret1160 <= 2147483647;~tmp~158 := #t~ret1160;havoc #t~ret1160;#res := ~tmp~158; {418236#true} is VALID [2018-11-19 17:43:53,660 INFO L273 TraceCheckUtils]: 219: Hoare triple {418236#true} assume true; {418236#true} is VALID [2018-11-19 17:43:53,660 INFO L268 TraceCheckUtils]: 220: Hoare quadruple {418236#true} {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} #7699#return; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,661 INFO L273 TraceCheckUtils]: 221: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume -2147483648 <= #t~ret1207 && #t~ret1207 <= 2147483647;~ldv_retval_0~0 := #t~ret1207;havoc #t~ret1207; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,661 INFO L273 TraceCheckUtils]: 222: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume !(0 == ~ldv_retval_0~0); {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,661 INFO L273 TraceCheckUtils]: 223: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume 0 != ~ldv_retval_0~0;~ldv_state_variable_0~0 := 2; {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,662 INFO L256 TraceCheckUtils]: 224: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} call ldv_check_final_state(); {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} is VALID [2018-11-19 17:43:53,662 INFO L273 TraceCheckUtils]: 225: Hoare triple {418238#(= 1 ~ldv_mutex_control_of_r8152~0)} assume 1 != ~ldv_mutex_control_of_r8152~0; {418237#false} is VALID [2018-11-19 17:43:53,662 INFO L256 TraceCheckUtils]: 226: Hoare triple {418237#false} call ldv_error(); {418237#false} is VALID [2018-11-19 17:43:53,662 INFO L273 TraceCheckUtils]: 227: Hoare triple {418237#false} assume !false; {418237#false} is VALID [2018-11-19 17:43:53,686 INFO L134 CoverageAnalysis]: Checked inductivity of 612 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-11-19 17:43:53,686 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-19 17:43:53,686 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-19 17:43:53,687 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 228 [2018-11-19 17:43:53,687 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-19 17:43:53,688 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-19 17:43:53,853 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-19 17:43:53,853 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-19 17:43:53,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-19 17:43:53,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-19 17:43:53,854 INFO L87 Difference]: Start difference. First operand 37660 states and 52725 transitions. Second operand 3 states.